JP7148780B2 - Semiconductor device manufacturing method - Google Patents

Description

The present disclosure relates to a method of manufacturing a semiconductor device.

2. Description of the Related Art In recent years, light emitting diodes (LEDs) that emit blue light have been developed, and the output of LEDs has been increasing, so light source devices using LEDs have attracted attention. For example, there are a backlight device for a liquid crystal display (LCD) and an illumination light source that requires high brightness.

In Patent Document 1, a wiring pattern is provided on a mounting substrate, a light emitting element chip is electrically connected to the wiring pattern, and a white resist layer is wired so as to leave an opening at and near the mounting position of the light emitting element chip. A light emitting device coated on a pattern is described.

Further, Patent Document 2 describes a method of forming a solder mask on a wiring board. A solder mask is formed on the surface of the base layer on the wiring board, and pads are formed on the surface of the base layer that is not covered with the solder mask. This method of forming a solder mask includes forming a first sub-solder mask on the surface of a base layer by performing a screen printing process, and forming a second sub-solder mask on the surface of the base layer by performing an inkjet process. forming. Thereby, a high wiring density can be realized.

Further, in Patent Document 3, a substrate having a wiring conductor, an anisotropic conductive adhesive member in which conductive particles are mixed in a translucent resin, and an anisotropic conductive adhesive member are bonded onto the wiring conductor via the anisotropic conductive adhesive member. A light-emitting device having a semiconductor light-emitting element is described.

Furthermore, Patent Document 4 describes a light-emitting device having a substrate having a wiring portion, a light-emitting element arranged on the wiring portion, and an underfill covering the bottom and side surfaces of the light-emitting element.

JP 2008-258296 A JP 2007-129178 A JP 2013-243344 A JP 2016-122693 A

In the manufacturing method of the light-emitting device of Patent Document 1, since the wiring pattern is exposed at the mounting position of the light-emitting element chip and its vicinity, part of the light from the light-emitting element chip is absorbed. Also in Patent Document 2, the base layer is exposed between the pad and the second sub-solder mask. In Patent Document 3, an anisotropic conductive adhesive member covers the side surface of the light emitting element. Furthermore, in Patent Document 4, an underfill covers the sides of the light emitting element.

An object of the present embodiment is to provide a simple method for manufacturing a semiconductor device in which most of the side surfaces of a semiconductor element are not covered with a conductive member and the exposed portion of the substrate is small.

A method of manufacturing a semiconductor device according to an embodiment of the present invention includes steps of forming a pair of wirings on a substrate, and screen-printing a first resist on the substrate or on the pair of wirings except for a first region. forming a conductive member on the pair of wires in the first region; placing a semiconductor element on the pair of wires via the conductive member; and applying a second resist using an ink jet method or a dispensing method to cover the first region.

As a result, most of the side surfaces of the semiconductor element are not covered with the conductive member, and it is possible to provide a simple method of manufacturing a semiconductor device with a small exposed portion of the substrate.

1 is a schematic plan view showing a semiconductor device according to a first embodiment; FIG. 1 is a schematic enlarged plan view showing a semiconductor device according to a first embodiment; FIG. 1 is a schematic enlarged cross-sectional view showing a semiconductor device according to a first embodiment; FIG. FIG. 4 is a schematic plan view showing manufacturing process 1 of the semiconductor device according to the first embodiment; FIG. 4 is a schematic enlarged plan view showing manufacturing process 1 of the semiconductor device according to the first embodiment; FIG. 4 is a schematic enlarged cross-sectional view showing manufacturing process 1 of the semiconductor device according to the first embodiment; FIG. 10 is a schematic enlarged plan view showing manufacturing process 2 of the semiconductor device according to the first embodiment; FIG. 10 is a schematic enlarged cross-sectional view showing manufacturing process 2 of the semiconductor device according to the first embodiment; FIG. 10 is a schematic enlarged plan view showing manufacturing process 3 of the semiconductor device according to the first embodiment; FIG. 4 is a schematic enlarged cross-sectional view showing manufacturing process 3 of the semiconductor device according to the first embodiment; FIG. 10 is a schematic enlarged plan view showing a manufacturing process 4 of the semiconductor device according to the first embodiment; FIG. 4 is a schematic enlarged cross-sectional view showing a manufacturing process 4 of the semiconductor device according to the first embodiment; FIG. 11 is a schematic enlarged plan view showing manufacturing process 5 of the semiconductor device according to the first embodiment; FIG. 11 is a schematic enlarged cross-sectional view showing manufacturing step 5 of the semiconductor device according to the first embodiment;

A semiconductor device and a method for manufacturing the same according to the first embodiment will be described below with reference to the drawings. However, the invention is not limited to this embodiment and example.

The semiconductor device according to this embodiment can be used as a transistor, an IC, or the like, and can also be used as a light source using a semiconductor light-emitting element such as an LED or a laser diode (LD). The semiconductor device can also be used as a planar light source applied to a direct type backlight of LCD, etc., and the upper surface is used as a light irradiation surface. Since the drawings referred to in the following description schematically show the embodiments of the present disclosure, the members shown in the drawings may have exaggerated sizes, positional relationships, etc. There are things that have become. Also, in some drawings, for convenience of explanation, the top and bottom in the drawings showing cross-sectional views will be described as the top and bottom, unless otherwise specified. Further, in the following description, the same names and symbols basically indicate the same or homogeneous members, and detailed description may be omitted as appropriate.

[Semiconductor device]
A semiconductor device according to this embodiment will be described with reference to the drawings. FIG. 1 is a schematic plan view showing the semiconductor device according to the first embodiment. FIG. 2 is a schematic enlarged plan view showing the semiconductor device according to the first embodiment. FIG. 3 is a schematic enlarged cross-sectional view showing the semiconductor device according to the first embodiment, showing a cross section taken along line III-III of FIG. FIG. 2 is an enlarged view of the dotted line in FIG. Also, in FIG. 1, the wiring pattern is covered with the first resist and the second resist and cannot be visually recognized in a plan view, but for convenience of explanation, the wiring pattern is indicated by a dotted line.

A semiconductor device has predetermined wirings 20 arranged on a substrate 10 . The wiring 20 is arranged so as to form a pair of electrodes when connected to an external electrode or a semiconductor element. A first resist 30 is formed on the substrate 10 or on the pair of wirings 20 except for the first region A. As shown in FIG. The first resist 30 protects the wiring 20 from external dust and moisture, and also prevents short circuits due to contact with other metals. A conductive member 40 is formed on the pair of wirings 20 in the first area A. As shown in FIG. The semiconductor element 50 is mounted on the pair of wirings 20 via the conductive member 40 and, in some cases, the conductive member 40 with a conductive adhesive. A second resist 60 is arranged between the substrate 10 and the semiconductor element 50 . A second resist 60 covers the first region A. As shown in FIG. A portion of the second resist 60 preferably covers not only the first region A but also a portion of the first resist 30 in the vicinity of the first region A. As shown in FIG. Most of the side surface of the semiconductor element 50 is not covered with the conductive member 40 , and preferably the entire side surface of the semiconductor element 50 is not covered with the conductive member 40 or the second resist 60 . As a result, the upper surface of the substrate 10 is covered with the wiring 20, the first resist 30, and the second resist 60, and the substrate 10 is not exposed. The semiconductor element 50 is covered with a sealing member 70 .

The wiring 20 can be appropriately designed for the substrate 10 . The wiring 20 is divided into a plurality of parts, and by electrically connecting them with the semiconductor element 50 and the conductive member 40 , power can be supplied to the semiconductor element 50 . The wiring 20 is divided into at least two at the portion where the semiconductor element 50 is mounted. A pair of electrodes of the semiconductor element 50 are electrically connected to a pair of wirings 20 via conductive members 40 . The wiring 20 is largely divided into a mounting portion for mounting the semiconductor element 50 and a connection portion for connecting to the external electrodes, and the mounting portion and the connection portion are continuously connected. The substrate 10 is preferably flexible, and the wiring 20 is also preferably flexible. The substrate 10 and the wiring 20 have flexibility by changing the material, adjusting the thickness, etc., and the degree of flexibility can be appropriately adjusted.

By forming the first resist 30 on the substrate 10 or the pair of wirings 20, it is possible to prevent short circuits caused by metal such as solder. In addition, by mixing a white filler into the first resist 30, the reflectance of light from the semiconductor element 50 such as an LED can be increased. The first resist 30 does not cover the first region A. As shown in FIG. The first area A is an area where the semiconductor element 50 is mounted, and is provided with an area larger than the area of the semiconductor element 50 in consideration of workability at the time of mounting. An etching resist is formed on the substrate 10 on which the wiring 20 is formed, and etching is performed to form a conductor pattern. After that, the first resist 30 is formed using a solder resist. The etching precision at this time is often not sufficient. Therefore, if the area of the first region A is reduced, the desired pair of wirings 20 may not be exposed, making it impossible to mount the semiconductor element 50 . On the other hand, if the area of the first region A is increased in consideration of the etching precision, the exposed portion of the substrate 10 not covered with the wiring 20 increases, causing problems such as short circuits and a decrease in reflectance. Therefore, by covering the exposed portion of the substrate 10 that is not covered with the wiring 20 with the second resist 60 while the area of the first region A is widened, it is possible to prevent a short circuit and suppress a decrease in reflectance. In addition, by including particles with a high reflectance such as white filler in the second resist 60, the reflectance can be made higher than that of the substrate 10 and the wiring 20, and the reflectance can be improved. In particular, the reflectance of the semiconductor device can be increased by forming the second resist 60 having a high reflectance in the first region A where the light from the semiconductor element 50 such as an LED is strongly emitted. Furthermore, since the heat from the semiconductor element 50 is directly transmitted to the first region A, there is concern that the second resist 60 may deteriorate. Therefore, by adopting a member with high translucency for the second resist 60 or containing a white filler with a high reflectance, the rate of heat accumulation in the second resist 60 is reduced, and deterioration of the second resist 60 is prevented. can be suppressed. In particular, when a translucent resin containing a white filler is used for the second resist 60 , it is preferable that the ratio of the amount of resin is smaller than the ratio of the translucent resin used for the first resist 30 .

The area of the first region A may be 2 to 20 times the area of the upper surface of the semiconductor element 50, preferably 2 to 10 times, and more preferably 3 to 5 times.

The thickness of the wiring 20 in the first region A is preferably 0.009 mm to 0.105 mm, more preferably 0.035 mm to 0.105 mm. By reducing the thickness of the wiring 20, the thickness of the semiconductor device can be reduced, and the substrate 10 and the wiring 20 can be made easier to bend. On the other hand, by increasing the thickness of the wiring 20, the thermal resistance of the substrate 10 and the wiring 20 can be suppressed, and bending of the substrate 10 and the wiring 20 can be suppressed.

The height of the conductive member 40 is preferably 0.02 mm to 1.0 mm, more preferably 0.02 mm to 0.5 mm. By increasing the height of the conductive member 40 , the second resist 60 can easily enter the space between the semiconductor element 50 and the wiring 20 . Further, by increasing the height of the conductive member 40, the amount of the second resist 60 can be increased, the amount of heat transfer from the substrate 10 and the wiring 20 is increased, and heat dissipation can be promoted. Furthermore, by increasing the height of the conductive member 40, it is possible to easily control the directivity of light from the semiconductor element 50 such as an LED.

The semiconductor element 50 is preferably covered with a sealing member 70 having a lens shape such as a hemispherical shape. The sealing member 70 preferably covers not only the semiconductor element 50 but also the second resist 60 , and preferably also partially covers the first resist 30 in the vicinity of the second resist 60 . The sealing member 70 can have a concave shape or a convex shape so as to condense or diffuse light.

As described above, in the semiconductor device in which the semiconductor element 50 is directly mounted on the substrate 10, the exposed portion of the substrate 10 from the wiring 20 and the like can be reduced as much as possible. This makes it possible to suppress a short circuit and a decrease in reflectance. Moreover, most of the side surface of the semiconductor element 50 such as an LED is not covered with the conductive member 40 or the second resist 60, so that light extraction from the semiconductor element 50 can be enhanced. In addition, since the mounting position accuracy can be improved by forming the conductive member 40, the semiconductor elements 50 can be mounted at high density, and the mounting position of the semiconductor elements 50 can be easily adjusted according to the object. can be Further, by increasing the height of the mounting position of the semiconductor element 50, it is possible to facilitate the optical design and improve the light extraction efficiency. Further, the deterioration of the substrate 10 can be prevented by keeping a distance from the substrate 10, which may be deteriorated by light when the semiconductor element 50 such as an LED is used, and by using the second resist 60 with good reflectivity. can be suppressed.

Each component will be described in detail below.

A substrate is a member that supports wiring, a first resist, a conductive member, a semiconductor element, and the like. The substrate is preferably an insulating member. The substrate has wiring on the upper surface, but metal foil or the like may also be provided on the lower surface. Heat dissipation can be improved by providing a metal foil on the lower surface. Substrates of various materials and shapes can be used according to the number of semiconductor elements to be used and the mode of use. Thermoplastic resins and thermosetting resins can be used as the material of the substrate. Modified resins, silicone-modified resins, and urethane resins can be mentioned. In addition, fine particles such as TiO ₂ , SiO ₂ , Al ₂ O ₃ , MgO, MgCO ₃ , CaCO ₃ , Mg(OH) ₂ and Ca(OH) ₂ may be mixed into these resins as fillers. . Also, as the material of the substrate, a metal material such as copper, iron, aluminum, gold, or silver having an insulating member formed on the surface thereof may be used. Ceramics, glass, paper, or the like can also be used for the substrate. For example, as ceramics, aluminum nitride, alumina, Low Temperature Co-fired Ceramics (LTCC), etc. can be used. The substrate is formed in a thickness having necessary strength and flexibility depending on the material, and specifically, preferably in a range of 0.01 to 1 mm. In addition, in order to increase the light reflectance of the surface of the substrate, a member with high light reflectivity is used for the wiring and the first resist, and the first resist contains a white filler such as titanium oxide that serves as a light reflecting member. preferably. By using such a substrate, wiring, first resist, etc., the light emission output of the semiconductor device is improved. Polyimide is preferred when a flexible substrate is used, and glass epoxy resin is preferred when a non-flexible substrate is used.

The substrate is preferably flexible and sheet-like. The size and shape of the substrate are not particularly limited, and various shapes such as rectangles, squares, polygons, circles, and ellipses can be adopted in plan view. A substrate having a plate-like shape in a cross-sectional view, or a substrate having concave portions and convex portions and having different thicknesses may be used. The substrate is preferably an insulating material having heat resistance against heat generated from the semiconductor element and heat resistance against the temperature at which the conductive member is formed. The temperature at which the conductive member is formed is the curing temperature if the conductive member is, for example, a conductive adhesive, and the melting temperature if the conductive member is solder.

As the wiring, Fe, Cu, Ni, Al, Ag, Au, etc. and alloys containing these can be used. In addition, wiring whose surface is plated can also be used. The wiring may be laminated not only in one layer but also in multiple layers.

The wiring is formed by a build-up method or a subtractive method using a photoresist, or formed by printing using a conductive paste, electrolytic plating, electroless plating, or the like.

The wiring has various shapes such as rectangles, squares, polygons, circles, ellipses, and combinations thereof in plan view, and has a mounting portion for mounting the semiconductor element, and a linear or bent shape for connecting to the external electrodes. , and a connecting portion such as a curved shape. The end of the wiring may be perpendicular, inclined, or curved with respect to the substrate in a cross-sectional view. It is preferable that the cross section of the wiring in the first region where the semiconductor element is mounted is perpendicular to the substrate or has an inclination angle of several degrees. As a result, the distance between a pair of wirings can be shortened, and a small semiconductor element can be used and semiconductor elements can be mounted at high density.

Although it depends on the arrangement pitch of the semiconductor elements, the pair of wirings is preferably flexible and resistant to bending because the pattern of the portion where the semiconductor elements are mounted is large. Moreover, when the width of the wiring is wide, it is preferable that the wiring be made of a relatively inexpensive wiring material.

The wiring is preferably made of, for example, aluminum, an aluminum alloy, copper, a copper alloy, silver, or the like. It is preferable that the wiring has a thickness equal to or greater than that required conductivity and strength that prevents breakage or disconnection together with the substrate can be obtained. When aluminum is used for the wiring, the thickness of the wiring is preferably in the range of 0.01 to 0.2 mm.

The first resist has a role of protecting the wiring from dust, moisture and the like. For the first resist, for example, thermosetting, ultraviolet curing, or photosensitive insulating resin can be used. Since the first resist is also preferably flexible, it is preferable to use a flexible material. The first resist preferably contains a reflective member such as white filler.

The conductive member is for arranging the semiconductor element on the wiring and electrically connecting it. The conductive member is preferably conductive paste or solder. By using a flexible member as the conductive paste, the semiconductor device can be made flexible. By using solder for the conductive member, electrical connection can be achieved at a relatively low temperature. The conductive member is formed of a conductive material that is cured from a liquid or paste. Adhesives and the like can be mentioned, and materials with high electrical conductivity and high thermal conductivity are preferred. Thermosetting resin containing conductive particles can be used as the conductive member. It has conductivity when the conductive particles come into contact with each other or join together.

It is preferable that a plurality of conductive members are provided and the height of the conductive member is constant. By aligning the heights of the conductive members, tilting of the semiconductor element can be suppressed. The upper surface of the conductive member may be formed by polishing or pressing. For example, by using a thermosetting resin containing conductive particles, curing the thermosetting resin, and polishing the upper surface of the resin, the conductive member is exposed on the upper surface, so that the bonding with the semiconductor element is further enhanced. can be strengthened.

The conductive member can be formed to have a predetermined height by using a mask with a plurality of holes and filling the holes with a conductive paste.

A conductive adhesive may be further provided on the conductive member. The melting point of the conductive member is preferably higher than the melting point or bonding temperature of the conductive adhesive member. As a result, the semiconductor element can be mounted while maintaining the height of the conductive member.

A thermosetting resin such as an epoxy resin containing a conductive member can be used as the conductive adhesive. A conductive paste or solder can also be used as the conductive adhesive.

As a semiconductor element, it can be used for a transistor, an integrated circuit (IC), a large-scale integrated circuit (LSI), a very large-scale integration (VLSI), an ultra large-scale integration (ULSI), and the like. Also, for example, the LSI may function as a memory or a Central Processing Unit (CPU).

As the semiconductor element, it is preferable to use a semiconductor light-emitting element such as an LED or an LD. The semiconductor light-emitting element is a chip of a semiconductor light-emitting element capable of being flip-chip mounted, which has a pair of electrodes with a lower surface as a mounting surface. The semiconductor light emitting element may have a planar shape of a quadrangle, a triangle, a polygon such as a pentagon or a hexagon, or a circle, and the shape, size, and the like are not particularly limited. The emission color of the semiconductor _{light emitting} element is not particularly limited, and any wavelength can be selected according to the application of the semiconductor device. InGaN-based nitride semiconductors such as Ga _1-XY N (0≦X≦1, 0≦Y≦1, X+Y<1) can be used.

The second resist covers the substrate exposed from the wiring and the wiring exposed from the first resist. The second resist may use the same material as the first resist, or may use a different material. Like the first resist, the second resist preferably contains a reflective member, and preferably contains a white filler. As with the first resist, the resin used for the second resist preferably has excellent heat resistance and light resistance.

The second resist preferably has a higher concentration of white filler than the first resist. This is because it is possible to increase the reflectance around the semiconductor element. The concentration of the white filler in the second resist is preferably 3 wt % to 50 wt %, more preferably 5 wt % to 40 wt %, and preferably 10 wt % to 30 wt %. Reflectance can be increased by containing a white filler at a high concentration. On the other hand, by containing the white filler at a low concentration, the viscosity of the second resist before curing can be lowered, and application using an inkjet or dispensing method can be facilitated.

The second resist preferably has a reflectance of 70% or more, more preferably 80% or more, and particularly preferably 90% or more in the visible light region. In addition, it is preferably 70% or more, more preferably 80% or more, and particularly preferably 90% or more at the emission peak wavelength of the semiconductor element.

Instead of the white filler, a material having a high reflectance may be appropriately selected according to the emission wavelength of the semiconductor element. The second resist can also hide the resin that deteriorates due to the light from the semiconductor light emitting device.

The sealing member protects the semiconductor element from dust, moisture, and external force after the semiconductor element is mounted. As a material for the sealing member, a material that is resistant to heat deterioration is preferable. Moreover, when a semiconductor light emitting element is used as the semiconductor element, it is preferable that the semiconductor light emitting element has translucency that allows the light from the semiconductor light emitting element to pass therethrough, and also has light resistance that does not easily deteriorate.

The sealing member preferably covers not only the semiconductor element but also the first region.

The shape of the outer surface of the sealing member can be selected variously according to the light distribution characteristics and the like. For example, the upper surface of the sealing member has a convex lens shape, and besides this, it can have a concave lens shape, a Fresnel lens shape, or the like, and the directional characteristics can be adjusted according to the shape. A potting method, a compression molding method, a printing method, a transfer molding method, a jet dispensing method, or the like can be used for the sealing member. Moreover, the sealing member may be made hollow, and for example, it may be fixed by covering with a dome-shaped translucent covering member.

Specific materials for the sealing member include resins, glass, and the like. An insulating resin composition having translucency that allows light to pass therethrough can be mentioned. In particular, a hybrid resin containing at least one resin having a siloxane skeleton as a base, such as dimethyl silicone, phenyl silicone with a low phenyl content, and fluorine-based silicone resin, can also be used as the sealing member. The hardness of these resins is preferably JIS A hardness of 10 or more and D hardness of 90 or less. More preferably, the JISA hardness is 40 or more and the D hardness is 70 or less.

Furthermore, in addition to such a translucent material, the sealing member may optionally contain a coloring agent, a light diffusing agent, a light reflecting material, various fillers, a wavelength converting member (fluorescent member), and the like. can. The wavelength conversion member is not particularly limited as long as it absorbs light from the semiconductor light emitting element and converts the wavelength into light of a different wavelength. Specifically, nitride-based phosphors, oxynitride-based phosphors, sialon-based phosphors that are mainly activated by lanthanide-based elements such as Eu and Ce, lanthanide-based phosphors such as Eu, and transition metal-based materials such as Mn. Elementally activated alkaline earth halogen apatite phosphors, alkaline earth metal halogen borate phosphors, alkaline earth metal aluminate phosphors, alkaline earth silicates, alkaline earth sulfides, alkaline earth Group thiogallates, alkaline earth silicon nitrides, germanates, or rare earth aluminates and rare earth silicates that are primarily activated by lanthanoid elements such as Ce, or organics that are primarily activated by lanthanoid elements such as Eu and at least one selected from organic complexes and the like. More specifically, (Y, Gd) ₃ (Al, Ga) ₅ O ₁₂ : Ce, (Ca, Sr, Ba) ₂ SiO ₄ : Eu, (Ca, Sr) ₂ Si ₅ N ₈ : Eu, ( Ca, Sr)AlSiN ₃ :Eu and the like.

[Method for manufacturing a semiconductor device]
In the manufacturing process, the raw material and the molded product may have different shapes and properties, but the same name may be used. For example, a liquid epoxy resin is used as a raw material, and the same epoxy resin is used even for a molded article cured by heating. Changing names during the manufacturing process complicates the explanation of the content of the invention, so the explanation will be made as appropriate in consideration of the common technical knowledge of those skilled in the art.

The method of manufacturing a semiconductor device according to the present embodiment includes (1) forming a pair of wirings on a substrate, and (2) screening a first resist on the substrate or on the pair of wirings except for a first region. (3) forming a conductive member on the pair of wires in the first region; (4) placing a semiconductor element on the pair of wires via the conductive member; and applying a second resist between the substrate and the semiconductor element using an inkjet method or a dispensing method to cover the first region. Furthermore, (7) a step of covering the semiconductor element with a sealing member may be provided.

The above steps will be described in detail below.

(1) The process of forming the pair of wirings 20 on the substrate 10 will be described with reference to FIGS. 4 to 6. FIG. FIG. 4 is a schematic plan view showing the manufacturing process 1 of the semiconductor device according to the first embodiment. FIG. 5 is a schematic enlarged plan view showing the manufacturing process 1 of the semiconductor device according to the first embodiment. FIG. 6 is a schematic enlarged cross-sectional view showing the manufacturing process 1 of the semiconductor device according to the first embodiment, showing a cross section taken along line VI-VI of FIG. 5 to 14 are for explaining the portion corresponding to the dotted line in FIG.

It is preferable to prepare a plate-like substrate 10, attach a metal foil such as copper to the substrate 10, and then form a pattern with an etching resist and perform etching. Alternatively, a flat substrate 10 may be prepared, a conductive paste may be applied on the substrate 10, a conductive layer may be formed, and then the pair of wirings 20 may be formed by etching. This is because the metal foil is cheaper and can be manufactured in a short time. For example, after forming a metal foil on a substrate, after partially protecting the metal foil using a photoresist, unnecessary metal foil can be removed by etching. Wiring can also be formed by well-known methods such as inkjet and printing in addition to etching.

(2) A step of screen-printing the first resist 30 on the substrate 10 or the pair of wirings 20 except for the first region A will be described with reference to FIGS. 7 and 8. FIG. FIG. 7 is a schematic enlarged plan view showing the manufacturing process 2 of the semiconductor device according to the first embodiment. FIG. 8 is a schematic enlarged cross-sectional view showing the manufacturing process 2 of the semiconductor device according to the first embodiment, showing a cross section taken along line VIII-VIII of FIG.

A first resist 30 is arranged on the substrate 10 on which the wiring 20 is formed so as to exclude the first region A where the semiconductor element 50 is mounted. For example, using a mask having a portion corresponding to the first region A on the substrate 10 on which the wiring 20 is formed, the first resist 30 is screen-printed, and after removing the mask, the first resist 30 is cured, A first resist 30 is formed. Alternatively, the first resist 30 is screen-printed on the substrate 10 on which the wiring 20 is formed, the portion corresponding to the first region A is exposed, and etching is performed to remove the first resist 30 in the first region A. By removing, the first resist 30 is formed. The first resist in the first area may be removed by exposing areas other than the first area A by changing the type of resist.

(3) The step of forming the conductive member 40 on the pair of wirings 20 in the first region A will be described with reference to FIGS. 9 and 10. FIG. FIG. 9 is a schematic enlarged plan view showing the manufacturing process 3 of the semiconductor device according to the first embodiment. FIG. 10 is a schematic enlarged cross-sectional view showing the manufacturing process 3 of the semiconductor device according to the first embodiment, showing a cross section taken along line XX of FIG.

In the step of forming the conductive member 40, a metal mask having a thickness of 0.02 mm to 1.0 mm is used, conductive paste is printed in a plurality of holes provided in the metal mask, and a thickness of 0.02 mm corresponding to the thickness of the metal mask is printed. It is preferable to form the conductive member with a thickness of 02 mm to 1.0 mm. Alternatively, after forming the conductive member using a metal mask, the conductive member 40 having a predetermined height may be formed by polishing the upper surface of the conductive member. As a result, the height of the conductive member 40 can be made uniform, and the mounting stability of the semiconductor element 50 can be improved. By polishing the upper surface of the conductive member, the conductive particles contained in the conductive member are exposed, and the bondability with the semiconductor element 50 can be enhanced. The conductive member may be a conductive paste containing solder, a resin containing solder and metal filler, or a variable melting point solder. The conductive member may be a metal paste. It is preferable that the conductive member uses a first thermosetting resin containing a metal filler. A conductive member having a predetermined height can be easily formed. After the conductive member is cured using the first thermosetting resin containing a metal filler, it is preferable to polish the upper surface of the cured first thermosetting resin. As a result, the metal filler in the first thermosetting resin is exposed, and the bondability with the semiconductor element 50 can be enhanced. The first thermosetting resin preferably has sufficient thixotropic properties so that it can retain its shape during thermosetting, and contains a metal filler that does not melt in the heat treatment process.

(4) The step of placing the semiconductor element 50 on the pair of wirings 20 via the conductive member 40 will be described with reference to FIGS. 11 and 12. FIG. FIG. 11 is a schematic enlarged plan view showing manufacturing process 4 of the semiconductor device according to the first embodiment. FIG. 12 is a schematic enlarged cross-sectional view showing the manufacturing process 4 of the semiconductor device according to the first embodiment, showing a cross section taken along line XII-XII of FIG.

The semiconductor element 50 can be bonded by applying heat to the conductive member 40 . The conductive member 40 may be heated when the semiconductor element 50 is placed, or may be heated in the reflow process after the semiconductor element 50 is placed. Alternatively, the semiconductor element 50 may be placed after the conductive adhesive is placed on the conductive member 40 . Accordingly, by placing the semiconductor element 50 while maintaining the height of the conductive member 40, the space between the substrate 10 or the wiring 20 and the semiconductor element 50 can be kept high, and the second resist 60 can be easily applied. can be

(5) A process of applying the second resist 60 between the substrate 10 and the semiconductor element 50 using an ink jet method or a dispensing method to cover the first region will be described with reference to FIGS. 13 and 14. FIG. FIG. 13 is a schematic enlarged plan view showing manufacturing process 5 of the semiconductor device according to the first embodiment. FIG. 14 is a schematic enlarged cross-sectional view showing the manufacturing process 5 of the semiconductor device according to the first embodiment, showing a cross section taken along line XIV-XIV in FIG.

A second resist 60 is applied between the substrate 10 and the semiconductor element 50 using an inkjet method or a dispensing method to cover the first region A. As shown in FIG. Thereby, the first region A can be easily covered with the second resist 60 . The dispense method is more preferable than the inkjet method because it can increase the concentration of the white filler.

Since both the ink-jet method and the dispensing method require fluidity of the resin, it is preferable to appropriately adjust the concentration of the filler.

In the conventional underfill, fluidity is required for the underfill because the underfill is arranged directly under the semiconductor element by dripping, and it is necessary to have a low viscosity. Therefore, the underfill cannot be filled with titanium oxide at a high concentration. This is because if the concentration of titanium oxide is increased, the viscosity increases, and even if it is dripped, it will not permeate directly under the semiconductor element. On the other hand, in the method of applying the second resist by an ink jet method or a dispensing method, a high-concentration titanium oxide-containing resin can be used, so that the reflectance can be increased. In addition, since a predetermined spray pressure is applied in the ink jet method or the dispensing method, the resin of the second resist easily permeates directly under the semiconductor element. In addition, in the ink jet method or the dispensing method, by providing a predetermined angle with respect to the substrate, for example, an angle of 10 degrees to 80 degrees, preferably 30 degrees to 60 degrees, it becomes easy to provide the second resist immediately below the semiconductor element. . Even if the second resist applied from one side of the semiconductor element by the ink jet method or the dispensing method protrudes from the other side of the semiconductor element, the first area has a predetermined size. It does not affect the reflectance or the like. In addition, since the application of the second resist by the ink jet method or the dispensing method has extremely high positional accuracy compared to dropping, the application to the first region can be performed easily and accurately. Moreover, peeling of the outer edge of the second resist can be suppressed. In other words, since no mask is used when forming the second resist, it is not necessary to consider peeling of the resist when removing the mask. In addition, although the second resist may be lifted when the mask is peeled off, the second resist is not lifted in coating by the ink jet method or the dispensing method, so peeling of the second resist can be reduced. In the application of the second resist by the inkjet method or the dispensing method, the outer edge of the second resist is rounded due to surface tension.

The step of applying the second resist 60 preferably uses a second thermosetting resin containing a white filler. This is because the reflectance can be increased thereby.

By applying the second resist 60 by an ink jet method or a dispensing method, the second resist 60 is not only applied to the substrate 10 and the wiring 20 immediately below the semiconductor element 50, but also adheres to the lower surface of the semiconductor element 50. Therefore, heat can be easily transferred from the semiconductor element 50 to the substrate 10 . Further, the air layer contained directly under the semiconductor element 50 can be easily removed by applying the second resist 60 by an inkjet method or a dispensing method.

In the application of the second resist 60 by the inkjet method or the dispensing method, the second resist 60 can be arranged on the lower surface of the semiconductor element 50 without covering the side surface of the semiconductor element 50 . By not arranging the second resist 60 on the side surface of the semiconductor element 50, the light from the side surface of the semiconductor element 50 blocked by the second resist 60 can be effectively utilized.

(6) The step of covering the semiconductor element 50 with the sealing member 70 will be described with reference to FIGS. 2 and 3. FIG.

The sealing member 70 can be molded into a lens shape by potting or molding.

A semiconductor device can be easily manufactured by the above steps.

The semiconductor device according to this embodiment can be used in various display devices, lighting fixtures, displays, backlight sources for liquid crystal displays, image reading devices in digital video cameras, facsimiles, copiers, scanners, etc., projector devices, and the like. can be used.

10 substrate 20 wiring 30 first resist 40 conductive member 50 semiconductor element 60 second resist 70 sealing member

Claims (12)

a step of forming a pair of wiring on a substrate;
a step of screen-printing a first resist on the substrate or on the pair of wirings, excluding a first region;
forming a conductive member on the pair of wirings in the first region;
placing a semiconductor element on the pair of wirings via the conductive member;
applying a second resist on the substrate using an inkjet method or a dispensing method between the substrate and the semiconductor element to cover the first region;
has
In the step of applying the second resist, the second resist is arranged on the lower surface of the semiconductor element without covering the side surface of the semiconductor element. In the step of forming the conductive member, a metal mask having a thickness of 0.02 mm to 1.0 mm is used, a conductive paste is printed in a plurality of holes provided in the metal mask, and a thickness of 0.02 mm to 1.0 mm. 2. The method of manufacturing a semiconductor device according to claim 1, wherein said conductive member having a thickness is formed. 3. The method of manufacturing a semiconductor device according to claim 1, wherein the step of forming the conductive member uses a first thermosetting resin containing a metal filler. 3. The semiconductor according to claim 1 or 2, wherein the step of forming the conductive member includes polishing a top surface of the cured first thermosetting resin after curing using the first thermosetting resin containing a metal filler. Method of manufacturing the device. 5. The method of manufacturing a semiconductor device according to claim 1, wherein the step of forming the pair of wirings includes etching after forming a conductor layer. 6. The method of manufacturing a semiconductor device according to claim 1, wherein the step of placing the semiconductor element places the semiconductor element after placing a conductive adhesive on the conductive member. 7. The method of manufacturing a semiconductor device according to claim 1, wherein the step of applying the second resist uses a second thermosetting resin containing a white filler. 8. The method of manufacturing a semiconductor device according to claim 1, wherein said semiconductor element is a semiconductor light emitting element. 8. The method of manufacturing a semiconductor device according to claim 7, wherein in the step of applying said second resist, said white filler has a concentration of 3% by weight or more and 50% by weight or less. The first resist contains the white filler,
8. The method of manufacturing a semiconductor device according to claim 7, wherein said second resist has a higher concentration of said white filler than said first resist. 11. The method of manufacturing a semiconductor device according to claim 1, wherein a plurality of said conductive members are arranged on said pair of wirings, and said plurality of conductive members have a constant height. The first region is larger than the upper surface of the semiconductor element,
12. The step of applying the second resist according to any one of claims 1 to 11, wherein the outer edge of the second resist is rounded between the lower surface of the semiconductor element and the first resist due to surface tension. 1. A method of manufacturing a semiconductor device according to claim 1.

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