JP6297146B2 - Process variable transmitter with variable frequency clock circuit to avoid clock synchronous noise - Google Patents

Description

  The present invention relates to a process variable transmitter used in a process control / monitoring system. More particularly, the present invention relates to changing the clock frequency to avoid clock synchronization noise.

  Process variable transmitters are used in process control and monitoring systems to measure process parameters. A common microprocessor-based transmitter is a sensor, an analog-to-digital converter that converts the output from the sensor into a digital format, a microprocessor that compensates for the digital output, and an output that transmits the compensated output. And a circuit. At present, the transmission is usually performed using a process control loop such as a 4-20 mA control loop or wirelessly.

  One example of a parameter measured by such a system is pressure, which is detected by measuring the capacitance of a capacitive differential pressure sensor. Of course, this type of pressure sensor is merely an example, and other types of pressure sensors may be used. Similarly, pressure is only an example process variable and a variety of other process control parameters may be measured. Examples of other parameters include pH, temperature, and water level (level). Thus, while the current description will be with respect to pressure sensors, it should be understood that the description is equally easy and valid for other types of sensors.

"Spread-Spectrum Clocking" http://www.ni.com/tutorial/4154/en/ November 2, 2009

  Process variable transmitters are often subject to various types of noise, which can affect the accuracy of the measurement circuit. Synchronous noise is a large noise source in an analog / digital (A / D) converter. Synchronous noise is noise that occurs at a time interval that is relatively the same as the time interval of the A / D conversion process as a conversion process that is repeatedly performed. An example of this type of disturbance is bus noise generated by a microprocessor. When the A / D converter is synchronized with the processor bus, this type of noise may cause an offset error at the output of the A / D converter.

  Various types of process transmitters undergo electromagnetic compatibility (EMC) test procedures. In this test procedure, the susceptibility to disturbances generated in the conducted radio frequency (RF) immunity test is examined. Synchronous noise is one mechanism by which process transmitters are sensitive to these types of disturbances.

  In these types of EMC test procedures, common mode voltage noise is added to the loop wiring associated with the transmitter module housing. This voltage appears in the measurement circuit as a result of the parasitic capacitance between the housing and the sensor. When the A / D converter samples the sensor signal, the noise coupled through the parasitic capacitance is also sampled, so that noise at the sampling frequency or near its harmonic frequency appears in the baseband and appears as a measurement error. End up. The system response of process variable transmitters to these types of noisy inputs appears in two different categories. The first is a wideband error, and the second is a narrowband error. Narrowband errors occur in the following cases. That is, this is a case where interference enters the sampling circuit of the sensor as being matched with the sensor sampling frequency or the harmonic frequency, or as being in the vicinity of these frequencies. As a result, a folding error occurs in a very low frequency band (close to DC or DC) of the baseband.

  In the process variable transmitter, the sensor signal is sampled using a clock signal that matches the sampling frequency of the sensor. Interference is also sampled at the sensor sampling frequency. A comparison determination is made as to whether interference at the sampling frequency of the sensor or at a harmonic frequency of the sampling frequency of the sensor exceeds a threshold level. If so, the clock signal is changed and adjusted so that the sampling frequency of the sensor is away from the interference frequency.

1 is a simplified block diagram illustrating an industrial process control system. FIG. FIG. 2 is a block diagram illustrating the transmitter of FIG. 1 in more detail. 3 is a flowchart according to an embodiment of the overall operation of the harmonic energy detector and variable frequency clock circuit shown in FIGS. 1 is a block diagram illustrating a variable frequency clock circuit according to an embodiment. FIG. 2 is a block diagram showing the transmitter of FIG. 1 and showing the A / D converter in more detail. It is a figure which shows the mode of two frequency sweeps as an example of a test result.

  FIG. 1 is a simplified block diagram of an industrial process control system 5. In FIG. 1, a process pipe 7 transports a process fluid. The process variable transmitter 10 is connected to the process pipe 7. The transmitter 10 includes a process variable sensor 18, and in one embodiment, the process variable sensor 18 is configured as a pressure sensor. However, the configuration as the pressure sensor is merely an example. The transmitter 10 transmits information to a remote location (remote location) such as the process control room 6. The transmission can be performed by a process control loop such as a two-wire control loop 11. The process control loop can be in any desired form. Examples of the format include a 4-20 mA process control loop, a process control loop for transmitting a digital signal, and a wireless process control loop. In the example shown in FIG. 1, the process control loop 11 is supplied with power by a power source 6 </ b> A in the control room 6. The electric power is supplied to the process variable transmitter 10 by the electric power. Although the current flowing through the loop 11 can be detected using the detection resistor 6B, the current may be detected by another mechanism.

  FIG. 2 is a block diagram showing a portion of the industrial process control system 5 shown in FIG. 1, in which details of the transmitter 10 are shown. As an example, the transmitter 10 includes a measurement circuit 22, a processor 32, a harmonic energy detector 34, and a variable frequency clock circuit 52. The measurement circuit 22 further includes, as an example, a sampling unit 24, an analog / digital (A / D) converter 26, and an adjustment unit 28 (for example, a low-pass filter). The harmonic energy detector 34 further includes a sampling unit 36, an adjustment unit 38 and a comparator 40.

  In FIG. 2, sensor 18 is a process variable sensor in one example and receives input 14 from the process being sensed. Input 14 is in one example process fluid flowing through pipe 7 (shown in FIG. 1), and sensor 18 is in one example a pressure sensor. However, the sensor 18 may be another type of sensor, for example, a sensor that detects pH, flow rate, temperature, and the like. In any of these sensor type embodiments, the sensor 18 by way of example outputs an analog output signal 20 representing the detected parameter to the measurement circuit 22 of the transmitter 10.

  In one embodiment, the signal 20 is further sent to the sampling unit 24. In one example, the sampling unit 24 samples the sensor signal 20 at a sampling frequency given by the clock signal 30. The sampled analog signal 20 is sent to the A / D converter 26 and converted into a digital output. The digital output is sent to the adjustment unit 28 and finally sent to the processor 32. In one example, the digital output output from the adjustment unit 28 is a digital representation of the analog signal 20 output by the sensor 18. The processor 32 includes an associative memory and a clock circuit that can compensate for the digital representation and output information about parameters detected in the process control loop. Note the following. That is, the processor 32 may include an input / output (I / O) circuit, or an I / O circuit may be provided separately, and the I / O circuit is provided in the loop 11 in a digital format or an analog format. Thus, for example, information may be transmitted by controlling the current flowing through the loop 11 or by analog voltage output.

  As described in the background section, narrowband errors may occur due to interference mixed from the housing of the transmitter 10 into the circuit of the transmitter 10. In particular, the interference occurs near the frequency of the clock signal 30 (where the sensor signal 20 is sampled at that frequency) or near the harmonics of the clock frequency. Thus, in one embodiment shown in FIG. 2, the transmitter 10 is configured to include the harmonic energy detector 34.

  The harmonic energy detector 34 further includes a sampling unit 36, an adjustment unit 38 and a comparator 40. The sampling unit 36 is connected to receive an interference signal 46 from the equipment housing (shown as block 42) and is at the same frequency as when the sensor signal 20 is sampled by the measurement circuit 22. The interference signal 46 is sampled. As shown, the sampling unit 36 receives the same clock signal 30 that is input to the sampling unit 24. The sampled interference signal 46 is passed from the sampling unit 36 to the adjustment unit 38. The adjusting unit 38 amplifies and filters in one example, or adjusts the interference signal 46 by other methods and outputs the adjusted signal to the comparator 40. In one embodiment, the resulting alias frequency is less than 5 Hz for interference at frequencies that are the same as or close to the harmonic frequency of the sampling frequency of the sensor signal. In this case, the adjustment unit 38 is configured as a low-pass filter, so that only interference with a frequency of less than 5 Hz can be passed. However, this is merely an example, and any other type of filter or adjustment circuit may be configured. The adjustment unit 38 outputs a low voltage when the interference is of a frequency and amplitude that does not cause a large narrowband error. The adjustment unit 38 outputs a high voltage when the frequency and amplitude are such that the interference causes a large narrowband error.

  The comparator 40 compares the voltage input from the adjustment unit 38 with the reference voltage. When the input voltage exceeds the reference voltage, the comparator 40 generates a trigger signal and outputs it to the variable frequency clock circuit 52. Thus, even if the interference is very close to the harmonic frequency, the interference has sufficient amplitude to pass the comparison determination at the comparator 40 (ie, to trip the comparator 40). Unless otherwise, the comparator 40 does not trigger the clock circuit 52. In one embodiment, the comparator 40 is tripped when the interference has sufficient amplitude and the frequency of the interference is within 30 Hz from the harmonic frequency. If the interference satisfies the condition, the interference may cause a problem in the output of the transmitter 10. Accordingly, when the comparator 40 detects sufficient energy in the interference signal and the interference is generated at a frequency close to one of the harmonic frequencies (for example, from one of the harmonic frequencies to 30 Hz). The comparator 40 transmits a trigger signal 48 to the latch 50 of the variable frequency clock circuit 52. When the latch 50 is driven by the trigger signal 48, in one example, the variable frequency clock circuit 52 changes the clock frequency of the clock signal 30 and switches to another sampling frequency. The additional sampling frequency is at least a given width away from the original sensor sampling frequency. The difference between the two frequencies before and after the switching is such that the narrow band of the measurement target at each sampling frequency (that is, the narrow band that is the measurement target by having a measurable sensitivity) does not overlap. To be elected. For example, assuming that the width of the narrow band is 20 Hz, when the variable frequency clock circuit 52 changes the frequency of the clock signal 30, the frequency is changed to be 50 Hz away from the frequency of the original clock signal 30. To do. This change would exceed the 20 Hz width with some margin. However, this is only an example.

  A more detailed illustration is considered to be helpful in understanding: Here, it is assumed that the variable frequency clock circuit 52 performs frequency switching only between two individual clock frequencies. Assuming that the first frequency is 460 kHz, in one example, the sampling frequency of the clock signal 30 may be 23.0 kHz (for example, as a clock frequency divided by 20). Also, assuming that the second frequency is 462 kHz, in one example, the sampling frequency can be 23.1 kHz (for example, as a clock frequency divided by 20). Here, since the two sampling frequencies are separated by 100 Hz, the two sampling frequencies output by the variable frequency clock circuit 52 satisfy the criterion that at least 50 Hz is separated from each other.

  FIG. 3 is a flow chart according to one embodiment of the overall operation of the harmonic energy detector 34 and the variable frequency clock circuit 52, which samples the sensor signal 20 by sampling the interference signal. It is a figure which shows changing the frequency used for doing. First, the sampling unit 36 samples the interference signal at a sensor sampling frequency (the same frequency used to sample the sensor signal 20). This is as shown as block 60 in FIG.

  Next, the comparator 40 determines whether or not the value of an element sufficiently close to the sampling frequency (or a plurality of harmonic frequencies thereof) of the interference signal exceeds the threshold level. This is as shown as block 62. If the determination is negative, the process flow returns to block 60, and the next process of the sampling unit 36 is continued in block 60. That is, it is a process of sampling interference from the interference signal 46 at the same frequency as the frequency at which the sampling unit 36 samples the sensor signal 20.

  On the other hand, at block 62, a determination is made that the value of the same element (or an element having a frequency close to that frequency) as the sampling frequency (or one of the harmonic frequencies) of the sensor in the interference signal exceeds the threshold level. The comparator 40 generates the trigger signal 48 and outputs it to the variable frequency clock circuit 52. In the embodiment shown in FIG. 2, the trigger activates (latches) the latch 50, which instructs the circuit 52 that the clock frequency should be changed. By changing the variable frequency clock circuit 52 to an alternative clock frequency, the signal 30 becomes a signal of a new sampling frequency for the sensor, and the signal 30 is again transmitted to the sampling unit 24 and the sampling unit 36 at the new frequency. It will be output to both. Therefore, the sampling unit 36 (where the interference signal 46 is sampled) again samples at the same frequency as the sampling unit 24 (here, the sensor signal 20 is sampled). It will be. Adjusting the sampling frequency of the sensor by changing the clock frequency as described above is shown as block 64 in FIG.

  FIG. 4 is a block diagram showing the variable frequency clock circuit 52 according to the embodiment in more detail. 4, in one example, the variable frequency clock circuit 52 is a logic processing unit 66 (the logic processing unit 66 may be the same as the latch 50 or may be another logic circuit element). , A voltage controlled oscillator 68, a clock divider 70, resistors R1 and R2, and a switch S1. In the embodiment shown in FIG. 4, the variable frequency clock circuit 52 performs frequency switching only between two different clock frequencies. However, the following points should also be understood. That is, the circuit 52 can be easily configured in the same manner as the configuration shown so that it can be selected between three or more different (among: three or more) clock frequencies. It is.

  Regardless of the configuration described above, the logic processor 66 receives the trigger signal 48 from the harmonic energy detector 34. The receipt means the following. That is, the interference reflected in the signal 46 is close enough to one of the sensor's sampling frequency or harmonic frequency and exceeds a threshold level, so that the interference is transmitted to the transmitter 10. This is considered to cause problems for the output of. Therefore, the logic processing unit 66 outputs a signal for changing the state of the switch S1 to the switch S1. If the switch S1 is in an open state at that time, the switch S1 is closed. If the switch S1 is in a closed state at the time, the switch S1 is opened. Thus, the configuration of the resistor network constituted by the resistors R1 and R2 is changed, and the voltage level input to the voltage controlled oscillator 68 is changed. Accordingly, the frequency of the output signal 74 of the voltage controlled oscillator 68 also changes. That is, when the switch S1 is closed, the resistor R2 is bypassed, and the voltage controlled oscillator 68 outputs the output signal 74 at the first frequency. On the other hand, when the switch S2 is open, the resistor R2 becomes part of the resistor network, and the voltage controlled oscillator 68 outputs the output signal 74 at the second frequency. Here, the second frequency is separated from the first frequency by an interval of at least a threshold value. In one embodiment, the interval for the threshold can be about 50 Hz, but other values may be used.

  In the embodiment shown in FIG. 4, the variable frequency clock circuit 52 may further include a frequency divider 70. The frequency divider 70 divides the output signal from the voltage controlled oscillator 68 and outputs it to the sampling units 24 and 26 (shown in FIG. 2) as the clock signal 30. In one embodiment, divider 70 divides the frequency of output signal 74 from voltage controlled oscillator 68 by 20. The frequency divider 70 may divide the frequency of the output signal 74 by any other value other than 20, or the frequency divider 70 may be omitted.

  From the above, the following is also understood. That is, in the above description, the variable frequency clock circuit 52 outputs two different selectable frequencies with respect to the clock 30. However, the circuit 52 can easily and easily output three or more different frequencies. Can also be designed to output. That is, by simply adding resistors and switches to the resistor network shown in FIG. 4 and obtaining a plurality of outputs from the logic processing unit 66, or providing a plurality of logic circuit elements. (And, for example, by providing multiple comparators in the harmonic energy detector 34), the voltage controlled oscillator 68 can be configured to be selectable from three or more individual frequencies. It is. This provides an option that makes it possible to prevent errors caused by interference signals composed of multiple frequencies.

  FIG. 5 is a block diagram of a transmitter 10 similar to that shown in FIG. 2, and like items are given like numbers. However, FIG. 5 shows a configuration in which the A / D converter 26 includes a differential amplifier 80 and a sigma delta converter 82 as an embodiment. The sigma delta converter 82 is shown as an example, and other conversion mechanisms may be used.

  FIG. 5 also shows that the sensor 18 in one example has two conductors 84 and 86 that can be connected to input terminals 88 and 90, respectively. In one embodiment, the voltage between terminals 88 and 90 is indicative of the temperature sensed by sensor 18. Also note the following: That is, the sensor 18 may be a four-terminal sensor by having an additional lead connected to an additional terminal in one example. Alternatively, a plurality of additional sensors may be connected to these terminals (88 and 90), and an input signal for measurement may be selected using a multiplexer. However, in the following description, the case where the sensor 18 has two conductors and is connected to the terminals 88 and 90, respectively, will be used as an example in accordance with the illustrated example.

  FIG. 5 further shows that in one example, the processor 32 outputs a signal corresponding to the representation of the sensor signal to the I / O circuit 92. The I / O circuit 92 transmits information in a digital format on the loop 11 or in an analog format by controlling the current flowing through the loop 11. Thus, information regarding the detected parameters (by sensing by the sensor 18) will be transmitted by the transmitter 10 onto the process control loop 11.

  From the above, the following can be understood. That is, the variable frequency clock circuit 52 can set the sampling frequency in the system to a frequency that does not cause a large error in output due to interference applied to the system from the outside. Here, a closed loop feedback system is used to control the sampling frequency of the system. The harmonic energy detector 34 also samples the interference signal using the same clock at the sampling frequency in the system. The harmonic energy detector 34 transmits a trigger signal to the variable frequency clock circuit 52 in the following case. That is, the value of the harmonic energy in the interference reaches a value that can cause a large error in the measured value. When the variable frequency clock circuit 52 receives the trigger signal, the variable frequency clock circuit 52 changes the output frequency to the following new frequency. That is, a new frequency that is sufficiently spaced from the frequency before the change, such that the harmonic energy detector (34) no longer generates the trigger signal 48 due to interference. In one embodiment, the variable frequency clock circuit 52 can be switched between two separate frequencies. On the other hand, the number of frequencies to be switched can be expanded to more than two, thereby increasing the possibility that undesirable interference can be prevented.

  FIG. 6 shows the following test results. That is, as a baseline system (only a single sampling frequency is used as the system clock) and a modified system, the harmonic energy detector 34 detects unwanted interference at the sensor sampling frequency. In this case, the test results of the system that changes the sampling frequency of the sensor using the variable frequency clock circuit 52 are shown. FIG. 6 shows that the error occurs in a very narrow frequency band. When performing an EMC test, the frequency is swept over a wide range. In the sweep, only a very short time is spent even in a narrow band with a large error. However, in field applications (field applications), interference may always be present in a narrow band of frequencies. Thus, a plot of error against time may appear as an offset error that changes very slowly, and may not appear as a narrow band error at all.

  In FIG. 6, two plots 100 and 102 are shown. Plot 100 is for a baseline system and plot 102 is for a variable frequency clock system. In the illustrated embodiment, the sensor sampling frequency is 23.5 kHz. The interference frequency is swept from 23.44 kHz to 23.71 kHz using a 200 second time window. In the plot 100, two lines 104 and 106 are shown, which indicate frequency bands with errors in the range of ± 1 percent. The highest analog error occurs at a frequency of about 23.49 kHz, which is close to the basic sampling frequency of 23.5 kHz. In such a case, the error is very large and will saturate the output of the 4-20 mA process transmitter.

  Before the sweep of the frequency range of the plot 102, the sensor sampling frequency was 23.5 kHz. When the harmonic energy detector 34 detects energy at the sampling frequency (or harmonic frequency), the variable frequency clock circuit 52 changes the sampling frequency to 23.7 kHz, and as a result, the subject (device under test). ), The magnitude of the analog error is within a range of ± 1 percent. Compared to a baseline system in which measurements have been obtained in a range exceeding 50 percent, the subject whose clock frequency is variable falls within a range of less than 1 percent. This result means that there is an effect of reducing the error exceeding a ratio of 50: 1 in the device sensitivity of the conduction frequency of EMC in a narrow band.

  Although the present invention has been described with reference to preferred embodiments, workers skilled in the art will recognize that changes may be made in form and detail without departing from the spirit and scope of the invention.

  DESCRIPTION OF SYMBOLS 10 ... Process variable transmitter, 22 ... Measurement circuit, 34 ... Harmonic energy detector, 52 ... Variable frequency clock circuit, 32 ... Processor

Claims (26)

Receiving a sampling clock signal at a first sampling frequency, sampling an analog sensor signal indicative of a detected process variable at the first sampling frequency, and obtaining the sampled analog sensor signal A measurement circuit that converts it into a digital signal;
A processor that receives the digital signal and provides an output representative of the sensed process variable;
A harmonic energy detector that receives the sampling clock signal, samples an interference signal at the first sampling frequency, and generates a trigger signal when the interference signal satisfies an interference threshold condition;
A variable frequency clock circuit that receives the trigger signal and changes the frequency of the sampling clock signal to an alternative sampling frequency different from the first sampling frequency in response to the trigger signal. Process variable transmitter.   The variable frequency clock circuit is configured to change the frequency of the sampling clock signal to the alternative sampling frequency which is separated from the first sampling frequency by a threshold frequency interval. The process variable transmitter according to claim 1.   3. The process variable transmitter according to claim 2, wherein the threshold frequency interval exceeds a narrow band of sensitivity of a measurement object corresponding to the first sampling frequency. The harmonic energy detector determines whether the sampled interference signal satisfies the condition of the interference threshold from the first sampling frequency or from the harmonic frequency of the first sampling frequency within a threshold range. The process variable transmitter of claim 1, wherein the process variable transmitter is configured to determine at a certain frequency. The harmonic energy detector further comprises:
When the sampled interference signal has an energy level that satisfies a threshold condition at a frequency that is a harmonic frequency of the first sampling frequency and within a narrow band of sensitivity of the measurement target; 5. The process variable transmitter according to claim 4, further comprising a comparator that generates a trigger signal.   The variable frequency clock circuit is configured to change the frequency of the sampling clock to one of a plurality of alternative sampling frequencies in response to the trigger signal. Process variable transmitter. The variable frequency clock circuit is
A voltage controlled oscillator that receives a voltage input signal and provides an oscillator output signal as a function of the voltage input signal, wherein the sampling clock signal is generated from the oscillator output signal; and
A resistor network having a series of switches, the series of switches configured to control a value of the voltage input signal; and
The process variable transmitter of claim 1, further comprising: a logic circuit that receives the trigger signal and controls the series of switches to change the voltage input signal.   The process variable transmitter of claim 1, further comprising an input / output (I / O) circuit that receives the output from the processor and controls a loop to provide information indicative of the sensed process variable. .   The process variable transmitter of claim 8, wherein the loop comprises a 4-20 mA process control loop. The interference signal sampled at the first sampling frequency is obtained by including interference as a separate sensor signal from the analog sensor signal indicating the detected process variable. 10. A process variable transmitter according to any one of claims 1 to 9. 11. The process variable transmitter according to claim 1, wherein the interference signal sampled at the first sampling frequency is obtained from a housing of the process variable transmitter. A method for controlling a process variable transmitter, comprising:
Sampling an analog sensor signal indicative of the sensed process variable at a first sensor sampling frequency;
Converting the sampled sensor signal into a digital value;
Providing an output indicative of the digital value to a process control loop, and
Sampling an interference signal at the first sensor sampling frequency;
In response to determining that the sampled interference signal satisfies an interference threshold condition, the first sensor sampling frequency is an alternative sensor sampling frequency that is different from the first sensor sampling frequency. And changing the method. Changing from the first sensor sampling frequency to the alternative sensor sampling frequency;
Determine whether the sampled interference signal exceeds an interference threshold value at a frequency within the threshold range from the first sensor sampling frequency or from a harmonic frequency of the first sensor sampling frequency. 13. The method of claim 12 , comprising: 14. The method of claim 13 , wherein the threshold range is in a band of sensitivity corresponding to the first sensor sampling frequency. Changing the first sensor sampling frequency;
Changing the first sensor sampling frequency to the alternative sensor sampling frequency that is at least a minimum distance away from the first sensor sampling frequency and exceeds the threshold range. 14. The method of claim 13 , comprising. The method of claim 15 , wherein the minimum distance is configured as the threshold range plus a margin. Changing the first sensor sampling frequency;
The method of claim 12 , comprising changing the first sensor sampling frequency to one of a plurality of alternative sensor sampling frequencies. Providing the output to a process control loop;
The method of claim 12 , comprising providing the output to a 4-20 mA process control loop. The interference signal sampled at the first sensor sampling frequency is obtained by including interference as a separate from the analog sensor signal indicating the detected process variable. The method according to any one of claims 12 to 18. 20. A method according to any of claims 12 to 19, wherein the interference signal sampled at the first sensor sampling frequency is obtained from a housing of the process variable transmitter. A sampling unit that receives the sampling clock signal and samples the analog sensor signal at a first sampling clock frequency;
An analog-to-digital converter connected to the sampling unit for converting the sampled analog sensor signal into a digital value;
A processor for providing an output signal indicative of the digital value;
An interference detector that detects whether interference in an interference signal is causing a narrowband error in the output signal, and provides an interference detection output signal as a response when detecting that it is occurring;
And a variable frequency clock circuit that receives the interference detection output signal and changes the first sampling clock frequency to an alternative sampling clock frequency. The process variable transmitter of claim 21 , wherein the variable frequency clock circuit changes the first sampling clock frequency to one of a plurality of different alternative sampling clock frequencies. The interference detector comprises an interference sampling unit;
The interference detector samples the interference signal by the interference sampling unit, so that the interference generates the narrowband error at the same frequency as the frequency at which the sampling unit samples the analog sensor signal. 22. The process variable transmitter according to claim 21 , wherein it is detected whether or not there is any. The process variable transmitter according to claim 23 , wherein the interference sampling unit samples the interference signal using the sampling clock signal. 25. The process variable transmitter according to claim 21, wherein the interference signal is obtained by including interference as a separate signal from the analog sensor signal. 26. The process variable transmitter according to claim 21, wherein the interference signal is obtained from a housing of the process variable transmitter.