JP6260573B2 - Game machine - Google Patents

Description

  The present invention relates to a gaming machine that executes a wait (standby) process with a simple process.

  Conventionally, for example, it is known that when a special role such as BB is won, the progress of the game is stopped (weight processing), and special role winning notification is performed during this weight processing (see, for example, Patent Document 1). .

JP 2000-061034 A

In the prior art, there is known a slot machine having a specification that repeats RB games (operation of special objects) during 1BB game (special game state) (continues operation of RB during 1BB game).
In this case, according to the rules, it is necessary to terminate the special combination when the number of games or the number of winnings reaches a predetermined number. When the special combination is continuously executed in the special game state, it is necessary to clearly separate the operation end of the special combination from the start of the operation again and transmit it to the testing machine side.
The problem to be solved by the present invention is to enable the output of a test signal that clearly indicates the end of the operation of the special character and the start of the operation again in a slot machine having a specification that repeats the operation of the special character in the special game state. That is.

The present invention solves the above problems by the following means. The configuration of the corresponding embodiment is shown in parentheses.
The invention of claim 1
Main control means (main control board 60) for controlling the progress of the game;
A storage number display means (storage number display LED 71) for displaying the storage number;
The main control means includes
Control to start the special gaming state (1BB game) based on satisfying the start condition of the special gaming state (1BB won and 1BB won)
In the special game state, to allow the operation of the special auditors product (RB),
When filled with predetermined predetermined end condition during operation of the special won game when the terminating condition is not satisfied the special game state (when game number or the number of winning reaches twice), the special won game Exit of operation, after performing the (time corresponding to 5 interrupt (11.175 (ms))) a predetermined time the first weight processing (2 bytes time waiting process (R_2BYTE_WAIT)), again, a special role was Start working,
The predetermined time a time interval shorter than (2.235 (ms)) and can execute the interrupt processing, the
In the interrupt process executed when the special game is operating in the special game state, a test signal (“00011000”) indicating that the special game is operating and the special game is operating is output. Process can be executed,
In the interrupt process executed during the first wait process in the special game state, a process for outputting a test signal (“00001000”) indicating that the special game state is not activated and the special accessory is not activated. Make it executable,
When the combination of symbols corresponding to the small combination is stopped, as a process for giving a profit, an addition process of the storage number displayed by the storage number display means (in FIG. 55, one storage number is added in step S472) Process)
In the storage number adding process displayed by the storage number display means, after adding the storage number “1”, before adding the storage number “1” next, the second time which is longer than the predetermined time. A wait process (a waiting process of 2 bytes in step S471 in FIG. 55) is executed.

According to the present invention, it is possible to transmit a test signal clearly indicating the operation / non-operation of the special accessory (to a test machine or the like) using the first weight process .

It is a block diagram which shows the outline of control of the slot machine in this embodiment. It is a top view which shows the storage number display LED, the acquisition number display LED, and the status display LED in more detail. It is a figure which shows the relationship between the digits 1-5 and the segments AP. It is a figure which shows a LED display request flag and a LED display request counter. It is a figure which shows a LED segment table. It is a figure which shows the input ports 0-2 provided in the main control board. It is a figure which shows the output ports 0-2 provided in the main control board. It is a figure which shows the output ports 3-6 provided in the main control board. It is a figure which shows the output ports 7-8 provided in the main control board. It is a figure which shows some data (medal management flag etc.) of the storage area of RWM. It is a figure which shows some data (blocker signal, hopper motor drive signal data, etc.) of the storage area of RWM. It is a figure which shows some data (storage number display data etc.) of the storage area of RWM. It is a figure which shows some data (winning and replay condition apparatus information etc.) of the storage area of RWM. It is a figure which shows the symbol arrangement | sequence of a reel. It is a figure which shows the display window (transparent window) provided in the front mask part (front door. Not shown) of a slot machine, the positional relationship of each reel, and an effective line. It is a figure which shows the combination of the symbol corresponding to the kind of combination, the number of payout, and a combination. It is a figure which shows the combination of the symbol corresponding to the kind of combination, the number of payout, and a combination. It is a figure which shows the combination of the symbol corresponding to the kind of combination, the number of payout, and a combination. It is a figure which shows the relationship between the kind of winning, a winning combination, and a pushing order. It is a figure which shows the relationship between the kind of winning, a winning combination, and a pushing order. It is a figure (role lottery table) which shows the type of winning and the winning probability (number) for each gaming state. It is a figure which shows the number and the medal acquisition expected value for every pushing order at the time of Bell A1-B4 winning. It is a figure which shows the transition of a game state and an internal state. It is a flowchart which shows the process (M_PRG_START) when starting the program by a main control board. It is a flowchart which shows the setting change process (M_RANK_SET) in step S22. It is a flowchart which shows the control command set 1 (S_CMD_SET). It is a flowchart which shows control command set 2 (SS_CMD_SET). It is a flowchart which shows a 2-byte time waiting process (R_2BYTE_WAIT). It is a flowchart which shows interruption waiting (C_INTR_WAIT). It is a flowchart which shows the power supply return process (M_POWER_ON) of step S23. It is a flowchart which shows a nonrecoverable error process (SS_ERROR_STOP). It is a flowchart which shows a main process (M_MAIN) process. It is a flowchart which shows the game start set (MS_GAME_SET) in step S52. It is a flowchart which shows medal acceptance start (MS_MEDAL_START). It is a flowchart which shows medal reading (S_PLAYM_READ). It is a flowchart which shows storage number reading (S_CREDIT_READ). It is a flowchart which shows a blocker ON (MS_BLOCKER_ON). It is a flowchart which shows the addition process (MS_MEDAL_INC) of one medal. It is a flowchart which shows a medal limit number set processing (MS_MMAX_SET). It is a flowchart which shows medal insertion waiting (MS_STANDBY_DSP) in step S55. It is a flowchart which shows the medal management process (MS_MEDAL_CHK) in step S56. It is a flowchart which shows the care medal check process (MS_INSERT_CHK) in step S222. It is a flowchart following FIG. It is a flowchart which shows blocker off (MS_BLOCKER_OFF). It is a flowchart which shows 1 storage number addition (MS_CREDIT_ADD). It is a flowchart which shows the storage bet process (MS_BET_IN) in step S223. It is a flowchart which shows the number of stored sheets 1 subtraction process (MS_CREDIT_DEC). It is a flowchart which shows the adjustment process (MS_MEDAL_RET) in step S221. It is a flowchart which shows the stored medal settlement process (MS_CREDIT_RET) in step S325. It is a flowchart which shows payout processing (MS_1MEDAL_PAY) of one medal. It is a flowchart following FIG. It is a flowchart which shows an error display (MS_ERROR_DSP). It is a flowchart which shows start switch reception (MS_START_CTL) in step S59. It is a flowchart which shows the reel rotation start preparation (M_REEL_READY) in step S61. It is a flowchart which shows medal payout (MS_WIN_PAY) by winning in step S71. It is a flowchart which shows the game completion | finish check process (M_GAME_CHK) in step S72. It is a flowchart which shows BB operation | movement management (M_BB_CTL). It is a flowchart which shows RB operation | movement management (M_RB_CTL). It is a flowchart which shows an interrupt process (I_INTR). It is a flowchart which shows LED display control (IS_LED_OUT) in step S606. It is a flowchart which shows the power-off process (IS_POWER_DOWN) in step S619. It is a flowchart which shows control command transmission (IS_CMD_SET) in step S613. It is a flowchart which shows a test signal and condition apparatus information output process. It is a figure which shows the ON / OFF state of D3 bit (1BB) and D4 bit (RB) in the operation state flag information output as a test signal. It is a figure explaining the example of an output of conditional device information. It is a flowchart which shows the program start process of a sub control board, and the main process of the sub side. It is a flowchart which shows the setting change start process in a sub control board. It is a flowchart which shows the waiting time set process in 2nd Embodiment. It is a flowchart which shows the 2-byte time waiting process in 2nd Embodiment. It is a figure which shows the example of control at the time of providing a bonus management flag. It is a figure following FIG.

In the present specification, the meanings of terms are as follows.
The “game medium” refers to a medium used for a game, and is a “medal” in the present embodiment. However, the present invention is not limited to this, and a game ball can be used. In addition to the actual medals, the game media include game media (data related to the game media) that are electrically stored (credit, stored) inside the gaming machine.
“Bet” refers to betting a medal (game medium) in order to play a game. In this embodiment, the maximum (limit) number that can be bet is set to “3” for normal games (non-special games) and “2” for special games (1BB game in this embodiment). Yes. However, the present invention is not limited to this, and the case of “1” may be set. For example, when an SB (single bonus) is provided, “3” is set in the normal game, and “1” is set during the SB game.

  “Reservation” refers to crediting a medal into the slot machine 10, unlike the “bet”. “Storage” may be used to include a bet, but in this specification, “storage” is used to mean that “bet” is not included. In the present embodiment, the maximum (limit) number that can be stored is set to “50” regardless of the gaming state or the like.

“Care” means that a player directly inserts a medal from a medal insertion slot 43 described later.
The “care bet” means that the player bets a medal by cleaning the medal from the medal insertion slot 43.
“Maintenance storage” means that a player stores medals by adding medals from the medal slot 43 (adding credits).
“Bet medal” means a bet medal.
“Reserved medals” refers to medals stored as credits.

The “reserved bet” is a game in which a player operates a bet switch 40, which will be described later, to play a part or all of the medals stored as credits within a possible bet range of the game. To bet.
“Automatic bet” means that when a replay wins, the number of medals bet in the previous game is automatically bet by the internal control processing of the slot machine 10. Note that the maintenance bet medals, the stored bets medals, and the stored medals can be settled thereafter, but the medals that are automatically bet by the replay winning are set so that the settlement cannot be performed.

“Inserting” means betting or storing medals, including the above-described care bets, care storage, storage bets, and automatic bets.
“Checkout” refers to paying out a bet medal and / or a stored medal to a player.
“Payout” refers to paying out medals by the above-mentioned settlement, or paying out medals to the player based on winning of the role, storing as credits, or actual from a payout slot (not shown) This means paying out medals. The payout in this embodiment is controlled so that “50” is stored as the limit number, and medals for which the stored number exceeds “50” are paid out to the player based on the winning combination.

In this specification, “B” is added to the end of an 8-bit numerical value expressed in binary number, and “H” is added to the numerical value expressed in hexadecimal number. Specifically, for example, a numerical value indicating “16” in a decimal number is expressed as “00010000B” or “00010000 (B)” in a binary number, and “10H” or “10 (H)” in a hexadecimal number. .
However, the end of “B” is omitted for binary numbers other than 8-bit numbers. For example, “0” in a notation such as “A register value is“ 0 ”” actually means a binary number of “00000000B”. Therefore, a numerical value without “B” at the end does not always mean that it is not a binary number.

Hereinafter, an embodiment of the present invention will be described with reference to the drawings.
<First Embodiment>
FIG. 1 is a block diagram showing an outline of control of the slot machine 10 in the present embodiment.
The slot machine 10 includes a main control board 60 and a sub control board 80.
The main control board 60 has an input port (0 to 2) and an output port (0 to 8), and includes an RWM (main memory) 61, a ROM 62, a main CPU 63, and the like (meaning only include those shown in FIG. 1). is not).

  In practice, an MPU including an RWM 61, a ROM 62, a main CPU 63, and a register is mounted on the main control board 60. Note that the ROM 62 may be provided externally in addition to what is mounted inside the MPU. On the other hand, the RWM 61 is provided only in the MPU according to current rules.

  On the other hand, an MPU including an RWM 81, a ROM 82, and a main CPU 83 is mounted on a sub control board 80 described later, and the RWM 61 is provided outside and outside the MPU.

  The main control board 60 and the peripheral devices for game progress including operation switches such as the bet switch 40 illustrated in FIG. 1 are electrically connected via an input port or an output port. The input port is a connection unit to which signals such as operation switches are input, and the output port is a connection unit that transmits signals to peripheral devices such as the motor 32.

In FIG. 1, an input peripheral device displays a signal from the peripheral device as an arrow heading toward the main control board 60, and an output peripheral device is an arrow heading from the main control board 60 toward the peripheral device. It is shown (the same applies to the sub control board 80).
The push button 25 (also referred to as a “push button unit”) connected to the sub control board 80 can transmit and receive signals in both directions. Specifically, a signal indicating that the operation has been performed is transmitted to the sub control board 80 based on the operation of the push button 25, and the lamp provided on the push button 25 is caused to emit light from the sub control board 80.

  In addition, as a timing at which the push button 25 is caused to emit light, a specific effect that can switch the effect that is currently being output or a game that can display the history information related to the game (the total number of executions of the normal game, the number of executions of the AT, etc.) After the operation of the start switch 41 when the signal is output, after the first stop operation of the reel 31, and the like. At this time, it is conceivable that the emission color is “white” during the game standby, and white, blue, red, etc. during the game, depending on the expected degree of winning the AT.

The RWM (main memory) 61 is a storage medium capable of storing (updating) various data based on the progress of the game.
The ROM 62 is a storage medium that stores programs necessary for the progress of the game, various data (for example, a data table), and the like.
The main CPU 63 refers to a CPU provided on the main control board 60, and executes programs and calculations necessary for the progress of the game. Specifically, the lottery of the combination, the drive control of the reel 31, and the winning Execute paying out. The main CPU 63 incorporates a register (described later).

In FIG. 1, medals inserted from the medal insertion slot 43 are configured to pass a medal selector.
As shown in FIG. 1, the medal selector includes a passage sensor 43a, a blocker 45, and insertion sensors 44a and 44b (but not limited thereto), and is electrically connected to the main control board 60. .
When a medal is inserted from the medal slot 43, the passage sensor 43a first detects the medal.

  Further, a blocker 45 is provided on the downstream side of the passage sensor 43a. The blocker 45 is for permitting / disallowing the insertion of medals. When the insertion of medals is not permitted, the blocker 45 provides a medal passage for returning the medals inserted from the medal insertion slot 43 from the payout slot 14. Form. On the other hand, when the medal insertion is permitted, a medal passage for guiding the medal inserted from the medal insertion port 43 to the hopper 35a is formed.

  Here, the blocker 45 is in a state where the insertion of medals is not permitted during the game (from the start of the rotation of the reels 31 until all the reels 31 are stopped and the payout corresponding to the winning combination is completed at the time of winning the winning combination). To do. That is, the blocker 45 permits the insertion of medals at least when a game is not being performed.

  On the further downstream side of the blocker 45, input sensors 44a and 44b (optical sensors) are provided. Therefore, the medals inserted from the medal insertion slot 43 are further detected by the insertion sensors 44a (upstream side) and 44b (downstream side) after being detected by the passage sensor 43a. As shown in FIG. 1, in the following description, the upstream closing sensor 44a may be referred to as the closing sensor 1 and the downstream closing sensor 44b may be referred to as the closing sensor 2.

  As shown in FIG. 1, the main control board 60 includes a bet switch 40, a start switch 41, a (left, middle, right) stop switch 42, and a checkout switch 46 as operation switches operated by the player. Connected.

The bet switch 40 (40a or 40b) is a switch operated by the player when betting a stored medal for the game. In the present embodiment, a 1-bet switch 40a for inserting one medal and a 3-bet switch 40b for inserting three (maximum number) medals are provided.
In addition to this, a bet switch for two bets may be provided.

The start switch 41 is a switch operated by the player when starting the reels 31 (all of left, middle and right).
Furthermore, three stop switches 42 are provided corresponding to the three (left, middle, and right) reels 31 and are operated by the player when the corresponding reels 31 are stopped.
Further, the settlement switch 46 is a switch operated by the player when paying out (paying out) medals stored (credited) in the slot machine 10.

Further, as shown in FIG. 1, a display substrate 70 is electrically connected to the main control substrate 60. In practice, a relay board is provided between the main control board 60 and the display board 70, and the main control board 60 and the relay board, and the relay board and the display board 70 are connected. In FIG. 1, the illustration of the relay board is omitted. Thus, the main control board 60 and the display board 70 may be directly connected by a harness or the like, but another board may be interposed between them.
Furthermore, the control boards are not limited to being directly connected (via a harness or the like), but may be connected via another separate board (a relay board or the like). For example, one or more other boards (such as relay boards) may be interposed between the main control board 60 and the sub control board 80.

  A storage number display LED 71, an acquisition number display LED 72, and a status display LED 73 are connected to the display substrate 70. These LEDs 71 to 73 are provided in the vicinity of an operation switch operated by the player, and are provided at a position where the player can always visually recognize them. It is not necessary that all the LEDs 71 to 73 are provided on one display substrate 70. For example, a plurality of display substrates 70 such as display substrates 70A, 70B,. Any of the LEDs 71 to 73 may be provided.

FIG. 2 is a plan view showing the storage number display LED 71, the acquisition number display LED 72, and the status display LED 73 in more detail.
In FIG. 2, a display substrate 70 (shown by a dotted line in FIG. 2) is disposed in the slot machine 10 below the storage number display LED 71, the acquired number display LED 72, and the status display LED 73.

The storage number display LED 71 is an LED that displays the number of medals stored in the slot machine 10 and includes a digit 1 that displays an upper digit and a digit 2 that displays a lower digit. That is, the storage number display LED 71 displays two digits.
Here, “digit” means a display unit (display), and in the present embodiment, it is composed of a seven segment display (seven segment display unit, so-called 7-segment).
As shown in FIG. 2, there are four digits 1 to 4 mounted on the display board 70. In the present embodiment, there are five digits, and the other digit 5 is the main digit. This corresponds to the set value display LED 64 (FIG. 1) provided on the control board 60.

The acquired number display LED 72 is an LED for displaying the number of payouts when winning a winning combination, and is composed of a digit 3 for displaying an upper digit and a digit 4 for displaying a lower digit. Therefore, the acquisition number display LED 72 displays two digits, like the storage number display LED 71.
The acquisition number display LED 72 normally displays the acquisition number, but functions as an LED for displaying the content (type) of an error when an error occurs, and may be referred to as an “acquisition number (or error) display LED 72”. . Furthermore, the acquisition number display LED 72 may be used as a display unit for notifying the correct pressing order during an AT game.

The storage number display LED 71 displays the number of stored medals, and in this embodiment, displays a number between “00” and “50” (integer).
For example, in a state where no medals are bet and stored, the display of the storage number display LED 71 is “00”. Here, when one medal is maintained, the one medal is bet for the game. When two more cards are additionally inserted, three medals are bet for the game (when the bet limit number is three). Therefore, when up to three medals are maintained, the medals are bet and not stored. As medals continue to be maintained, medals are stored in the slot machine 10 and the number of stored medals is displayed by the stored number display LED 71.

  In this embodiment, up to 50 medals can be stored. Therefore, when the number of stored sheets reaches 50 (when “50” is displayed on the stored number display LED 71), medals are not stored any more. In this state, if a medal is maintained from the medal insertion slot 43, the maintained medal is returned from the payout slot by the blocker 45.

Further, the acquisition number display LED 72 displays the number of medals to be paid out when winning a winning combination. Further, the acquisition number display LED 72 displays an error code instead of the acquisition number displayed so far when an error occurs.
The acquisition number display LED 72 is “00” when there are no medals to be paid out. For example, when the bell 01 described later wins and eight medals are paid out, the display of the acquisition number display LED 72 is “ 00 ”to“ 08 ”.
The acquired number display LED 72 may be controlled to be turned off when there are no medals to be paid out.

  Here, when a winning combination (excluding replay) is awarded and a medal corresponding to the winning combination is paid out, the slot machine 10 has priority over actually paying out a medal from the payout slot. Medals are stored. For example, when the stored number before winning the Bell 01 is “10”, the display of the acquired number display LED 72 is updated from “00” to “08” and the stored number display LED 71 is displayed. Is updated from “10” to “18”.

  Furthermore, when the winning number of the winning combination exceeds “50”, the portion exceeding “50” is actually paid out from the payout opening. For example, if the number of stored coins is “47” before winning the winning combination and eight medals are paid out by winning the bell 01, three are stored and the stored number becomes “50”, which exceeds “50”. Sheets are paid out from the payout opening.

  Further, at the time of replay winning, medals are not stored and paid out, and the number of medals bet in the game are automatically bet for replay. For example, when the game is played with 3 bets (3 cards) and a replay is won, 3 medals are automatically bet. Since the automatic bet based on the replay winning is the insertion of medals for replaying, even if the settlement (return) operation is performed thereafter, the medals cannot be settled.

  According to the “Rules for Game Machine Approval and Type Approval, etc.”, if the combination of symbols corresponding to replay is stopped on the active line, it is the operation of the condition device related to replay and not “winning” Interpreted. However, in the present application (this specification and the like), replay is also treated as one of the roles (replaying game), and the combination of symbols corresponding to the replay is stopped on the active line is referred to as “replay winning”.

In FIG. 2, the status display LED 73 is composed of seven LEDs (73a to 73g).
The replay display LED 73a is an LED that is turned on when a replay is won, and when an automatic bet is made based on the replay win, the replay display LED 73a is turned on to notify the player that the player is in an automatic bet state.

The insertable display LED 73b is an LED that lights up when a medal can be inserted. That is, it lights up before the game is finished and a medal for shifting to the next game is inserted, indicating a so-called bet waiting state. In the present embodiment, even after the replay is activated, it lights up when a bet can be made according to the number of stored items.
In the present embodiment, the settlement display LED 73c is an LED that is lit during the settlement process. When the settlement switch 46 is turned on in a state where there is a stored medal and / or a bet medal (excluding an automatic bet at the time of replay winning), the light is lit while the medal is actually paid out.

  The game start LED 73d is an LED that lights up when a medal is inserted and the start switch 41 becomes operable. Therefore, it does not light up when no medal is bet (or when replay is not automatically inserted).

  The (1 piece, 2 pieces, 3 pieces) insertion display LEDs 73e to 73g are LEDs for displaying the number of medals bet, respectively. When one medal is bet, “1 BET (1 piece insertion display LED 73e) is displayed. ) ”Is lit and when two medals are bet,“ 1 BET (one-sheet insertion display LED 73e) ”and“ 2 BET (two-sheet insertion display LED 73f) ”are lit and three medals are betted. At this time, “1 BET (1 sheet insertion display LED 73e)”, “2 BET (2 sheet insertion display LED 73f)” and “3 BET (3 sheet insertion display LED 73g)” are lit.

FIG. 3 is a diagram showing the relationship between the digits 1 to 5 and the segments AP.
Each digit is composed of segments A to P (a total of 8), and the segments A to G (7) of them constitute a so-called 7 segment. Further, the segment P constitutes any one of the status display LEDs 73 (excluding the digit 2).

As shown in FIG. 3, for example, in the digit 1, the segments A to G constitute the upper digit 7-segment of the stored number display LED 71, and the segment P constitutes the game start LED 73 d.
In FIG. 3, segments A to G of the digit 3 constitute the upper 7 digits of the acquisition number display LED 72, and the segment P constitutes a ready-to-use display LED 73b.

Similarly, in FIG. 3, among the digits 4, the segments A to G constitute 7 segments of the lower digits of the acquired number display LED 72, and the segment P constitutes a replay display LED 73 a.
In FIG. 3, among the digits 5, segments A to G constitute 7 segments of the set value display LED 64, and a segment P constitutes a settlement display LED 73 c.

  From the above, for example, when all the segments (segments A to P) of the digit 1 are turned on, the storage number display LED 71 (upper digit) displays “8” and the segment P by turning on the segments A to G. The game start LED 73d is lit in the status display LED 73 by turning on.

FIG. 4 is a diagram illustrating an LED display request flag and an LED display request counter.
The LED display request flag is a flag indicating which LEDs can be turned on, and is stored in a predetermined area of the RWM 61 as 1-byte data consisting of 8 bits (D0 to D7).
For example, when the LED display request flag can display the digits 1 and 2, that is, the upper and lower digits of the stored number display LED 71, the D0 and D1 bits are “1”, and other digits cannot be displayed. Then, the other bits become “0”. Therefore, the data of the LED display request flag in this case is “00000011B”.

As shown in FIG. 4, in this embodiment, in normal times (during gaming and waiting for gaming), digit 5 (set value display LED 64) is turned off and digits 1 to 4 are turned on. Therefore, the normal LED display request flag is “00001111B”.
While the setting is being changed, the set value is displayed in the digit 5, so that the D4 bit becomes “1”, and the digits 1 and 2 (reserved number display LED 71) are not displayed and become “0”, and the digits 3 and 4 ( The acquired number display LED 72) becomes “1” in order to display “-”. Therefore, the LED display request flag during the setting change is “00011100B”.

  Furthermore, during the setting confirmation, the setting value is displayed in the digit 5 as in the case of changing the setting, so the D4 bit becomes “1”. Further, the digits 1 to 4 are the same as in normal times. Therefore, the LED display request flag during setting confirmation is “00011111B”.

The LED display request flag is a flag whose value varies depending on whether it is normal, setting change, or setting confirmation.
On the other hand, the LED display request counter is 1-byte data consisting of 8 bits (D0 to D7) like the LED display request flag, and data whose value is updated every timer interrupt (2.235 ms) described later. It is. As shown in FIG. 4, "00010000B" is taken as an initial value, and the digit that is turned on ("1") is updated to shift right by one digit (execute a shift instruction) for each interrupt process. . When the value of the LED display request counter is “00000001B”, it becomes “00000000B” at the next interruption, but when it becomes “0” after the update, the initial value is again “0” at the interruption. 00010000B ". Note that the initial value “00010000B” may be set at the next interrupt when all bits become “0”.
Also, the assignment of digits to each bit of the LED display request flag and LED display request counter shown in FIG. 4 is not limited to that shown in FIG. For example, D0 to D2 can be unused and D3 to D7 can be assigned to each digit.

Although a detailed description will be given later, in the present embodiment, as a result of performing an AND operation on the LED display request flag and the LED display request counter, a digit “1” is a lighting target at the time of the interrupt processing.
As will be described later, when the error content (number) when an error that cannot be recovered (an error that cannot be recovered unless the power is turned off and the power is turned on again) occurs in the slot machine 10 is displayed on the LED The display request flag and the LED display request counter are not referred to.
On the other hand, in the case of a recoverable error (an error that can be recovered without turning on / off the power), the result of “AND” operation of the LED display request flag and the LED display request counter as in the normal state is “1”. LED which is “” is a lighting target.

  FIG. 5 is a diagram showing an LED segment table stored in the ROM 62. The LED segment table is a data table that stores an address and an offset value (deviation from the head address) and segment data for each address, that is, data indicating which segment is lit. For example, the address “1211” is the head address of the LED segment table, that is, the offset value “0”, and “3F (H)” in hexadecimal (“00111111B” in binary) is stored as the segment data. .

The 8-bit data when the segment data is expressed in binary is represented by “D7, D6, D5, D4, D3, D2, D1, D0”, and the data of D0 to D7 are the LED segment A to P signals, respectively. Indicates on / off of.
For example, in order to display “0” in the digits, segments A to F are on and segment G is off in FIG. Accordingly, the segment data at this time is “00111111B”.

Therefore, in FIG. 5, the segment data of the address “1211” is “00111111B”, that is, data indicating “0” in the digit.
As described above, data for displaying “0”, “1”, “2”,... In digits is stored in order starting from the address “1211”.
The use of the offset value in FIG. 5 will be described later (step S635 in FIG. 60).

Returning to FIG.
The main control board 60 is electrically connected to the motor 32 of the symbol display device 30 and the like.
The symbol display device 30 includes a reel 31 (three in this embodiment) that displays symbols, a motor 32 that drives each reel 31, and a reel sensor 39 that detects the position of the reel 31.

  The motor 32 is for rotating the reels 31, is connected to the center of rotation of each reel 31, and is controlled by a reel control means 63 c described later. Here, the reel 31 includes a left reel 31, a middle reel 31, and a right reel 31, and a stop switch 42 that is operated when the left reel 31 is stopped is the left stop switch 42, and when the middle reel 31 is stopped. The stop switch 42 to be operated is the middle stop switch 42, and the stop switch 42 to be operated when stopping the right reel 31 is the right stop switch 42.

  The reel 31 is ring-shaped, and a reel tape on which a plurality of types of symbols (designs constituting a combination of symbols corresponding to the combination) is attached is attached to the outer peripheral surface thereof. The specific arrangement of symbols on the reel 31 will be described later.

  Each reel 31 is provided with one (or two or more) index. The index is provided in a convex shape on, for example, the circumferential side surface of the reel 31 and is used when detecting whether the reel 31 has passed a predetermined position, whether it has rotated one time, or the like. Each index is detected by the reel sensor 39. The signal of the reel sensor 39 is electrically connected to the main control board 60. When the index detects (cuts) the in-reel sensor 39, the input signal is input to the main control board 60, and it is detected that the reel 31 has passed a predetermined position.

  Further, a symbol on the reference position at the moment when the reel sensor 39 detects the index of the reel 31 is stored in the ROM 62 in advance. Thereby, the symbol on the reference position at the moment when the index is detected can be detected.

  The medal payout device 35 is electrically connected to the main control board 60. The medal payout device 35 is a hopper 35a for storing medals, a hopper motor 36 that is driven when paying out medals of the hopper 35a from the payout port, and a medal paid out from the hopper motor 36. Dispensing sensors 37a and 37b are provided.

The medals that are maintained and received from the medal slot 43 are formed so as to be accommodated in the hopper 35a through a predetermined passage (also referred to as “chute portion”).
The payout sensors 37a and 37b are provided with a payout sensor 37a on the upstream side and a payout sensor 37b on the downstream side, similarly to the input sensors 44a and 44b.
As shown in FIG. 1, in the following description, the upstream payout sensor 37a may be referred to as the payout sensor 1, and the downstream payout sensor 37b may be referred to as the payout sensor 2.

  The payout sensors 37a and 37b are arranged at a predetermined distance, and are configured to be detected by the payout sensor 37b after a predetermined time has elapsed since the medal was detected by the payout sensor 37a. Then, based on the timing when the payout sensors 37a and 37b are turned on / off, it is determined whether or not the medals have been paid out correctly.

For example, when the signals of the payout sensors 37a and 37b are both off despite the hopper motor 36 being driven, it is determined that no medal has been paid out, and a hopper error (no medal) is detected. Is done.
On the other hand, when at least one of the signals from the payout sensor 37a or 37b remains on, it is detected that a medal jam has occurred. Note that only one payout sensor 37 may be provided to detect the error.

  The full sensor 38 is a sensor that detects the fullness of the sub tank 35b that accommodates medals overflowing from the hopper 35a, and is configured by a circuit that energizes when the medals come into contact when the medals in the sub tank 35b become full.

The door switch 16 is a switch that is turned on when a front cover (not shown) of the slot machine 10 is opened, and detects the open / closed state of the front cover.
The power switch 51 is a switch for turning on / off the power of the slot machine 10.
The setting key switch 52 is a switch that is turned on when a setting key is inserted from the setting key insertion slot and is rotated 90 degrees to the right, and is turned on when confirming the setting or changing the setting.

The setting change / reset switch 53 is a switch that serves as both a setting change switch and a reset switch. Note that the setting change switch and the reset switch may be provided separately.
The setting change / reset switch 53 is operated when changing a setting value. When the power switch 51 is turned on while the setting key switch 52 is turned on, reset, that is, initialization processing is performed, and predetermined data stored in the RWM 61 is cleared.

  The setting door switch 54 is a switch that detects opening and closing of a door (not shown) that covers the setting key switch 52 and the setting change / reset switch 53. For example, an error occurs when the setting door switch 54 is off, that is, when the setting key switch 52 is on while the setting door is not opened.

FIG. 6 is a diagram showing the input ports 0 to 2 provided on the main control board 60. 7 to 9 are diagrams showing output ports 0 to 8 provided on the main control board 60. FIG.
In this embodiment, the input ports 0 to 2 and the output ports 0 to 8 are 1-byte ports to which 8 bits D0 to D7 can be input or output.
The input port and the output port are provided in addition to those shown in the figure, but the description thereof is omitted in this embodiment.

  In FIGS. 6 to 9, a port indicated as unused means a signal input / output port that is not actually used or a description of which is omitted in the present embodiment (a port without signal input / output). Does not mean all unused).

  In FIG. 6, the input port 0 receives signals from an adjustment switch 46, which is an operation switch, a bet switch 40 (a 1-bet switch 40a and a 3-bet switch 40b), a start switch 41, and a stop switch 42. In the example of FIG. 6, the 1-bet switch signal (D1 bit) and the 3-bet switch signal (D2 bit) are separated. However, when the slot machine 10 has only the 3-bet switch 40, The D1 bit of input port 0 is unused.

The input port 1 receives signals from the passage sensor 43a, the door switch 16, the setting door switch 54, the setting key switch 52, the setting change / reset switch 53, and the (left, middle, right) reel sensor 39. .
Furthermore, the input port 2 includes a power interruption signal (a signal output when power interruption occurs), a signal from the closing sensors 1 (44a) and 2 (44b), and a dispensing sensor 1 (37a) and 2 (37b). ) Signal and the full sensor 38 signal are input. When the slot machine 10 is not provided with the setting door switch 54, the D2 bit of the input port 1 is not used.

  As will be described later, a main process (M_MAIN) (also referred to as a main loop) that is performed once per game is provided as information processing for proceeding with the game. The main process is a process in which inserted medals are detected or a winning process is performed after all reels 31 are stopped.

  During this main process, the main process is temporarily exited and an interrupt process (timer interrupt process) is executed. In the interrupt process, a process of detecting the input ports 0 to 2 (step S607 in FIG. 59) is executed, and after the process is executed, a process of returning to the main process is periodically performed again. The interval of the interrupt time is 2.235 ms in this embodiment. That is, the data of the input ports 0 to 2 is acquired for each interrupt process at intervals of 2.235 ms. Based on the acquired data, for each of the input ports 0 to 2, level data (data indicating ON / OFF of each bit), rising data of the input port (when the previous interrupt is off, this interrupt is on) Data indicating which bit the data has become), and falling data of the input port (data indicating which bit is the data that was on at the time of the previous interrupt and turned off at the time of the current interrupt) And remember. Therefore, these data are updated every 2.235 ms.

Also, all D0 to D7 bits of the input ports 0 to 2 are detected regardless of when the interrupt processing is performed. For example, since the player cannot operate the bet switch 40 while the reel 31 is rotating (before the stop switch 42 is operated), the D1 and D2 bit data of the input port 0 are always acquired. Although not necessary, in the present invention, data of all bits is acquired. If all bits of data are acquired, error determination can be performed. For example, the rise data of the bet switch 40 is turned on while the reel 31 is rotating.
For example, if 1 byte data (8 bits) of the input port 0 is acquired, it is possible to know the on / off status of all the operation switches.

  In FIG. 7, the output port 0 is used for outputting an LED digit signal. The output port 1 is used for outputting an LED segment signal. These LED digit signal and LED segment signal are signals for turning on / off the set value display LED 64, the storage number display LED 71, the acquisition number display LED 72, and the status display LED 73.

Specifically, for example, when the data of the output port 0 is “00000001B”, only the digit 1 is turned on, so only the upper digit of the storage number display LED 71 is turned on. Further, when the data of the output port 1 is “00111111B”, the signals of the segments A to F are turned on, so that “0” is displayed in the digit 1.
As described above, which digit is to be lit at the output port 0 and which segment is to be lit at the output port 1 are determined.

Although not shown in FIG. 1, in the present embodiment, LEDs are provided around the 3-bet switch 40b and the stop switch 42 (in the unit of the stop switch 42).
And in the output port 2, the signal for lighting the said LED of the 3-bet switch 40b and the stop switch 42 is output. “Red” is lit when operation is not possible, and “blue” is lit when operation is possible.
In FIG. 8, at the output port 3, the φ0 to φ3 signals of the motor 32 of the left reel 31 are output from the D0 to D3 bits. The motor 32 of this embodiment is configured to rotate the reel 31 by 1-2 phase excitation, and the reel 31 is driven by a combination of four-phase excitations of φ0 to φ3. Are respectively output from predetermined bits.

Further, a signal of the blocker 45 is output from the D6 bit. Furthermore, a drive signal for the hopper motor 36 is output from the D7 bit.
Here, the blocker 45 forms a medal passage connecting the medal insertion port 43 and the hopper 35a when the signal of the blocker is “1” (on), and when it is “0” (off), A passage (return passage) that connects the medal slot 43 and the payout slot is formed.
For example, when the blocker 45 is driven, a blocker signal is output from the D6 bit of the output port 3 by interrupt processing.

From the D0 to D3 bits of the output port 4, the φ0 to φ3 signals of the motor 32 of the middle reel 31 are output. Similarly, the φ0 to φ3 signals of the motor 32 of the right reel 31 are output from the D0 to D3 bits of the output port 5.
Further, from the D5 to D7 bits of the output port 4, the signals of the one, two, and three-loading display LEDs 73e to 73g in the status display LED 73 are output.

Furthermore, an external (outer end) signal is output from the output port 6 to the external concentration terminal board 100. In this embodiment, external signals 1 to 5, a medal payout signal, and a medal bet (insertion) signal are output. Is done.
Here, the “external signal” is a signal to be output to the outside of the slot machine 10 (a hall computer, a data counter installed in the hall, etc.) via the external concentration terminal board 100. In the present embodiment, an external signal 1 indicating ART activation (first hit), an external signal 2 indicating ART continuation, an external signal 3 indicating the time from the start to the end of ART, an error or a power interruption occurring in the slot machine 10 There are provided an external signal 4 indicating that this has occurred and an external signal 5 indicating the opening of the front door of the slot machine 10.

However, the present invention is not limited to this. For example, the external signal 1 can be set to a specific RT state, or the external signal 2 can be set to a specific special game state such as 1BB, the external signal 3 can be set to 2BB, etc. 1-3 are not necessarily limited to ART.
Although details of these output signals will be described later, in this embodiment, a signal output from the output port 6 is stored in the B register and becomes “external output signal data”.

  FIG. 9 is a diagram showing the output ports 7 and 8. In this embodiment, the output ports 7 and 8 are set as ports that transmit predetermined signals (information) to the testing machine. Here, the “test signal” means that the slot machine 10 connects the slot machine 10 (game machine) and the test machine and transmits a predetermined signal from the slot machine 10 to the test machine. It is a signal used to confirm whether it is designed according to the “Rules for Certification and Type Verification”. The connection between the slot machine 10 and the testing machine is not limited to a direct connection, but may be connected via an interface board for relaying. When the slot machine 10 is installed in the hall, the interface board is removed, but the program including the output processing to the output ports 7 and 8 is stored in the ROM.

In FIG. 9, condition devices 1 to 8 are assigned to the output port 7. Here, the “condition device” indicates a so-called winning number (winning type). In the present embodiment, as will be described later, D6 and D7 bits indicate the presence or absence of bonus winning, and D0 to D5 bits. Shows the type of winning. By using the D0 to D5 bits, 64 types of winning patterns can be output. By outputting a signal from the output port 7, it is possible to inform the outside which condition device is turned on (which winning) in the game.
The output port 8 is an output port for the test signals 1 to 8. Specific contents of the test signal will be described later.
As described above, data based on the signals of the input ports 0 to 2 is stored in one interrupt, and signals are output to the output ports 0 to 8 based on the stored control data.

10 to 13 are diagrams showing storage addresses (addresses) of data stored in the RWM 61 and their contents. Note that the data shown in FIGS. 10 to 13 is data used in the description of the present embodiment, and the data stored in the RWM 61 is not limited to these data.
In FIG. 10, “_FL_MEDAL_STS” of the address “F01B” is a data storage area of a medal management flag. This medal management flag is a flag for mainly controlling the turning on / off of the status display LED 73. In the medal management flag, the D0 bit indicates the start switch 41 receiving state, and when the start switch 41 is received, that is, when the start switch 41 is operable (for example, a state before a bet is placed and a game is started). When it becomes “1” and the operation of the start switch 41 cannot be accepted (for example, while the reel 31 is rotating), it is set to “0”.

The blocker state of the D2 bit is data that is “1” when the blocker 45 is on, and is “0” when it is off. By determining the value of this D2 bit, it is possible to determine what state the current blocker 45 is in (on or off).
The D3-bit replay display LED is data that is set to “1” when a replay is displayed and a medal is automatically inserted as a replay (step S141 in FIG. 34). When this data is “1”, the replay display LED 73a of the above-described status display LEDs 73 is lit. Further, the data is set to “0” when the game by re-game is finished (step S72 in FIG. 32). When this data is “0”, the replay display LED 73a is turned off.

  The D4-bit settlement display LED is data that is set to “1” when the settlement switch 46 is operated to settle the stored medal (step S324 in FIG. 60). When this data is “1”, the settlement display LED 73c of the above-described status display LEDs 73 is turned on. Further, the data is set to “0” when the settlement of the stored medal is completed (step S326 in FIG. 48).

  As described above, in this embodiment, the adjustment display LED 73c is lit when the adjustment of the stored medals that can be stored up to 50 is executed. However, the bet medals and the stored medals are displayed at a time. When it is formed so as to be settled, it is preferably formed so as to be set to “1” when the bet or the stored medal is settled (so that the settlement display LED 73c is lit).

  The D6 bit setting change disable flag is data that is “0” when the setting can be changed, and is “1” otherwise. In the present embodiment, when the game is progressed by operating the start switch 41 (step S433 in FIG. 53), the data is set to “1”, and the medal acceptance of the next game is started (FIG. 34). In step S133), the data is set to “0”. When the setting is changed, the value of the setting change permission flag is referred to. When the setting change disable flag is “1”, the setting change is not permitted. However, even if the setting change disable flag is “1”, if it is determined that the error cannot be recovered (for example, random number update abnormality determined for each interrupt process), the setting change is permitted and the setting change is not allowed. Based on this, it becomes possible to cancel the unrecoverable error.

  The D7-bit medal limit setting determination is data that is “1” when the bet medal number reaches the medal limit number, and is “0” when the medal limit number is not reached. As described above, the limit number is set to 2 (in the 1BB game) or 3 (other than the 1BB game such as a normal game) in the present embodiment. Therefore, for example, in a normal game, when the number of bet medals is 0, 1, or 2, the medal limit number is not reached, so it is “0”, and when it is 3, the medal limit number is reached. “1”.

In addition, “_FL_ACTION” of the address “F01C” is a data storage area of an operation state flag. In this embodiment, replay is assigned to the D0 bit, 1BB is assigned to the D3 bit, and RB is assigned to the D4 bit.
For example, when the replay is won, the replay is activated, and when the game state is set (step S88 in FIG. 33), the D0 bit is set to “1”. The D0 bit is changed from “1” to “0” when the game by re-game is finished (step S72 in FIG. 32).
Although not provided in the present embodiment, when 2BB and CB are provided, for example, 2BB is assigned to the D1 bit and CB is assigned to the D2 bit, as shown in the operation state flag.

“_FL_WIN” of the address “F043” is a storage area of the symbol combination display flag, and in this embodiment, replay is assigned to the D0 bit and 1BB is assigned to the D3 bit. For example, when it is determined that the replay symbol has stopped, the D0 bit is set to “1”. This bit is changed from “1” to “0” when the next game starts (when the start switch 41 is operated).
In addition, although not provided in this embodiment, when 2BB, CB, and RB (single winning) are provided, for example, DBB is set to 2BB, D2 is set to CB, and D4 is set to correspond to the operation state flag. Allocating RB.

  In FIG. 11, “_PT_BLK_HPM” of the address “F023” is a storage area for data of the blocker signal and the hopper motor drive signal, and the D6 bit is used as the blocker signal and the D7 bit is used as the hopper motor drive signal (D0 to D5 bits). Is not used). When the blocker 45 is turned on, the D6 bit is “1”, and when the hopper motor 36 is turned on, the D7 bit is set to “1”. More specifically, the address “F023” is updated in the main process, the data of the output port 3 is generated based on the data of the address “F023” in the interrupt process, and the blocker 45 is controlled.

  Further, “_PT_MEDAL_LED” of address “F025” is a storage area for the inserted sheet number display LED data, and 3 to 1 sheet insertion display LEDs 73g to 73e are assigned to the D5 to D7 bits, respectively. For example, when only the D7 bit is “1”, control is performed so that only the single-load display LED 73e is lit. Further, when the D7 and D6 bits are “1”, the one-sheet insertion display LED 73e and the two-sheet insertion display LED 73f are controlled to be lit.

Furthermore, “_NB_REP_MEDAL” at address “F06C” is a storage area for automatic insertion number data (data indicating the number of medals automatically bet upon replay winning), and “3” is stored in this embodiment.
“_NB_PLAY_MEDAL” at address “F06D” is a storage area for medal bet number data, and in this embodiment, any one of “0” to “3” is stored.
“_NB_PAY_MEDAL” of the address “F06E” is a storage area for medal payout number data, and in this embodiment, any value from “0” to “8” is stored. In the present embodiment, since the maximum payout number of medals in one game is 8, the maximum value of the medal payout number data is “8”. However, for example, when a 15-sheet payout combination is provided, the medal payout number data is “0” to “15”.

  “_CT_MEDAL_IN” of the address “F06F” is a data storage area of medal bet (insertion) signal output count (also referred to as medal bet (insertion) signal switching count), and values “0” to “6” are stored. . In the present embodiment, the medal insertion signal output count indicates the number of times that the bet number of medals is output as a signal, and the number of times that the bet number is doubled is output. Accordingly, in the present embodiment, the maximum value of the bet number is “3”, and therefore the maximum value of the medal insertion signal output number is “6”. For example, when outputting the bet number “3”, “on (first time) → off (second time) → on (third time) → off (fourth time) → on (fifth time) → off (sixth time)”. Become.

  “_CT_MEDAL_OUT” of the address “F070” is a data storage area of the medal payout signal output count (also referred to as medal payout signal switching count), and stores values of “0” to “16”. This medal payout signal output count indicates the number of times that the medal payout number is output to the outside as a signal, and outputs the number of times the payout number is doubled. This is the same as the number of medal insertion signal outputs. Therefore, in the present embodiment, the maximum value of the number of payouts is “8”, so the maximum value of the medal payout signal output count is “16”. As described above, when the maximum value of the number of payouts is set to “15”, for example, the maximum value of the medal payout signal output count is “30”.

In FIG. 12, “_NB_CREDIT_LED” at address “F019” is a storage area for storage number display data, and the storage number display LED 71 described above stores data for displaying the storage number at that time. Here, in this embodiment, the data itself is a hexadecimal number (H), but a value obtained by converting the stored number into a decimal number is stored. For example, when the stored number to be displayed is “29”, a value “29H” is stored. In other words, “00101001B” is stored in the address “F019”. As a result, the lower 4 bits of D0 to D3 of the address “F019” are used to display the lower digit (“9” in this example) of the stored number, and the upper 4 bits of D4 to D7 are used to indicate the stored number. It is stored as data for displaying the upper digit ("2" in this example). In the present embodiment, since the upper limit value of the number of stored sheets is “50”, the stored data value is in the range of “0” to “50”.
In the present embodiment, the address of the RWM 61 for storing the stored number data itself is not provided, but the stored number display data is provided as the display data of the stored number display LED 71. However, the stored number display data is the stored number data itself.

In addition, “_CT_BB1_PAY” of address “F071” is an acquired number counter (storage area storing the maximum number of medals that can be acquired in 1BB game) at the time of 1BB operation. “200” is set as the value. Each time a medal is paid out, the stored value is subtracted.
Although not provided in the present embodiment, for example, when a 2BB (a combination continuous action device) is provided, the next address “F072” is set to “_CT_BB2_PAY”, and the number counter obtained at the time of 2BB operation (acquired by 2BB game) A storage area for storing the maximum possible number of medals) is provided. Then, for example, “40” is set as the initial value of the 2BB game, and the stored value is subtracted every time a medal is paid out in the 2BB game.
In addition, when 2BB is provided, in that 2BB game, a CB (second type special feature) game that is continuously operated is executed every game until the end condition (maximum payout number) of the 2BB game is satisfied.

“_CT_BONUS_PLAY” of the address “F073” is a storage area of a game number counter at the time of RB operation, and “0” to “2” are stored in this embodiment.
Further, “_CT_BONUS_WIN” of the address “F074” is a storage area of a winning number counter at the time of RB operation, and “0” to “2” are stored in the present embodiment.
Here, in the present embodiment, 1BB (a bonus continuous action device) is provided as a big bonus, and during the 1BB game, the RB (the first kind special bonus) is activated (the RB game is executed). Is set. Further, the RB game is set so as to continue until the number of games reaches two or the number of winnings satisfies at least one of the two times, and continues until the end condition of one BB game (payout of 200 cards) is satisfied. Yes.
For this reason, during the 1BB game, the game count and the winning count of the RB game are continuously counted.

“_CT_INTR” of the addresses “F02B” and “F02C” is an interrupt counter storage area (also referred to as interrupt counter value storage means). The value of the interrupt counter is an increment counter having a range of “0” to “65535”, and the value is updated (“+1”) for each interrupt. Note that when “0” to “65535” are employed as the interrupt counter values as in this embodiment, a 2-byte address “F02B” (upper 8 bits) and “F02C” (lower 8 bits) For example, when a range of “0” to “255” is adopted, a 1-byte address “F02B” is used.
“_TM2_GAME” of the address “F03A” is a timer for monitoring one minimum game time, and when “1836” is set as an initial value, “1” is subtracted for each interrupt. The minimum game time of this embodiment is set to “4.1 seconds” (2.235 ms × 1836≈4100 ms).

“_NB_CND_NOR” of the address “F048” is a storage area for winning and replay condition device numbers. When a winning combination is determined and a winning combination is determined, a value (this book) corresponding to the winning combination is stored in this storage area. In the embodiment, any one of “0” to “16”) is stored. The values stored here are used for selection of a stop position determination table used for stop control of the reel 31, AT lottery (addition during AT), effect lottery by the sub control board 80, etc., as shown in FIG.
Further, “_NB_CND_BNS” of the address “F049” is a storage area for the accessory condition device number, and in this embodiment, “0” or “1” is stored depending on whether 1BB is won or not. Similarly to the above, this value is also used for selection of the stop position determination table used for the stop control of the reel 31, AT lottery (addition during AT), effect lottery by the sub control board 80, and the like.
For example, when two types of 1BB and 2BB are provided as special roles, “0” to “2” are stored in decimal notation, and 1BB (1), 1BB (2), 2BB (1) When four special roles of 2BB (2) are provided, “0” to “4” are stored. Here, the winning number of the special combination is stored in this address. For example, when the special combination is won and the symbol combination corresponding to the selected special combination is not stopped (in the case of an internal middle game to be described later) In addition, the winning number of the special role won is stored.

  In FIG. 13, “_NB_CNDINF_N” of the address “F04C” is a storage area for winning and replay condition device information. When a winning combination is determined and a winning combination is determined, a number (condition device) corresponding to the winning combination is determined. Number) is stored. In other words, this address is a storage area for storing information to be generated based on “_NB_CND_NOR” of the address “F048” and transmitted to the testing machine. In the winning and replay condition device information, information is generated so that the D6 bit is always “1”, and the D0 to D5 bits are values corresponding to the winning combination (in this embodiment, “0” to “0”). 16 ”) is stored. For example, when “00000101B” is stored in the address “F048” (when Bell A4 is selected in this embodiment), “01000101B” is stored in the address “F04C”. When “00000000B” is stored in the address “F048” (when the winning combination is not won), “01000000B” is stored in the address “F04C”.

In addition, “_NB_CNDINF_B” of the address “F04D” is a storage area for the accessory condition device number, and is a number corresponding to the winning combination depending on whether 1BB (or 2BB if 2BB is provided) is won. (Condition device number) is stored. In other words, this address is a storage area for storing information to be generated based on “_NB_CND_BNS” of the address “F049” and transmitted to the testing machine. In this accessory condition apparatus information, information is generated so that the D7 bit is always “1”. Further, when the 1BB is not won, the D0 bit is set to “0”, and when the 1BB is won or when the 1BB is in the middle, the D0 is D0. The bit is set to “1”. For example, when “00000001B” is stored in the address “F049”, “10000001B” is stored in the address “F04D”. Further, when “00000000B” is stored in the address “F049” (in this embodiment, when 1BB is not selected), “10000000B” is stored in the address “F04D”.
Details of the winning and replay condition device number and the accessory condition device number will be described later.

“_TM1_COND_OUT” of the address “F030” is an area for storing a timer value for measuring the output time of the condition device signal (winning and replay condition device information, and accessory condition device information). In this embodiment, “25” is set after the minimum gaming time has elapsed, and “1” is subtracted for each interrupt. Note that the subtraction of the timer value is performed in step S605 (timer measurement) of interrupt processing described later.
In this embodiment, about 53.64 ms is counted by 24 interrupts, and this 53.64 ms is the output time of the condition device signal. Although details will be described later, in the present embodiment, after the timer value is set to “25” after the minimum gaming time has elapsed, the timer value is updated to “24” in the first interrupt processing. And while the timer value is “24” to “13”, the accessory condition device information (_NB_CNDINF_B) is output, and when the timer value is “12” to “1”, the winning and replay condition device information ( _NB_CNDINF_N) is output. Further, while the timer value is “0”, the value “0” is output as the condition device information.

Next, a specific configuration of the main control board 60 will be described.
As shown in FIG. 1, the main CPU 63 of the main control board 60 includes the following setting change means 63a and the like. Note that the following means in the present embodiment are examples, and are not limited to the means shown in the present embodiment.

The setting change means 63a is a means for changing and determining the set value.
Here, the set value defines the degree of player's advantage, more specifically, the expected value of the payout number with respect to the number of inserted medals (medals that can be acquired by the player), and is set in this embodiment. 1 to setting 6 stages are provided.
The higher the set value, the higher the advantage for the player, such as the higher the winning probability of at least some of the winning combinations (particularly 1BB).
Further, the higher the set value is, the higher the probability of shifting to ART, and the higher the advantage for the player is set.
In addition, it is not restricted only to making the probability which transfers to ART high, For example, the probability of adding up the game frequency in AT and the number of payouts may be made high, and the probability of continuing ART may be made high.

In order to set / change the set value, a power switch 51, a setting key switch 52, and a setting change / reset switch 53 are used.
In the present embodiment, when the power switch 51 is once turned off and the power is turned off, a setting key is inserted into the setting key insertion slot and rotated 90 degrees clockwise, the setting key switch 52 is turned on. When the power switch 51 is turned on again in this state, the setting is being changed, that is, the setting changing mode is entered. In this case, normal startup processing is not performed. Therefore, in order to change the setting, the power switch 51 needs to be turned on / off.

In the setting change mode, the setting changing means 63a displays the current setting value on the setting value display LED 64.
The setting change means 63a displays the set value every time the setting change / reset switch 53 is operated (turned on) once... → “1” → “2” → “3” → “4” “→” 5 ”→“ 6 ”→“ 1 ”→“ 2 ”→...

Further, when the start switch 41 is turned on, the setting change means 63a determines the setting value with the numerical value displayed on the setting value display LED 64 at this time, and “0” indicating that the setting value has been determined. Is displayed on the set value display LED 64.
Then, the setting changing means 63a turns the setting key 90 degrees counterclockwise to turn off the setting key switch 52, thereby enabling a game with the setting value after the setting change.

In this embodiment, the determination of the setting key switch 52 being turned off is performed based on the falling data of the setting key switch 52. However, the setting key switch 52 is turned on / off. You may comprise so that it may be performed based on.
Further, it may be configured so that the game cannot be performed with the setting value after the setting change unless the setting key is removed from the setting key insertion slot.
Further, if the setting key is rotated 90 degrees counterclockwise to turn off the setting key switch 52, the setting key is removed from the setting key insertion slot, and the power switch 51 is once turned off in this state and then not turned on again. You may comprise so that a game cannot be performed with the setting value after a setting change.

In addition, in the state where no medals are bet and the part lottery is not performed (before the start switch 41 is operated), the setting key is inserted into the setting key insertion slot, and the setting key switch 52 is turned on. And “Settings are being confirmed”. That is, when only the set value is confirmed, it is not necessary to turn on / off the power switch 51. During the setting confirmation, the setting value at the present time is displayed on the setting display LED 64 as in the case of the setting change.
Furthermore, when the power switch 51 is turned on while the setting key switch 52 is turned on, reset, that is, initialization processing is performed. This initialization process will be described later.

The role lottery means 63b performs lottery for each game at the start of the game.
Here, the combination of the present embodiment, the combination of symbols, and the like will be described.
FIG. 14 is a diagram showing a symbol arrangement of the reels 31 in the present embodiment. In FIG. 14, the symbol numbers are also shown. For example, in the left reel 31, the symbol of symbol number 16 is “bell”.

As shown in FIG. 14, in this embodiment, each reel 31 is equally divided into 16 frames (symbols), and a predetermined symbol is displayed on each frame. Depending on the specifications of the slot machine 10, it may be 20 frames or 21 frames.
FIG. 15 is a view showing the display window 13 (transparent window) provided on the front cover 11 of the slot machine 10, the positional relationship between the reels 31, and the effective lines.

  In this embodiment, three reels 31 (left reel 31, middle reel 31, and right reel 31) are provided in parallel in the horizontal direction in this embodiment. Further, each reel 31 is arranged so that three symbols that are continuous in the vertical direction can be seen from the display window 13. Therefore, the display windows 13 of the slot machine 10 are arranged so that a total of nine symbols can be seen. The numbers on the lower right of each symbol indicate the symbol number.

  In this specification, in FIG. 15, “watermelon (No. 01)” on the left reel 31, “Replay (No. 16)” on the middle reel 31, and “blue 7 (No. 14)” on the right reel 31. Is called “upper stage”, and the “reel (number 13)” on the left reel 31, the “bell (number 15)” on the middle reel 31, and the “replay (number 13)” on the right reel 31 are The position where the symbol is stopped is called “middle stage”, “replay (15th)” of the left reel 31, “white 7 (14th)” of the middle reel 31, and “bell (12th)” of the right reel 31. The position where the symbol "" is stopped is referred to as "lower stage".

Furthermore, as shown in FIG. 15, effective lines are set for nine symbols visible from the display window 13.
Here, the “effective line” is a symbol combination line that forms a symbol combination when the reel 31 is stopped, and a symbol combination corresponding to any of the combinations is the line. It is a line that will be the winning prize of that role when stopped. In the present embodiment, as shown in FIG. 15, only the effective line (one line) in the middle in the horizontal direction is defined, and all the other symbol combination lines are invalid lines.

  For example, in FIG. 15, a symbol combination line passing through the upper stage of each reel 31 and a symbol combination line passing through the lower stage of the left reel 31, the middle stage of the middle reel 31, and the upper stage of the right reel 31 are also conceivable. This line is an invalid line in this embodiment. An invalid line is a line that is not set as a valid line among symbol combination lines, and even if a combination of symbols corresponding to any of the combinations stops on that line, a profit corresponding to the combination is given. This line does not perform (medal payout etc.). In other words, the invalid line is a line that is not a target of combination of symbols in the first place.

  Conventionally, there are known slot machines in which the number of effective lines differs depending on the number of medals bet. For example, when the number of medal bets is one, one effective line is set, when the number of medal bets is two, the number of effective lines is three, and when the number of medal bets is three, the number of effective lines is set to five. And so on. On the other hand, in this embodiment, during the game, two (1BB game) or three (other than 1BB game) medals are bet and the game is performed. Only one is the active line. The effective line may be determined in advance according to the number of medals bet.

FIG. 16 to FIG. 18 are diagrams showing combinations of types of combinations, the number of payouts, and symbols in the present embodiment. In FIG. 16 to FIG. 18, the number of medals displayed in parentheses in the “Position” column indicates the number of payouts when winning the winning combination.
Further, for example, in the case of the bell 02a of FIG. 16, the combinations of the symbols of the bell 02a are 2 of "Replay"-"Red 7"-"Red 7" and "Replay"-"Red 7"-"BAR". It means that it has a kind (in the case of having a combination of a plurality of symbols in other roles, it has the same meaning).

The roles of this embodiment are roughly classified into special roles, replays, and small roles.
A combination of symbols corresponding to each combination and the number of payouts at the time of winning are determined. When all the reels 31 are stopped, when the combination of symbols corresponding to any of the combinations stops on the active line (the combination wins, the same applies hereinafter), the number of medals corresponding to the combination is paid out.

First, the special role is a role that shifts from a normal game to a special game. In this embodiment, 1BB (1st type big bonus (a combination continuous action device)) is provided as a special combination.
In addition, as the special combination, RB (regular bonus (first-type special combination)), 2BB (second-type big bonus (consecutive unit continuous operation device), also referred to as “MB” (middle bonus)). , CB (challenge bonus (second type special character)), and SB (single bonus (ordinary character)), which are not provided in this embodiment.

When 1BB wins, medals are not paid out in the game, but the game shifts from the next game to the 1BB game corresponding to the special game.
Note that the 1BB game is an advantageous game for the player who can expect to win more medals than the normal game because the turnout rate is set to exceed “1”.
The 1BB game is a game in which RBs are continuously operated (RB games are continuously executed). The combination of symbols corresponding to RB is not provided, and RB is activated at the same time as 1BB game is started, and after completion of RB game, RB is activated again if the condition for ending 1BB game is not satisfied. To do.

In the present embodiment, 1BB game is set until the number of payouts exceeds 200. On the other hand, the RB game executed during the 1BB game is a game that is continued until the number of games or the number of winnings reaches two. Therefore, when the RB game end condition is satisfied and the payout number of 1BB game does not exceed 200, the next game also activates the RB.
On the other hand, if the RB is activated and, for example, when the number of payouts of 1BB game exceeds 200 at the end of the first game, the 1BB game is ended in the game.

Although not provided in this embodiment, for example, when 2BB game is provided, a combination of symbols corresponding to 2BB (for example, “BAR”-“BAR”-“red 7”) is provided, and 2BB wins a prize. Then, although there is no payout of medals in the game, the game shifts from the next game to the 2BB game corresponding to the special game.
As described above, the 2BB game is continued until, for example, the medal payout number exceeds 40. In the 2BB game, every game and CB are activated, and for each game, the CB is deactivated after the game ends, and the CB is activated at the start of the next game.

In addition, the replay (re-playing combination) is a combination that enables a re-play that maintains the number of medals inserted in the game (automatic bets on medals).
The replay of this embodiment includes a replay corresponding to a normal replay and two types of special replays (special replays 1 and 2), each having a different combination of symbols.
The special replay 1 is a role that promotes the gaming state from RT1 to RT2 when winning in RT1, and is also referred to as promotion replay.
On the other hand, special replay 2 is a role of demoting the gaming state from RT2 to RT1 when winning at RT2, and is also referred to as falling replay.

Furthermore, a small role is roughly divided into a bell and a cherry.
The bell includes a bell 01 with eight payouts at the time of winning a prize and bells 02a to 09d with one payout at the time of winning a prize.
Cherry has four types of cherries 01 to 04, and the payout number at the time of winning is set to one for each.

In each of the above-mentioned combinations, when the combination of symbols corresponding to the combination does not stop on the active line in the game won for the combination, a combination that is carried over to the next game and a combination that is not carried over are determined.
The combination carried over is 1BB, which is a special combination. When 1BB is won, the game is controlled to carry over the winning of 1BB to the next game in the game until 1BB wins.

  On the other hand, the winning combination of 1BB is carried over, while small plays and replays other than 1BB are not carried over. In the lottery of a combination, when a small combination or replay is won, the winning combination is valid only in the game, and the winning combination is not carried over to the next game. That is, in the game won for these winning combinations, the reel 31 is controlled to stop so that a combination of symbols corresponding to the winning combination can be won, but at the end of the game regardless of whether or not the winning combination is won. , The right (that is, information) related to the winning role will disappear.

A game in which the special role (1BB) is not won (during a game in which the special role is not carried over) is referred to as “non-inside”. A game in which a special role is won in a game before the game but the selected special role is not won (a game in which the special role is carried over) is called “inside”.
Also, although not provided in this embodiment, when 2BB or RB for single winning is provided, as in 1BB, when the winning is carried over and the winning game is not won, Transition to middle game.
On the other hand, although not provided in this embodiment, when a SB or a CB for single winning is provided, as in the case of a small role, the winning is not carried over and the winning game is not won. In the event that the game ends, the right to the winning combination will cease.

Returning to FIG.
The role lottery means 63b includes, for example, a random number generation means for hardware lottery (a hardware random number, a random number generation circuit provided in the MPU, etc.), a random number extraction means for extracting a random number generated by the random number generation means, And determining means for determining the presence / absence of a winning combination and the winning combination based on the random value extracted by the random number extracting means.

  The random number generation means generates random numbers in a predetermined area (for example, 0 to 65535 in decimal notation). Random numbers are MPUs for random numbers (hardware random numbers) in which a counter that performs 1 count at 200n (nano) sec continues counting as a cycle in the range of 0 to 65535 or a predetermined random numerical order (number sequence). Is a random number (built-in random number) that is updated every clock cycle, and continues to count the random number while the slot machine 10 is powered on.

The random number extraction means extracts the random number generated by the random number generation means at a predetermined time, in the present embodiment, when the start switch 41 is operated (turned on) by the player. The judging means collates the random number value extracted by the random number extracting means with the role lottery table, thereby determining the combination corresponding to the area to which the random number value belongs. For example, if the extracted random number value belongs to the 1BB winning area, it is determined to be 1BB winning, and if it belongs to the non-winning area, it is determined to be non-winning.
The extracted random number may be processed by calculation and collated with the role lottery table.

  The combination lottery table defines the types of combinations to be selected and the winning probability of each combination. The role lottery table is provided for each gaming state, and each has a predetermined range of lottery areas.This lottery area is divided into a winning area and a non-winning area for each role, and It is set to a predetermined ratio so as to have a winning probability set in advance.

19 and 20 are diagrams showing the types of winning in the present embodiment. Winnings in the present embodiment have winning numbers “0” to “16”. When the winning lottery is performed by the winning lottery means 63b, one of the winning numbers “0” to “16” or no winning is made.
The winning of 1BB with the winning number “0” and the winning of the replay with the winning number “1” are the single winning of 1BB and the replay, respectively.

On the other hand, the winning numbers “2” to “16” are duplicate winnings of a plurality of types of roles.
Winning numbers “2” to “13” indicate bell winnings, and all are duplicate winnings of eight types of bells 01 and three types of bells of one type (four types in total). For example, Bell A1 means that four bells, Bell 01, Bell 02a, Bell 03, and Bell 04a are duplicated.
In addition, the cherry duplication with the winning number “14” is a win in which four cherries 01 to 04 are duplicated.

Furthermore, the replay overlapping winning 1 with the winning number “15” is the overlapping winning of special replay 1 and special replay 2, and the replay overlapping winning 2 with the winning number “16” is special replay 1, special replay 2, and replay. It is a duplicate winning.
19 and 20 show the relationship between the pressing order of the stop switch 42 and the winning combination in the “Remarks” column, which will be described later.

FIG. 21 is a diagram showing the winning probabilities for the gaming states of the winning numbers “0” to “16” described above. In other words, FIG. 21 shows a role lottery table for each gaming state.
In FIG. 21, “numerical value” is a value indicating a winning range out of the entire range “65536” taken by the random number value. Therefore, “winning probability = numerical value / 65536”. For example, in the gaming state such as RT1, the number of 1BB is “218”, so the winning probability of 1BB is “218/65536” = “about 1/300”.
Note that 1BB is set to be different depending on the setting value described above, and the example of FIG. 21 shows a numerical value at any one setting value (note that the same applies when 2BB or the like is provided). Is).

Further, the “game state” of the present embodiment includes a normal game and a 1BB game (special game). The normal game has a 1BB non-internal game and an internal game. The winning probability of replay in the internal game is 8978/65536 (about 1 / 7.3).
Further, the non-internal game has RT1 and RT2. In RT1, the combined probability of the winning number “1” and the winning numbers “15” and “16” is “about 1 / 7.3”, which is almost the same as the winning probability of the replay in the internal game. .

Here, RT1 is an RT (also referred to as non-RT) state in which the winning probability of replay is set to a normal probability. Note that RT1 is a so-called “ordinary (non-ART and non-inside)” gaming state.
RT2 is an RT in which the winning probability of replay is set to a high probability. In RT2, the winning combination is set to have almost no winning (1/65536).
In addition, when the winning probability of replay in an internal game is set higher than normal (RT1 or the like), it may be referred to as internal RT.

In this embodiment, RT1 is non-ART and RT2 is ART.
Therefore, in a non-internal middle game, there is a time when it is non-ART and when it is an ART.
A combination lottery table is provided for each of these gaming states, and as shown in FIG. 21, the type of winning combination and the winning probability are set.

In the non-internal game, 1BB, which is a special role, is drawn. And when 1BB is won, it transfers to a game in the inside from the next game. When the game moves to the inside game, 1BB is not drawn.
In a game state other than the 1BB game, in the internal middle game, only the winning number “1” is drawn for replay. In contrast, RT1 and RT2 that are not inside have winning numbers “1”, “15”, and “16” as winnings for replay.

Moreover, as a kind of bell winning, it has bell A1-A8 and B1-B4. As will be described in detail later, when the bells A1 to A8 are elected, the irregular push (middle or right first stop) is the bell win order in which the correct answer is pushed. One stop) is the bell winning order in which the correct answer is pushed.
In addition, the Bell A1 to A8 winnings are all assigned “1260” as a numerical value, but the Bells B1 to B4 winning are all assigned “1620” as a numerical value. Winning probability is higher than A8 winning.

  Further, in the 1BB game, it is set to win the bell B1 among the bell wins. Furthermore, in the 1BB game of this embodiment, replay lottery is not performed, but it is of course possible to perform replay lottery.

  In FIG. 1, the main CPU 63 controls on / off of a winning flag corresponding to each combination based on the combination lottery result by the combination lottery means 63b. In this embodiment, a winning flag (a part of the storage area of the RWM 61) is provided for each combination for each combination. When any of the winning combinations is selected by the winning lottery means 63b, the winning flag for the winning combination corresponding to the winning is turned on (the winning flag is set).

  For example, in a non-inside game, when the bell A1 is won, the winning flags relating to the bells 01, 02a, 03, 04a (four in total) are turned on, and the winning flags of the other roles are turned off.

In addition, as described above, winnings for small roles other than 1BB and replays are not carried over, so even if the small role or replay is won in the game and the winning flag for these roles is turned on, the game ends. Sometimes the winning flag is turned off.
On the other hand, 1BB wins are carried over, so when 1BB is won in the game, and the winning flag related to 1BB won is turned on, the ON state is maintained until the 1BB wins, Turned off when 1BB wins.

For example, if 1BB is won by the winning lottery means 63b and 1BB is not won in the game, and the next game (internal game) wins the bell A1, the 1BB won in the previous game and the game The winning flags of the winning bells 01, 02a, 03, 04a (a total of five) are turned on. And when 1BB is not won in this game, the ON state of the 1BB winning flag is maintained. On the other hand, regardless of the game result (winning / non-winning) in the game, the four winning flags related to the bell A1 are turned off at the end of the game.
The “game result” in the present embodiment refers to the stop display result of the reel 31 corresponding to the winning combination won by the winning lottery means 63b.

  In FIG. 1, the reel control means 63c starts to rotate all (three) reels 31 when a rotation start command for the reels 31 is received, particularly when the start switch 41 is operated in this embodiment. To control. Further, the reel control means 63c selects a stop position determination table corresponding to ON / OFF of the winning flag with reference to ON / OFF of the winning flag in the game after the winning lottery is performed by the winning lottery means 63b. In addition, when the stop switch 42 is operated, the stop position of the reel 31 corresponding to the stop switch 42 is determined and the motor 32 is driven and controlled based on the timing when the stop switch 42 is operated. Thus, the reel 31 is controlled to stop at the determined position.

  For example, in a game in which at least one winning flag is turned on, the reel control means 63c selects a combination of symbols corresponding to the winning combination (the combination with the winning flag turned on) within the range of the stop control of the reel 31. The reel 31 is stopped and controlled so as to be able to stop on the active line, and the reel 31 is stopped and controlled so as not to stop the combination of symbols corresponding to a combination other than the winning combination (the combination whose winning flag is off) on the effective line. .

Here, “within the range of stop control of the reel 31” means the time from the moment when the stop switch 42 is operated until the reel 31 actually stops or the amount of rotation of the reel 31 (the number of moving frames (symbols)). Means within range.
In this embodiment, the reel 31 is rotated at a speed of about 80 rotations per minute at a constant speed.
When the stop switch 42 is operated, the time from when the stop switch 42 is operated until the reel 31 is stopped is set to be within 190 ms. Thus, in the present embodiment, the maximum number of moving frames from the design at the moment when the stop switch 42 is operated until the reel 31 stops is set to 3 frames.

  At the moment when the operation of the stop switch 42 is detected, when any of the symbols within the range of the stop control of the reel 31 is a symbol to be stopped at a predetermined effective line, when the stop switch 42 is operated In addition, the design is controlled to stop at a predetermined effective line.

  That is, if the reel 31 is immediately stopped at the moment when the stop switch 42 is operated at the time of winning the winning combination, when the symbol related to the winning winning combination does not stop at the predetermined effective line, the reel 31 is stopped before being stopped. By controlling the rotational movement of the reel 31 within the range of the stop control of the reel 31, the symbol related to the winning combination is controlled so as to be stopped on a predetermined effective line as much as possible (retraction stop control).

Conversely, if the reel 31 is stopped immediately at the moment when the stop switch 42 is operated, if the symbol combination corresponding to the winning combination is stopped on the effective line, the reel 31 is stopped when the reel 31 is stopped. By controlling the rotational movement of the reel 31 within the range of 31 stop control, the combination of symbols corresponding to the winning combination is controlled so as not to stop on the effective line (kicking stop control).
Furthermore, in a game in which a plurality of winning combinations are won, the priority order of winning combinations is determined in advance, and the drawing priority control of the highest priority symbol is performed according to the predetermined priority order.

Although not provided in the present embodiment, in the 2BB game, the time from when the stop switch 42 is operated until the reel 31 is stopped is set within 75 ms for at least one reel 31. Thereby, in this embodiment, the maximum number of moving frames from the design at the moment when the stop switch 42 is operated until the reel 31 stops is set to 0 frames.
In 2BB games, every game and CB are continuously operated, but in CB games, a small role lottery is not performed. However, the reel 31 is controlled to stop so that all the small combinations can be won. Therefore, in the 2BB game, every game and CB game are executed, and in the CB game, every game and small role can be won.

Furthermore, as the reel 31 in which the time from the moment when the stop switch 42 is operated until the reel 31 is stopped is set within 75 ms, for example, the right reel 31 is set (in this case, left and middle). The reel 31 is stopped within 190 ms as in the normal state.) Then, if a small role with the symbol of the right reel 31 as “ANY (arbitrary)” is provided and this small role is always set to win (“PB = 1” described later), each game, It is possible to win a prize.
Further, for example, during 2BB game, one or two or more replay lotteries are performed, and the type of the small role to be awarded is varied depending on whether or not the replay is won and the type of the replay that has been won ( In such a setting, a plurality of small roles having “ANY” as the symbol of the right reel 31 are provided).

Further, the reel control means 63c detects the pressing order (operation order) of the stop switch 42.
When the stop switch 42 is operated, a signal indicating that the stop switch 42 has been operated is input to the reel control means 63c. By discriminating this signal, it is detected which stop switch 42 has been operated.

  The stop position determination table is provided for each on / off state of the winning flag, that is, for each lottery result of the combination by the combination lottery means 63b, and for the position of the reel 31 at the moment when the stop switch 42 is operated. The stop position of the reel 31 is determined. In each stop position determination table, for example, when the stop switch 42 is operated at the moment when the number 01 symbol ("watermelon" for the left reel 31) passes through the middle stage (effective line), only the number of symbols is displayed. The stop position is determined in advance such that the number of symbols is stopped in the middle stage by movement control.

The stop position determination table includes the following.
The 1BB table is used when only the 1BB winning flag is ON, that is, when 1BB is won in the game, or when 1BB is won before the game and is not won in the game. Within the range of the stop control, the combination of symbols corresponding to 1BB is stopped on the effective line, and the combination of symbols corresponding to the role other than 1BB is not stopped on the effective line. The combination is determined.

  In the present embodiment, the symbols related to 1BB are “BAR” symbols for all the reels 31. One “BAR” symbol is provided for each reel 31. Therefore, even if the stop switch 42 is operated at an arbitrary position, the “BAR” symbol is not always drawn into the active line, and the stop switch 42 is operated so that the “BAR” symbol stops at the active line. That is necessary.

Here, as described above, if the stop switch 42 is not operated at an appropriate position of the reel 31 (at an operation timing at which the target symbol can be stopped within the range of the maximum number of moving frames), the target symbol is stopped on the effective line The fact that it is not possible to draw (draw to the effective line) is referred to as “PB (pull-in rate) ≠ 1”.
On the other hand, regardless of the position of the reel 31 at the moment when the stop switch 42 is operated (regardless of the operation timing of the stop switch 42), the target symbol can always be stopped (drawn) on the effective line. , Referred to as “PB = 1”.

“PB = 1” has a case in which all the reels 31 are in such a role and a case in which only a specific (partial) reel 31 is in that role.
As described above, in the first embodiment, the maximum number of moving frames is “3”. Therefore, when the target symbols are arranged at intervals of 4 symbols or less, “PB = 1” is obtained. When arranged at intervals, “PB ≠ 1”.
The 2BB table when 2BB is provided is the same as the 1BB table. In other words, this corresponds to a case where “1BB” is replaced with “2BB” in the 1BB table.

The replay table is used when the replay is won (single), and within the range of the reel 31 stop control, the replay is won and the role other than the replay is not won, so that the reel 31 is stopped. This is a combination of symbols.
Here, as shown in FIG. 14, in all the reels 31, “replay” symbols are arranged at intervals of 4 symbols or less. Therefore, the replay can always be won regardless of the operation timing of the stop switch 42 (PB = 1).
In both the non-internal game and the internal game, when the replay is won, the replay wins with “PB = 1”.

  The replay duplication 1 table is used when the replay duplication 1 with the winning number “15” is won, and within the range of the stop control of the reel 31, the special replay is performed when the stop switch 42 is pressed in the middle first stop. 1 is awarded and the combination of symbols when the reel 31 is stopped is determined so that the special replay 2 is awarded when the left or right first stop is made.

  More specifically, in the game using the replay overlap 1 table, when the middle reel 31 is stopped, the “bell” symbol is stopped at the middle stage when the middle reel 31 is stopped. It does not matter whether the next second stop is left or right. When the left reel 31 is stopped, the “replay” symbol is stopped at the middle stage, and when the right reel 31 is stopped, the “replay” symbol is stopped at the middle stage.

On the other hand, in the case of the first left stop, the “bell” symbol is stopped in the middle when the left reel 31 is stopped. In this case, the “replay” symbol is stopped at the middle stage when the middle reel 31 is stopped, and the “bell” symbol is stopped at the middle stage when the right reel 31 is stopped.
Similarly, when the right stop is performed, the “bell” symbol is stopped at the middle when the right reel 31 is stopped. In this case, the “bell” symbol is stopped in the middle when the left reel 31 is stopped, and the “replay” symbol is stopped in the middle when the middle reel 31 is stopped.

The replay duplication winning 2 table is used when replay duplication 2 with the winning number “16” is won, and within the range of the stop control of the reel 31, the stop switch 42 is pressed in the right first stop. Is a combination of symbols when the reel 31 is stopped so that the special replay 1 is won and the special replay 2 is awarded when the left or middle first stop is made.
The stop control of the reel 31 is the same as in the replay overlap 1 table. When the first right stop, “replay”-“bell”-“replay” (special replay 1) is stopped on the active line and left or If it is the middle first stop, “bell”-“replay”-“bell” (special replay 2) is stopped at the active line.

  The bell A1 table is used when the winning of the bell A1 is made (when the winning flags of the bells 01, 02a, 03, and 04a are turned on). According to the timing, the combination of symbols when the reel 31 is stopped is determined so that the winning bell is won (becomes winning).

Here, as a method of stopping and controlling the reels 31 when a plurality of winning combinations are simultaneously won (duplicate winning), “number priority” and “number priority” can be mentioned.
“Number priority” means that among the symbol combinations related to the winning combination, the symbol constituting the symbol combination with the largest number of payouts is given priority and stopped (drawn) on the active line. The stop position of the reel 31 is determined.
On the other hand, “number priority” determines the stop position of the reel 31 so that when the reel 31 is stopped, when the symbol is stopped on the effective line, the number of combinations of symbols that can be won is maximized. ing.

In the present embodiment, when the bell A1 is won, the winning combination of eight bells 01 and one bell 02a, 03, 04a is duplicated.
It is the same that when winning other bells, the winning combination of the bell 01 with 8 sheets and the three types of bells with 1 sheet is the same.

  In the present embodiment, when any of the bells is won, stop control based on the number priority is performed when the pressing order of the stop switch 42 is the correct answer pressing order, and when the pressing order is the incorrect answer pressing order, the number is selected. Stop control based on priority.

Hereinafter, stop control will be described by taking the case of winning the bell A1 as an example.
19 and 20, the correct answer pressing order is displayed in parentheses in the “name” column. Further, the “Remarks” column shows the relationship between the pressing order of the stop switch 42 and the winning combination.
For example, in the bell A1, in “Remarks”, “213” indicates the middle left / right push order, and “231” indicates the middle right / left push order (“1” = left, “2” = middle, “3” = right).
"1--" means left first stop (the pressing order of the second and third stops is arbitrary), and "3--" means right first stop (second and third stops). Means the order of pressing is arbitrary).
Further, “231: 1 sheet (bell 03)” means that in the order of “231”, that is, in the middle right-left incorrect answer pressing order, “PB = 1”, the bell 03 that plays the single sheet wins.
Other contents described in the “Remarks” column are interpreted in the same manner as described above.

The correct answer pressing order when winning the bell A1 is middle left and right. Therefore, when the stop switch 42 is operated in the middle / left / right pushing order, the bell 01 wins and eight payouts are made. Here, the symbol combination of the bell 01 is “bell”-“bell”-“replay”, but the “replay” of the right reel 31 is an array of “PB = 1” as described above.
Further, as shown in FIG. 14, all the reels 31 have the “bell” symbol in an arrangement of “PB = 1”. Therefore, when the bell switch A1 is selected and the stop switch 42 is operated with the right and left in the correct answer order, the bell 01 “bell”-“bell”-“replay” stops on the active line.
If the symbols are arranged evenly on the 16-frame reel 31 at intervals of 4 symbols, the symbol “PB = 1” can be set.

On the other hand, when Bell A1 is elected, it is the middle first stop (the correct answer push order at the first stop time), but when it is the second right stop and the wrong answer push order, the stop control is performed as follows. .
At the time of the middle first stop, since the correct answer is pressed at this time, the reel control means 63c stops the “bell” in the middle when the middle reel 31 is stopped. At this time, since the correct answer is in the pushing order, the middle reel 31 is stopped with priority on the number of sheets.
Next, since the pressing order is incorrect at the time of the second right stop, the reel control means 63c does not stop “replay” in the middle stage when the right reel 31 is stopped by performing the number priority control.
Since the “bell” symbol is stopped when the middle reel 31 is stopped, it is necessary to control the combination of symbols whose symbol of the middle reel 31 is “bell” to be stopped on the effective line.

Among the winning roles at the time of Bell A1 winning,
"Replay"-"Red 7"-"Red 7" (Bell 02a)
"Replay"-"Red 7"-"BAR" (Bell 02a)
"Watermelon"-"Bell"-"Watermelon" (Bell 03)
"Watermelon"-"Bell"-"Cherry" (Bell 03)
"Cherry"-"Bell"-"Watermelon" (Bell 03)
"Cherry"-"Bell"-"Cherry" (Bell 03)
"Red 7"-"Watermelon"-"Bell" (Bell 04a)
"BAR"-"Watermelon"-"Bell" (Bell 04a)
It is.

Thus, when the “watermelon” symbol is stopped on the effective line when the right reel 31 is stopped, at that time, “watermelon”-“bell”-“watermelon” or “cherry”-“bell”-“watermelon” It becomes the state which can stop the combination of two types of symbols.
Similarly, when the “cherry” symbol is stopped on the active line when the right reel 31 is stopped, “watermelon”-“bell”-“cherry” or “cherry”-“bell”-“cherry” at that time. It becomes the state which can stop the combination of two types of symbols.
On the other hand, when the “replay” symbol is stopped when the right reel 31 is stopped, the symbol combination that can be won at that time is one type of “bell”-“bell”-“replay” (bell 01). Become.
Therefore, when the right reel 31 is stopped due to the number priority, the “watermelon” symbol or the “cherry” symbol can be preferentially stopped.

As shown in FIG. 14, in the right reel 31, the “watermelon” symbols are arranged at No. 07 and No. 15, and the “cherry” symbols are arranged at No. 03 and No. 11. Accordingly, either “watermelon” or “cherry” symbols are arranged at intervals of four symbols. Therefore, as described above, either the “watermelon” symbol or the “cherry” symbol can be stopped at the active line with “PB = 1”.
In the left and middle reels 31, as in the right reel 31, either the “watermelon” symbol or the “cherry” symbol is arranged at four symbol intervals. For example, in the left reel 31, the “watermelon” symbol or “cherry” symbol is arranged at No. 01, 05, 09, and 13. In the middle reel 31, the “watermelon” symbol or the “cherry” symbol is arranged in the 01st, 05th, 09th, and 13th.

  If the “watermelon” symbol is stopped on the active line when the right reel 31 is stopped, at that time, “rotating” − “bell” − “watermelon”. Finally, when the left reel 31 is stopped, the “watermelon” or “cherry” symbol is controlled to stop at the effective line.

Further, when the “cherry” symbol is stopped on the active line when the right reel 31 is stopped, “rotating” − “bell” − “cherry” is obtained at that time. Then, when the left reel 31 is finally stopped, the “watermelon” or “cherry” symbol is controlled to stop at the effective line in the same manner as described above.
Therefore, when the stop switch 42 is operated in the order of pressing the middle right and left when the bell A1 is won, the bell 03 can be won with “PB = 1” (probability of 1/1).

Next, when the bell A1 is won and the first left stop is made, the stop control is performed as follows.
At the time of the first stop on the left, the incorrect answer in the pressing order is determined at the time of the first stop. Accordingly, the reels 31 are controlled to stop with priority on the number from the first stop.
If you stop “Replay” on the active line at the time of the first stop on the left at the time of winning the Bell A1, the combination of symbols that can be won at this point is
"Replay"-"Red 7"-"Red 7"
"Replay"-"Red 7"-"BAR"
(2 types in total).
Also, if you stop “Watermelon” on the active line at the first stop on the left, the combination of symbols that can be awarded at this point is:
"Watermelon"-"Bell"-"Watermelon"
"Watermelon"-"Bell"-"Cherry"
(2 types in total).

Furthermore, at the time of the first stop on the left, if you stop “Cherry” on the active line, the combination of symbols that can be awarded at this point is:
"Cherry"-"Bell"-"Watermelon"
"Cherry"-"Bell"-"Cherry"
(2 types in total).
Furthermore, when “Red 7” is stopped on the active line at the time of the first stop on the left, the combination of symbols that can be won at this time is “Red 7”-“Watermelon”-“Bell” (one type) .
Similarly, when “BAR” is stopped on the active line at the time of the first stop on the left, the combination of symbols that can be won at this time is “BAR”-“watermelon”-“bell” (one type).

In the above, when there is only one type of symbol combination that can be awarded, it is not a number-priority target. Therefore, there are two types of symbol combinations that can be awarded, “Replay”, “Watermelon”, and “Cherry”.
As described above, when there are a plurality of combinations of symbols having the same number, any of them may be adopted and determined in advance. In the present embodiment, it is determined that the “replay” symbol is stopped at the active line at the time of the first left stop when the bell A1 is won. When the left reel 31 is stopped, the “replay” symbol can be stopped at the active line by “PB = 1”.
Therefore, when the “replay” symbol is stopped on the active line at the time of the first stop on the left, it is possible to stop on the active line at that time.
"Replay"-"Red 7"-"Red 7"
"Replay"-"Red 7"-"BAR"
There are two types.

Next, at the time of middle stop, if the “Red 7” symbol can be stopped on the active line, the “Red 7” symbol is stopped, and if “Red 7” cannot be stopped, the other symbols are stopped. .
As shown in FIG. 14, in the middle reel 31, the “red 7” symbol is provided only for the number 02. Therefore, when the middle stop switch 42 is operated at the moment (immediately before) No. 15 to No. 16 or No. 01 to No. 02 pass through the active line, the “Red 7” symbol can be stopped on the active line. When the middle stop switch 42 is operated at any other position, the “red 7” symbol cannot be stopped at the active line. For this reason, the probability that the “red 7” symbol can be stopped on the active line when the middle reel 31 is stopped is “1/4”.

  Further, at the time of the right stop, the “red 7” or “BAR” symbol is stopped on the active line. In FIG. 14, the “Red 7” symbol is arranged at No. 10 and the “BAR” symbol is arranged at No. 06. Therefore, when the right stop switch 42 is operated at the moment (immediately before) No. 03 to No. 06 or No. 07 to No. 10 pass through the active line, the “Red 7” or “BAR” symbol must be stopped on the active line. Can do. When the right stop switch 42 is operated at a position other than that, the “red 7” or “BAR” symbol cannot be stopped on the active line. For this reason, when the right reel 31 is stopped, the probability that the “red 7” or “BAR” symbol can be stopped on the active line is “½”.

From the above, when Bell A1 is elected and the first left stop, "Replay"-"Red 7"-"Red 7" or "Replay"-"Red 7"-"BAR" is stopped on the active line The probability of being
1/1 (left reel 31) × 1/4 (middle reel 31) × 1/2 (right reel 31)
= 1/8
It becomes.
Therefore, as described in the “Remarks” column, one bell wins with a probability of “1/8”.
It becomes.

Subsequently, when the bell A1 is won, when the first stop is on the right, the stop control is performed as follows.
At the time of the first stop on the right, the wrong answer in the pressing order is determined at the first stop. Accordingly, the reels 31 are controlled to stop with priority on the number from the first stop.
If the “Red 7” symbol is stopped on the active line at the first stop on the right when Bell A1 is selected, the symbol combination that can be won at this point is “Replay”-“Red 7”-“Red 7”. There is one type.

In addition, when the “BAR” symbol is stopped on the active line at the time of the first stop on the right, the symbol combination that can be won at this time is “Replay” — “Red 7” — “BAR” (one type) .
Furthermore, when the “watermelon” symbol is stopped on the active line at the time of the first stop on the right, the symbol combinations that can be awarded at this point are:
"Watermelon"-"Bell"-"Watermelon"
"Cherry"-"Bell"-"Watermelon"
(2 types).

Furthermore, when the “Cherry” symbol is stopped on the active line at the first stop on the right, the symbol combinations that can be awarded at this point are:
"Watermelon"-"Bell"-"Cherry"
"Cherry"-"Bell"-"Cherry"
(2 types).
Also, if you stop the “bell” symbol on the active line at the first stop on the right, the symbol combinations that can be won at this point are:
"Red 7"-"Watermelon"-"Bell"
"BAR"-"Watermelon"-"Bell"
(2 types).
Therefore, in this embodiment, among the two types, the “bell” symbol is stopped on the active line, and “red 7” — “watermelon” — “bell” or “BAR” — “watermelon” — “bell” "To stop.

At the first stop on the right, “PB = 1” can stop the “bell” symbol on the active line.
At the time of the left stop, if the “red 7” or “BAR” symbol can be stopped on the active line, the “red 7” or “BAR” symbol is stopped. As shown in FIG. 14, “Red 7” or “BAR” symbols are arranged at No. 06 and No. 14. Therefore, if calculated in the same manner as described above, the “red 7” or “BAR” symbol can be stopped on the active line with a probability of 1/2.
Furthermore, at the time of an intermediate stop, if the “watermelon” symbol can be stopped on the active line, the “watermelon” symbol is stopped. As shown in FIG. 14, the “watermelon” symbols are arranged at No. 05 and No. 13. Therefore, the “watermelon” symbol can be stopped at the effective line with a probability of 1/2 as described above.

From the above, when the bell A1 is elected, the probability of being able to stop "Red 7"-"Watermelon"-"Bell" or "BAR"-"Watermelon"-"Bell"
1/2 (left reel 31) x 1/2 (middle reel 31) x 1/1 (right reel 31)
= 1/4
It becomes.
Therefore, it is as described in the “Remarks” column.

As described above, when the bells A1 and A2 are selected, 213 (middle left and right) is in the correct pressing order, and when the stop switch 42 is operated in the pressing order, the bell 01 wins with "PB = 1". In the order of pressing 231 (middle right and left), one bell wins with “PB = 1”.
Furthermore, in the pressing order of the left first stop, one bell wins with a probability of “1/8”.
Furthermore, in the push order of the right first stop, one bell wins with a probability of “1/4”.

Similarly, as shown in FIG. 19, when the bells A3 and A4 are selected, 231 (middle right and left) is in the correct push order, and when the stop switch 42 is operated in the push order, the bell is “PB = 1”. 01 wins. Further, in the pressing order of 213 (middle left and right), one bell wins with “PB = 1”.
Furthermore, in the pressing order of the left first stop, one bell wins with a probability of “1/8”.
Furthermore, in the push order of the right first stop, one bell wins with a probability of “1/4”.

Similarly, when the bells A5 and A6 are selected, 312 (middle right and left) is in the correct pressing order, and when the stop switch 42 is operated in the pressing order, the bell 01 wins with "PB = 1". Further, in the pressing order of 321 (right middle left), one bell wins with “PB = 1”.
Furthermore, in the pressing order of the left first stop, one bell wins with a probability of “1/8”.
Furthermore, in the pressing order of the middle first stop, one bell wins with a probability of “1/4”.

As shown in FIG. 20, when the bells A7 and A8 are selected, 321 (right middle left) is in the correct push order, and when the stop switch 42 is operated in that push order, the bell 01 wins with "PB = 1" To do. In the order of pressing 312 (middle right and left), one bell wins with “PB = 1”.
Furthermore, in the pressing order of the left first stop, one bell wins with a probability of “1/8”.
Furthermore, in the pressing order of the middle first stop, one bell wins with a probability of “1/4”.

Next, stop control when the bell B1 is won will be described.
When Bell B1 is selected, the correct answer pressing order is 123 (left middle right; forward pressing). Therefore, when the stop switch 42 is operated in the order of pressing the middle left and right, the bell 01 wins and 8 payouts are made. The combination of the symbols of the bell 01 is “bell”-“bell”-“replay”. As described above, the “bell” symbol of the left and middle reels 31 and the “replay” symbol of the right reel 31 are either However, since “PB = 1” is arranged, it can always be stopped at the effective line.
Therefore, when the stop switch 42 is operated in the right, middle, and right order in the correct answer pressing order when the bell B1 is selected, the bell 01 “bell”-“bell”-“replay” stops on the active line.

On the other hand, when Bell B1 is elected, the first stop on the left is correct (the correct answer at the time of the first stop).
At the time of the first left stop, since the correct answer is pressed at this time, the reel control means 63c stops the “bell” in the middle when the left reel 31 is stopped. At this time, since the correct answer is the pressing order, the left reel 31 is stopped with priority on the number of sheets.
Next, at the time of the second right stop, since the pressing order is incorrect at this point, the reel control means 63c does not stop the “bell” in the middle when the right reel 31 is stopped by performing the number priority control.

Among the winning roles at the time of winning the Bell B1,
"Bell"-"Watermelon"-"Watermelon" (Bell 07)
"Bell"-"Watermelon"-"Cherry" (Bell 07)
"Bell"-"Cherry"-"Watermelon" (Bell 07)
"Bell"-"Cherry"-"Cherry" (Bell 07)
"Replay"-"Replay"-"Bell" (Bell 08)
"Red 7"-"Replay"-"Bell" (Bell 09a)
It is.

Since the symbol of the left reel 31 has already been determined to be the “bell” symbol, the symbol combinations that can be stopped at this time are the symbol combinations (four types) relating to the bell 07. Therefore, when the right reel 31 is stopped, the “watermelon” or “cherry” symbol is stopped. Whether the “watermelon” or “cherry” symbol is stopped, there are two types of symbol combinations that can be stopped at that time (for example, when the “watermelon” symbol is stopped when the right reel 31 is stopped, The combination of symbols that can be stopped is "bell"-"watermelon"-"watermelon" or "bell"-"cherry"-"watermelon").
Here, as shown in FIG. 14, the “watermelon” or “cherry” symbols on the right reel 31 are arranged at four symbol intervals, that is, “PB = 1”. Therefore, when the right reel 31 is stopped, either the “watermelon” or “cherry” symbol can be stopped on the effective line.

At the time of the middle third stop, the “watermelon” or “cherry” symbol is stopped on the active line. As shown in FIG. 14, the symbols “watermelon” and “cherry” of the middle reel 31 are arranged at intervals of four symbols, that is, “PB = 1”. Therefore, when the middle reel 31 is stopped, either the “watermelon” or “cherry” symbol can be stopped on the effective line.
From the above, when the stop switch 42 is operated in the order of pressing in the left and right during the selection of Bell B1,
Left reel (1/1) x middle reel (1/1) x right reel (1/1)
= 1/1 (PB = 1)
One bell (Bell 07) can be stopped with the probability of.

Next, when the bell B1 is won, if it is the middle first stop, the stop control is performed as follows.
At the middle first stop, the wrong answer in pushing order is determined at the first stop. Therefore, the reel 31 is controlled to stop by the number priority control from the first stop.
If you stop the “watermelon” on the active line during the first stop in the B1 B1 winning, the combination of symbols that can be won at this point
"Bell"-"Watermelon"-"Watermelon"
"Bell"-"Watermelon"-"Cherry"
(2 types).

Also, if you stop “Cherry” on the active line during the middle first stop, the combination of symbols that can be awarded at this point is:
"Bell"-"Cherry"-"Watermelon"
"Bell"-"Cherry"-"Cherry"
(2 types).
Furthermore, when the “replay” is stopped on the active line during the middle first stop, the combination of symbols that can be awarded at this point is:
"Replay"-"Replay"-"Bell"
"Red 7"-"Replay"-"Bell"
(2 types).

  As described above, in the present embodiment, at the time of the middle first stop, it is determined that the “replay” symbol is stopped on the active line in the case of two types.

Since the “replay” symbol is “PB = 1” when the middle reel 31 is stopped, it can always be stopped at the active line.
Further, when the left reel 31 is stopped, if the “red 7” symbol can be stopped on the active line, the “red 7” symbol is stopped on the active line. The “red 7” symbol of the left reel 31 has a “PB ≠ 1” arrangement. On the other hand, when the “red 7” symbol cannot be stopped, the “replay” symbol is stopped at the active line. Since the “replay” symbol of the left reel 31 has the “PB = 1” arrangement, the “replay” symbol can always be stopped at the active line.

  Furthermore, the “bell” symbol is stopped on the active line when stopping to the right. Since the “bell” symbol of the right reel 31 has the “PB = 1” arrangement, the “bell” symbol can always be stopped at the effective line.

From the above, at the time of Bell B1 winning, when it is the middle first stop, the probability that one bell can be stopped on the active line is
1/1 (left reel 31) x 1/1 (middle reel 31) x 1/1 (right reel 31)
= 1/1 (PB = 1)
It becomes.

Next, when the bell B1 is won and the first stop is on the right, stop control is performed as follows.
At the time of the first stop on the right, the wrong answer in the pressing order is determined at the first stop. Therefore, the reel 31 is controlled to stop by the number priority control from the first stop.
If you stop the “Bell” symbol on the active line at the first stop on the right when you win the Bell B1, the combination of symbols that you can win at this point will be:
"Replay"-"Replay"-"Bell"
"Red 7"-"Replay"-"Bell"
(2 types).

In addition, when the “watermelon” symbol is stopped on the active line at the first stop on the right, the symbol combinations that can be awarded at this point are:
"Bell"-"Watermelon"-"Watermelon"
"Bell"-"Cherry"-"Watermelon"
(2 types).
Furthermore, when the “Cherry” symbol is stopped on the active line at the first stop on the right, the symbol combinations that can be awarded at this point are:
"Bell"-"Watermelon"-"Cherry"
"Bell"-"Cherry"-"Cherry"
(2 types).

As described above, in the present embodiment, at the time of the first right stop, it is determined that the “bell” symbol is stopped on the active line among the cases where there are two types.
Accordingly, the “bell” symbol on the right reel 31, the “red 7” or “replay” symbol on the left reel 31, and the “replay” symbol on the middle reel 31 are all arranged in a “PB = 1” arrangement on the reel 31. Therefore, these symbols can always be stopped at the active line.
From the above, when Bell B1 is won, the probability of being able to stop one bell on the active line is the first stop on the right.
1/1 (left reel 31) x 1/1 (middle reel 31) x 1/1 (right reel 31)
= 1/1 (PB = 1)
It becomes.

When Bell B2 is won, just like Bell B1 is won, 123 (left middle right) is the correct push order, and when the stop switch 42 is operated in the push order, Bell 01 wins with "PB = 1" To do. Also, in the pushing order of 132 (middle left and right), the middle first stop, and the right first stop, each one wins a bell with “PB = 1”.
Similarly, when the bell B3 or B4 is won, 132 (middle left and right) is in the correct pressing order, and when the stop switch 42 is operated in that pressing order, the bell 01 wins with “PB = 1”. Also, in the pushing order of 123 (middle left and right), middle first stop, and right first stop, all wins one bell with “PB = 1”.

FIG. 22 is a diagram illustrating the number of places and the expected medal acquisition value for each pressing order when the bells A1 to B4 are won.
As shown in FIG. 22, among Bells A1 to B4 winning, for Bells A1 to A8, the number is set to “1260”, and for Bells B1 to B4, the number is “1620”. "Is set. As a result, the total number of the winning bells is “16560”, and the combined winning probability is “16560/65536” ≈ “1/4”.

In FIG. 22, the expected medal acquisition value for each pressing order in each bell win is displayed. For example, in the case of Bell A1 winning, if the correct answer is “213”, Bell 01 wins with “PB = 1”, so the expected medal acquisition value is “8”. When the pressing order is “231”, one bell wins with “PB = 1”, so the expected medal acquisition value is “1”.
Furthermore, at the time of the first stop on the left, one winning combination wins with a probability of “1/8”. Therefore, the medal acquisition expected value is “0.125” in any of the pushing orders “123” and “132”.
Furthermore, at the time of the first stop on the right, one winning combination wins with a probability of “1/4”. Therefore, the medal acquisition expected value is “0.25” regardless of the pressing order “312” and “321”.

  In each of the bell pressing orders A1 to A8, the expected medal acquisition value is “8” in the correct answer pressing order (one), and one of the incorrect answer pressing orders (the correct answer in the first stop pressing order). 2) “0.125” and 2 are “0.25”. Therefore, the total is “9.75”. Accordingly, when one of the bells A1 to A8 is won, the expected medal acquisition value when any one of the pressing orders is selected at random is “1.625 (sheets)”.

  Also, in the case of Bell B1 winning, if the correct answer push order is “123”, Bell 01 wins with “PB = 1”, so the expected medal acquisition value is “8”. Further, in the incorrect answer pressing order, in any incorrect answer pressing order, “PB = 1” wins one bell, so the expected medal acquisition value is “1”. Therefore, the total is “13”. Therefore, when one of the bells B1 to B4 is won, the expected medal acquisition value when any one of the pressing orders is selected at random is “about 2.17 (sheets)”.

Next, when any one of the pushing orders is fixed and the pushing order is continued for a long time, the following is obtained. For example, it is assumed that during non-ART, the game is digested in the order of pressing “left middle right”. In this case, as shown in FIG. 22, the sum of “number × expected medal acquisition expectation value in the pressing order” is
(1260 × 0.125) × 8 + 1620 × 8 × 2 + 1620 × 1 × 2
= 30420
It becomes.

And as shown in FIG. 22, this value becomes the same value regardless of the pressing order.
Divide this value by "65536"
30420/65536
≒ 0.46 (sheets) (expected medal value based on the winning of bell)
It becomes.
As described above, when the game is digested in the same pushing order, there is no superiority or inferiority in the pushing order, and the expected medal acquisition value by the bell winning is “0.46 (pieces)” per game.
Furthermore, the expected medal acquisition value based on the bell win is the same regardless of the push order, so the same push order (for example, left middle right) The expected medal earning value is the same when the game is digested by pushing forward).

The cherry duplication table is used when a winning combination of cherries 01 to 04 is made, and a combination of symbols when the reel 31 is stopped is determined so that one of the cherries 01 to 04 is stopped on the active line. is there.
As shown in FIG. 14, the symbols on the left reel 31 of cherries 01 to 04 are all “cherry” symbols. As shown in FIG. 14, in the left reel 31, “cherry” symbols are arranged at the 05th and 13th positions. Therefore, the “cherry” symbol has a “PB ≠ 1” arrangement. However, if the player is informed of the effect when the cherry overlap is won and the player pushes the left reel 31 so that the “cherry” symbol stops on the active line, the “cherry” symbol is stopped on the active line. Can do. Further, when the left reel 31 is stopped at an arbitrary position, the “cherry” symbol stops at the effective line with a probability of “½”.

Further, since the symbol of the middle reel 31 is “ANY”, any symbol may be stopped at the effective line when the middle reel 31 is stopped.
Furthermore, when the right reel 31 is stopped, one of the “red 7”, “BAR”, “blue 7”, and “white 7” symbols is stopped on the active line. This is because if any one of these four symbols is stopped on the active line, any of the cherries 01 to 04 can be won.

Here, as shown in FIG. 14, the “red 7”, “BAR”, “blue 7”, and “white 7” symbols are arranged at intervals of four symbols. Therefore, any symbol can be stopped on the active line by “PB = 1”.
Thus, when winning the cherry, only the left reel 31 needs to be pressed. In addition, when all the reels 31 are stopped without making any pushes at the time of winning cherry overlap, the probability that any cherry wins is “½”.

  The non-winning table is used when all winning flags are off, and defines the combination of symbols when the reel 31 is stopped so that the symbol combinations corresponding to any combination do not stop on the active line. is there.

When one of the small combinations or replay is won when the 1BB winning is carried over (inside), the reel 31 is controlled to stop using the stop position determination table that prioritizes the winning of the small combination or replay.
First, when winning a replay of an internal game, priority is given to replay winning, but replay is always possible (PB = 1). Therefore, there is no case where 1BB wins in the game.

Also, when winning the cherry in the internal game, the cherry win will be given priority, but the “cherry” symbol cannot be stopped on the active line at the time of the first stop on the left, but the symbol relating to 1BB can be stopped Will stop the symbol and make 1BB a winning form.
Furthermore, when winning a bell in the internal game, priority is given to the winning of the bell, but when the button is pushed forward, the symbol related to one bell cannot be stopped on the active line, but the symbol related to 1BB can be stopped. At that time, the symbol is stopped, and 1BB is set to a stop form that can win a prize.

  In addition, although not provided in the present embodiment, the winning flag of all small roles is turned on in the CB table used during the 2BB game or the CB game when the CB to be elected alone is provided, The combination of symbols when the reel 31 is stopped is determined so that the symbol combination corresponding to the winning combination can be stopped on the effective line.

  In FIG. 1, the winning determination means 63d of the main CPU 63 determines whether or not the combination of symbols corresponding to any combination has stopped on the active line when all the reels 31 are stopped. The winning determination means 63d determines the symbol on the effective line by detecting the number of steps of the motor 32 after the reel sensor 39 detects the index, for example. However, the winning determination means 63d can determine the stop symbol regardless of whether or not the reel 31 is stopped when the stop switch 42 is operated and the stop position of the reel 31 is determined.

  When all the reels 31 are stopped, the payout means 63e determines that the combination of symbols corresponding to any of the winning combinations has stopped on the active line, and when the winning combination of the winning combination is determined according to the winning combination. Pay out the number of medals to the player. As described above, the payout is added as the stored number, or when the stored number exceeds “50”, the medal is actually paid out from the payout opening. When actually paying out medals, the hopper motor 36 is driven and controlled to pay out a predetermined number of medals. At the time of paying out medals, the payout medals are detected by the payout sensors 37a and 37b, and it is checked whether or not they have been paid out correctly.

The gaming state control means 63f determines whether or not the gaming state transition condition is satisfied, and when it determines that the gaming state transition condition is satisfied, controls to shift the gaming state. Furthermore, the game state control means 63f controls the ART game including a lottery for determining whether or not to execute the ART game (ART control means).
FIG. 23 is a diagram for explaining the transition of the gaming state (including the internal state). Hereinafter, the state control means 63f will be described with reference to FIG.

The gaming state of the present embodiment includes a normal game and a 1BB game (special game). Further, the normal game includes a non-internal medium game and an internal medium game. Further, the non-internal game includes RT1 and RT2.
The game state control means 63f wins the special role (1BB) in the non-internal medium game (RT1 and RT2), and when the special character won in the game does not win, the game shifts from the next game to the internal medium game. To control. Furthermore, in the internal middle game, when the winning special combination wins, control is performed so as to shift from the next game to the special game (1BB game).

In the 1BB game, the game is executed until the number of medals paid out reaches 200. Furthermore, during 1BB game, RB operates continuously (RB game is executed continuously). The RB game is continued until the number of games reaches two times or the number of winning prizes of the combination satisfies two. During the 1BB game, when it is determined that the RB operation end condition is satisfied at the end of the game, the RB operation ends, and when it is determined that the 1BB game end condition is not satisfied, the next game is started Then activate RB again.
When the end condition of the 1BB game is satisfied in the 1BB game, the control is performed so that the 1BB game is ended and the next game is shifted to the non-inner middle game (RT1).

RT2 is set to ART game. Therefore, when a special combination is won during RT2, RT2 is interrupted at that point and the game shifts to an internal game. Then, after the special game ends, the process returns to RT2 to execute the remaining ART.
When a special combination is won during ART (RT2), if the special combination is not won, the ART may be continued (referred to as an internal ART), and the special combination may be awarded after the end of the ART.

  RT1 is so-called “normally” in which the non-AT and the replay winning probability are set to the normal probability. Then, the gaming state control means 63f executes an ART lottery during RT1. When RT is won at RT1 and Special Replay 1 wins, the process proceeds to RT2 (ART). RT2 (ART) is an AT game, and the combination lottery table is a game different from RT1 (replay winning probability is set to a high probability). RT2 is called “ART” because it is AT and RT (RT which means that the winning probability of replay is high).

  In addition, “AT” in the present embodiment is most advantageous to the player when winning a game result that is advantageous / disadvantageous in the game according to the operation mode of the stop switch 42 or the subsequent game. A game (notification game) for notifying the player of the operation mode of the stop switch 42. In particular, in the present embodiment, first, when the bell is won, the correct answer pressing order (pressing order for paying out 8 sheets) is notified. Second, when the replay duplication is won, the pressing order for winning the special replay 1 is notified. As a result, when RT1 (non-ART) is selected, it is possible to shift to RT2 (ART). During RT2 (ART), no fall to RT1 occurs unless the ART termination condition is satisfied.

Also, the gaming state control means 63f displays (informs) the correct answer pressing order on the acquisition number display LED 72 described above during the ART game. For example, when the bell A1 is won, “A1” or the like is displayed. This allows the player to know that the bell A1 has been won. If the player knows that the correct answer order corresponding to the bell A1 is “middle left and right”, the player wins the bell 02a in the game. be able to.
During the ART game, the main control board 60 transmits information on the correct pressing order to the sub-control board 80. Then, the sub-control board 80 displays, for example, an image in the correct pressing order (for example, “middle left and right” when the bell A1 is won) on the image display device 23.

During non-ART, the correct push order is not notified when the bell is won.
Further, the non-ART includes, as internal states, a low probability, a normal probability, and a high probability that have different probabilities of winning an ART, and a precursor after winning the ART. Here, the “internal state” is a concept different from the gaming state, and includes a plurality of internal states in one gaming state. In this embodiment, RT1 (non-ART) has the above four internal states.

Further, if the ART is won during the low probability, the normal probability, or the high probability, the game shifts to a precursor that is a game period before the start of the ART although the ART is won. During this sign, the player is informed that he has won the ART.
In addition, after the end of the sign, when the replay overlap win is made, the pressing order for winning the special replay 1 is notified. When the special replay 1 wins in the game, the transition condition from RT1 to RT2 (ART) is satisfied, and RT2 is started from the next game.
Furthermore, RT2 (ART) has, as an internal state, a normal probability and a high probability with different expected values on which the number of ART games is added.

The transition of these internal states is performed by a winning combination in the game. Further, the transition from one internal state to another internal state is performed at the end of the game in the one internal state (when all the reels 31 are stopped and the game result of the game is displayed).
In the present embodiment, when it is decided to shift to a precursor, it corresponds to the winning of ART.

In the internal state of RT1, a transition is made between a low probability, a normal probability, and a high probability. For example, it is set as follows.
(1) During low probability When a cherry is elected, it shifts to a normal probability with a probability of 40%, shifts to a high probability with a probability of 5%, shifts to a precursor with a probability of 1% (no transition with a probability of 54%) .
(2) Normal probability a) At the time of cherry winning, it shifts to a high probability with a probability of 50% and shifts to a precursor with a probability of 10% (no transition with a probability of 40%).
b) At the time of replay winning, it shifts to low probability with 5% probability (no transition with 95% probability).
(3) High probability a) When winning a cherry, move to a precursor with 100% probability.
d) At the time of replay winning, it shifts to a normal probability with a probability of 5% and shifts to a low probability with a probability of 3% (no transition with a probability of 92%).

(4) During the sign When the game state control means 63f decides to shift to the sign in the lottery as described above, the number of games of the sign is determined by lottery within the range of “1” to “32”. Set that value in the counter. Then, the counter value is decremented by “1” for each game, and when it reaches “0”, the precursor is ended. In addition, at some point in the precursor, the ART is notified of winning. In addition, once it shifts to a precursor, there is no case of shifting from a precursor to a low probability, a normal probability, or a high probability. Further, when the ART is won, it is notified that the ART is confirmed at that time, and it is not necessary to go through the precursor (the game count of the precursor is set to “0”).

At the end of the sign, an ART confirmation effect is displayed and waits until a replay overlap win is reached. Then, when the replay overlap win is received at RT1, the pressing order for winning the special replay 1 is notified. In addition, after the end of the sign, the push order for winning the special replay 1 at the time of repeated replay winning is notified, but the correct push order is not notified at the time of winning the bell.
In RT1, during non-ART, the game is digested by pushing forward, so special replay 2 wins in the game where the replay overlap is won. Even if the special replay 2 wins at RT1, there is no RT transition.

When the special replay 1 wins at RT1, the next game shifts to RT2 (ART).
In RT2 (ART), the correct pressing order is notified at the time of winning the bell until the ART termination condition is satisfied. Also, a notification is made of the pressing order for winning the special replay 1 when the replay overlap is won. Note that when the special replay 2 wins in RT2, the process shifts to RT1, but even if the special replay 1 wins, there is no RT shift.

In addition, even if the player does not win the ART and the non-ART (when there is no notification) and the player makes an irregular push at the time of the replay overlapping win and wins the special replay 1, the gaming state control means 63f does not start the ART.
However, when the special replay 1 wins at RT1, the next game shifts to RT2. However, even if a transition is made from RT1 to RT2 accidentally, if the forward push is continued at RT2, special replay 2 wins and returns to RT1 when replay overlap wins.

There are various ART termination conditions. For example,
(1) When the number of games reaches a predetermined number (for example, if the initial number of games is “50” and “N” is added to this “50”, then “50 + N”). When the number of sheets (the number of paid-out sheets minus the number of inserted sheets) reaches a predetermined number (for example, 300 sheets) (2) The number of times the bell is won (in the correct answer pressing order) reaches the predetermined number (for example, 40 times) Can be mentioned.

  Further, during ART, as described above, the internal state has a normal probability and a high probability. For example, first, there is a method of always setting a normal probability at the start of ART and a method of determining by lottery whether the initial internal state of ART is a normal probability or a high probability before starting ART. Can be mentioned.

In the present embodiment, when a cherry that is a rare small role is won during ART, a lottery with an ART is performed. Then, the higher probability than the normal probability is set to have a higher probability of being added and the number of games is increased.
For example, the ART end condition is the number of games, and the initial value of the number of games is set to “50”. Then, at the time of winning the cherry, whether or not to increase the number of games is determined by lottery. When the number of added games is determined, a process of adding the added number of games to the remaining number of games of ART at that time is performed.

For example, the following patterns are mentioned. The extra number “0” means that the extra lottery is not won.
(1) During normal probability When a cherry is won, the additional number is determined by lottery from “10” (30%), “30” (50%), and “50” (20%).
(2) High probability During cherry winning, the number of extras is determined by lottery from “30” (30%), “50” (40%), and “100” (30%).

Further, transition between normal probability and high probability during ART can be performed by a lottery result separately from a lottery result of a combination or a combination lottery.
When the internal state is shifted based on the winning lottery result, for example, during normal probability, it is possible to shift to a high probability at 50% of the time of winning the cherry.
In addition, during a high probability, it is possible to shift to the normal probability at 10% at the time of winning the replay.

The gaming state control means 63f continues to stay at RT2 after the transition to RT2, unless special replay 2 wins. Only when the special replay 2 wins at RT2 will the player move to RT1.
On the other hand, when the ART is terminated in RT2, from the next game, the push order for winning the special replay 1 at the time of the replay overlap win and the correct push order at the time of the bell win are not notified. Therefore, the game state transition (transition from RT2 to RT1) does not necessarily coincide with the end timing of ART.

  In the example of FIG. 23, when the special replay 1 wins in the normal RT1, the process shifts to RT2 corresponding to the ART. However, the present invention is not limited to this, and other RTs (art preparations are in progress) between RT1 and RT2. ) May be provided. In this case, during ART preparation, RT1 and the replay winning probability are set to be the same. When the ART is won at RT1, the correct push order to be promoted from RT1 during the ART preparation is notified at the time of duplicate replay winning. Further, during the ART preparation, when the replay overlap is won, the correct answer push order to be promoted to RT2 (ART) from the ART preparation is notified. By setting in this way, it is possible to further reduce the probability of accidentally shifting to RT2 from RT1 (when ART is not won).

  The command transmission means 63g transmits various information (commands) to the sub control board 80. Information to be transmitted includes information that a medal has been inserted, information that the start switch 41 has been operated, information on a lottery result (winning combination), information that rotation of the reel 31 has started, Information indicating whether the stop switch 42 has been operated, information indicating that the reels 31 have been stopped, information regarding the stop position (design stopped on the active line) of each reel 31, winning combination information, gaming state (with or without ART), and internal state Information and the like.

In FIG. 1, the main control board 60 is electrically connected to the external concentration terminal board 100. When the main control board 60 decides to execute ART, the main control board 60 transmits an external signal (such as a signal indicating 1BB game or ART execution) to the external concentration terminal board 100. The external signal is transmitted from, for example, the external concentration terminal board 100 to a game information display device, a hall computer, or the like.
In the present embodiment, as shown in FIG. 8 (output port 7), an external signal (ART signal) to that effect is transmitted during ART activation, continuation, and ART.

  As described above, at the start of the game, the player operates the bet switch 40 to insert a previously stored medal, or inserts a medal from the medal insertion slot 43 and operates the start switch 41 (ON). ) When the start switch 41 is operated, the reel control means 63c controls to drive all the motors 32 and rotate all the reels 31. As the reel 31 is rotated by the motor 32 in this way, the symbols on the reel 31 are moved and displayed in the vertical direction in the display window 13 at a predetermined speed. When the start switch 41 is operated, the part lottery means 63b performs a part lottery.

  Then, the player presses the stop switch 42 to stop the rotation of the reel 31 corresponding to the stop switch 42 (for example, the left reel 31 corresponding to the left stop switch 42). When the stop switch 42 is operated, the reel control means 63c drives and controls the motor 32 corresponding to the stop switch 42, and performs stop control of the reel 31 related to the motor 32.

  Then, the game result of the game is displayed by the combination of symbols when all the reels 31 are stopped. Furthermore, when the combination of symbols corresponding to any of the winning combinations stops on the active line (when the winning combination of the winning combination), a medal corresponding to the winning combination is paid out.

In FIG. 1, the sub-control board 80 controls the selection and output of effects (information) during the game and during the game standby.
The main control board 60 and the sub control board 80 are electrically connected, and the serial communication circuit in the main CPU 63 of the main control board 60 is used to provide information necessary for production in one direction on the sub control board 80 ( Signal, data, control command, etc.).
The main control board 60 and the sub control board 80 are not limited to being electrically connected but may be connected using an optical communication unit. Furthermore, both the electrical connection and the optical communication connection are not limited to serial communication, but may be parallel communication, or serial communication and parallel communication may be used in combination.

Similarly to the main control board 60, the sub control board 80 includes an RWM 81, a ROM (sub ROM) 82, a sub CPU 83, and the like.
Here, an MPU including an RWM 81, a ROM 82, and a sub CPU 83 is mounted on the sub control board 80. Further, separately from the MPU built-in RWM, the RWM is mounted outside the MPU (on the sub-control board 80). For this reason, the term RWM 81 is used to include an RWM with a built-in MPU and an external RWM.
The RWM (sub memory) 81 is a storage medium capable of temporarily storing data and the like captured when the sub CPU 83 controls the effect.
A ROM (sub-ROM) 82 is a storage medium for storing programs such as a lottery for production, various data, etc. as production data.

The sub-control board 80 is electrically connected to the following peripheral devices for effects through an input port or an output port (not shown in FIG. 1).
The effect lamp 21 is made of an LED, for example, and lights up in a predetermined pattern when a predetermined condition is satisfied. Note that the effect lamp 21 is arranged on the inner peripheral side of each reel 31, and a back lamp and reel 31 for illuminating from behind the symbols displayed on the reels 31 (three symbols that are continuously visible from the display window 13). Fluorescent lamps that illuminate the symbols on the reel 31 from above, and a frame lamp that is disposed in front of the front cover of the slot machine 10 and blinks when winning a winning combination.

The speaker 22 outputs a predetermined sound when a predetermined condition is satisfied in order to perform various effects during the game.
Furthermore, the image display device 23 is composed of a liquid crystal display, an organic EL display, a dot display, and the like, and corresponds to various effect images during the game (push order during 1BB game and ART and lottery results of roles). Effects, etc.), game information (1BB game, number of games during ART, number of acquired games, etc.), etc. are displayed.
The cross key 24 and the push button 25 are used when displaying information intended by the player or when a hall manager (store manager or the like) changes various settings.

The sub CPU 83 includes effect output control means 83a.
The stage output control means 83a outputs what stage (ramp) at what timing (when the start switch 41 or each stop switch 42 is operated, etc.) according to the winning combination and the gaming state, etc. It is determined by lottery how to turn on, blink, or turn off 21, what kind of sound is output from the speaker 22, and what kind of image is displayed on the image display device 23.
Then, the effect output control means 83a controls the output of the effect lamp 21, the speaker 22, and the image display device 23 in accordance with the determination. Further, during 1BB game or ART, the order of pressing the stop switch 42, the number of acquired games, the number of remaining games, etc. are displayed as images.

Next, information processing by the main control board 60 (main CPU 63) will be described based on a flowchart.
FIG. 24 is a flowchart showing processing (M_PRG_START) when starting a program by the main control board 60.
In FIG. 24, when the program is started in step S11, in the next step S12, the main control board 60 initializes the registers. Specific processing includes, for example, setting of the communication speed of the serial communication circuit provided in the main CPU 63, setting of the interrupt type (for example, setting to maskable interrupt), and parity bits to be given to the control command to be transmitted (For example, setting to even parity).
In other words, initial values necessary for normal operation of the slot machine 10 are set in various registers.
In the present embodiment, a plurality of registers (for example, an A register to an L register and a transmission register) are provided.

  Next, proceeding to step S13, the main control board 60 determines whether or not the power-off process completion flag is a normal value. In this embodiment, when the power is turned off, a power-off execution processing flag is stored in step S652 (FIG. 61) described later. The power-off execution processing flag is a flag for determining whether or not the previous power-off was normally performed when the power was turned on. When it is determined that the power-off execution processing flag is a normal value, the process proceeds to step S14. When it is determined that the power-off execution process flag is not a normal value, the process proceeds to step S16.

In step S14, a checksum of the RWM 61 is calculated. Specifically, a checksum calculation is performed in the same range (for example, a work area used in the program, an unused area, and a stack area) as the checksum of the RWM 61 executed by the power-off process. Here, in step S14, 1-byte data stored in the RWM 61 is added.
In step S15, it is determined whether or not the range of the RWM 61 for calculating the checksum has been completed. Specifically, the next address is designated from the address of the RWM 61 that calculated the current checksum, and it is determined whether or not the next address is an address for calculating the checksum. When it is determined that the checksum calculation has not been completed, the process proceeds to step S14. On the other hand, when it is determined that the range of the RWM 61 for calculating the checksum has been completed, the process proceeds to step S16.

Further, in the subsequent processing, when data stored in a plurality of ranges (addresses) of the RWM 61 is initialized, the same processing is executed in the range of the specified RWM 61 in the present embodiment.
When it is determined in step S13 that the power-off execution processing flag is not a normal value, an abnormal value is set as power-off recovery data without executing the checksum calculation of the RWM 61.

  In step S16, the main control board 60 stores the power-off recovery data in a predetermined register (for example, B register). Here, when it is determined that the power-off execution processing flag is a normal value and the checksum calculation (all range) of the RWM 61 is normally completed, the normal value is stored as the power-off recovery data. On the other hand, when the power-off execution processing flag is an abnormal value and / or when it is determined that there is an abnormality at the time of checksum calculation (full range) of the RWM 61, the abnormal value is stored as the power-off recovery data.

  In the next step S17, the level data of the input port 1 (FIG. 6) is stored in a predetermined register (for example, A register). Next, the process proceeds to step S18, where it is determined whether or not the designated switch is on based on the level data of the input port 1. In this embodiment, the “designated switch” is a signal (D1) of the door switch 16, a signal (D2) of the setting door switch 54, and a signal (D3) of the setting key switch 52 of the input port 1. One.

The signal of the door switch 16 is on (the front cover (housing) is opened), the signal of the setting door switch 54 is on (the setting door is opened), and the setting key The setting change is permitted only when the signal of the switch 52 is ON (when the setting key is inserted). When all three designated switches are on, it is possible to shift to the setting change process of step S22. However, when at least one designated switch is not on, it is not permitted to shift to the setting change process of step S22. .
That is, the setting key switch 52 regardless of whether the signal of the door switch 16 is off (the front cover is closed) or the signal of the setting door switch 54 is off (the setting door is closed). This signal cannot be turned on, and since there is a high possibility of fraud, the transition to the setting change process is not permitted.

Accordingly, when it is determined in step S18 that all the designated switches are on, the process proceeds to step S19, and when it is determined that the switch is not on, the process proceeds to step S21.
In step S19, the main control board 60 determines whether or not the power-off recovery data is abnormal. This power-off recovery data is the data stored in the register in step S16.

When it is determined that the power-off recovery data is abnormal, the process proceeds to the setting change process (M_RANK_SET) in step S22, and when it is determined that there is no abnormality, the process proceeds to step S20. In step S20, it is determined whether or not a setting change disable flag is on. Here, the setting change impossibility flag is one of the data stored in the RWM 61, and is a flag that is disabled during a part lottery process (step S60) to a game end check process (step S72) described later. is there. When the setting change disable flag is on, the process proceeds to step S21, and when it is not on, the process proceeds to the setting change process (M_RANK_SET) in step S22.
In the present embodiment, the setting change impossibility flag is provided. However, when the setting change is always possible, the setting change impossibility flag may not be provided. In that case, the process corresponding to step S20 becomes unnecessary.

  In step S21, the main control board 60 determines whether or not the power-off recovery data is a normal value. This process is equivalent to step S19. When it is determined that the power-off recovery data is a normal value, the process proceeds to step S23 to perform a power recovery process (M_POWER_ON). On the other hand, when it is determined that the power-off recovery data is not a normal value, the process proceeds to step S24, and a non-recoverable error process (SS_ERROR_STOP) is performed. An error when it is determined in step S21 that the power-off recovery data is not a normal value is referred to as an “E1” error in the present embodiment, and “E1” is displayed in a predetermined digit (described later). The unrecoverable error is an error that cannot be canceled unless the setting change process is executed.

FIG. 25 is a flowchart showing the setting change process (M_RANK_SET) in step S22.
First, in step S 801, “predetermined range” is stored in the register as the initialization range of the RWM 61. Here, it is a set for preparing when it is determined that the power-off process has been normally executed, and the initialization range in which the set value data, the gaming state (for example, the RT state), and the winning flag are not initialized is “ A predetermined range.

  Next, proceeding to step S802, the main control board 60 determines whether or not the power-off recovery data (the value stored in step S16) is a normal value. If it is determined that the power-off recovery data is a normal value, the process proceeds to step S804, and the storage of “predetermined range” in step S801 is maintained. On the other hand, when it is determined in step S802 that the power-off recovery data is not a normal value, the process proceeds to step S803, and the main control board 60 stores “specific range” in the register as the initialization range of the RWM 61. Here, when it is determined that the power-off is not normal, the set value data, the gaming state, and the winning flag are also set as “specific range” as the initialization range to be initialized.

  In step S804, initialization of the predetermined range set in step S801 or the specific range set in step S803 is started. In the next step S805, it is determined whether or not the initialization started in step S804 has ended. If it is determined that the initialization is completed, the process proceeds to step S806.

  In step S806, an activation setting for interrupt processing is performed. Here, various registers corresponding to the interrupt processing designated in step S12 are set. In the present embodiment, timer interrupt processing is used as interrupt processing, and therefore processing for setting a timer interrupt cycle (in this embodiment, “2.235 ms”) corresponds. Then, interrupt processing is executed after the processing of step S806. In other words, the interrupt process is not executed before “interrupt activation”. In the next step S807, an output request set at the start of setting change is performed. This process is a process of setting (storing) a control command to be transmitted to the sub control board 80 in a register in order to notify the sub control board 80 that the setting change process is started.

  The “output request set” is often executed also in the process described below, but means a process for setting a control command to be transmitted to the sub-control board 80 as in step S807. To do. The control command here does not mean only a command that is actually transmitted, but also a command that is a source of a command that is actually transmitted.

Next, proceeding to step S808, the main control board 60 executes the control command set 1. This process is a process of storing a control command to be transmitted to the sub control board 80 in the control command buffer (RWM 61). Note that “control command set 1” is often executed in the processing described below, but means processing for storing a control command to be transmitted to the sub-control board 80 as in step S808. To do.
In the present embodiment, the control command data includes first control command data and second control command data, and different first control command data and second control command data are transmitted in response to an output request.

In step S809, the main control board 60 sets a waiting time for starting the setting change. In the present embodiment, it is stored in a BC register (a pair register made up of a B register and a C register made up of 8-bit 1-byte data) as a register for setting the waiting time. In this embodiment, the number of interruptions “224” (about 500 ms) is set as the waiting time at the start of setting change.
Also in the following flowchart, when executing a “2-byte time waiting process” to be described later, the waiting time as in step S809 is set, but a specific waiting time in this case (stored in the BC register). Value) is described in the program. Therefore, the value stored in the predetermined address of the RWM 61 is not called.

  In step S810, a 2-byte time wait process (R_2BYTE_WAIT; FIG. 28) (wait process) is executed. “2 bytes” refers to the BC register. As will be described in detail later, this processing waits until the interrupt count “224” set in step S809 is counted (“1” is subtracted for each interrupt count and the set interrupt count becomes “0”). It is processing. Although the main process is stopped during this waiting time, an interrupt process shown in FIG. 59 described later is executed.

Thus, the 2-byte time waiting process (wait process) is executed in step S810 because the initialization process (step S804) of the RWM 61 on the main control board 60 side is completed in a relatively short time. Since the initialization process (step S754 in FIG. 67) of the RWM 81 on the control board 80 side takes time, a 2-byte time waiting process is executed on the main control board 60 side. In particular, the main control board 60 cannot know whether the initialization process has been completed on the sub-control board 80 side.
Specifically, the clear range of the RWM 61 of the main control board 60 (the range that is cleared when the setting is changed) is, for example, addresses “F000 (H) to F1FF (H)” (512 bytes in number of bytes). The clear range of the RWM 81 of the control board 80 is, for example, an address “000000 (H) to 800000 (H)” (about 12 to 13 gigabytes in terms of the number of bytes).

Therefore, when the initialization process is still in progress on the sub control board 80 side, the initialization has already been completed on the main control board 60 side, and further processing has progressed. It is possible to prevent the progress of the control process 80 from becoming out of synchronization.
In addition, after execution of the output request set and control command set 1 at the start of setting change, the sub control board 80 starts initialization of the RWM 81, but sets a sufficient time for the RWM 81 initialization to be completed as a wait time. To do. Thus, after the initialization process of the RWM 81 is completed on the sub control board 80 side, the process proceeds to the processes after step S811 on the main control board 60 side.

  The control command at the start of setting change set in step S807 and step S808 is transmitted to the sub control board 80 even during the 2-byte time waiting process in step S810. However, while the 2-byte time waiting process is being executed in step S810, the process does not proceed to step S811 and subsequent steps (the main process does not proceed).

With this configuration, it is possible to transmit a control command at the start of setting change to the sub control board 80. Further, the processing after step S811 (end of setting change, start of game, etc.) can be delayed by the wait time. Furthermore, due to the delay in the processing after step S811, various control commands (commands at the end of setting change, commands at the time of operation of the bet switch 40, and results of the role lottery based on the operation of the start switch 41 due to the processing delay from step S811. The transmission timing of the command etc.) can be delayed. Thereby, the sub-control board 80 can control and output effects based on various commands at a timing synchronized with the processing of the main control board 60.
On the other hand, when the 2-byte time waiting process of step S810 is not executed, the process of the main control board 60 is executed first. As a result, for example, when the start switch 41 is operated, the winning lottery result A is obtained, and when the effect a is output at the start of the rotation of the reel 31, the effect a is not output at the timing of starting the rotation of the reel 31, and the effect a is slightly delayed. Will be output.

  After the completion of the 2-byte time waiting process, the process proceeds to step S811, and it is determined whether or not the set value is in the normal range. In the present embodiment, since the set value is any one of “1” to “6” (integer), it is determined whether any of these “1” to “6”. If it is determined that the set value is in the normal range, the process proceeds to step S813, and the set value is not in the normal range (values such as “7” and “255” are stored in the storage area of the RWM 61 that stores the set value). ), The process proceeds to step S812. In step S812, “1” is stored as the set value.

In step S813, display control (lighting) of the LED whose setting is being changed is performed. Thereby, when an interrupt process is executed after this process, the LEDs (setting value display LED 64 and acquired number display LED 72) displayed during the setting change can be turned on. In the present embodiment, in order to display the current setting value on the setting value display LED 64 and display “-” on the acquisition number display LED 72, a process of updating the value of the display data is executed.
Note that each of the above values has been initialized in step S804, and is “0” before the update.

In step S814, an interrupt wait process (C_INTR_WAIT; FIG. 29) is executed. Although this process will be described in detail later, this process waits until one interrupt time (2.235 ms) elapses. The reason why this process is provided will be described later. Then, after one interruption time elapses, the process proceeds to step S815.
In step S815, it is determined whether an operation of the setting change switch 53 has been detected. Here, the rising data of the input port 1 is determined, and it is determined whether or not the D4 bit is “1”. If it is determined that the operation of the setting change switch 53 has been detected, the process proceeds to step S816. If it is determined that the operation has not been detected, the process proceeds to step S817.
In step S816, the set value is updated. Specifically, the set value is stored (updated) in a predetermined area of the RWM 61. Further, by executing an interrupt process after the set value is updated, the set value display LED 64 displays the updated value.

In the next step S817, it is determined whether or not an operation of the start switch 41 is detected. In this embodiment, when the start switch 41 is operated during the setting change, the set value at that time is determined.
If it is determined that the start switch 41 has been operated, the process proceeds to step S818. If it is determined that the start switch 41 has not been operated, the process returns to step S814.

In the above processing, step S814 is provided to clear the rising data of the setting change switch 53.
For example, when the process of step S814 is not provided, if it is determined in step S815 that the rising data of the setting change switch 53 is on, the set value is updated in step S816, and the start switch 41 is turned on in the next step S817. If not, the process proceeds to step S815 to determine whether or not the rising data of the setting change switch 53 is ON.

  If it is determined in step S815 that the switch is turned on, the rising data of the setting change switch 53 is turned off if interrupt processing is executed even once. However, until the interrupt process is executed, it is determined in step S815 that the rising data of the setting change switch 53 is ON. As a result, the set value continues to increase by 2 or more just by operating the setting change switch 53 once. Therefore, an interrupt waiting process is executed in step S814. In particular, this interrupt waiting process is provided as a subroutine process of the above-described 2-byte time waiting process (FIG. 29). By using this process, one interrupt time is provided without providing a dedicated process in step S814. The waiting process can be executed.

In step S818, it is determined whether setting key switch 52 has been turned off. If it is determined that the setting key switch 52 has been turned off, the process advances to step S819 to perform LED display control (extinguishment) after completion of the setting change. Specifically, first, the set value display LED 64 is turned off. Secondly, the storage number display LED 71 and the acquisition number display LED 72 can be turned on. Thirdly, a process for updating the value of the acquired number display data to display “00” on the acquired number display LED 72 is executed.
Thereby, when the interruption process is executed after the process, the set value display LED 64 is turned off, and the stored number display LED 71 and the acquired number display LED 72 can be turned on.

  Next, the process proceeds to step S820, and an output request set at the end of the setting change is performed as in step S807. This process is a process of ending the setting change process and notifying the determined setting value to the sub-control board 80 side and setting a control command. Next, the process proceeds to step S821, and the main control board 60 executes the control command set 1 as in step S808. And it transfers to the main process (M_MAIN) (FIG. 32) of step S50.

  FIG. 26 is a flowchart showing the processing of the control command set 1 (S_CMD_SET). In the present embodiment, when the control command set 1 is processed, the processing after step S501 shown in FIG. 26 is executed (the same applies to “control command set 1” in other flowcharts).

First, in step S502, an interrupt prohibition process is executed. In the next step S503, control command set 2 (SS_CMD_SET) (FIG. 27) is executed. In step S504, the interrupt process prohibited in step S502 is canceled (that is, interrupt permission) is executed. Through the above processing, interrupt processing is prohibited during execution of the control command set 2.
In the control command set 2, the control command is written as shown below. While the control command set 2 is being executed, interrupt processing is prohibited as described above. Therefore, it is possible to prevent malfunction (such as writing to an address different from the normal write address) due to execution of interrupt processing during control command write processing.

Here, an interrupt flag for storing the prohibition / release of the interrupt is provided. The interrupt flag is turned on when the timing for executing the next interrupt process (within 2.235 ms from the time when the interrupt process is disabled) comes after the interrupt process is disabled in step S502. The main CPU 63 then clears the interrupt flag when canceling the prohibited interrupt processing.
When it is time to execute the interrupt process, the main control board 60 determines whether the interrupt flag is on or off, and determines whether the interrupt process is prohibited or permitted.

FIG. 27 is a flowchart showing the control command set 2 (SS_CMD_SET).
First, in step S511, the address of the control command buffer is set. This process is a process for setting the head address of the control command buffer.
In the next step S512, a write pointer is acquired. The write pointer is for designating which address of the RWM 61 the control command data is to be written. Since the current write pointer is stored, a process of reading the write pointer is performed.

In the next step S513, a designated address is acquired. In this process, a write address (in the RWM 61) is obtained from the start address of the control command buffer and data indicating the current position of the write pointer.
Next, proceeding to step S514, data at a specified address is acquired. This process is a process of reading data stored in the storage area of the RWM 61 at the address obtained in step S513 of the preprocess.

  In “control command <32?” In the next step S515, processing for determining whether or not the data of the designated address is “0” is performed. When the data at the designated address is not “0”, the data already exists at the designated address. When the data at the designated address is “0”, that is, when there is no data at the designated address, the process proceeds to step S516, and when it is not “0”, the process according to this flowchart is terminated. That is, when there is data at the specified address, the data writing process is not executed. This prevents overwriting when there is data at the specified address.

In “RWM designation?” In the next step S516, it is determined whether or not the data to be written to the control command buffer is data that needs to refer to the data stored in the RWM 61. For example, the number of medals inserted at the time of automatic betting at the time of replay winning depends on the previous game, so RWM is specified (note that detailed explanation on whether or not RWM is specified will be omitted, but the D register Judgment is made based on whether the D7 bit of the stored value is 0 or not.
When it is determined that RWM is designated, the process proceeds to step S517, and when it is determined that RWM is not designated, the process proceeds to step S518.

In step S517, data indicating the second control command is stored in a predetermined register (E register). In this process, data to be written as the second control command is read from the RWM 61 and stored in the register. Then, the process proceeds to step S518.
In step S518, data indicating the first control command is stored in the RWM 61. Here, the twelfth control command is stored in the address acquired in the “specified address acquisition” in step S513. Specifically, it is a process of storing the value of the D register stored before the control command set 2 process (in the case of RWM designation, a value obtained by adding 80 (H) to the value of the D register is stored. .)

In step S519, data indicating the second control command is stored in the RWM 61. In this process, the second control command is stored at the next address storing the first control command.
In step S520, the value of the write pointer is updated by “+1”. Note that data indicating the first control command and the second control command is written in the storage areas of the two RWMs 61. In the calculation of the “designated address acquisition” process in step S513, the data of the write pointer is doubled. Since the calculation is performed, the value of the write pointer is incremented by “1”.

  As described above, in FIG. 25, by executing the output request set at the start of setting change in step S807 and the control command set 1 (S_CMD_SET) at step S808, the control command data (sub control board at the start of setting change) is executed. Data to be transmitted to 80) is written to a control command buffer at a predetermined address. These control command data are transmitted to the sub-control board 80 by an interrupt process described later. The same applies to the other “output request set” and “control command set 1”.

FIG. 28 is a flowchart showing a 2-byte time wait process (R_2BYTE_WAIT).
In step S31, it is determined whether or not a 2-byte waiting time has elapsed. This process determines the value of the BC register and determines whether it is “0” (whether the B register value is “0” and the C register value is “0”). Specifically, for example, when B register value = “1” and C register value = “0”, it is determined that the value is not “0”. Alternatively, when the B register value = “0” and the C register value = “0”, it is determined as “0”.
When it is determined in step S31 that it is “0”, the processing according to this flowchart is terminated, and when it is determined that it is not “0”, the process proceeds to step S32.

  In step S32, an interrupt waiting process (C_INTR_WAIT; FIG. 29) is executed. This process is a process of waiting until one interrupt time (2.235 ms) elapses. Then, when the interrupt waiting process is completed, the process proceeds to step S33, the waiting time update process is executed, and the process returns to step S31. This process is a process of subtracting “1” from the BC register value. Specifically, for example, when B register value = “1” and C register value = “0”, subtracting “1” results in B register value = “0”, C register value = “255” (decimal number) ) Alternatively, for example, when B register value = “0” and C register value = “1”, subtracting “1” results in B register value = “0” and C register value = “0”.

FIG. 29 is a flowchart showing interrupt wait processing (C_INTR_WAIT).
In the acquisition of the interrupt counter value in step S41, the interrupt counter value is stored in the A register. Here, in this embodiment, the interrupt counter value is stored as 16 bits in the two addresses “F02B” and “F02C”. However, in step S41, the value stored in the low-order 8-bit address “F02C”. Is stored in the A register.
Next, the process proceeds to step S42, and it is determined whether or not the interrupt counter value (the lower 8-bit value stored in the address “F02C”) has changed. Specifically, a process of subtracting “interrupt counter value stored in address“ F02C ”” from “A register value” is executed, and the operation result is “0” (zero flag = “1”). , “No” is determined. When it is determined that there has been a change, the processing according to this flowchart is terminated, and when it is determined that there has been no change, the processing of step S42 is continued.
The zero flag is a flag for determining whether or not the calculated result is “0”, and indicates a specific bit of a flag register (F register) provided in the MPU. When the specific bit is “0” (zero flag = “0”), it indicates that the operation result is not “0”. When the specific bit is “1” (zero flag = “1”), the operation result is “0”. ".
As described above, when an 8-bit value is used as the interrupt counter value, the interrupt counter value is stored only in the address “F02B”. Therefore, in step S41, the value of the address “F02B” is stored in the A register. In step S42, it is determined whether or not the value stored in address “F02B” has changed.

FIG. 30 is a flowchart showing the power recovery process (M_POWER_ON) in step S23 in FIG.
First, in step S831, the stack pointer is restored. Here, the stack pointer refers to an area of the RWM 61 that stores data (for example, a register value, instruction processing of the main process before interrupt processing, etc.) at the time of the occurrence of the power interruption when the power interruption occurs.
In the next step S832, the set value is read, and it is determined whether or not the set value range is a normal range (“1” to “6”). When it is determined that the set value is within the normal range, the process proceeds to step S833. When it is determined that the set value is not within the normal range, the process proceeds to step S839, and the process proceeds to a non-recoverable error process (SS_ERROR_STOP). In this embodiment, the error in this case is referred to as an “E6” error, and “E6” is displayed on the acquisition number display LED 72.

In step S833, the initialization range of the unused area of the RWM 61 is set in the register. In the next step S834, initialization of the RWM 61 in the range set in step S833 is executed. Here, it is conceivable that a value is stored in the RWM 61 due to noise or the like even in an unused area. If a value is stored in an unused area, there is a possibility that it may lead to fraud etc. Therefore, the unused area should be initialized when the power is turned on (usually once a day). Yes.
In the next step S835, it is determined whether or not the initialization of the RWM 61 is completed. If it is determined that the initialization is completed, the process proceeds to step S836. In step S836, the input ports 0 to 2 are read. This process is a process for updating each data (level data, rising data, falling data) of the input port before power-off to the latest data.

In step S837, an interrupt is activated. This process is, for example, a process for setting a timer interruption period, and is similar to step S806 described above.
In step S838, the power-off process completion flag is cleared, that is, set to “0”. And the process by this flowchart is complete | finished.

In the power recovery process described above, after the input ports 0 to 2 are read (step S836), the interrupt process is started (step S837). The reason is as follows.
In the present embodiment, it is configured such that a set key can be inserted and a set value can be confirmed during game standby. Here, when the falling signal of the setting key switch 52 becomes “1”, it is determined that the confirmation of the setting value is completed.
However, for example, it is assumed that the power is cut off during setting confirmation, and the power is turned on by turning off the setting key switch 52 (with the setting key removed) during the power cut.

In this case, the falling signal of the setting key switch 52 is set to “1” based on the fact that the setting key switch 52 is turned off by the interrupt processing after the power is restored, so that the falling of the setting key switch is detected. The
As a result, the state at the time of power-off recovery is different from the state before the power-off. Specifically, the falling signal of the setting key switch 52 is “0” in the state before the power is turned off, whereas the falling signal of the setting key switch 52 is “1” when the power is restored.
Therefore, in order to avoid the situation before and after the power is turned off, the values of the RWMs 61 of the input ports 0 to 2 are updated to the latest state when the power is restored. Therefore, after executing the input port 0-2 read processing, the interrupt processing is activated.

FIG. 31 is a flowchart showing non-recoverable error processing (SS_ERROR_STOP) in step S24 of FIG.
In the present embodiment, an error that is not recoverable is determined in the following cases. However, the present invention is not limited to the unrecoverable error shown in the present embodiment.
E1 error: When it is determined in step S24 of FIG. 24 that the recovery from power failure is not normal E5 error: When it is determined that a display error has occurred in step S75 of FIG. 32 E6 error: step of FIG. When it is determined in S839 that the set value is not within the normal range E7 error: When it is determined that a random number error has occurred in step S620 of FIG.

  First, in step S881, the main control board 60 prohibits interrupt processing. This process is the same as step S502 described above. Control is performed so that no interrupt is generated even when an interrupt request signal (INT signal) is input. In other words, the timer interrupt process is not executed even when the timer interrupt period (2.235 ms) arrives. As a result, updating of various data stored in the RWM 61 by interruption processing, input / output, etc. are not executed, and erroneous information is transmitted to the sub-control board 80 or transmitted to the hall computer. It is preventing.

In step S882, the output ports 0 to 6 are sequentially turned off. Specifically, all “0” (“00000000B”) is output from each address indicating the output ports 0 to 6 for each output port. In step S883, the next output port address is set. That is, the address indicating the output port is incremented by “1”. For example, when the address of the output port 0 is “0F1 (H)”, the address “0F2 (H)” of the output port 1 is set as the next address.
Next, proceeding to step S884, it is determined whether or not all output ports have been completed, that is, whether or not output port 6 has been completed. If it is determined that the process has not been completed, the process returns to step S882. If it is determined that the process has been completed, the process proceeds to step S885.

That is, by turning off all the output ports 0 to 6, the active signal output before the processing is executed is turned off. This can prevent LED burn-in, motor 32 burn-in, and medal swallowing. For example, if the power is cut off in a situation where a blocker signal is being output, the blocker 45 will remain on (a state where a medal flow path is formed) unless the processing is executed (medal detection). Since no processing takes place, medals are swallowed).
If the power is cut off while the motor 32 is outputting φ1, unless the processing is executed, φ1 is continuously output until a reset signal is input. Normally, the time until the reset signal is input is short, but the power-off process is executed due to the instantaneous drop in the power supply voltage. It will repeat the wait for reset without being done. For this reason, a situation in which φ1 continues to be output may occur.

In step S885, the lower digit is set as error display data. In step S886, upper digits are set as error display data.
In step S887, the LED is turned off. This process is a process of outputting “00000000B” to the address indicating the output port 0. Therefore, at the time of step S887, the output of all LEDs is “0” (lights off). Thereby, the flicker of LED can be prevented.
In the next “error display output” process in step S888, a process of outputting a predetermined value to the address indicating the output port 1 is performed. Here, “E1”, “E5”, “E6”, “E7”, and the like are displayed as error display contents.

  In step S889, the LED is turned on. This process is a process of outputting a predetermined value to the address indicating the output port 0. In the next step S890, it is determined whether or not the display weight has ended. Here, the display weight is a process of subtracting “−1” from the value of the B register and determining whether or not the value of the B register becomes “0”.

In the present embodiment, “255” is set as the B register value at the start of processing in step S888. The subtraction process is performed until the B register value becomes “0”. In this embodiment, the internal system clock is 16 MHz, and approximately
“1 / Internal system clock (16 MHz)” × 256 × 8 (command) + α (other commands) ≈0.128 ms
The B register is set to be “255” → “0” at

If it is determined that the display weight has ended, the process proceeds to step S891. In step S891, switching between the upper digit and the lower digit is executed. Then, the process returns to step S887.
Thereby, it is possible to switch from the lower digit display to the upper digit display by the same program processing. Further, the switching cycle of the upper digit / lower digit is about 0.128 ms. Therefore, after the upper digit is lit for 0.128 ms, the process of lighting the lower digit for 0.128 ms is repeated.

  For example, when the “E1” error is displayed on the acquisition number display LED 72 by the processing of step S887 to step S891, after “E” is displayed for about 0.128 ms in the upper digit of the acquisition number display LED 72 ( Next, “1” is displayed for about 0.128 ms in the lower digit of the acquisition number display LED 72 (the upper digit of the acquisition number display LED 72 is turned off during this period).

Further, the switching cycle of the upper digit / lower digit is faster than the timer interrupt cycle (2.235 ms), and the luminance at the time of error display is increased (details will be described later).
In other words, when an error is displayed using an LED, the non-recoverable error has a higher luminance than the normal error, so the devices on the sub-control board 80 side (effect lamp 21, speaker 22, image display device 23) Even if the error notification using is not performed (even if it is not possible), the hall clerk can easily notice.
As described above, even when an error occurs during the period when timer interrupt processing is not executed (not desired to be executed), the error display is appropriately performed using the LED by the arithmetic processing using the register and the hardware configuration. can do.

In the present embodiment, the display weight process (step S890) is provided as described above, but the present invention can be implemented without providing the display weight process. In this case, since the high-order digit and the low-order digit are switched at high speed on the software, the processing time in steps S887 to S891 is substantially “0”. It depends on the processing speed and the response speed of the LED.
As described above, if a wait time of about 0.1 ms is provided, one LED continues to be lit during the wait time, so that a constant brightness (light flux) of the LED can be secured. On the other hand, if a recent high-performance LED is adopted, sufficient brightness can be secured visually even if the lighting time is momentary (only step S889).

FIG. 32 is a flowchart showing main processing (M_MAIN) processing in the present embodiment. Then, during this main process, an interrupt process (FIG. 59) is performed every 2.235 ms.
33 to 58 are processes showing subroutines during the main process.

In FIG. 32, in step S51, a stack pointer is set. As described above, the stack pointer refers to an area of the RWM 61 that stores data (for example, register values, instruction processing of the main process before interrupt processing, etc.) at the time of the occurrence of the power interruption when the power interruption occurs. The setting of the stack pointer is a process of setting a register value to an initial value in the RWM 61 area.
In the next step S52, game start set processing (MS_GAME_SET) is performed. If it progresses to step S52, it will transfer to the process of FIG. 33 mentioned later.

In the next step S53, a bet medal is read (S_PLAYM_READ). This process is a process of reading how many medals are bet at the present time, and is different from reading of the stored number. The bet medal reading process will be described later (FIG. 35).
In the next step S54, the presence / absence of a bet medal is determined based on the bet number read in step S53.

  If it is determined in step S54 that there is a bet medal (zero flag = “0”), the process proceeds to step S56. If it is determined that there is no bet medal (zero flag = “1”), the process proceeds to step S55, and medal insertion waiting processing (MS_STANDBY_DSP; 40), and the process proceeds to step S56.

In step S56, the management process (MS_MEDAL_CHK) of the inserted medal is performed. If it progresses to step S106, it will transfer to the process of FIG. 41 mentioned later.
In the next step S57, a soft random number update process is performed. This process is a process of updating (for example, adding “1” by one) a processing random number for processing (arithmetic processing) into a random number (hard random number or built-in random number) used in the role lottery means 63b. The soft random number is a 16-bit random number having a range of 0 to 65535. As an update method, a process of adding an interrupt count value (a count value (variable) incremented at the time of an interrupt) to a value before update may be executed.

  In the next step S58, the main control board 60 determines whether or not the start switch 41 has been operated. When it is determined that the start switch 41 has been operated, the process proceeds to step S59, and when it is determined that the start switch 41 has not been operated, the process returns to step S53. Even when the start switch 41 is operated, if the number of bets has not reached the prescribed number of the game, “No” is determined in step S58. When the specified number is reached, the start switch acceptance permission flag (the “D0” bit of the medal management flag) is turned on.

In step S59, when the process proceeds to step S59 for executing the process (MS_START_CTL) when the start switch is received, the process proceeds to the process of FIG.
In step S60, the combination lottery means 63b executes the combination lottery at the timing when the start switch 41 is operated, that is, when the operation signal of the start switch 41 is received. In addition, the random number value at the time of the lottery is acquired in step S59. In step S60, a process is performed to determine whether the acquired random number value is a random value corresponding to any winning combination using the combination lottery table.

In the next step S61, a reel rotation start preparation process (M_REEL_READY) is executed. If it progresses to step S61, it will transfer to the process of FIG. 54 mentioned later.
In step S62, the reel control unit 63c starts rotating the reel 31. In the next step S63, the stop acceptance of the reel 31 is checked. Here, it is detected whether or not the operation signal of the stop switch 42 has been received, and when the operation signal is received, the stop position of the reel 31 is determined based on the lottery result of the combination and the position of the reel 31, The reel 31 is controlled to stop at the determined position.

  In the next step S64, the reel control means 63c checks whether or not all the reels 31 have stopped, and proceeds to step S65. In step S65, it is determined whether or not all the reels 31 have been stopped. If it is determined that all the reels 31 have stopped, the process proceeds to step S66. If it is determined that all the reels 31 have not stopped, the process returns to step S63. .

In step S66, symbol display determination is performed. Here, the winning determination means 63d determines whether or not the combination of symbols corresponding to the winning combination is stopped on the active line. Then, the symbol combination flag (_FL_WIN) is updated in accordance with the stopped symbol combination. For example, when it is determined that the replay symbol combination has stopped at the active line, the D0 bit of the symbol combination flag is set to “1”.
In step S66, the value of the medal payout number data (_NB_PAY_MEDAL) is updated. For example, when one winning combination wins and the medal payout number data until that time is “0”, “0” is updated to “1”.
In step S67, it is determined whether or not a symbol display error has occurred. If it is determined that a symbol display error has occurred, the process proceeds to step S75. If it is determined that no display error has occurred, the process proceeds to step S68.

  Here, since the stop of the reel 31 is executed based on the stop position determination table, the reel 31 does not normally stop at a position other than the position determined by the stop position determination table. However, as a result of the display determination of the symbol, when a symbol that should not be displayed (a kicked symbol) is displayed on the active line, it is determined that there is an abnormality, and when it proceeds to step S75, it cannot be recovered. Perform error handling. This symbol combination abnormality error is referred to as an “E5” error, and “E5” is displayed on the acquired number display LED 72, and the main process is stopped.

When an unrecoverable error occurs, it is necessary to turn on / off the power and reset the set value in order to cancel the error. When an unrecoverable error occurs, the power is turned off, the setting key is inserted and rotated 90 degrees clockwise, and the power is turned on. As a result, a predetermined range (setting value information, RT information, winning combination information) of the RWM 61 is cleared. Then, a set value is set, and if there is no other error, a return process is performed.
On the other hand, when a recoverable error such as a full error which will be described later occurs, the error content is displayed and the processing is stopped (for example, step S239 in FIG. When the reset switch 53 is operated by removing the cause) and operating the reset switch 53, the process is resumed when it is determined that the error has been cancelled.

In the next step S68, it is determined whether or not a special combination (1BB) has been won. When it is determined that the special combination has won, the process proceeds to step S69, and when it is determined that the special combination has not won, the process proceeds to step S71.
In step S69, the waiting time for winning a special role is set. This process is the same as step S809 described above, and is a process for setting a predetermined value in the BC register. In this embodiment, “2000” (equivalent to about 4470 ms) is set in the BC register. More specifically, B register value = “3” (00000011B) and C register value = “208” (11101000B) are set. In a next step S70, a 2-byte time waiting process is executed.

  As described above, the wait time is set when the special combination is won, during which the sub control board 80 outputs an effect at the time of the special combination and the player performs the bet switch 40 during the presentation period. This is in order not to cancel the effect due to the operation. Thus, by providing the wait time in the main process and stopping the main process, it is possible to reliably show the player the effect at the time of winning the special role.

  In the next step S71, the payout means 63e pays out medals corresponding to the winning combination (MS_WIN_PAY; FIG. 55). Next, the process proceeds to step S72. In step S72, the main control board 60 performs a game end check process (M_GAME_CHK). When the processing proceeds to step 72, the processing proceeds to the processing shown in FIG.

  In step S72, the signal of the full sensor 38, which is the D5 bit of the input port 2, is determined. If it is on, a full error is displayed. The full error is referred to as “FE error” in this embodiment, and “FE” is displayed on the acquisition number display LED 72.

In the next step S73, an output request at the end of the game is set. This process is a process of setting control command data for transmitting to the sub-control board 80 that one game has been completed.
In step S74, the main control board 60 executes the control command set 1. This process is a process of storing control command data to be transmitted to the sub control board 80 in the control command buffer (RWM 61).
And when the process of step S74 is complete | finished, it returns to step S50 again.

FIG. 33 is a flowchart showing the game start set (MS_GAME_SET) in step S52 of FIG.
First, in step S81, a game standby display time is set (stored in a predetermined storage area of the RWM 61). In this embodiment, “26846” interrupt (≈60,000 ms, that is, about 60 seconds (1 minute)) is set as the game standby display time. When the game standby display time is set in step S81, the value is subtracted by “1” for each interrupt process from this point.

  When the game standby display time becomes “0”, the medal payout number data is cleared in step S55 of FIG. 32 (processing to set “_NB_PAY_MEDAL” to “0”). That is, “00” is displayed on the acquisition number display LED 72. For example, even if the number of medals paid out in the previous game is “8” and the player pays out by operating the checkout switch 43 and ends the game, “00” is displayed after about 1 minute. Is done. Thereby, it has the effect that a vacant stand can be reduced by being able to recognize a hall clerk and another player as a vacant stand.

In the next step S82, data of the symbol combination display flag is acquired. This process is a process of storing the symbol combination on the active line after the reel 31 is stopped in the previous game, that is, the data of the symbol combination display flag (_FL_WIN) in the A register.
In the next step S83, it is determined whether or not a 1BB operation symbol is displayed. In this process, when the D3 bit stored in the A register value is “1”, it is determined as “Yes”, and when it is “0”, it is determined as “No”. When it is determined that the 1BB operation symbol is displayed, the process proceeds to step S84. When it is determined that the 1BB operation symbol is not displayed (when 2BB is not provided), the process proceeds to step S87.

  Here, in the flowchart of FIG. 33, an example in which 2BB is provided is also displayed. When 2BB is provided, if “No” is determined in step S83, the process proceeds to step S85, and it is determined whether or not the 2BB operation symbol is displayed. In this process, when the D1 bit (see FIG. 10) stored in the A register is “1”, it is determined as “Yes”, and when it is “0”, it is determined as “No”. When it is determined that the 2BB operation symbol is displayed, the process proceeds to step S86, and when it is determined that the 2BB operation symbol is not displayed, the process proceeds to step S87.

In step S84, the acquirable number at the time of 1BB operation (at the time of 1BB game) is stored. This process is a process of storing (storing) the value of “200” in the above-described “_CT_BB1_PAY” (RWM 61). This “200” is the maximum number that can be acquired in a 1BB game. Then, the process proceeds to step S87.
On the other hand, in step S86, the acquirable number at the time of 2BB operation (at the time of 2BB game) is stored. This process corresponds to the process of saving (storing) the value of “40” in the above-described “_CT_BB2_PAY” (RWM 61). This “40” is the maximum number that can be acquired in the 2BB game. Then, the process proceeds to step S87.

In the next step S87, an operation state flag (_FL_ACTION) is generated. In step S87, the following processes 1) to 5) are executed.
1) First, the address of the operation state flag is stored in the HL register. As described above, since the address of the operation state flag is “F01C”, H register value = “F0” and L register value = “1C”.
2) Next, "OR" the A register value and the address information stored in the HL register, and store the operation result in the A register. Here, the data of the symbol combination display flag (_FL_WIN) in step S82 is stored in the A register, and the address information stored in the HL register is information on the operation state flag (_FL_ACTION).

Specifically, it is as follows, for example.
Example 1)
When a 1BB symbol combination is displayed,
A register value: 00001000B
HL register address information value: 00000000B
A register value after "OR" operation: 00001000B
It becomes.
Example 2)
When 1BB symbol combination is already displayed and 1BB and RB are active,
A register value: 00000000B
HL register address information value: 00011000B
A register value after "OR" operation: 00011000B
It becomes.

Example 3)
When 1BB symbol combination is already displayed and 1BB is active but RB is not active,
A register value: 00000000B
HL register address information value: 00001000B
A register value after "OR" operation: 00001000B
It becomes.
Example 4)
When 1BB and 2BB are inactive and replayed,
A register value: 00000001B
HL register address information value: 00000000B
A register value after "OR" operation: 00000001B
It becomes.

3) Store the A register value in the C register.
For example, the above examples 1) to 4) are as follows.
Example 1) and Example 3)
A register value: 00001000B, C register value: 00001000B
Example 2)
A register value: 00011000B, C register value: 00011000B
Example 4)
A register value: 00000001B, C register value: 00000001B

4) An AND operation is performed on the information stored in the A register and the information in which the bit corresponding to BB is set to “1”, and the operation result is stored in the A register.
Here, when only 1 BB is provided, the information in which the bit corresponding to BB is set to “1” is “00001000B”. Therefore, for example, the above example 1) to example 4) are as follows.
Example 1) and Example 3)
A register value: 00001000B
Information in which the bit corresponding to BB is set to “1”: 00001000B
A register value after AND operation: 00001000B
Example 2)
A register value: 00011000B
Information in which the bit corresponding to BB is set to “1”: 00001000B
A register value after AND operation: 00001000B
Example 4) A register value: 00000001B
Information in which the bit corresponding to BB is set to “1”: 00001000B
A register value after AND operation: 00000000B
When both 1BB and 2BB are provided, the information in which the bit corresponding to BB is set to “1” is “00001010B”. When only 2BB is provided, information in which the bit corresponding to BB is set to “1” is “00000010B”.

5) Perform an operation to rotate the A register value to the left and store the operation result in the A register.
For example, the above examples 1) to 4) are as follows.
Example 1) to Example 3)
A register value (before operation): 00001000B
A register value (after calculation): 00010000B
Example 4)
A register value (before operation): 00000000B
A register value (after calculation): 00000000B

In the next step S88, the operating state flag is updated. In this process, the A register value and the C register value are “ORed”, and the calculation result is stored in the A register.
For example, the above examples 1) to 4) are as follows.
Example 1)
A register value: 00010000B
C register value: 00001000B
A register value (after operation): 00011000B
Example 2)
A register value: 00010000B
C register value: 00011000B
A register value (after operation): 00011000B

Example 3)
A register value: 00010000B
C register value: 00001000B
A register value (after operation): 00011000B
Example 4)
A register value: 00000000B
C register value: 00000001B
A register value (after calculation): 00000001B

In the next step S89, the operation state flag is saved (stored). In this process, the value stored in the A register is stored in the address of the RWM 61 (that is, the operating state flag) indicated by the HL register value. Thereby, the information on the operation state flag up to that point is replaced with the information on the operation state flag updated in step S88.
For example, as in Example 1), when a 1BB symbol combination is displayed (at the time of 1BB winning), the D3 bit corresponding to 1BB of the operation state flag is changed from “0” to “1”.
Further, as in Example 2, when 1BB and RB are in operation, the states are maintained (the D3 bit corresponding to 1BB and the D4 bit corresponding to RB of the operation state flag are “1”).

Furthermore, as in Example 3), when 1BB is operating, but RB is not operating, the D4 bit corresponding to RB of the operating state flag is changed from “0” to “1”. Although details on this point will be described later, in this embodiment, in the 1BB game, the RB operation flag is turned off (“0”) at the end of the 2 games (or at the time of the 2nd prize), but in the 1BB game, When the end condition is not satisfied (when the D3 bit corresponding to 1BB of the operation state flag is “1”), it is set to “1” in this step S89 (game start set).
Furthermore, as in Example 4), during the replay operation, the D0 bit corresponding to the replay of the operation state flag is changed from “0” to “1”.

In the next step S90, it is determined whether or not the RB operation has started. In this process, the information stored in the A register and the information stored in the C register are “XORed”, the calculation result is stored in the A register, and it is determined whether or not the zero flag is “1”. It is.
Taking Example 1) to Example 4) as an example, it is as follows.
Example 1) and Example 3)
A register value: 00011000B
C register value: 00001000B
A register value (after “XOR” operation): 00010000B (zero flag ≠ 1)
Example 2)
A register value: 00011000B
C register value: 00011000B
A register value (after “XOR” operation): 00000000B (zero flag = 1)
Example 4)
A register value: 00000001B
C register value: 00000001B
A register value (after “XOR” operation): 00000000B (zero flag = 1)

When the zero flag is “1”, the determination is “No” and the process proceeds to step S92. When the zero flag is not “1”, the determination is “Yes” and the process proceeds to step S91. As described above, in step S90,
a) At the start of 1BB game b) After the RB operation is finished, if the end condition of 1BB game is not satisfied, it is judged as “Yes”.
In the next step S91, the number of games and the number of winnings at the time of RB operation are stored. This process corresponds to a process of saving (storing) "2" in the game number counter "_CT_BONUS_PLAY" at the time of RB operation and saving (storing) "2" in the prize number counter "_CT_BONUS_WIN" at the time of RB operation. . Then, the process proceeds to step S92.

  In the next step S92, based on the symbol flag data acquired in step S82, it is determined whether or not a combination of symbols for replay is displayed (whether the replay has won a prize). When it is determined that the replay symbol combination is displayed, the process proceeds to step S93. When it is determined that the replay pattern combination is not displayed, the process proceeds to step S95.

In step S93, the main control board 60 reads a bet medal (FIG. 35). This process is a process of reading the number of medals bet in the previous game. In step S94, automatic bet number data is set. This process is a process of updating the data of “_NB_REP_MEDAL” that stores the automatic bet number (stores “3”).
Next, the process proceeds to step S95, and the output request for the operation state is set. In the next step S96, the control command set 1 is executed. Specifically, information indicating that the replay is activated or 1BB is activated is transmitted to the sub-control board 80. Although not shown in the figure, information regarding the set value of the current game, information regarding the RT state of the current game, and the like are also transmitted. Then, the process proceeds to step S97, and the process proceeds to a medal acceptance start process (MS_MEDAL_START) (FIG. 34).

FIG. 34 is a flowchart showing the medal acceptance start (MS_MEDAL_START) in step S97 of FIG.
First, in step S131, the data of the number of betdal is cleared. That is, it is a process of clearing the bet number in the previous game, and specifically, a process of setting the value of the medal bet number data (_NB_PLAY_MEDAL) to “0”.
Next, it progresses to step S132 and the process which extinguishes insertion display LED (73e-73g) is performed. Specifically, a process of setting the D5 to D7 bits of the input number display LED signal data (_PT_MEDAL_LED) to “0” is performed.
In the next step S133, the medal management flag is initialized. Specifically, processing is performed to set the D0, D2 to D4, D6, and D7 bits of the medal management flag (_FL_MEDAL_STS) to “0”.

  In the next step S134, the main control board 60 checks the operating state flag. Here, the operation state flag is checked in order to determine whether or not the replay operation is being performed in the next step S135. In the present embodiment, in step S134, the value of the D0 bit (replay) of the operation state flag (_FL_ACTION) is read.

Next, the process proceeds to step S135, and based on the reading in step S134, it is determined whether or not it is during replay operation, that is, whether or not the D0 bit is “1”. When the D0 bit is “1”, that is, when it is determined that the replay operation is being performed, the process proceeds to step S136, and when it is determined that the replay operation is not being performed, the process proceeds to step S148.
If it is determined that the replay operation is not being performed and the process proceeds to step S148, a process of turning on the blocker 45 (MS_BLOCKER_ON; FIG. 37) is executed, and the process of this flowchart is terminated. That is, when the replay is not operated, the medal maintenance is uniformly permitted.
Therefore, in the medal acceptance start process of this flowchart, the processes after step S136 correspond to the medal automatic bet process during the replay operation.

In step S136, a standby time during replay operation is set. In this embodiment, in order to set about 500 ms as the wait time, a count value “237” (237 × 2.235 ms = about 529.7 ms) of the number of interrupts is set. For this reason, “00000000B” is set as the B register value, and “11101101B” is set as the C register value. In step S138, a 2-byte time waiting process is executed. This process is a process of subtracting the BC register value for each interrupt and waiting until it becomes “0”. This standby process is provided to prevent the replay display LED 73a from being turned on immediately after the game ends (step S141) or automatically bet immediately after the game ends (step S144). Because this is not preferred). Thereby, the timing of automatic betting can be made appropriate.
Further, for example, at the time of replay winning, it is possible to provide the player with a replay winning effect (including sound effects at the time of replay winning) using a 2-byte waiting time process (2-byte waiting time process). During the game, the progress of the game is stopped, so the production cannot be canceled.)

Further, the betting sound at the time of automatic betting is output based on the commands stored in steps S142 and S143.
It should be noted that the wait time can be varied depending on the type of replay won. For example, when the special replay 1 is won (that is, when ART is started), a wait time of 1 second or more may be set.

  In step S138, the number of stored sheets is read (S_CREDIT_READ; FIG. 36). In the next step S139, it is determined whether or not the stored number is the limit number (in this embodiment, 50). When it is determined that the number is the limit number, the process proceeds to step S141. When it is determined that the number is not the limit number, the process proceeds to step S140. In this process, the stored number display data (_NB_CREDIT_LED) is read and the stored number is checked.

In step S140, control is performed so that the blocker is turned on (MS_BLOCKER_ON; FIG. 37), that is, acceptance of medals is permitted. Then, the process proceeds to step S141.
As described above, first, when it is not during the replay operation, the blocker 45 is always turned on to accept the medal. This is because when the replay operation is not in progress, even if the number of stored games was the upper limit (50) in the previous game, the bet medals (3 in the normal game) are consumed, and that amount can be bet. .

Second, at the time of the replay operation, if the number of stored medals is not the limit number, the blocker 45 is turned on to accept the medal. This is because when the number of stored medals is not the limit number, at least the number of stored medals can be added by caring for medals.
Thirdly, at the time of the replay operation, if the number of stored medals is the limit number, the blocker 45 is not turned on (the blocker 45 is kept off until then). This is because when the replay operation is performed and the number of stored medals is the upper limit number, medals cannot be betted and the number of stored medals cannot be added, so that no medals are accepted.

In step S141, the replay display LED is turned on. In step S141, a process of turning on ("1") the D3 bit of the medal management flag (_FL_MEDAL_STS) is executed.
Note that the process of actually turning on the replay display LED 73a is performed by the LED display control in step S606 in an interrupt process (FIG. 59) described later.
Thus, since the replay display LED 73a is turned on after the 2-byte time waiting process is executed in step S137, the replay display LED 73a is not turned on at the moment when the replay is displayed, but after the replay is displayed. It will light up after about 0.5 seconds.

Then, in the next step S142, an output request set process for transmitting a command indicating that an automatic bet has been made is performed on the sub-control board 80, and a control command set 1 process is executed in the next step S143. .
In the next step S144, a process for adding one medal (in this case, means an automatic bet process), that is, an automatic bet (addition) of medals one by one in order to place an automatic bet based on a replay winning. Process. Details of the medal addition process will be described later (MS_MEDAL_INC; FIG. 38).

Next, proceeding to step S145, a standby time for automatic betting based on replay is set. In this embodiment, in order to set about 100 ms as the wait time, the count value “46” (46 × 2.235 ms = about 103 ms) of the number of interrupts is set. For this reason, “00000000B” is set as the B register value, and “00101110B” is set as the C register value. In step S146, a 2-byte time waiting process is executed. This process is a process of subtracting the BC register value for each interrupt and waiting until it becomes “0”. When the 2-byte time waiting process in step S146 is completed, the process proceeds to step S147, where it is determined whether or not the medal limit number (3 sheets) has been reached, and if it is determined that the medal limit number has been reached, the process according to this flowchart ends. To do.
On the other hand, if it is determined that the medal limit number has not been reached, the process returns to step S144, and one medal addition (automatic betting) process is executed again.

  As described above, in the automatic bet at the time of replay winning, the two-byte time waiting process of steps S145 and S146 is executed in accordance with the automatic betting of medals one by one. This is executed every time about 100 ms elapses. As a result, the inserted number display LED signal data (_PT_MEDAL_LED) is also updated every time about 100 ms elapses. Therefore, it is possible to show the player that the turn-on display LEDs 73e to 73g are turned on sequentially (approximately every 100 ms). Further, on the sub-control board 80 side, when an automatic bet sound (sound such as “pull”) is output from the speaker 22, the lighting change of the input display LEDs 73e to 73g can be synchronized with the automatic bet sound.

  Furthermore, in the example of FIG. 34, it is determined whether or not the storage limit number is reached in step S139. If the number is not the storage limit number, the blocker 45 is turned on in order to allow the medal to be maintained (step). Although S140) is executed, for example, when a replay is won, it is possible to set the medal care insertion impossible. In the case of such control, when it is determined in step S135 that the replay operation is being performed, the processing in steps S139 and S140 may be eliminated.

FIG. 35 is a flowchart showing medal reading processing (S_PLAYM_READ) (step S53 in FIG. 32, etc.). First, in step S151, the main control board 60 reads medal bet (insertion) number data. This process is a process of reading the value of medal bet (insertion) number data (_NB_PLAY_MEDAL) stored in the RWM 61 and storing the read value in a predetermined register (A register).
Next, in step S152, the main control board 60 checks the number of medals read in step S151. Specifically, when the value of the A register is “0”, the zero flag is set to “1”. And the process by this flowchart is complete | finished.

  FIG. 36 is a flowchart showing the stored number reading process (S_CREDIT_READ) in step S138 and the like in FIG. First, in step S155, the main control board 60 reads data on the number of stored sheets. This process is a process of storing the value of the stored number display data (_NB_CREDIT_LED) stored in the RWM 61 in a predetermined register (for example, A register). In step S156, the value read in step S155 is zero-checked. Specifically, when the value of the A register is “0”, the zero flag is set to “1”. Then, the process according to this flowchart is terminated.

FIG. 37 is a flowchart showing the blocker-on process (MS_BLOCKER_ON) in step S140 of FIG.
First, in step S161, the main control board 60 checks the passage of the blocker monitoring time. The blocker monitoring time is set in advance to a predetermined value (46 interrupts: about 102 ms), and starts counting when the passage sensor 43a is turned on (when a medal is detected). Next, the process proceeds to step S162, and it is determined whether or not a predetermined time by the timer has elapsed. When it is determined that the time has elapsed, the process proceeds to step S163, and when it is determined that the time has not elapsed, the process returns to step S161.
The reason for controlling in this way is to prevent the medal from being caught by the blocker 45. Specifically, if approximately 102 ms has elapsed since the medal was detected by the passage sensor 43a, it can be determined that the medal detected by the passage sensor 43a has already passed the blocker 45. In other words, if the blocker 45 is driven within about 102 ms after the passage sensor 43a is turned on, the blocker 45 may pinch a medal detected by the passage sensor 43a. The blocker monitoring time is the time stored in a predetermined RWM address, and the game can proceed even after setting a predetermined value (different from the 2-byte time waiting process).

  In step S163, the main control board 60 prohibits interruption from this point. As described above, during the execution of the main process (M_MAIN), one timer interrupt process is entered every 2.235 ms. After the execution of the “interrupt disabled” process in step S163, the interrupt disabled is canceled. Controls not to allow interrupts until

In the next step S164, the main control board 60 performs processing for turning on the blocker signal. This process is a process of storing data in the RWM 61 for setting the D6 bit signal of the output port 3 to “1”. Specifically, in the “blocker signal and hopper motor drive signal data (_PT_BLK_HPM)”, the D6 bit (blocker signal) is set to “1”.
In this embodiment, information is output from the output port by interrupt processing (step S611 in FIG. 59). That is, instead of turning on the D6 bit of the output port 3 at the timing of step S164, the data is stored in the “blocker signal and hopper motor drive signal data (_PT_BLK_HPM)” of the RWM 61 in step S164 which is the main process. During the process of outputting the output port 3 in the interrupt process (step S611), the output is performed based on the data stored in the RWM 61.

  In the next step S165, the value of the input monitoring counter is cleared. Here, the insertion monitoring counter is a counter that is set to “+1” when the passage sensor 43a detects a medal and is set to “0” when the insertion sensors 44a and 44b detect a medal. In other words, the counter repeats “+1” and “0” in the normal state. This is because when the blocker 45 is turned on, that is, when the medal passage is formed by the blocker 45, the medal detects the passage sensor 43a.

  In the next step S166, the flag of the blocker signal state is turned on. Here, a process of turning on (“1”) the D2 bit of the above-described medal management flag (_FL_MEDAL_STS) is performed. Then, the process proceeds to step S167, where the interrupt inhibition set in step S163 is canceled, that is, the interrupt is permitted. And the process by this flowchart is complete | finished.

In the above, the reason for not generating an interrupt between the processes of steps S164 to S166 is as follows.
In the present embodiment, the blocker signal is turned on in step S164, and the blocker state signal is turned on in step S166. In this case, when an interrupt occurs between step S164 and step S166, one is turned on and the other is turned off. Specifically, due to an interrupt process that is entered midway, there is an inconsistency that ON is not output (not lit) to the input enable display LED 73b even though ON is output to the blocker 45. Become. In other words, in order to avoid such a state and to update both values at once, it is possible to control so as not to confuse the player by prohibiting interrupt processing. Note that the processing is executed in the order of steps S164, S165, and S166 in the present embodiment, but the order of these may not be the same as the processing order in the present embodiment. For example, the order of steps SS166, S165, and S164 may be used.

  In this embodiment, the blocker 45 is turned on after about 100 ms from the passage sensor 43a detecting a medal to form a medal passage. The reason for this setting is to prevent the blocker 45 from being turned on at the moment when the inserted medal (medal detected by the passage sensor 43a) reaches the blocker 45, and the medal is prevented from being caught by the blocker 45. Therefore, after the passage sensor 43a detects a medal, the blocker 45 is controlled not to be turned on until a predetermined time (a time during which the medal may be pinched) elapses.

FIG. 38 is a flowchart showing the process of adding one medal (MS_MEDAL_INC) in step S144 of FIG.
Note that the process of adding one medal in FIG. 38 is a process that is used in common during medal care betting, automatic betting based on the replay display, and storage betting based on the operation of the bet switch 40. Thus, even when the bet processing to be executed is different, the program capacity can be reduced by using the common processing (program).
First, in step S171, the main control board 60 reads a bet medal (S_PLAYM_READ). In the next step S172, a process of adding “1” to the read bet medal number (“+1”) is performed. Then, the calculation result is stored in the C register. For example, if the number of bet medals so far was “0”, by adding “1”,
C register value = 00000001B
It becomes.

In this process, the value of medal bet number data (_NB_PLAY_MEDAL) stored in the RWM 61 is read, the read bet medal number data is stored in a predetermined register (for example, A register), and the value of the A register is “1”. And the A register value after addition is stored (updated) in the medal bet number data.
For example, if the read bet medal number data (_NB_PLAY_MEDAL) is “0”
_NB_PLAY_MEDAL = 0
A register value = 00000000B
A register value = 00000001B (after adding “1”)
_NB_PLAY_MEDAL = 1
It becomes.

In the next step S175, the main control board 60 performs display clear processing for the acquisition number display LED 72. Although not shown in the present embodiment, the RWM 61 stores acquired number display data (_NB_PAY_LED). In step S175, the acquired number display data is cleared.
This processing is performed so that the value of the A register becomes “0” (for example, an exclusive OR of the A register value and the A register value), and the A register value after the operation is used as the acquired number display data. A process of storing (updating) is executed.
The process of actually displaying the acquired number display LED 72 is performed by the LED display control (step S606) in the interrupt process.

Next, proceeding to step S176, the main control board 60 generates lighting data for the input display LEDs 73e to 73g. Note that the process of actually turning on the input display LEDs 73e to 73g is performed in the LED display control (step S606) in the interrupt process described later, as described above.
First, “1” is added to the value of the A register. Since the A register value before addition is “0” by the process of step S175,
A register value (before addition): 00000000B
A register value (after addition): 00000001B
It becomes.
Next, the A register value is shifted to the right by one digit. This shift process is not only a right shift but also a cyclic shift instruction that sets the value of the D0 bit to D7, and is also called a rotate shift. This process
A register value (before shift): 00000001B
A register value (after shift): 10000000B
It becomes.

In the next step S177, the main control board 60 determines whether or not generation of lighting data for the number of inserted sheets has been completed. Specifically, it is as follows.
First, “1” is subtracted from the C register value. Since the C register value is “1” as described above,
C register value (before operation): 00000001B
C register value (after operation): 00000000B
It becomes.
Then, when the C register value is not “0”, “No” is set in step S177, and when it is “0”, “Yes” is set.

If it is determined in step S177 that the number of inserted sheets has not been completed, the process returns to step S176, and generation of lighting data is continued. On the other hand, when it is determined that the number of inserted sheets has been completed, the process proceeds to step S178, and the main control board 60 performs control to store lighting data of the inserted sheet number display LED in the RWM 61.
The actual lighting control using the inserted number display LED signal data is performed by an interrupt process described later.
Specifically, the process of step S178 is as follows.
First, the A register value is stored in the insertion number display LED signal data (_PT_MEDAL_LED). Therefore,
Input display LED signal data: 10000000B
It becomes.

In addition, when one medal has already been inserted, it is as follows.
In step S172,
C register value = 00000010B
It becomes.
In step S176,
A register value (before addition): 00000000B
A register value (after addition): 00000001B
It becomes.
further,
A register value (before shift): 00000001B
A register value (after shift): 10000000B
It becomes.

In the next step S177,
C register value (before operation): 00000010B
C register value (after operation): 00000001B
It becomes.
Therefore, since the C register value ≠ “0”, the process returns to step S176.
In step S176,
A register value (before addition): 10000000B
A register value (after addition): 10000001B
It becomes.
further,
A register value (before shift): 10000001B
A register value (after shift): 11000000B
It becomes.

Next, the process proceeds to step S177.
C register value (before operation): 00000001B
C register value (after operation): 00000000B
It becomes.
Since the C register value = “0”, “Yes” is determined in the step S177, and the process proceeds to the step S178.
Thereby, in step S178,
Insertion number display LED signal data: 11000000B
It becomes.
In this way, by using the registers (C register, A register) and the shift process, the input number display LED signal data can be stored in the corresponding data with a small program process (simple program).

After step S178, the process proceeds to step S179, and the main control board 60 sets the medal limit number (MS_MMAX_SET; FIG. 39).
The medal limit number means the maximum number of medals that can be bet in the game (or the number of medals that must be bet in the game). Specifically, in the present embodiment, since the maximum number of medals that can be bet differs depending on the gaming state, this means the maximum number of medals that can be bet on the gaming state. In particular, in this embodiment, a maximum of 3 medals can be bet in a normal game, and a maximum of 2 medals can be bet in a 1BB game. Therefore, the medal limit number excluding 1BB game is 3, and the medal limit number in 1BB game is 2.

Next, proceeding to step S180, the main control board 60 performs a betting medal reading process (S_PLAYM_READ) (same as step S171).
In the next step S181, the main control board 60 determines whether or not the bet number is a limit number. Specifically, by subtracting the bet number (value of the C register) from the medal limit number (value of the A register), if “0”, it is determined that the bet number is the limit number. When it is determined that the bet number is not the limit number, the process according to this flowchart is terminated, and when it is determined that the bet number is the limit number, the process proceeds to step S182. In step S182, a medal limit flag is set. Here, a process of setting the D7 bit of the medal management flag (_FL_MEDAL_STS) to “1” is executed. And the process by this flowchart is complete | finished.

FIG. 39 is a flowchart showing the medal limit number setting process (MS_MMAX_SET) in step S179 of FIG. In step S201, the limit number for automatic betting is set. Note that the automatic bet is that medals are automatically inserted when a replay is won. In the present embodiment, this corresponds to the process of storing the value of “_NB_REP_MEDAL” in the C register. For example, if the value of “_NB_REP_MEDAL” is “3”, the C register value = “3”.
In the next step S202, the value of the operation state flag (_FL_ACTION) is read.

In the next step S203, the main control board 60 determines whether or not the D0 bit of the operation state flag read in step S202 is “1” (whether or not it is during replay operation). Here, for example, when the D0 bit of the data read in step S202 is “1”, it is determined that the replay is operating, and when it is “0”, it is determined that the replay is not operating. When it is during the replay operation, the process according to this flowchart is terminated, and when it is not during the replay operation, the process proceeds to step S204. That is, at the time of the replay operation, the C register value “3” becomes the automatic bet number.
On the other hand, when the process proceeds to step S204, “2” is stored in the C register as the limit number of medals.

  Next, proceeding to step S205, the main control board 60 determines whether or not the game is a game with a limit of 2 medals. As described above, for example, when the game is a normal game, it is determined that the medal limit number is not two, and when the game is 1BB, it is determined that the medal limit number is two. For example, when the D3 bit of the data read in step S202 is “0”, it is determined that the game is not for two medals limit number (1BB game), and when it is “1”, the game is for two medals limit number. A method of determining that it is time (during 1BB game) is given.

  When the medal limit number is 2, the process according to this flowchart is terminated. Thereby, the medal limit number is set to “2”. On the other hand, when it is determined that the medal limit number is not two, the process proceeds to step S206, and "1" is added to the C register value. As a result, the C register value becomes “3”, and this “3” is set as the medal limit number. Then, the processing based on this full is terminated.

FIG. 40 is a flowchart showing the medal insertion wait (MS_STANDBY_DSP) in step S55 of FIG.
First, in step S411, the main control board 60 determines whether or not the signal of the setting key switch 52 is on. Here, it is determined whether or not the rising data of the setting key switch 52 is ON (“1”) in the rising data of the input port 1. When it is on, the process proceeds to step S412, and when it is determined that it is not on, the process proceeds to step S421. That is, when the setting key switch 52 is turned on in the medal insertion waiting state (when a setting key is inserted from the setting key insertion slot), the setting confirmation mode is entered, and the processing of steps S412 to S420 is executed. The setting confirmation mode is a mode in which the current setting value is confirmed (confirmed visually by the administrator), and the setting value cannot be changed.

  In the present embodiment, the determination in step S411 is performed based on the rising data of the setting key switch 52. Thus, for example, when the setting key switch 52 is turned on during a game, the rising data is off (the setting key switch 52 is on) even if the determination in step S411 is performed, and therefore the setting confirmation mode is not entered. The setting value cannot be confirmed illegally. Of course, if these are not taken into consideration, the determination in step S411 or step S416 described later may be performed by turning the setting key switch 52 on and off.

In step S412, the blocker 45 is turned off (MS_BLOCKER_OFF; FIG. 44). Thereby, even if a medal is inserted from the medal insertion slot 43, it is returned from the payout slot.
In the next step S413, the main control board 60 sets an output request at the start of setting value display. In the next step S414, control command data to be transmitted to the sub control board 80 at the start of setting value display is set.

  Next, proceeding to step S415, the main control board 60 performs a process of lighting the set value display LED 64. Thereby, the set value display LED 64 can be turned on, and the current set value can be displayed. The process of actually turning on / off the set value display LED 64 is performed by the LED display control (step S606) in the interrupt process.

  Next, the process proceeds to step S416, and it is continuously determined whether or not the signal of the setting key switch 52 has been turned off. In this process, contrary to step S411, it is determined whether or not the falling data of the D3 bit of the input port 1 has become “1”. When it is determined that the signal of the setting key switch 52 has been turned off, the process proceeds to step S417, and the main control board 60 executes processing for turning off the setting value display LED 64.

Next, proceeding to step S418, the main control board 60 sets an output request at the end of setting value display. Then, in the next step S419, control command data at the end of setting value display, which is transmitted to the sub control board 80, is set.
In the next step S420, the main control board 60 performs processing for turning on the blocker (MS_BLOCKER_ON; FIG. 37). Next, proceeding to step S421, the main control board 60 determines whether or not the game standby display time has passed the “26846” interrupt (about 60 seconds) set in step S81 (FIG. 33).

When it is determined that the game standby display time has elapsed, the process proceeds to step S422, and a process of clearing the display of the acquired number display LED 72 is executed. This process is the same as the process in step S175 of FIG. And the process by this flowchart is complete | finished. On the other hand, when it is determined in step S421 that the game standby display time has not elapsed, the processing according to this flowchart is terminated.
That is, in this embodiment, when the game is not performed for a predetermined time, the display of the acquisition number display LED 72 is cleared, but the replay display LED 73a, the storage number display LED 71, and the input display LEDs 73e to 73g are not cleared. It is composed. As a result, the number of bets that can be bet, that a player can play again, or that can be reimbursed continues to be displayed, so when a player tries to leave the seat, It is possible to prevent the player from feeling that the player has finished the game. Thereby, it can reduce that a player suffers a disadvantage.

  In addition, the fact that the number of acquired numbers (for example, 8) has been acquired is continuously displayed by the display of the acquired number of sheets when the player finishes the game (leaves the seat by performing a checkout process). , Because it is confused with other players and people involved in the hall that the player has not finished playing (even if the player is still trying to play) Yes.

33. At step S81 in FIG. 33 and step S421 and step S422 in FIG. 40, a timer of about 60 seconds is set at the start of the game. Do (set to “00”).
As a result, for example, during the rotation of the reels 31 or when the winning combination is not won when the reels 31 are stopped (regardless of whether or not the winning combination is won), “00” is displayed on the acquired number display LED 72. State. For example, when the bell 01 wins when all the reels 31 are stopped (during a normal game), the display of the acquisition number display LED 72 changes from “00” to “08”.

In addition, in the addition of one medal (MS_MEDAL_INC) in FIG. 38, the display of the acquired number is cleared in step S175. Display of the acquired number of times is cleared.
Since the above control is an example, for example, nothing may be displayed on the acquired number display LED 72 during rotation of the reels 31, when a winning combination is not made when all the reels 31 are stopped, and when a medal is inserted. Good.

FIG. 41 is a flowchart showing the medal management process (MS_MEDAL_CHK) in step S56 of FIG.
In FIG. 41, in step S211, the main control board 60 detects whether or not the blocker signal is on. When the blocker signal is on, the process proceeds to step S212, and when the blocker signal is not on, the process proceeds to step S213. Here, “the blocker signal is ON” corresponds to a case where a medal passage is formed by the blocker 45. In this embodiment, it is detected whether or not the D2-bit data of the medal management flag (_FL_MEDAL_STS) is on.

  In step S212, the main control board 60 detects whether or not the data relating to the making sensor signal is ON. Here, it is determined whether either the D1 or D2 bit of the level data of the input port 2 is “1”. When it is determined that the data related to the insertion sensor signal is ON, this means that the medal has been inserted, so the process proceeds to step S222 (MS_INSERT_CHK: FIG. 42), and a check process for medal maintenance is executed. On the other hand, when it is determined that it is not ON, the process proceeds to step S213.

In step S213, a request for checking whether or not it is possible to accept the betting operation and the settlement operation of the 1-bet switch 40a and the 3-bet switch 40b is set. Then, in the next step S214, it is checked whether or not these operations can be accepted.
Next, proceeding to step S215, the main control board 60 determines whether or not operation acceptance is possible. When it is determined that it is possible, the process proceeds to step S216. When it is determined that it is not possible, the process according to this flowchart is terminated and the process returns to the main process.

It is possible to determine whether or not the operation of the 1-bet switch 40a, the 3-bet switch 40b, and the settlement switch 43 can be accepted before performing the betting process or the settlement process by the processes in the above steps S213 to S215. Only when the current state is in the correct state, the process proceeds to the betting process or the settlement process. For example, the level data and rising data of input port 0 are read by the processing of steps S213 to S215, and it is determined that the operation cannot be accepted when the level data and rising data of input port 0 do not match. .
In step S216, confirmation requests for the bet switch signal and the settlement switch signal are set. Here, the rising data of input port 0 is read.

In the next step S217, based on the confirmation in step S216, it is determined whether any one of the signals of the 1-bet switch 40a, the 3-bet switch 40b, or the settlement switch 43 has risen. In this determination, it is determined whether or not the D0, D1, and D2 bits are “1” in the rising data of the input port 0 read in step S213.
Specifically, for example, the read rising data of the input port 0 and “00000111B” (definition data) are ANDed to clear the D3 to D7 bits. Then, it is determined whether or not the calculation result is “0”.
When the calculation result is “0”, it is determined that there is no rising of any signal (that is, it is determined that none of the 1-bet switch 40a, the 3-bet switch 40b, and the settlement switch 46 has changed operation), The process according to this flowchart is terminated and the process returns to the main process.

  When it is determined in step S217 that the calculation result is not “0”, that is, when it is determined that there is a rise of any signal, the process proceeds to step S218. In step S218, the acceptance permission flag of the start switch 41 is cleared. This process is a process for setting the D0 bit of the above-described medal management flag to “0”. When the D0 bit of the medal management flag is “0”, the game start LED 73d is turned off to indicate that the start switch 41 is not valid (invalid even if operated). On the other hand, when the D0 bit of the medal management flag is “1”, the game start LED 73d is lit to indicate that the start switch 41 is valid. Note that the actual output of turning on / off the game start LED 73d is executed by an interrupt process (step S606 in FIG. 59).

Therefore, when one of the signals of the 1-bet switch 40a, the 3-bet switch 40b, or the settlement switch 43 is changed, the medal management flag data is used to notify that the start switch 41 is not permitted to be accepted. Is updated, a process based on the operation of the 1-bet switch 40a, the 3-bet switch 40b or the settlement switch 43 (the settlement process (MS_MEDAL_RET) or the stored bet process (MS_BET_IN) in FIG. 41) is executed.
The process based on the start switch 41 (for example, the role lottery process) is performed in the main process, and the settlement process and the stored bet process are also performed in the main process. Therefore, for example, the process based on the start switch 41 during the settlement process Is configured not to run.

Next, proceeding to step S219, the main control board 60 sets a data confirmation request related to the settlement switch 46 signal. This process is a process for confirming whether the D0 bit of the rising data of the input port 0 is “0” or “1”, for example.
Then, in the next step S220, the main control board 60 determines whether there is a rise of the settlement switch 46 signal based on the confirmation in step S219. In this process, when the D0 bit is “0” in the rising data of the input port 0, it is determined that there is no rising of the adjustment switch 43 signal, and when the D0 bit is “1”, the adjustment switch 43 Judge that there is a rising edge of the signal.

  When it is determined that the adjustment switch 46 signal rises, the process proceeds to step S221, and the adjustment process (MS_MEDAL_RET: FIG. 48) is executed. On the other hand, when it is determined that there is no rising of the settlement switch signal, it means that there is a rising of the bet switch signal, so that the process proceeds to step S223, and the storage bet process (MS_BET_IN: FIG. 46) is executed.

In the above-described medal management process, it is determined in step S212 whether or not the data relating to the insertion sensor signal is on. Alternatively, it is determined whether or not the data related to the settlement switch 46 signal is on.
Therefore, since the physical medal insertion is preferentially checked over the bet switch 40 and the settlement switch 43, the swallowing of medals can be prevented.

  Here, “the physical medal insertion is preferentially checked over the bet switch 40 and the settlement switch 46” is when the steps S53 to S58 in FIG. In the ON state, the data of the RWM 61 related to each input port is updated by the interrupt processing, and either the D1 or D2 bit level data of the input port 2 is “1” and the D0, D1 or D0 of the input port 0 A program in which the “care medal check (step S222)” is more easily executed than the “settlement process (step S221)” or the “reserved bet process (step S223)” when any of the rising data of the D2 bit is “1”. Refers to order or program processing.

In step S220, the rising data of the settlement switch 43 is confirmed, and execution of the subsequent process (settlement process or bet process) is determined.
One reason for this is that in the present embodiment, two switches, a 1-bet switch 40a and a 3-bet switch 40b, are provided as switches for executing the stored bet process, whereas switches for executing the settlement process are provided. Only one of the settlement switches 46 is provided. Therefore, it is possible to determine the settlement process or the stored bet process only by determining whether or not the rising data of the D0 bit (specific bit) of the input port 0 is ON. In other words, the processing is simplified and the program capacity is reduced rather than determining that “D1 bit or D2 bit is on?”.

42 and 43 are flowcharts showing the check process (MS_INSERT_CHK) at the time of medals maintenance in step S222 of FIG. FIG. 43 is a flowchart following FIG.
42, in step S231, the main control board 60 clears the acceptance permission flag (D0 bit of the medal management flag) of the start switch 41.
Next, proceeding to step S232, the main control board 60 determines whether or not the data relating to the closing sensor 1 (44a) signal is ON.

  When the data related to the input sensor 1 signal is on, the process proceeds to step S233, and when the data is not on (when the data related to the input sensor 2 signal is on), the process proceeds to step S238. In step S233, the passage check time of the closing sensor 1 (the number of interruptions is 64, about 143 ms) is set. Here, when a medal is detected by the insertion sensor 1, the data related to the insertion sensor 1 signal is turned on. However, when the data related to the insertion sensor 1 signal is not turned off after a predetermined time has elapsed, the medal Since clogging or the like is considered, the passage check time of the closing sensor 1 is measured.

  Next, the process proceeds to step S234, and the main control board 60 determines whether or not the data relating to the input sensors 1 and 2 is OFF in the same manner as in step S232. When it is determined that the data related to the input sensors 1 and 2 is OFF, the processing according to this flowchart is terminated.

  Here, after the data related to the insertion sensor 1 signal is turned on in step S232, it is rare that the data related to the insertion sensor 1 signal is determined to be off in step S234. Data relating to the insertion sensor 1 signal may be temporarily turned on due to, for example, a medal rampage, and the on-state may be detected in step S232. Even if data related to the insertion sensor 1 signal is temporarily turned on due to noise or a medal in the medal selector 45, the process of step S234 prevents the process from proceeding to step S235 and subsequent steps. That is, even if such a phenomenon occurs, it is determined that there is an error, and error notification is not performed, so that the game can proceed smoothly.

  If it is determined in step S234 that the data related to the input sensors 1 and 2 is not OFF, the process proceeds to step S235. In step S235, it is determined whether data relating to the input sensors 1 and 2 is ON. When it is determined that the data relating to the input sensors 1 and 2 is on, the process proceeds to step S240, and when it is determined that the data is not on, the process proceeds to step S236.

In step S236, the main control board 60 determines whether or not the data related to the closing sensor 1 signal is ON. When it is determined that it is on, the process proceeds to step S237, and when it is determined that it is not on, the process proceeds to step S238.
In step S237, the main control board 60 determines whether or not the passage check time of the making sensor 1 has elapsed. That is, it is determined whether or not the time set in step S233 has passed a predetermined time. When it is determined that the passage check time has elapsed, the process proceeds to step S248, and when it is determined that the passage check time has not elapsed, the process returns to step S234.

  When it is determined in step S232 that the data related to the insertion sensor 1 signal is not on, or in step S236, it is determined that the data related to the insertion sensor 1 signal is not on and the process proceeds to step S238, the main control board 60 Set display request for illegal passing error. This illegal medal passing error is referred to as “CP error” in the present embodiment, and a control process for displaying “CP” on the acquired number display LED 72 is executed. Then, the process proceeds to step S239 to shift to an error display (MS_ERROR_DSP; FIG. 52).

  Further, in step S235, it is determined that the data related to the input sensors 1 and 2 is ON, and when the process proceeds to step S240, the main control board 60 sets the passage check time of the input sensor 2 (the number of interruptions is about 143 ms). set. Next, proceeding to step S241, the main control board 60 determines whether or not the data related to the closing sensor 2 signal is ON. When the data relating to the input sensor 2 signal is on, the process proceeds to step S245, and when it is not on, the process proceeds to step S242. In step S242, the main control board 60 determines whether or not the data relating to the input sensors 1 and 2 is ON. When it is on, the process proceeds to step S243, and when it is not on, the process proceeds to step S238.

  In step S243, the main control board 60 determines whether or not the passage check time of the making sensor 2 has elapsed. That is, it is determined whether or not the time set in step S240 has passed a predetermined time. When it is determined that the passage check time of the closing sensor 2 has elapsed, the process proceeds to step S248, and when it is determined that the passage check time has not elapsed, the process proceeds to step S244. In step S244, the main control board 60 determines whether or not the passage check time of the making sensor 1 has elapsed. When it is determined that the passage check time of the closing sensor 1 has elapsed, the process proceeds to step S248, and when it is determined that the passage check time has not elapsed, the process returns to step S241.

  In step S241, it is determined that the data related to the input sensor 2 signal is ON. When the process proceeds to step S245, the main control board 60 determines whether the data related to the input sensor 1 and 2 signals is OFF. When it is determined that the data related to the input sensors 1 and 2 is OFF, the process proceeds to step S249 in FIG. 43, and when it is determined that the data is not OFF, the process proceeds to step S246. In step S246, the main control board 60 determines whether or not the data related to the closing sensor 2 signal is ON.

  When it is determined that the data related to the input sensor 2 signal is not on, the process proceeds to step S238, and when it is determined that the data is on, the process proceeds to step S247. In step S247, the main control board 60 determines whether or not the passage check time of the making sensor 2 has elapsed. When it is determined that the passage check time of the closing sensor 2 has elapsed, the process proceeds to step S248, and when it is determined that the passage check time has not elapsed, the process returns to step S245.

  In step S248, a medal retention error display request is set. The medal retention error means that the data related to the insertion sensor 1 or 2 signal is turned on even after the passage check time has elapsed, and the medal is retained in the medal passage. It is. This medal retention error is referred to as a “CE error” in the present embodiment, and a control process for displaying “CE” on the acquired number display LED 72 is executed. Then, the process proceeds to step S239 to shift to error display.

  If it is determined in step S245 that the data related to the insertion sensors 1 and 2 is OFF and the process proceeds to step S249 in FIG. 43, the main control board 60 sets a display request for an abnormal medal insertion error. Here, the medal abnormal insertion error is an error indicating that there is a passage abnormality between the passage sensor 43a and the insertion sensors 1 and 2. The medal abnormal insertion error is referred to as “C1 error” in the present embodiment, and when this medal abnormal insertion error occurs, a control process of displaying “C1” on the acquired number display LED 72 is executed.

  In step S250, the main control board 60 subtracts “1” from the value of the input monitoring counter. Here, as described above, the insertion monitoring counter is a counter that is set to “+1” when the passage sensor 43a detects a medal, and is set to “0” when the insertion sensors 1 and 2 detect a medal. That is, when normal, “+1” and “0” are repeated.

  Next, proceeding to step S251, the main control board 60 determines whether or not the value of the input monitoring counter is in the range of “0” to “3”. When it is determined that it is within the range, the process proceeds to step S252. When it is determined that it is not within the range, the process proceeds to step S239 in FIG.

For example, the value of the counter is “−1” when the input sensors 1 and 2 are passed without passing through the passage sensor 43a.
Further, the value of the counter is “+4” when the medal that has passed through the passage sensor 43 a is staying before passing through the insertion sensors 1 and 2.

In step S252, the medal limit number is set (MS_MMAX_SET: FIG. 39). In step S253, a bet medal (the number of medals currently bet) is read (S_PLAYM_READ: FIG. 35).
In the next step S254, the stored number is read (S_CREDIT_READ: FIG. 36).

Next, proceeding to step S255, the main control board 60 calculates the total number of medals and the number of reserved bets at the present time. In the next step S256, after enabling the insertion of medals, it is determined whether or not the subsequent insertion of medals is impossible. In this embodiment,
“Current bet number” + “Current stored number” −49 = “Medal limit number”
Is calculated whether or not
Here, the “current bet number” indicates the number of medals before adding the medals currently passed. For example, when the current bet number is “2” and the current storage number is “50”, the medal limit number is “3”, and this formula is satisfied. It is determined that subsequent medals cannot be inserted.

If it is determined that it cannot be inserted, the process proceeds to step S257 to execute processing for turning off the blocker 45 (MS_BLOCKER_OFF: FIG. 44). Then, the process proceeds to step S258. On the other hand, when it is determined that the input is possible, step S257 is skipped and the process proceeds to step S258.
When the blocker signal is on, a medal passage that passes through the insertion sensors 1 and 2 is formed. When the blocker signal is off, a medal passage that returns the medal inserted from the medal insertion port 43 from the payout port is formed. To do.

In the next step S258, the main control board 60 sets an output request for medal maintenance, and in the next step S259, the control command set 1 is executed.
In the next step S260, the main control board 60 determines whether or not the bet number of medals is a limit number (upper limit number) at the present time. When it is determined that the number of bets is a limit value, the process proceeds to step S262, and a storage (credit) number addition process (MS_CREDIT_ADD: FIG. 45) is executed. On the other hand, when it is determined that the bet number is not the limit number, the process proceeds to step S261, and bet addition processing for one medal is performed (MS_MEDAL_INC: FIG. 38).

  FIG. 44 is a flowchart showing a blocker off process (MS_BLOCKER_OFF). As described above, after the medal care becomes effective, when the medal care becomes impossible (cannot be accepted), the blocker 45 is turned off, and the medal maintained from the medal insertion slot 43 is discharged. Control to form a medal passage to be returned from.

  First, in step S271, the main control board 60 performs a blocker signal confirmation process. Here, the D6 bit of the blocker signal and hopper motor drive signal data (_PT_BLK_HPM) stored in the RWM 61 is confirmed.

  In step S272, the main control board 60 determines whether the blocker signal is off (the blocker signal data is “0”). When it is determined that it is not off, the process proceeds to step S273, and when it is determined that it is off, the process according to this flowchart is terminated. That is, when the blocker 45 is already turned off, the process according to this flowchart is terminated without proceeding with the process for turning off the blocker 45.

  When it is determined in step S272 that the blocker signal is not OFF and the process proceeds to step S273, the main control board 60 prohibits interruption from this point. As described above, during the execution of the main process (M_MAIN), one timer interrupt process is entered every 2.235 ms. If there is a description of “interrupt disabled” as in step S273, the interrupt is disabled. Control is made so that interrupts are not permitted until is released.

In the next step S274, the main control board 60 performs processing for turning off the blocker signal. This process is a process for setting the D6 bit of the output port 3 to “0”. Specifically, by setting the D6 bit to “0” in the blocker signal and the hopper motor drive signal data, the D6 bit of the output port 3 becomes “0” during the next interrupt processing. In the next step S275, a process for turning off the blocker signal state is performed. This processing is processing for setting the D2 bit of the medal management flag to “0”.
Then, the process proceeds to step S276, and the main control board 60 sets an abnormal input detection time of the making sensor 2.

Here, in this embodiment, after the blocker 45 is turned on (from medal passage) to off (medal return), even if the on signal of the insertion sensor 2 is detected before the predetermined time elapses, the insertion sensor 2 is abnormal. Although it is not determined as an input, when an on signal of the closing sensor 2 is detected after a predetermined time has elapsed, it is determined that the closing sensor 2 is in an abnormal input. Specifically, the medal may pass through the insertion sensors 44a (1) and 44b (2) immediately after the blocker 45 is physically turned off or in the middle of being turned off. This is to prevent detection as an error (considering normal passage). For this reason, the detection time (500.64 ms) of the input sensor abnormality input is set at the timing of step S276.
When the detection time of the input sensor abnormality input is set in step S276, the process proceeds to step S277, where the interrupt inhibition set in step S273 is canceled, that is, the interrupt is permitted. And the process by this flowchart is complete | finished.

In the above process, no interruption is generated between the processes of steps S274 to S276, as in the blocker-on process.
In other words, if an interrupt occurs between the process of turning off the blocker signal and the process of turning off the blocker status signal, one of them is turned off and the other is turned on. Interrupt processing is prohibited to update both values at once.

In addition, after the blocker signal is turned off in step S274 and the input sensor 2 abnormal input detection start time is set in step S276, the interrupt is permitted in step S277 for the following reason.
If the interrupt process is executed after the blocker signal is turned off in step S274 and before the process in step S276 is executed, the input port reading process is executed in step S607 in FIG. An error will be detected when it is detected. Therefore, interrupt processing is permitted in step S277 after execution of the processing in step S276.

FIG. 45 is a flowchart showing the addition of one stored sheet (MS_CREDIT_ADD) in step S262 of FIG.
In step S278, the stored number is read (S_CREDIT_READ; FIG. 36). Here, the stored number display data (_NB_CREDIT_LED) is read, and the value is stored in the A register.
In the next step S279, a process of adding “1” to the number of stored sheets (“+1”) is performed. This process is a process of adding “1” to the A register value. In the next step S280, the stored number data is saved, that is, the calculated A register value is stored in the stored number display data (_NB_CREDIT_LED). And the process by this flowchart is complete | finished. In step S280, a value obtained by converting the stored number data into decimal number data is stored as stored number display data.

FIG. 46 is a flowchart showing the stored bet process (MS_BET_IN) in step S223 of FIG.
First, in step S281, the main control board 60 determines whether the medal limit flag is on (“1”) by reading the D7 bit of the medal management flag. When the medal limit flag is on, it means that the number of bets is already the maximum number, so the betting process according to this flowchart is terminated. That is, even if the operation of the bet switch 40 is detected in step S220 in FIG. 41 and the process proceeds to the “MS_BET_IN” process, if the bet number is already the maximum number, the stored bet process is not performed.

If it is determined in step S281 that the medal limit flag is not on, the process proceeds to step S282, where “1” is set as the requested number of bets (insertion). In this process, “1” is stored in the B register. Therefore,
B register value = 1
It becomes.
In step S283, it is determined whether the D1 bit of the input port 0 has a rising edge (whether it is “1”), that is, whether the 1-bet switch 40a has been operated. When it is determined that the 1-bet switch 40a has been operated, the process proceeds to step S288, and when it is determined that the 1-bet switch 40a has not been operated, the process proceeds to step S284.
Since the operation of any of the bet switches 40 is detected in the processing before step S283 (steps S217 and S220 in FIG. 41), when “No” is determined in step S283, the 3-bet switch 40b. Means that has been operated.

In step S284, the medal limit number (for example, three in the normal game) is set (MS_MMAX_SET; FIG. 39). Here, the medal limit number is stored in the C register. For example, when it ’s a regular game,
C register value = 3
It becomes.
In the next step S285, a (bet) medal reading process is performed (S_PLAYM_READ; FIG. 35). This process is a process of reading the value of medal bet number data (_NB_PLAY_MEDAL) and storing the read bet medal number data in the A register, as described above. Further, the address “F06D” of the medal bet number data is stored in the HL register. This
HL register value = F06D (H)
It becomes.

  In step S286, the requested bet number is set. In this process, first, the C register value (medal limit number) is stored in the A register. For example, when the C register value is “3” as described above, the A register value = “3”. Further, the address data (medal bet number data) indicated by the HL register is subtracted from the A register value (indicating the medal limit number at this time), and the result is stored in the A register. For example, when the A register value (medal limit number) is “3” and the medal bet number data (number already bet) is “1”, the A register value is “3-1 = 2”. 2 ”. This value is the number of medals newly added as a bet.

In step S287, a requested bet number correction process is performed. That is, the value calculated in step S286 is set as the requested bet number. Specifically, a process of storing the A register value in the B register is executed.
In step S282 described above, the requested bet number is set to “1” (B register value = “1”) as an initial value, but remains unchanged when the 1-bet switch 40a is operated, Instead of “1” set in S282, the value calculated in step S286 is reset.

Next, the process proceeds to step S288, and the current number of stored sheets is read (S_CREDIT_READ; FIG. 36). This process is a process of reading the value of “_NB_CREDIT_LED” and storing the read data in the A register.
In the next step S289, the main control board 60 determines whether or not medals are stored. When the A register value stored in step S288 is “0”, it is determined that no medal is stored, and when the A register value is not “0”, it is determined that there is a medal storage.
When it is determined that no medal is stored, the process according to this flowchart is terminated, and when it is determined that a medal is stored, the process proceeds to step S290.

  In step S290, it is determined whether or not there is rising data of the 1-bet switch 40a signal (whether or not the D1 bit of the rising data of input port 0 is “1”). When it is determined that the rising data of the 1-bet switch 40a signal is included, the process proceeds to step S291. When it is determined that the rising data of the 1-bet switch 40a signal is not included, the process skips step S291 and proceeds to step S292.

  In step S291, the rising data of the 1-bet switch 40a signal is cleared. That is, a process of setting the D1 bit of the rising data of the input port 0 to “0” is executed. In this way, if there is a stored medal in step S289, the presence / absence of rising data of the 1-bet switch 40a signal is determined. If there is rising data, the bet processing is executed after clearing the data.

As described above, the rising data of the input ports 0 to 2 is generated and stored by the interrupt process.
On the other hand, when executing the bet process, a process of clearing the rising data relating to the 1-bet switch 40a generated and stored by the interrupt process in the main process is executed.
If the rising data related to the 1-bet switch 40a is not cleared, the rising data “1” related to the 1-bet switch 40a is maintained until the interrupt process is executed again.

In this case, before the next interrupt process is executed and the rising data related to the 1-bet switch 40a is updated to “0”, the medal management (MS_MEDAL_CHK) in FIG. The stored bet process (MS_BET_IN) is executed again, and one bet process is executed again based on the rise data of the 1-bet switch 40a signal being “1”. Therefore, for example, when the player operates the 1-bet switch 40a and tries to bet one medal, there is a possibility that two or three medals will be bet successively.
In order to avoid such an inconvenience, when there is a medal storage, the rising data related to the 1-bet switch 40a is cleared before the betting process is started.

In the present embodiment, only the rising data related to the 1-bet switch 40a is cleared, and when the 3-bet switch 40b is operated, the process of clearing the rising data related to the 3-bet switch 40b is not executed.
When three bets have been placed based on the operation of the 3-bet switch 40b, the medal limit flag is set in the addition of one medal in step S296 (step S182 in FIG. 38).
As a result, as described above, the rising data “1” of the 3-bet switch 40b signal is maintained until the next interrupt processing is executed, and “Yes” in step S217 from the medal management (MS_MEDAL_CHK) in FIG. Thus, when the stored bet process (MS_BET_IN) in FIG. 46 is executed again, “Yes” is set in step S281, and the stored bet process is not executed.

For example, when the bet number before the 3-bet switch 40b is operated is “0” and the stored number is “2”, the bet number is “2” based on the operation of the 3-bet switch 40b. . At this time, since the bet number is not yet the limit number, the medal limit flag does not become “1”.
In this state, if the rising data of the 3-bet switch 40b signal is not cleared and the stored bet process is executed again before the next interrupt process is executed, “No” is set in step S281. However, since “No” is determined in the step S289, the processes after the step S290 are not executed.
Therefore, it is not always necessary to clear the rising data related to the 3-bet switch 40b (at least the rising data related to the 1-bet switch 40a may be cleared).

  However, if the rising data relating to the 3-bet switch 40b is left as “1”, the rising data of the 3-bet switch 40b signal is “1” until the next interrupt process is executed. It is true that the storage bet process is executed (the process proceeds to the process of FIG. 46). Therefore, in order to avoid this, the rising data of the 3-bet switch 40b signal may be cleared. When clearing the rising data of the 3-bet switch 40b signal, the process of step S290 is replaced with “determination of whether or not the rising data of the 1-bet switch 40a signal is present” and the rising data of the 3-bet switch 40b signal. The clearing process can be performed. The clearing process of the rising data of the 3-bet switch 40b signal is a process of setting the D2 bit of the rising data (_PT_IN0_UP) of the input port 0 to “0”. As another method, a process of clearing one address of the RWM storing the rising data of the input port 0 may be adopted.

In step S292, it is determined whether or not the number of medals stored (the number read in step S288) is equal to or greater than the requested bet number (the number set in step S282 or step S287). Specifically, a process of subtracting the B register value (requested bet number) from the A register value (medal storage number) is executed to determine whether or not the value is “0” or more.
If it is determined that the number of stored medals is equal to or greater than the requested number of bets, the process proceeds to step S294. If it is determined that the number of stored medals is not equal to or greater than the requested number of bets, the process proceeds to step S293.

  In step S293, the medal storage number is set. This process is a process for setting the total number of stored sheets to the number of added bets. That is, when “No” is determined in step S292, the stored number is less than the bet number. In this case, processing is performed in which the total stored number is the added bet number. Specifically, it is a process of storing the A register value in the B register. Then, the process proceeds to step S294.

As described above, when “Yes” is determined in Step S283 (when the 1-bet switch 40a is operated), the requested bet number “1” set in Step S282 is set as the bet addition number, and the value is stored in the B register ( B register value = “00000001B”).
On the other hand, in step S287, for example, “3” is set as the requested bet number, and if “Yes” in step S292, the requested bet number “3” is set as the bet addition number, and the value is stored in the B register. (B register value = “00000011B”).
Further, although “3” is set as the requested bet number in step S287, when the stored number is “2”, “No” is set in step S292, and “2” is set as the bet added number in step S293. The value is stored in the B register (B register value = “00000010B”).
Thus, the bet addition number (requested number of bets) refers to the number actually bet based on the calculation result when the bet switch 40 is operated.

In step S294, an output request at the time of a storage bet is set. Specifically, “10 (H)” as control command data is stored in the D register, and the B register value is stored in the E register. Here, the D register value is a control command indicating that the stored bet is involved, and the E register value is a control command indicating the bet addition number.
In step S295, the control command set 1 is executed. This processing is processing for writing control command data (DE register value) in the control command buffer.
In the next step S296, one medal addition (bet) process is performed (MS_MEDAL_INC; FIG. 38). When this medal one-piece addition process is executed, a process of adding “1” to the value of the medal bet-number data “_NB_PLAY_MEDAL” is performed.

Next, the process proceeds to step S297, and a process of subtracting one from the stored number is performed (MS_CREDIT_DEC; FIG. 47). In the next step S298, the main control board 60 determines whether or not the requested number of bets has been completed. Here, “1” is subtracted from the B register value (requested number of bets), and it is determined whether or not the B register value after the subtraction is “0”. For example, when the B register value before the medal addition process is “00000011B” (3), the B register value is updated to “00000010B” (2) by the medal 1 addition process.
When it is determined that the B register value after the calculation is “0”, it is determined that the bet of the requested number has been completed, and when it is determined that the B register value after the calculation is not “0”, the requested number of bets is determined. Is determined not to end.
When it is determined that the requested number of bets has been completed, the process proceeds to step S302. When it is determined that the bet has not been completed, the process proceeds to step S299.

In step S299, the blocker 45 is turned off (MS_BLOCKER_OFF; FIG. 44). Next, the process proceeds to step S300, and the standby time for the storage bet is set. This process is a process for setting the waiting time in the BC register described above, and in the present embodiment, the number of interruptions “46” is stored. Therefore, the B register value = “00000000B” and the C register value = “00101110B”. In step S301, a 2-byte time wait process (R_2BYTE_WAIT; FIG. 28) (wait process) is executed. Then, after step S301 ends, the process returns to step S296.
In the above process, the blocker 45 is turned off in step S299 because a waiting process is provided when repeating the process of adding one medal. This is to avoid this.

As described above, when two or more bets are bet, the medal one-piece addition process (step S296) and the 2-byte time waiting process in step S301 are repeated.
As a result, when two or more pooled bet processes are executed, after one bet process, the next one bet process is executed with a wait time interval. Therefore, when three bets are bet on the basis of the three-bet switch 40b, it is possible to eliminate that three pieces are bet in an instant (the insertion display LEDs 73e to 73g are lit up in an instant).
In the present embodiment, the first bet process (1 sheet insertion display LED 73e is lit) → wait process of about 100 ms → the second bet process (2 sheet insertion display LED 73f is lit) → the wait process of about 100 ms → the third sheet. Bet processing (three-sheet insertion display LED 73g is lit).
The 2-byte waiting process may be executed not only when two or more bets are bet, but also when one bet. In this case, the process of step S299, S300, and S301 is provided between step S297 and S298.

When it is determined in step S298 that the requested number of bets has been completed and the process proceeds to step S302, the blocker is turned on (MS_BLOCKER_ON; FIG. 37). And the process by this flowchart is complete | finished.
As a result, the blocker 45 is turned on after the storage betting process is completed, so that medals can be maintained.

In the process of FIG. 46, after clearing the rising signal related to the 1-bet switch 40a, the medal 1-sheet addition process is repeated until the bet-added number becomes “0”. However, these processes may be reversed. .
Specifically, after the medal one-piece addition process is repeated until the bet addition number becomes “0”, the rising data clear process in step S291 may be executed before or after the blocker is turned on in step S302.
In this embodiment, before the next bet process (again, the process of FIG. 46) is executed, the rising data of the bet switch 40 (particularly, the 1 bet switch 40a) may be cleared.

FIG. 47 is a flowchart showing processing (MS_CREDIT_DEC) for subtracting one from the number of stored images in step S297 in FIG.
In step S305, the stored number is read (S_CREDIT_READ; FIG. 36). The processing here is processing for reading the stored number display data (_NB_CREDIT_LED) and storing the value in the A register.
In the next step S306, a process of subtracting “1” from the stored number (“−1”) is performed. This process is the reverse of step S279 in FIG. 45, and “1” is subtracted from the A register value. In the next step S307, the stored number data is saved, that is, the calculated A register value is stored in the stored number display data. And the process by this flowchart is complete | finished. In step S307, similarly to step S280, a value obtained by converting the stored number data into decimal number data is stored as stored number display data.

FIG. 48 is a flowchart showing the settlement process (MS_MEDAL_RET) in step S221 of FIG.
First, in step S311, the main control board 60 performs a stored number reading process (S_CREDIT_READ; FIG. 36). In the next step S312, the main control board 60 performs a (bet) medal reading process (S_PLAYM_READ; FIG. 35).

Next, proceeding to step S313, the main control board 60 checks the operation state flag (_FL_ACTION). Subsequently, in step S314, the main control board 60 determines whether or not the game is in a replay operation (whether or not the replay operation state flag is on).
If it is not during the replay operation in step S314, the process proceeds to step S316. If it is during the replay operation, the process proceeds to step S315.

In step S315, the bet number that can be settled is cleared. This process is a process of setting the bet number read in step S312 to “0” during the replay operation.
Note that, as shown in this flowchart, even when the automatic bet is obtained by the replay operation, the stored medals can be settled while the automatic bet is maintained.

In the next step S316, the main control board 60 determines whether there are medals that can be settled. In this process, the stored (credit) number read in step S311 and the bet number read in step S312 are "ORed" to determine whether there are any medals that can be settled. Note that both the stored number read in step S311 and the bet number read in step S312 (or the bet number processed in step S315) are both stored in the register as described above. Here, in the case of the replay operation, since the bet medal number that can be settled in step S315 is set to “0” (clear), “Yes” is set only when there is a reserve number.
If it is determined in step S316 that there are medals that can be settled, the process proceeds to step S317 and subsequent steps. If it is determined that there are no medals that can be settled, the process according to this flowchart ends.

In step S317, a process of turning off the blocker 45 (MS_BLOCKER_OFF; FIG. 44) is performed.
Next, proceeding to step S318, the main control board 60 sets an output request at the start of settlement, and executes control command set 1 in the next step S319.
The processing of the next step S320 and step S321 is the same as the processing of step S313 and step S314 described above.

In step S321, when it is determined that the replay operation is being performed, the process proceeds to step S324, and when it is determined that the replay operation is not being performed, the process proceeds to step S322.
In step S322, a bet medal (the number of medals currently bet) is read (S_PLAYM_READ) (same as step S312).

Next, proceeding to step S323, the main control board 60 determines whether or not there is a bet medal. If it is determined that there is a bet medal, the process proceeds to step S327 and subsequent steps. If it is determined that there is no bet medal, the process proceeds to step S324 and subsequent steps.
Here, when there is a bet medal, the betting medal settlement process is performed by performing the processing from step S327 onward. On the other hand, when there is no bet medal, the process of step S324 and subsequent steps is performed to perform the settlement process for the stored medal, that is, the credited medal.
Therefore, when there are both bets and stored medals, the bet medals are settled first.

When the process proceeds from step S323 to step S324, the main control board 60 performs a process of lighting the settlement display LED 73c. In the present embodiment, the settlement display LED 73c is turned on while the stored medal settlement process is being performed. This process is a process of turning on the D4 bit (“1” when the checkout process is being performed) in the medal management flag (_FL_MEDAL_STS) stored in the RWM 61.
Note that the process of actually turning on the adjustment display LED 73c is performed by the LED display control (step S606) in the interrupt process.

  In step S325, the stored medal settlement process (MS_CREDIT_RET; FIG. 49) is performed. After the settlement process, the process proceeds to step S326, and the settlement display LED 73c turned on in step S324 is turned off. This process is the reverse of step S324, and is a process for turning off ("0") the D4 bit ("1" when the settlement process is being performed) in the medal management flag. Then, the process proceeds to step S336.

  On the other hand, when it is determined in step S323 that there is a bet medal and the process proceeds to step S327, the main control board 60 performs a payout process for one medal (MS_1MEDAL_PAY; FIGS. 50 to 51).

Next, proceeding to step S328, the main control board 60 executes a process of turning off any one of the LEDs (input display LEDs 73e to 73g) that display the input number.
For example, when three medals are bet at the present time, all three of the insertion display LEDs 73e to 73g are in a lighting state. Then, when the process proceeds to step S328 in this state, control is performed so that only the three-sheet insertion display LED 73g is turned off (the lighting of the one-sheet insertion display LED 73e and the two-sheet insertion display LED 73f is maintained).

When the process proceeds to step S328 in a state where the one-sheet insertion display LED 73e and the two-sheet insertion display LED 73f are lit, only the two-sheet insertion display LED 73f is turned off (the lighting of the one-sheet insertion display LED 73e is maintained). To control.
Further, when the process proceeds to step S328 in a state where only the single-loading display LED 73e is lit, control is performed so that the single-loading display LED 73e is turned off (thus, the insertion display LEDs 73e to 73g are all turned off). To do.

In step S328, the stored number-of-inserts display LED signal data is updated. As described above, the number-of-insertion-display LED signal data (_PT_MEDAL_LED)
Insertion number display LED signal data (when one sheet is inserted): 10000000B
Insertion number display LED signal data (when 2 sheets are inserted): 11000000B
Insertion number display LED signal data (when 3 sheets are inserted): 11100000B
It has become.
Therefore, immediately before step S328, when the inserted number display LED signal data is “11100000B” when three sheets are inserted, the calculation is performed so that the inserted number display LED signal data when two sheets are inserted is “11000000B”. "
That is, by issuing an instruction to shift to the left, “11100000B” → “11000000B” (an instruction that is not a rotation type described above is used).

In the next step S329, a bet medal is read (S_PLAYM_READ; FIG. 35). In step S330, the medal number is subtracted. This process is a process of subtracting “1” from the medal bet number data (_NB_PLAY_MEDAL) stored in the RWM 61.
In the next step S331, an output request for displaying the number of medals is set. This process is a request to display the number of medals after subtracting one medal. In the next step S332, the main control board 60 executes the control command set 1.
Further, in the next step S333, a bet medal is read (S_PLAYM_READ; FIG. 35). In step S333, the number of medals after subtraction of one is read.

  Then, the process proceeds to step S334, and the main control board 60 determines whether or not there is a bet medal as in step S323. If it is determined that there is a bet medal, the process returns to step S327, and a payout process for one medal is performed in the same manner as described above. On the other hand, when it is determined that there is no bet medal, the process proceeds to step S335, and the main control board 60 performs processing for clearing the medal limit flag (D7 bit). Next, proceeding to step S336, the main control board 60 sets an output request at the end of payment. In the next step S337, the main control board 60 executes the control command set 1. Then, the process proceeds to step S338, and the process proceeds to a process of turning on the blocker 45 (MS_BLOCKER_ON; FIG. 37).

In the settlement process described above, in step S318 and step S319, control command data is set in order to transmit the start of settlement to the sub-control board 80.
In step S336 and step S337, control command data is set in order to transmit to the sub-control board 80 that the settlement has been completed.

FIG. 49 is a flowchart showing the stored medal settlement process (MS_CREDIT_RET) in step S325 of FIG.
In FIG. 49, first, in step S341, the main control board 60 performs a reading process (S_CREDIT_READ; FIG. 36) of the current number of stored sheets. Next, the process proceeds to step S342, and the main control board 60 determines whether or not there is a stored medal, that is, a credit, based on the result read in step S341. When it is determined that there is a stored medal (zero flag is “0”), the process proceeds to step S343, and when it is determined that there is no stored medal (zero flag is “1”), the processing according to this flowchart ends.

  In step S343, a payout process for one medal (MS_1MEDAL_PAY; FIGS. 50 to 51) is performed from the stored medals. In step S334, a process of subtracting one from the number of stored medals (MS_CREDIT_DEC; FIG. 47) is performed. Thereafter, the process returns to step S341. That is, in the stored medal settlement, processing is executed until the stored medal becomes “0”. At this time, it is designed so that it takes about 100 ms when one medal is normally paid out by the processing of FIGS. In other words, when one medal is paid out, the stored number display data is updated at an interval of about 100 ms, and an interrupt process is executed during this time, so that the display of the stored number display LED 71 is subtracted one by one. Is configured to be visible.

50 and 51 are flowcharts showing the payout process (MS_1MEDAL_PAY) for one medal in step S327 of FIG. FIG. 51 is a flowchart following FIG.
In step S351 in FIG. 50, the main control board 60 sets an error not detected. That is, a state in which no error is detected in the initial state is set. In the next step S352, the main control board 60 sets a medal jam error display request.
The medal jam error is referred to as “HP error” in the present embodiment. When this medal jam error occurs, a process of displaying “HP” on the acquired number display LED 72 is executed.

  In step S353, the main control board 60 determines whether an error has been detected. If it is determined that an error has been detected, the process proceeds to step S354 to display an error (MS_ERROR_DSP; FIG. 52). Then, the process proceeds to step S355. On the other hand, when it is determined in step S353 that no error has been detected, the process proceeds to step S355.

  In step S355, the main control board 60 sets the control time of the medal payout device 35 (for example, “2686” interrupt, about 6000 ms). Here, the control time is started. In step S356, a process for driving the hopper motor 36 is performed. Specifically, in the blocker signal and the hopper motor drive signal data, by setting the D7 bit indicating the hopper motor drive signal data to “1”, the D7 bit of the output port 3 becomes “1” at the next interrupt processing. . Next, proceeding to step S357, the main control board 60 reads the control time after setting in step S355.

In the next step S358, the main control board 60 determines whether or not the control time has passed a predetermined time. When it is determined that the predetermined time has elapsed, the process proceeds to step S361, and when it is determined that the predetermined time has not elapsed, the process proceeds to step S359.
In step S361, a process for turning off the drive signal of the hopper motor 36 is performed. Specifically, by setting the above-described hopper motor drive signal data to “0”, the D7 bit of the output port 3 becomes “0” during the next interrupt processing. In the next step S362, the detection time of the payout sensor 1 (for example, “27” interruption, about 60 ms) is set, and the measurement of the detection time is started. In step S363, the main control board 60 determines whether data relating to the payout sensor 1 signal is ON. When it is determined that it is on, the process proceeds to step S355, and when it is determined that it is not on, the process proceeds to step S364.

In step S364, the main control board 60 determines whether or not the detection time of the payout sensor 1 has passed a predetermined time. When it is determined that the predetermined time has passed, that is, when the data related to the payout sensor 1 signal is not ON and the detection time of the payout sensor 1 has passed the predetermined time, the medal has not been paid out. In step S365, the main control board 60 sets a medal empty error display request. The medal empty error is referred to as “HE error” in this embodiment, and when this medal empty error occurs, a process of displaying “HE” on the acquired number display LED 72 is executed. Then, the process proceeds to step S353.
On the other hand, when it is determined in step S364 that the detection time of the payout sensor 1 has not passed the predetermined time, the process returns to step S363.

  If it is determined in step S358 that the control time has not passed the predetermined time and the process proceeds to step S359, the main control board 60 determines whether or not the data related to the payout sensor 1 signal is ON. When it is determined that it is on, the process proceeds to step S360, and when it is determined that it is not on, the process returns to step S357.

In step S360, the detection time of the payout sensor 1 is set. This process is the same as step S362. Next, proceeding to step S366, the main control board 60 determines whether or not a medal jam has been detected. When it is determined that a clogged medal is detected, the process proceeds to step S352, and when it is determined that no medal is detected, the process proceeds to step S367.
In step S367, the main control board 60 determines whether the data related to the payout sensor 1 signal is ON. When it is determined that it is on, the process proceeds to step S368, and when it is determined that it is not on, the process proceeds to step S357.

In step S368, the main control board 60 determines whether or not the data related to the payout sensors 1 and 2 is ON. When it is determined that both are on, the process proceeds to step S369, and when it is determined that both are not on, the process returns to step S366.
In step S369, the main control board 60 sets the detection time of the payout sensor 2. Next, proceeding to step S370 of FIG. 51, the main control board 60 determines whether or not a medal jam has been detected. When it is determined that a clogged medal is detected, the process proceeds to step S352, and when it is determined that no medal is detected, the process proceeds to step S371.

In step S371, the main control board 60 determines whether or not the data related to the payout sensor 2 signal is OFF. When it is determined that the data related to the payout sensor 2 signal is not OFF, the process returns to step S370, and when it is determined that the data is OFF, the process proceeds to step S372.
In step S372, the main control board 60 determines whether or not the medal payout is invalid. If it is determined to be invalid, the process proceeds to step S357. If it is determined not to be invalid, the process proceeds to step S373. In step S373, the main control board 60 determines whether or not the data related to the payout sensor 1 signal is OFF. When it is determined that it is off, the process proceeds to step S374, and when it is determined that it is not off, the process returns to step S370.

  In step S374, the remaining payout number (count value) is “−1” (“1” is subtracted). Next, proceeding to step S375, the main control board 60 determines whether or not the medal payout has been completed. When it is determined that the medal payout has been completed, the process proceeds to step S376, and when it is determined that the medal has not been completed, this flowchart is ended. In step S376, the main control board 60 performs a process for turning off the drive signal of the hopper motor 36. Specifically, by setting the above-described hopper motor drive signal data to “0”, the D7 bit of the output port 3 becomes “0” during the next interrupt processing. Then, the process according to this flowchart is terminated.

FIG. 52 is a flowchart showing error display processing (MS_ERROR_DSP). The error display process in FIG. 52 is a process when a recoverable error occurs, and is restored by turning on the reset switch 53 or the like. The error when the processing of FIG. 52 is executed is an error that can be solved by a hall related person (administrator) of the slot machine 10 and is not likely to be a serious error. Absent.
On the other hand, the process of FIG. 52 is not performed at the time of the “unrecoverable error” described above. When an unrecoverable error occurs, the above-described processing of FIG. 31 is performed (interrupt is prohibited).

  In FIG. 52, first, in step S381, the error number generated this time is stored. Specifically, the value of a predetermined register (for example, E register) before the occurrence of an error is stored in a predetermined area (error number data) of the RWM 61. The recoverable errors are not limited to the errors mentioned in this embodiment, and there are other types, but the description is omitted in this embodiment.

In the next step S382, the states of the blocker (45) signal and the hopper motor (36) drive signal before the error occurs are saved (stored). Specifically, the blocker signal data and the hopper motor drive signal data (“0” or “1”) described above are stored in a predetermined register (for example, C register).
In step S383, the hopper motor (36) drive signal is turned off. Specifically, the hopper motor drive signal data is set to “0”. Thus, when the hopper motor 36 is being driven, the driving is stopped from the next interrupt process.

  In the next step S384, the blocker 45 is turned off (MS_BLOCKER_OFF; FIG. 44). In the next step S385, the acceptance permission flag of the start switch 41 is cleared. This process is a process for turning off the D0 bit of the medal management flag.

Next, the process proceeds to step S386, and the display of the acquired number is saved. This process is for temporarily saving (storing) the number currently displayed on the acquisition number display LED 72 and displaying it again after removing the error factor. Specifically, the acquired number display data stored in a predetermined storage area of the RWM 61 is stored in a predetermined register (for example, B register).
In the next step S387, processing for displaying error information on the acquisition number display LED 72 is performed. Specifically, the value of the D register stored before FIG. 52 is executed is stored. For example, if the stored error is a CP error in step S381, the acquired number display data value for displaying “CP” on the acquired number display LED 72 is stored.
The LED display of the error information is performed by an interrupt process (step S606) described later.

  In step S388, an output request at the start of error display is set, and in step S389, control command set 1 is executed. Specifically, “01 (H)” indicating the start of error display is stored in the D register, and the error number data of the RWM 61 in which the error number is stored is stored in the E register. In steps S388 to S389, a control command (command to be transmitted to the sub control board 80) for starting the error display is set.

  Next, the process proceeds to step S390, and it continues to detect whether or not the reset switch 53 has risen (operated). This process is performed by determining whether or not the rising signal of the D4 bit of the input port 1 is turned on. When it is determined that the reset switch 53 has risen, the process proceeds to step S391, and the rise data of the reset switch signal is cleared. In step S392, the full detection signal inspection data is set. This process is a process of setting inspection data for determining whether or not an error relating to the full sensor 38 has occurred (whether or not the sub tank 35b is full of medals).

Then, the process proceeds to the next step S393 to determine whether or not a full error has occurred. If it is determined that there is a full error, the process proceeds to step S397. If it is determined that there is no full error, the process proceeds to step S394.
In step S394, the inspection data of the payout sensors 37a and 37b are set. This process is a process of setting inspection data for determining whether or not an abnormality relating to the payout sensors 37a and 37b has been detected.

In step S395, it is determined whether the error is related to the payout sensors 37a and 37b. When it is determined that the error is related to the payout sensors 37a and 37b, the process proceeds to step S397. When it is determined that the error is not the error, the process proceeds to step S396.
In step S396, inspection data of the making sensors 44a and 44b and the passage sensor 43a are set. This process is a process of setting inspection data for determining whether or not there is an abnormality related to these sensors.

Then, the process proceeds to step S397, and an error check is performed based on the inspection data set in step S392, step S394, or step S396.
Next, proceeding to step S398, based on the error check result of step S397, it is determined whether or not the error factor has been removed. If it is determined that it has been removed, the process proceeds to step S399. If it is determined that it has not been removed, the process returns to step S390. In step S399, the error number data stored in the RWM 61 in step S381 is cleared. In step S400, the acquired number saved in step S386 (temporarily stored in the B register) is returned to the acquired number display data, which is a predetermined storage area of the RWM 61. Therefore, the display content of the acquisition number display LED 72 is returned to before the occurrence of the error by the interrupt processing executed after the processing.

  In step S401, an output request at the end of error display is set, and in step S402, control command set 1 is executed. In steps S401 to S402, a control command (command to be transmitted to the sub-control board 80) to end the error display is set.

  In the next step S403, a process for returning to the state before saving in step S382 is performed. Therefore, the state of the blocker signal and the hopper motor drive signal before the error occurrence stored in step S382 is read. Specifically, the process is restored based on the value of the predetermined register (for example, C register) saved in step S382. In step S404, the hopper motor drive signal data before the occurrence of the error is updated based on the value of a predetermined register (for example, C register). In the next step S405, based on the value of a predetermined register (for example, C register), it is determined whether or not the value of the blocker signal data before the occurrence of the error is “1”. When it is determined that the value is “1”, the process proceeds to step S406. When it is determined that the value is not “1”, the process according to the flowchart is terminated. In step S405, the blocker 45 is turned on (MS_BLOCKER_ON; FIG. 37), and the processing according to this flowchart ends.

  As described above, in the error processing of FIG. 52, the control command is transmitted to the sub control board 80 at the start of error display and at the end of error display. Notification regarding the error that has occurred (notification using the effect lamp 21, the speaker 22, and the image display device 23) can be performed.

FIG. 53 is a flowchart showing start switch acceptance (MS_START_CTL) in step S59 in FIG.
In step S431, the internal random number is stored in the MPU register (random number soft latch register). Here, the random number is latched (acquired), and it is step S60 in FIG. 32 to determine whether or not the acquired random number is a random number corresponding to the winning combination.
In the next step S432, the start switch acceptance permission flag is cleared. That is, the D0 bit of the medal management flag is cleared (set to “0”).
In step S433, the setting change permission flag is cleared. In this process, the D6 bit of the medal management flag is set to “1”. As a result, the setting cannot be changed.

In the next step S434, the blocker 45 is turned off (FIG. 44). That is, after the start switch 41 is operated, control is performed so that a medal is not accepted. In the next step S435, a bet medal is read (S_PLAYM_READ; FIG. 35). The number of bet medals read here is stored in the A register. In the next step S436, the main control board 60 sets an output request for reel rotation disclosure. Here, “13 (H)” is set as the first control command value, and the A register value is set as the second control command.
In step S437, the bet medal number (A register value) read in step S435 is set in the E register.

In the next step S438, the control command set 1 is executed. This process is a process of storing the control command set in step S436 in a buffer.
Next, proceeding to step S439, the main control board 60 determines whether or not the set value stored in the RWM 61 is within the normal range (1 to 6). When it is determined that it is within the normal range, the process proceeds to step S440, and when it is determined that it is not within the normal range, the process proceeds to step S445, and an unrecoverable error process (E6 error) is executed.

  In step S440, a bet medal is read (S_PLAYM_READ; FIG. 35). Then, the read bet medal number is stored in the A register. Note that when a replay is won, the number of medals automatically inserted is set as the number of bet medals. In step S441, the number of read bet medals is doubled. In this process, the A register value and the A register value are added, and the value after the addition is stored in the A register. In addition, the medal bet signal output count (_CT_MEDAL_IN) address (F06F) is stored in the HL register.

  In the next step S442, interrupt processing is prohibited. In step S443, a medal insertion signal output count is set. In this process, the value (medal insertion signal output count (_CT_MEDAL_IN)) stored at the address indicated by the HL register is added to the A register (doubled bet medal number), and the value after the addition is added to the A register. Is stored in the process. Further, the value of the A register is stored in the address (F06F) indicated by the HL register. Thereby, the medal insertion signal output count (_CT_MEDAL_IN) is updated. Then, the process proceeds to step S444, and interrupt processing is permitted.

  The processing in steps S442 to S444 described above prohibits interruption before and after updating the medal insertion signal output count. By prohibiting the interruption, it is possible to prevent the interruption process from being executed during the update of the medal insertion signal and the process of updating the medal insertion signal output frequency from being executed. That is, after the process of updating the medal insertion signal output count is completed, the interrupt process is permitted and the medal insertion signal is permitted to be updated.

  Further, as described above, in this embodiment, when outputting a bet medal signal, the actual number of bet medals is calculated by doubling and the value is set as the number of outputs. As described above, this control is performed so that when a bet medal signal is output to the outside as a pulse signal that repeatedly turns on and off, one bet medal is represented by two times of on and off. This is because it is controlled. The same applies to the medal payout. When outputting the medal payout signal to the outside, the medal payout number is calculated by doubling the value, and the value is set as the medal payout signal output count, so that one medal payout number is represented by ON and OFF twice. Control.

FIG. 54 is a flowchart showing the reel rotation start preparation process (M_REEL_READY) in step S61 in FIG.
In step S531, it is determined whether or not the minimum game period has elapsed. In this embodiment, the minimum game time (the minimum time from the start of rotation of the reel 31 to the start of rotation of the reel 31 in the next game) is set to about 4.1 seconds. Here, the value of the minimum game time (_TM2_GAME) stored in the RWM 61 is read, stored in the A register, and whether the value stored in the A register is not “0” (whether the zero flag is not “1”). Judging. When it is not “0” (zero flag is not “1”), it is determined as “No”.

  If it is determined that the minimum game time has elapsed, the process proceeds to step S532, and the minimum game time is stored. In this process, “1836” (1836 × 2.235 ms = about 4100 ms) is stored in the minimum game time (_TM2_GAME) of the RWM 61. When the minimum game interval is stored in the RWM 61 in step S532, “1” is subtracted by “1” in step S605 described later from the next interruption process. When the “1836” interrupt is executed from the time of step S532 and the value of the minimum time becomes “0”, it remains “0” thereafter. Then, in step S532 of the next game, “1836” is stored again.

In the next step S533, the condition device number is acquired. In this process, the information of the accessory condition device number (_NB_CND_BNS) of the address “F049” is stored in the H register, and the winning and replay condition device number (_NB_CND_NOR) information of the address “F048” is stored in the L register. is there.
In the conditional device information output bit set in the next step S534, the D7 bit of the H register is set to “1” and the D6 bit of the L register is set to “1”.
In the present embodiment, when the D7 bit is “1” in the upper 2 bits of the condition device information, it indicates the accessory condition device information. When the D6 bit is “1”, winning and replaying are performed. It is set to indicate conditional device information.

In step S535, the condition device information is stored. In this process, the H register value is stored in the accessory condition device information (_NB_CNDINF_B) at the address “F04D”, and the L register value is stored in the winning and replay condition device information (_NB_CNDINF_N) at the address “F04C”. is there.
In step S536, the condition device information output time is stored. This process is a process of storing “25” in the condition device output time (_TM1_COND_OUT) of the RWM 61. Although details will be described later, in this embodiment, during the period of “24 × 2.235 ms = 53.64 ms”, the accessory condition device information (_NB_CNDINF_B) and the winning and replay condition device information (_NB_CNDINF_N) are output to the outside. The condition device output time set here is subtracted by “1” from the next interruption process in step S605 described later.

FIG. 55 is a flowchart showing the medal payout process (MS_WIN_PAY) by winning shown in step S71 of FIG.
First, in step S451, an output request at the start of medal payout is set. This process is a process of storing a command indicating the acquired (paid out) number of sheets in a predetermined register. In the next step S452, control command set 1 (S_CMD_SET) is executed. This process is a process of storing a command in the command buffer of the RWM 61.
In step S453, a medal number setting process is executed. This process is divided into the following two. As the first processing, medal payout number data (_NB_PAY_MEDAL) is stored in the D register. Second, medal bet number data (_NB_PLAY_MEDAL) is stored in the E register. In the next step S454, the operation flag is checked. This process is a process for determining on / off of each bit of the operation state flag (_FL_ACTION).

Next, the process proceeds to step S455, and it is determined whether or not the BB (special combination) is operating. In the present embodiment, the 1BB operation state flag is determined based on whether or not the D3 bit of the operation state flag is “1”. When it is determined that the 1BB operation state flag is “1”, the process proceeds to step S456, and when it is determined that the 1BB operation state flag is not “1”, the process proceeds to step S460.
In step S456, the acquirable number data at the time of BB operation (in this example, during 1BB game) is acquired. This process is a process of storing data of the number of acquirable sheets (_CT_BB1_PAY) when the RWM 61 operates 1BB in the A register. Then, in the next step S457, it is determined whether or not the acquired number upper limit value at the time of BB operation has been reached. Here, the information in the D register (medal payout number data) is subtracted from the value stored in the A register, the calculation result is stored in the A register, and the value stored in the A register is not negative (carry flag ≠ “1” )). When it is determined that it is not negative, it is determined as “No”.
If it is determined to be negative, the process proceeds to step S458, and if not negative, the process proceeds to step S459.
In step S458, the acquirable number at the time of BB operation is cleared. This process is a process of performing an “XOR” operation on the A register value and the A register value and storing the operation result in the A register. By this arithmetic processing, the value of the A register is always “0”. Then, the process proceeds to step S459.
In step S459, the acquirable number at the time of BB operation is updated. Specifically, the A register value is stored in the acquirable number (_CT_BB1_PAY) when the RWM 61 operates 1BB. Then, the process proceeds to step S460.

In the present embodiment, an example of 1BB provided as a special role is shown, but the case where 2BB is provided can be processed in the same manner as described above.
First, in step S455, the operation state flag of 2BB is determined depending on whether or not the D1 bit of the operation state flag is “1”.
At the time of 2BB operation, in step S456, the acquirable number data at the time of 2BB operation (during 2BB game) is acquired (data of the acquirable number at the time of 2BB operation of RWM 61 (_CT_BB2_PAY) is stored in the A register). It is determined whether or not the value after the medal is paid out is negative. If the value is negative, the number of acquirable sheets at the time of 2BB operation is cleared. In addition, the A register value is stored in the obtainable number (_CT_BB2_PAY) of the RWM 61 when the 2BB is activated, thereby updating the obtainable number when the 2BB is activated.

In step S460, a medal payout number setting process is performed. This process is a process of storing the E register value (medal bet number data (_NB_PLAY_MEDAL) as described above) in the A register. Thereby, medal bet number data (_NB_PLAY_MEDAL) is stored in the A register.
In the next step S461, it is determined whether or not replay is displayed. This process is a process for determining whether or not the D0 bit of the symbol combination display flag (_FL_WIN) is “1”. If it is determined that the replay display is being performed, the process proceeds to step S463. If it is determined that the replay display is not being performed, the process proceeds to step S462.

In step S462, a medal payout number setting process is performed. This process is a process of storing the D register value (the above-mentioned medal payout number data (_NB_PAY_MEDAL)) in the A register. Thereby, medal payout number data (_NB_PAY_MEDAL) is stored in the A register.
By the above processing, when the replay is won, the A register value becomes the medal bet number data (_NB_PLAY_MEDAL) value set in step S453. The medal payout number data (_NB_PAY_MEDAL) value set in step S462.
In step S463, a process of doubling the number of medals stored in the A register is executed. The reason for doubling is as described above. In this process, the A register value and the A register value are added, and the value after the addition is stored in the A register. In addition, the medal payout signal output count (_CT_MEDAL_OUT) address (F070) is stored in the HL register.

In step S464, interrupt processing is prohibited. In the next step S465, a medal payout signal output count is set. In this process, the value stored in the address indicated by the HL register is added to the A register value, and the value after the addition is stored in the A register. By this processing, the value of the medal payout signal output count is updated. In the next step S466, interrupt processing is permitted.
Through the above processing, interrupt processing is prohibited before and after updating the value of the medal payout signal output count.
By prohibiting the interruption, it is possible to prevent the interruption process from being executed during the update of the medal payout signal and the process of updating the medal payout signal output frequency from being executed. That is, after the process of updating the medal payout signal output count is completed, the interrupt process is permitted and the medal payout signal is allowed to be updated.

  Furthermore, in the present embodiment, the maximum number of medals to be paid out is set to eight. However, there is a possibility that the number of payouts in the next game is updated during the output of the medal payout signal accompanying the payout of eight medals. Low. However, if the medal payout number is changed during the development process (for example, the maximum payout number is changed from 8 to 15), the payout number may be updated while the medal payout signal is being output. There is. Here, if interrupt prohibition processing is provided as in this embodiment, even if the number of medals paid out is changed during development (for example, up to 15), changes in the program can be reduced.

  In step S465, it is meaningful to set the number of medal payout signal outputs before the actual medal payout process. Specifically, the medal payout signal output count is created from the medal payout number data (_NB_PAY_MEDAL) except when a replay is won. At this time, if the payout process (after step S467 in FIG. 55) is performed before the medal payout signal output count is set, the medal payout number data is updated, and the correct number of medal payout signals are not output. This is because there is a risk of losing.

In the next step S467, it is determined whether or not there is a medal payout. In this process, “1” is subtracted from the D register value (medal payout number data (_NB_PAY_MEDAL)), and it is determined whether or not the value after the subtraction is “0”. When it is “0”, it is determined that there is no medal payout. When it is determined that there is a medal payout, the process proceeds to step S468, and when it is determined that there is no medal payout, the process according to this flowchart is terminated.
In step S468, the number of stored sheets is read (S_CREDIT_READ; FIG. 36). Next, the process proceeds to step S469, and it is determined whether or not the medal storage number is a limit value. When the stored number is “50”, it is determined that the stored number is the limit value, and the process proceeds to step S473. When it is determined that the stored number is not the limit, the process proceeds to step S470.

In step S470, the standby time for adding the stored medals is set. In the present embodiment, as in step S145 of FIG. 34, the count value “46” (46 × 2.235 ms = about 100 ms) of the number of interrupts is set to set about 100 ms as the wait time. For this reason, “00000000B” is set as the B register value, and “00101110B” is set as the C register value. In step S146, a 2-byte time wait process (R_2BYTE_WAIT) is executed. This process is a process of subtracting the BC register value for each interrupt and waiting until it becomes “0”. When the two-byte time waiting process in step S471 ends, the process proceeds to step S472, and the one stored number addition process (MS_CREDIT_ADD; FIG. 45) is executed. Then, the process proceeds to step S474.
When the process proceeds from step S469 to step S473, a single medal payout process (MS_1MEDAL_PAY; FIG. 50) is executed. By the above processing, the number of stored sheets is added until the stored number reaches the limit value, and when the stored number is the limit, processing for paying out actual medals from the hopper is executed.

In step S474, the acquisition number display is set to “+1”. This process is a process of updating the data displayed on the acquisition number display LED 72 by “+1”. For example, when the display so far is “2”, this corresponds to a process of updating the display to “3”.
In the next step S475, a process of subtracting “1” from the medal payout number data (_NB_PAY_MEDAL) is performed. Next, proceeding to step S476, it is determined whether or not the medal payout has been completed. This process determines whether or not the updated medal payout number data (_NB_PAY_MEDAL) is “0”. When it is determined that the medal payout number is “0”, the process proceeds to step S477, and when it is determined that the medal payout number is not “0”, the process proceeds to step S468.

  In step S477, an output request at the end of medal payout is set. This process is a process of storing a command indicating the end of medal payout in a register. In the next step S478, control command set 1 (S_CMD_SET) is executed. This process is a process of storing a command in the command buffer of the RWM 61. Then, the process according to this flowchart is terminated.

In the payout process described above, when paying out by adding one stored number, a waiting time of about 100 ms is set by the processes in steps S471 and S472. Thereby, it can show to a player so that storage number display LED71 may count up. For example, when the display of the storage number display LED 71 before storage addition is “08” and 8 medals are stored and added to this, “display“ 08 ”→ 100 ms wait processing → display“ 09 ”→ 100 ms Wait process →... → 100 ms wait process → display “16”. On the other hand, if no waiting time is provided when the number of stored sheets is increased by 1, the display “08” is instantaneously changed to the display “16”.
Then, as in the present embodiment, when adding the number of stored sheets, a payout sound ("Plululu ...") output from the sub-control board 80 side is executed by executing a 2-byte waiting process for each addition. ) And counting up the number of stored sheets can be synchronized.

On the other hand, when the stored number exceeds the maximum number “50” and the medals are actually paid out in the processing after step S473, the 2-byte time waiting processing of steps S470 and S471 is not provided.
This is because, in order to pay out one actual medal, the hopper motor 36 is driven and paid out, so that it takes about 100 ms to pay out one piece as described above. As a result, the payout time per medal is about 100 ms, so when waiting for an actual medal, a 2-byte time waiting process is not provided. Therefore, when actually paying out medals, it is possible to synchronize with the payout sound output from the sub-control board 80 side without providing a 2-byte time waiting process.

FIG. 56 is a flowchart showing the game end check process (M_GAME_CHK) in step S72 of FIG.
In step S541, processing for clearing the flag of the condition device is performed. This process is a process for clearing items other than the special role condition device. When it is determined that the combination of symbols corresponding to the special role has stopped on the effective line, the special role condition device is also cleared. In the next step S542, the replay display LED is turned off. This process corresponds to a process of setting the D3 bit of the medal management flag (_FL_MEDAL_STS) to “0”. In step S543, the replay operation flag is cleared. This process is a process of setting the D0 bit of the operation state flag (_FL_ACTION) to “0”.

In the next step S544, BB operation management (M_BB_CTL; FIG. 57) is performed. As will be described later, this process is a process for determining whether or not the end condition for the 1BB game is satisfied when the 1BB game is in progress (the same is true for the 2BB game). In the next step S545, it is determined whether or not the RB is operating. In this process, it is determined whether or not the D4 bit of the operation state flag (_FL_ACTION) is “0”. When it is determined that the D4 bit is not “0” (zero flag ≠ 1), “Yes” is determined. When it is determined that the RB is operating, RB operation management (M_RB_CTL; FIG. 58) is performed, and when it is determined that the RB is not operating, the processing according to this flowchart is terminated.
In FIG. 32, the 2-byte waiting process at the time of displaying the special combination is executed in steps S69 and 70. However, the process is not limited to this, and may be executed before step S541 in the game end check process. .

FIG. 57 is a flowchart showing BB operation management (M_BB_CTL) in step S544 in FIG.
In step S551, the operating state flag is checked. This process executes a process of storing the value of the operation state flag (_FL_ACTION) in the A register. Further, the value stored in the A register is rotated to the right (one digit). Specifically, for example, during replay operation, the operation state flag (_FL_ACTION)
A register value = "00000001B"
It becomes.
If you rotate one digit to the right,
A register value = “00000000B” (carry flag on)
It becomes.

For example, at the time of 1BB operation (and at the time of RB operation), the operation state flag (_FL_ACTION) is
A register value = "00011000B"
It becomes.
If you rotate one digit to the right,
A register value = “00001100B” (zero flag off (≠ “0”))
It becomes.

In the next step S552, it is determined whether or not the BB is operating. When only 1BB is provided as BB as in this embodiment, it is determined whether or not the zero flag after rotation is “0”. When the zero flag is “0”, “No” (when 1BB is activated) Not).
On the other hand, when both 1BB and 2BB are provided, the determination branch in step S552 is provided with both “whether or not 1BB is operating” and “whether or not 2BB is operating”. Is mentioned. Further, in determining whether or not 1BB is operating, it is only necessary to determine whether or not the D2 bit of the A register value is “1”. In determining whether or not 2BB is operating, it is only necessary to determine whether or not the D0 bit of the A register value is “1”.

In step S552, when it is determined that the BB is operating, the process proceeds to step S553, and when it is determined that the BB is not operating, the process according to this flowchart is terminated.
In step S553, the number of images acquired at the time of BB operation is acquired. When the operating BB is 1BB, the value of the number of acquirable sheets (_CT_BB1_PAY) stored during the 1BB operation stored in the RWM 61 is stored in the A register. When the operating BB is 2BB, the value of the acquirable number (_CT_BB2_PAY) stored during the 2BB operation stored in the RWM 61 is stored in the A register.

  In the next step S554, it is determined whether or not the BB operation end condition is satisfied (whether or not the acquirable number is “0”). This process is performed by determining whether or not the value stored in the A register is “0” (whether or not zero flag = “0”). When it is determined that the BB operation end condition is satisfied, the process proceeds to step S555, and when it is determined that the BB operation end condition is not satisfied, the process according to this flowchart is ended.

  In step S555, the A register value is stored in the operation state flag (_FL_ACTION). When the process proceeds to step S555, the A register value is “0”, so the updated operation state flag (_FL_ACTION) is “00000000B”. Next, proceeding to step S556, an output request at the end of BB operation is set. In this embodiment, “0471” is stored in the DE register. Then, in the next step S557, the control command set 1 is executed, and the processing according to this flowchart is terminated.

FIG. 58 is a flowchart showing RB operation management (M_RB_CTL) in step S546 of FIG.
In step S561, “1” is subtracted from the number of games (_CT_BONUS_PLAY) during RB operation stored in the RWM 61. In the next step S562, it is determined whether or not the number of games at the time of the RB operation updated in step S561 is “0” (whether or not zero flag = “1”). When it is determined that the number of games at the time of RB operation is “0”, the process proceeds to step S566, and when it is determined that it is not “0”, the process proceeds to step S563.
In step S563, it is determined whether or not the value of the medal payout number data buffer (DB) is “0”. This determination is a process for determining whether or not to subtract the value of the number of winnings at the time of RB operation, and it is determined whether or not there has been a payout due to winning a small role in the game.

  More specifically, in this embodiment, when medals are paid out in the game (when winning a small role), the number is stored in the above-mentioned medal payout number data (_NB_PAY_MEDAL). The “medal payout number data buffer” provided at the address also stores the payout number of the game. The medal payout number data (_NB_PAY_MEDAL) is subtracted as the medal payout is performed, but the “medal payout number data buffer” is not updated by the payout process. For this reason, the “medal payout number data buffer” is used to determine whether or not there has been a payout for winning a small role in the game.

When it is determined in step S563 that the value of the medal payout number data buffer is “0” (when the small role is not won), the processing according to this flowchart ends, and when it is determined that the value is not “0”. In the case of a small role winning, the process proceeds to step S564.
In step S564, “1” is subtracted from the number of winnings (_CT_BONUS_WIN) during RB operation stored in the RWM 61. Next, the process proceeds to step S565, and it is determined whether or not the operation of the RB has ended. As a result of subtracting “1” from the number of winnings in step S564, when it is determined that it is “0” (zero flag = “1”), the process proceeds to step S566. finish.

In step S566, the RB operation state flag is set to “0”. This process is a process of updating the D4 bit of the operation state flag (_FL_ACTION) to “0”.
Next, it progresses to step S567 and the standby time at the time of completion | finish of RB operation | movement is set. This process is a process for setting a value corresponding to the standby time in the BC register. In this embodiment, “5” (about 11 ms) is set in the BC register. More specifically, B register value = "0" (00000000B) and C register value = "5" (00000101B) are set. In step 5680, a 2-byte time waiting process is executed. After the 2-byte time waiting process, the process according to this flowchart is terminated.

  If the operation state flag (D4 bit of _FL_ACTION) corresponding to RB is cleared (set to “0”) in step S566, the process returns to step S73 in FIG. 32 after executing the 2-byte time waiting process. And if it progresses to step S50 again, it will progress to the game start set process of step S52. In the game start set process, the D4 bit (RB) of the operation state flag (_FL_ACTION) is set to “1” by the operation state flag update in step S88 of FIG. As a result, the RB operation state flag becomes “0” when the number of games or winnings during the RB operation is “2” and the RB operation end condition is satisfied, but does not satisfy the end condition of the 1BB game. Time (when the D3 bit (1BB) of the operation state flag (_FL_ACTION) is “1”), after the “5” interrupt has elapsed, it is set to “1” again. By providing such processing, even if the operation state flag corresponding to RB is cleared in step S566, the operation state flag corresponding to RB can be immediately turned on while the 1BB game is continued. The reason why the RB operation state flag is once set to “0” will be described later.

FIG. 59 is a flowchart showing interrupt processing by the main control board 60 (main CPU 63). As described above, the main control board 60 performs the interrupt process shown in FIG. 59 at a period of 2.235 ms in parallel with the main loop of FIG.
First, when the process proceeds to the interrupt process in step S601, in step S602, as an initial process, a register value saving process and a duplicate interrupt prohibition process are performed. Here, since the register of the main CPU 63 used in the main loop is used for interrupt processing, the current register value is saved in the stack area of the RWM 61. Further, the interrupt prohibition flag is turned on so that the next interrupt process is not started during the interrupt process. This is because, for example, an interrupt process execution request may be made during the power-off process.

In the next step S603, it is determined whether or not power-off is detected. Here, when the power supply voltage becomes a predetermined value or less by a voltage monitoring device (power-off detection circuit) provided on the main control board 60 (not shown), the D0 bit of the input port 2 in FIG. Since the disconnection detection signal is input, it is detected whether or not the signal is input.
Then, when power-off is detected, the process proceeds to power-off processing (IS_POWER_DOWN) in step S619, and when it is determined that power-off is not detected, the process proceeds to step S604.

In step S604, the interrupt counter value (_CT_INTR) is updated.
In the next step S605, timer measurement is performed. This process is a process of subtracting the time set in the main process. Specifically, the subtraction process of the minimum game time (_TM2_GAME) set in step S532, the subtraction process of the conditional device output time (_TM1_COND_OUT) set in step S536, and the predetermined process of the input sensor 1 in the process of step S237. Whether or not the time has elapsed, whether or not the minimum game time (4.1 seconds) has elapsed in the process of step S531 can be mentioned.
Next, it progresses to step S606 and LED display control (IS_LED_OUT; FIG. 60) is performed. Here, according to the state of the slot machine 10, the set value, the stored number, the acquired number, the error display content (error code), etc. are turned on using the 7-segment LED (digits 1 to 5).

  As described above, in the non-recoverable error (SS_ERROR_STOP) shown in FIG. 31, an error display is output by the main processing (step S888), but the setting value, the number of stored items, the number of acquired items, and the recovery possible during setting change or setting confirmation An error display is performed by this LED display control every time interrupt processing is performed.

  In step S607, the input ports 0 to 2 are read. As a result, whether or not the operation of the bet switch 40, the start switch 41, the stop switch 42, etc. has been performed, the switch signals and the input signals of various sensors are read, and data (level data, rising edge) based on the input ports 0 to 2 are read. Data, falling data) is generated and stored in the RWM 61. In the next step S608, a built-in random number check process is performed. In the present embodiment, a flag that is turned on when an error occurs in the internal random number is provided, and it is determined whether or not this flag is on.

  Specifically, for example, when an abnormality in the clock frequency of the random numbers for the lottery (for example, when the random number update is late), the error flag is turned on. More specifically, it is assumed that SCLK (oscillation source: 12 MHz) and RCK (oscillation source: 9 MHz) input to the MPU are provided, and the built-in random number is updated based on RCK. At this time, the error flag is turned on when “RCK <SCLK / 2” is satisfied.

  In step S609, it is determined whether an error has occurred in the built-in random number (whether the error flag is on). If it is determined that no error has occurred, the process proceeds to step S610. If it is determined that the error has occurred, the process proceeds to step S620 to shift to a non-recoverable error process (SS_ERROR_STOP; FIG. 31). The error display content at this time is “E7”.

  In step S610, drive control of the reel 31 is performed. This control is performed in units of 31 reels (left, middle, and right), and includes stop, constant speed, acceleration, deceleration, deceleration start, and standby according to the operation state. When the drive control of the reel 31 is completed, the process proceeds to step S611 to perform port output processing. In this process, the excitation output of the motor 32 (for reel) and the hopper motor 36 and the excitation output of the blocker 45 are performed.

In the next step S612, an input error check process is executed. This process is a process for determining whether or not various sensors are abnormal.
In the next step S613, control command transmission (IS_CMD_SET; FIG. 62) is performed. This process is a process of transmitting, for example, a control command set in the output request set and control command set 1 (an untransmitted control command stored in the command buffer of the RWM 61) to the sub-control board 80.
Specifically, when a control command is set in the command buffer in the output request set and control command set 1, interrupt processing after that point (in principle, if the command buffer is empty, it will come next to that point. In step S613, a control command is transmitted to the sub-control board 80.

  In the next step S614, the data for the external signal stored in the RWM 61 is stored in the register. In the next step S615, data is written (set) to the output port 6 to output an external signal (transmission of a signal to the external concentrated terminal board 100).

In the next step S616, a test signal and condition device information output process (FIG. 63) is performed. This process is performed when it is determined whether or not the slot machine 10 is appropriately designed according to the law by writing (setting) data to the output port 7 and the output port 8 based on the data stored in the RWM 61. This is a process for transmitting a test signal to the test machine.
As information names to be transmitted to the testing machine, information on the operating state is referred to as a test signal, and information on the winning combination is referred to as condition device information. May be referred to as a second test signal. Further, information other than the above may be transmitted to the testing machine. For example, transmitting information (referred to as a third test signal) relating to an optimal stop operation mode (stop operation position, stop operation order) can be mentioned. As a result, it is possible to perform a ball exit test (also called a simulation test) on the testing machine side.
In step S617, random number update processing is performed. In the next step S618, the register value saved in step S602 is restored, and the next interrupt is permitted. Specifically, the register data stored at the start of interrupt processing is restored and the interrupt prohibition flag is turned off so that the next interrupt processing can be started. And the process by this flowchart is complete | finished.

As shown in the above processing, lighting / extinguishing of the storage number display LED 71, the acquisition number display LED 72, the status display LEDs 73 (73a to 73g), and the set value display LED 64 is controlled by interruption processing every 2.235 ms.
Furthermore, when an untransmitted control command is stored in the command buffer for each interrupt process, the transmission process is performed.

Note that as shown in step S881 for the unrecoverable error in FIG. 31, no interrupt process is performed during the unrecoverable error process.
An unrecoverable error is a serious error that cannot occur normally, and executes processing based on abnormal data (data update of the RWM 61 based on data from the input port, transmission of a control command to the sub-control board 80), etc. To prevent it from happening, interrupts themselves are prohibited.

In other words, at the time of an unrecoverable error, the control command is not transmitted from the main control board 60 to the sub-control board 80, so it does not make sense to execute the control command set 1.
Furthermore, if an untransmitted command is stored in the control command buffer when an unrecoverable error occurs, the command is not transmitted to the sub-control board 80. This is because the control command stored in the buffer may be incorrect.

FIG. 60 is a flowchart showing the LED display control (IS_LED_OUT) in step S606 of FIG.
First, in step S621, the output ports 0 and 1 are turned off. The output port 0 is an output port corresponding to a digit signal, and the output port 1 is an output port corresponding to a segment signal. For these output ports 0 and 1, by outputting “00000000B”, all LEDs are temporarily not output. Thereby, when switching the display of the LEDs, it is possible to prevent the different LEDs from being turned on and viewed at the same time (to be displayed) (afterimage prevention).

In the next step S622, the LED display request counter is updated. The update of the LED display request counter is a process of shifting a bit that is on, that is, “1” to the right by one digit. The updated value is stored in a predetermined storage area and B register of the RWM 61. Then, the process proceeds to step S623.
In step S623, it is determined whether the LED display request counter is “0”. That is, it is determined whether or not the LED display request counter updated in step S622 is “0”. When it is determined that it is “0”, the process proceeds to step S624, and when it is determined that it is not “0”, the process proceeds to step S625.

  In step S624, the LED display request counter is initialized. Here, the initialization of the LED display request counter is set to “00010000B” and stored in a predetermined storage area and B register of the RWM 61. Then, the process proceeds to step S625. Therefore, when the LED display request counter is updated from “00000001B” to “00000000B” in step S622, it is determined to be “0” in step S623, and thus is updated to “00010000B” in step S624. . That is, it is updated from “00000001B” to “00100000B” within one interrupt process.

In step S625, confirmation of the display request for the digit segments A to G to be displayed in the current interrupt processing is set.
In this process, first, the value of the LED display request flag is stored in the A register. The LED display request flag is a flag in which digits that may be displayed are on (“1”) and digits that are not to be displayed are off (“0”).

Next, an AND operation (logical product) is performed on the value of the LED display request counter (B register value) and the value of the LED display request flag (A register value).
For example,
LED display request counter value: 00001000B
LED display request flag value: 00001111B
After AND operation: 00001000B
It becomes.
Or, for example,
LED display request counter value: 00010000B
LED display request flag value: 00001111B
After AND operation: 00000000B
It becomes.
If the result of the AND operation is “0”, the zero flag is “1”.

  In step S626, it is determined whether there is an LED display request. Here, it is determined whether or not the zero flag in step S625 is “1”. If “1”, it is determined that there is no display request, and the process proceeds to step S638. On the other hand, if it is not “1”, it is determined that there is a display request, and the process proceeds to step S627.

  In step S627, set value data is acquired. Here, the current set value stored in the RWM 61 is read and stored in the A register. In step S628, it is determined whether there is a setting value display request. This determination is made as to whether the D4 bit (digit 5) is “1” (“00010000B”) as a result of the AND operation. If it is determined that there is a set value display request, the process proceeds to step S635. If it is determined that there is no set value display request, the process proceeds to step S629.

In step S629, the acquired number display data stored in the RWM 61 is acquired and stored in the A register. In the next step S630, it is determined whether or not there is a display request for the lower digit of the acquired number of sheets, that is, whether or not there is a display request for digit 4. As a result of the AND operation, when the D3 bit (digit 4) is “1” (when it is “00001000B”), it is determined that there is a display request, and otherwise, it is determined that there is no display request.
When it is determined that there is a display request for the lower digit of the acquired number, the process proceeds to step S635, and when it is determined that there is no display request, the process proceeds to step S631.

In step S631, it is determined whether or not there is a display request for the upper digits of the acquired number, that is, whether or not there is a display request for digit 3. As a result of the AND operation, when the D2 bit is “1” (when “00000100B”), it is determined that there is a display request, and otherwise, it is determined that there is no display request.
When it is determined that there is a display request for the upper digits of the acquired number, the process proceeds to step S634, and when it is determined that there is no display request, the process proceeds to step S632.

  Here, if it is determined in step S628 that there is no set value display request and it is determined in steps S630 and S631 that there is no acquired number display request, this means that there is a storage number display request. Therefore, when there is a request for displaying the number of stored sheets, the process proceeds to step S632, and the stored number is read (S_CREDIT_READ; FIG. 36). Then, the read stored number data is stored in the A register.

  Next, proceeding to step S633, it is determined whether or not the display request at the time of the current interrupt processing is a display request for the lower digit (digit 2) of the stored number. As a result of the AND operation, when the D1 bit is “1” (“00000010B”), it is determined that there is a lower digit display request, and the process proceeds to step S635. On the other hand, when the D1 bit is not “1”, the D0 bit must be “1”. That is, it can be determined that there is a display request for the upper digit (digit 1) of the stored number. Therefore, in this case, the process proceeds to step S634.

In step S634, the display data is corrected to display data of the upper digits of the stored number. Specifically, a process of exchanging upper 4 bits and lower 4 bits of the value stored in the A register is performed.
Specifically, when the storage number display data is “08”, that is, “0000 / 1000B” (“/” is indicated between the upper 4 bits and the lower 4 bits), “1000 / 0000B ". For example, when the number of stored sheets is “41”, that is, “0100 / 0001B”, it is converted to “0001 / 0100B”. Then, the process proceeds to step S635.

In step S635, an offset of the LED table is generated. Specifically, an AND operation (logical product) of the A register value and “00001111B” is performed. This process is a process for acquiring segment data to be executed thereafter. Then, the calculation result is stored in the A register.
For example, when the A register value is “10000000B”, it becomes “00000000B”.
Further, when the A register value is “10101100B”, for example, “00001100B”.
Furthermore, when the value of the A register is “00010100B”, for example, “00000100B”.
The A register value stored here becomes an offset value described later.

In step S636, the LED segment table is set. This process is a process for setting the address of the LED segment table stored in the ROM. The LED segment table is shown in FIG. 5, and the head address is “1211”.
In the next step S637, output data of segments A to G is acquired. Here, the segment data is obtained by adding the A register value (offset value) to the address of the LED segment table. Then, the acquired data is stored in the H register.

For example, when the A register value is “00000000B”, the offset value is “0”. Therefore, the segment data of the address “1211”, that is, “00111111B” is acquired and stored in the H register. As a result, the display content is “0”.
When the A register value is, for example, “00000100B” (offset value is “4”), the segment data at the address “1215”, that is, “01100110B” is acquired and stored in the H register. As a result, the display content is “4”.
Furthermore, when the A register value is, for example, “00001100B” (offset value is “C”), the segment data at the address “121D”, that is, “00111001B” is acquired and stored in the H register. As a result, the display content is “C”.

Next, the process proceeds to step S638, and it is determined whether or not there is a display request for the segment P. Here, the data stored in the above-described medal management flag is stored in the A register.
Then, an AND operation of the A register value storing the medal management flag data and the B register value storing the LED display request counter value is executed. If the result of the AND operation is “0”, it is determined that there is no segment P display request, and if it is not “0”, it is determined that there is a segment P display request.

For example,
A register value: 00001101B
B register value: 00001000B
After AND operation: 00001000B (A register)
And there is a display request.
For example, A register value: 00000101B
B register value: 00001000B
After AND operation: 00000000B (A register)
Thus, there is no display request.

If it is determined that there is a display request for segment P (the A register value after the AND operation is not “0”), the process proceeds to step S639. If it is determined that there is no display request, the process proceeds to step S640.
In step S639, the output data of segment P is set. This processing is processing for setting the D7 bit of the H register (data stored in step S637), that is, the D7 bit of the digit for which display is requested in the current interrupt processing to “1”.

  By the above AND operation, for example, the LED that has a display request in the current interrupt processing (the digit that is “1” in the LED display request counter) is the digit 1, and the D7 bit corresponding to the segment P is “1”. ", The game start LED 73d is turned on as shown in FIG. That is, the digit 1 (the upper digit of the stored number display LED 71) and the game start LED 73d are turned on simultaneously.

Similarly, when the LED for which display is requested is the digit 3 in the current interrupt processing and the D7 bit corresponding to the segment P is “1”, the ON ready display LED 73b and the digit 3 are turned on simultaneously.
In addition, when the LED for which display is requested in the interrupt processing this time is the digit 4, and the D7 bit corresponding to the segment P becomes “1”, the replay display LED 73a and the digit 4 are turned on simultaneously.
Furthermore, when the LED requested to be displayed in the current interrupt processing is the digit 5, and the D7 bit corresponding to the segment P is “1”, the settlement display LED 73c and the digit 5 are turned on simultaneously.

  As described above, in the present embodiment, when displaying the LEDs of the digits 1 to 5, it is sufficient that there are seven types of D0 to D6 bits corresponding to the segments A to G, but an 8-bit 1 Since the D7 bit is left when using byte data, the D7 bit is effectively used and used for lighting control of 73a to 73d in the state ideographic LEDs 73.

  In step S640, LED display data is output. Specifically, the B register value (which digit is turned on) is written to the output port 0 address, and the H register value (which segment is turned on) is written to the output port 1 address. As a result, the corresponding segment of the corresponding digit is turned on.

  As described above, in this embodiment, one digit is turned on by one interrupt process. That is, for each interrupt (every 2.235 ms), the LED to be lit is switched in the order of digit 5 → digit 4 →... → digit 1 → digit 5 →. Therefore, for example, after the upper digit of the storage number display LED 71 which is the digit 1 is turned on, the next turn is turned on after “11.18 ms” which is 5 interrupts later.

Here, the luminance of the LED is determined by the time interval of ms from the lighting time to the next lighting time. In this embodiment, as described above, one digit is controlled to light once every “11.18 ms”, but from the viewpoint of the player (human), the digits 1 to 4 are almost Since it seems to be always on, there is no problem.
On the other hand, in the case of an unrecoverable error, as described above, lighting switching between the upper digit and the lower digit is repeated every 0.128 ms. The brightness is higher than the brightness.

61 is a flowchart showing the power-off processing (IS_POWER_DOWN) when the power-off is detected in FIG. 59 and the process proceeds to step S619.
First, in step S651, the outputs of all output ports (0 to 6) are turned off. Next, proceeding to step S652, the power-off execution processing flag is stored in the RWM 61. This process is a process of storing in the RWM 61 data indicating that the power interruption interrupt process is being executed.

  In the next step S653, the control command read pointer is set to an even number (first time). As described above, when the control command is transmitted, the first control command and the second control command (two control commands) are transmitted. Further, as will be described later, the process of transmitting the first control command and the process of transmitting the second control command by one interrupt process are executed twice. However, there is a case where the power is cut off after transmitting the first control command and before transmitting the second control command. In this case, it transmits again from the first control command.

  Therefore, the process of step S653 sets the read pointer for designating the address of the buffer storing the control command to an even number in such a case. For example, when the reading pointer is “00011111B”, it is set to “00011110B”. If the number is even from the beginning, such as “00011110B”, it is left as it is. By this process, the buffer of the designated address is always an even number, and the buffer storing the first control command is obtained. As a result, the control command can be reliably transmitted twice by simple program processing.

In the next step S654, checksum data of the RWM 61 is calculated. This process calculates a checksum including a work area (RWM 61) used in the program. Examples of the program use area to be processed include a program work area, an unused area, and a stack area.
In the next step S655, it is determined whether or not the calculation of the entire range of the checksum has been completed. If it is determined that the calculation has not been completed, the process returns to step S654 and the calculation of the checksum is continued. On the other hand, if it is determined that the checksum calculation has been completed, the process proceeds to step S656.

  In step S656, the checksum of the RWM 61 is stored in the RWM 61. Here, the data stored in the RWM 61 is processed into a value (also referred to as complement data) that becomes data indicating “0” when the checksum of the RWM 61 is performed again. As a result, when executing the checksum of the RWM 61 at the start of the program, it is only necessary to determine whether the value of the RWM 61 is “0”, thereby simplifying the program processing and shortening the processing time. Leads to.

  Then, the process proceeds to step S657 to enter a reset waiting state. Here, when the voltage reaches a predetermined value, a reset signal is output from the voltage monitoring device (power-off detection circuit) provided on the main control board 60, so that the output of the reset signal is awaited. Here, when the power supply voltage falls below a predetermined value, the voltage monitoring device inputs a power-off detection signal to the D0 bit of the input port 2 (FIG. 6), and then a predetermined time elapses by a circuit comprising a capacitor and a resistor After that, the reset signal is input to the MPU. At this time, the capacitor and the resistance value are designed so that the processing time when the power is cut off is normally executed.

FIG. 62 is a flowchart showing control command transmission in step S613 of FIG.
First, in step S661, the address of the control command buffer is set. Control command data transmitted from the main control board 60 to the sub control board 80 is stored in a buffer associated with an address in the RWM 61. Also, data indicating a read pointer for designating which address control command data is read is also stored in the RWM 61 in association with the address. Therefore, in step S661, the head address of the control command buffer and the address storing the read pointer stored in the RWM 61 are acquired.

In step S662, a read pointer is acquired. This process is a process for acquiring the current read pointer from the area in which the read pointer of the RWM 61 is stored.
In the next step S663, the address of the control command buffer to be transmitted is set. This process is a process for calculating the address of the control command buffer of the RWM 61 to be read next from the start address of the control command buffer and the read pointer.

  In step S664, it is determined whether or not a control command (to be transmitted) is included. If there is control command data at the address set in step S663, it is determined that there is a control command, and if the data at that address is “0”, it is determined that there is no control command. If it is determined that there is a control command, the process proceeds to step S665. If it is determined that there is no control command, the process according to this flowchart is terminated.

In step S665, an address is set in the SCU3 data register. In this embodiment, an SCU3 data register is used as a storage area for storing control command data for transmission, and the address of this register is set.
Next, proceeding to step S666, the first control command data is written to the address (SCU3 data register) set at step S665. As a result, the first control command data is transmitted to the sub control board 80. Further, the data of the address of the control command buffer to be transmitted is set to “+1”. Thereby, the address where the second control command data is stored is set.

Next, proceeding to step S677, as in step S666, the second control command data to be transmitted is written into the SCU3 data register. As a result, the second control command data is transmitted to the sub control board 80.
In the next step S668, it is determined whether transmission of the control command is completed. Here, it is determined whether or not the read pointer data is an odd number. When it is an odd number, it indicates the second transmission, and when it is an even number, it indicates the first transmission.
In the present embodiment, such processing is performed in order to transmit the same control command (first control command and second control command) to the sub-control board 80 twice in succession (with two interrupts). .

If it is determined in step S668 that a control command has been transmitted (read pointer data is an odd number), the process proceeds to step S669. If it is determined that no control command has been transmitted, the process proceeds to step S670.
In step S669, the transmitted control command data is cleared. That is, the data stored in the control command buffer is deleted, and the area of the RWM 61 is emptied.
In step S670, the read pointer data is updated by "+1". And the process by this flowchart is complete | finished.

FIG. 63 is a flowchart showing the test signal / condition device information output processing in step S616 of FIG.
In step S571, test signal output data is set. This process is a process of storing the information stored in the operation state flag (_FL_ACTION) in the A register. Then, in the next step S572, a test signal is output. This process is a process for outputting the information stored in the A register to the output port 8. As a result, information based on the information stored in the operation state flag (_FL_ACTION) is output (transmitted) from the output port 8. Therefore, the operation state flag signal can be output to the testing machine as a test signal.
In the process of FIG. 63, the above steps S571 and S572 correspond to the output process of the operation state flag information, and the following steps S573 to S579 correspond to the output process of the condition device information.
As described above, in the present embodiment, information based on the information stored in the operating state flag is output from the output port 8. However, the present invention is not limited to this. For example, the operation state flag is not provided, and predetermined information (assuming that some information indicating the operation state is stored in each address) is acquired from the addresses of the plurality of RWMs 61. Then, a method may be used in which information corresponding to the operation state flag is created (combined) by arithmetic processing using a register, and the information is written (set) to the output port 8 as a test signal.

In the next step S573, clear data of the conditional device information is set. This process is a process for storing the information stored in the condition device output time (_TM1_COND_OUT) stored in the RWM 61 in the A register.
As described above, in FIG. 54, if it is determined in step S531 that the minimum game time (about 4.1 seconds) has elapsed, in step S536, the condition device output time (_TM1_COND_OUT) has a value of “25”. Remembered. This value is decremented by “1” for each interrupt (specifically, during the timer measurement process in step S605 in FIG. 59). Therefore, after the value “25” is stored, “0” is obtained after the “25” interruption.

  In the next step S574, it is determined whether or not the condition device information is being output. In this process, it is determined whether or not the value stored in the A register is “0” (zero flag = 1). If “0”, it is determined “No”, and if it is not “0”, “Yes”. Judge. When it is determined that it is time to output the condition device information, the process proceeds to step S575, and when it is determined that it is not time to output the condition apparatus information, the process proceeds to step S579.

  In step S575, the address of the RWM 61 of the accessory condition device information is set. Specifically, the address of the accessory condition device information (_NB_CNDINF_B), that is, “F04D (H)” is stored in the HL register. As a result, the H register value = “F0 (H)” and the L register value = “4D (H)”. In the next step S576, it is determined whether or not it is time to output the accessory condition device information. In this process, “12.5 (25/2)” is subtracted from the value stored in the A register (the A register stores the condition device output time (_TM1_COND_OUT) in step S573). This is a process of determining “Yes” when it is determined that the calculation result is greater than “0” (carry flag ≠ 1). That is, it is determined whether or not half of the time has elapsed from “24”, which is the initial value of the conditional device output time. When it is determined that it is time to output the accessory condition apparatus information, the process proceeds to step S578, and when it is determined that the accessory condition apparatus information is not output, the process proceeds to step S577.

  In step S577, the address of the RWM 61 of the winning and replay condition device information is set. In this process, the address of the winning and replay condition device information (_NB_CNDINF_N), that is, “F04C (H)” is stored in the HL register, so that “1” is subtracted from the HL register value. As a result, HL register value = “F04C (H)” (H register value = “F0 (H)” and L register value = “4C (H)”).

Next, the process proceeds to step S578, and condition device information is acquired. This processing is processing for storing the response stored in the address indicated by the HL register value in the A register. Therefore, when the HL register value = “F04C (H)”, the value of the winning and replay condition device information (_NB_CNDINF_N) is stored, and when the HL register value = “F04D (H)”, the accessory condition The value of device information (_NB_CNDINF_B) is stored.
In step S579, the information stored in the A register is output to the output port 7. As a result, the conditional device information is output (transmitted) from the output port 7. And the process by this flowchart is complete | finished.

In the test signal / condition device information output process described above, the information on the operation state flag can be output (transmitted) to the test machine for each interrupt process. For example, it is possible to determine whether or not the operation state flag of the slot machine 10 is correctly executed by receiving the signal on the test machine side.
In step S574, if the value of the conditional device output time (_TM1_COND_OUT) is “0”, it is determined “No”, and the process proceeds to step S579. In this case, since the A register value is “0”, “0” (00000000B) is output as the conditional device information.

If the value of the conditional device output time (_TM1_COND_OUT) is not “0” (“1” to “24”), the conditional device information is output for each interrupt process.
As the initial value of the condition device output time, “25” is set in step S536 of FIG. 54. However, after “1” is subtracted in step S605 of FIG. 59, the test signal / condition device information in step S616. Proceed to output processing. Therefore, when “25” is set in step S536 and the process proceeds to step S574 in FIG. 63 for the first time, the conditional device output time value is “24”.
Further, in the case of outputting the condition device information, if the condition device output time (_TM1_COND_OUT) is “13” to “24” (also referred to as the first period) in step S576, step S577 is skipped. Therefore, the condition device information to be output is the accessory condition device information (_NB_CNDINF_B). On the other hand, when the condition device output time (_TM1_COND_OUT) is “1” to “12” (also referred to as the second period) in the determination in step S576, the processing in step S577 is executed, so that the output condition The device information is winning and replay information device information (_NB_CNDINF_N).

Furthermore, for each interrupt process, when the value of the condition device output time (_TM1_COND_OUT) is “0”, the value of “0” as the condition device information and the value of the condition device output time (_TM1_COND_OUT) are other than “0”. Is a value other than “0” as the conditional device information.
The condition device information is updated in step S533 in FIG. Therefore, the condition device information is updated after the minimum gaming time (4.1 seconds) has elapsed (when “Yes” in step S531). As a result, when there is a change in the received condition device information other than “0”, the tester side receives the condition device information other than “0”, and then receives a change other than “0”. By measuring the time until the condition device information is received, it is possible to determine whether or not the minimum game time (4.1 seconds) is secured. Therefore, the minimum gaming time can be measured on the testing machine side by merely outputting the condition device information with the above configuration without separately providing information on the minimum gaming time.

Next, the output of the test signal (operation state flag) in step S572 and the output of the condition device information in step S579 will be described in FIG.
FIG. 64 is a diagram showing ON / OFF states of the D3 bit (1BB) and the D4 bit (RB) in the information of the operation state flag output as the test signal in step S572.

The example of FIG. 64 shows an example in which the game is 1BB, the D3 bit (1BB) of the operation state flag is on, and the D4 bit (RB) is repeatedly turned on / off.
When the 1BB game is started, the D3 (1BB) and D4 (RB) bits of the operation state flag become “1”, so that the D3 bit (1BB) and D4 bit (RB) are used as test signals by the interrupt processing. Is turned on (“1”).

  Then, after the RB operation, if it is determined that the two games are completed and the RB operation end condition is satisfied (“Yes” in step S565 of FIG. 58), the RB operation state flag is set to “0” in step S566. Then, in the next steps S567 and S568, standby processing is performed for the interrupt count “5” (about 11 ms). Thereafter, the process returns to step S73 of FIG. Then, the process proceeds to the game start setting process in step S52 again. If the operation state flag update in step S88 in FIG. 33 does not satisfy the end condition of the 1BB game, the D4 bit (RB) of the operation state flag (_FL_ACTION) is set. It is set to “1”.

As a result, in the 1BB game, when the end condition of the 1BB game is not satisfied, the RB operation state flag is “1” between the two games, so that the test signal of the RB operation is continuously output and after the end of the two games , “5” during the interrupt (about 11 ms), “0” and again “1”. Thereby, the signal waveform shown in FIG. 64 is obtained.
Here, the main process stops during steps S567 and S568 of FIG. That is, even if the operation switch is operated, the operation is not accepted. After the RB operation state flag has changed from “1” to “0”, for example, when a 2-byte waiting process for a few seconds is executed, the player cannot operate the operation switch. It can be considered that the processing is stopped (freezing).

On the other hand, as in the present embodiment, if it is set between “5” interrupts (about 11 ms), even if the main process is stopped, the player feels uncomfortable (the player breaks the rhythm of the game) It is thought that there is almost no. If the main process is stopped for about 11 ms, it is considered that the player can hardly feel the stop of the main process.
On the other hand, if the time for which the RB operation state flag is “0” is too short, it is correctly confirmed that the RB operation state flag is “0” when the test signal is output to the testing machine. There is a possibility that it cannot be detected. In consideration of these points, in this embodiment, “5” is set between interrupts (about 11 ms).

As a result, the above-mentioned time can be used as a time during which the testing machine can correctly detect that the operation state flag of the RB is “0” as a test signal without causing the player to realize the stop of the main process (game progress). It was set.
In this embodiment, “5” is set between interrupts (about 11 ms). However, the present invention is not limited to this. For example, between “2” interrupts (about 4.5 ms) to “25” interrupts (about 56 ms). If it exists, it is thought that the same effect as the above can be exhibited.

FIG. 65 is a diagram showing an output example of condition device information in step S579 of FIG.
In the example of FIG. 65, in 1BB, the winning number “13” is won for the “N” game (Bell B4 is won), and the winning number “1” is won for the next “N + 1” game (winning for replay). An example of output of conditional device information at the time is shown. In the “N” game, 1BB is not won.
First, when it is inside 1BB, the D0 bit of the accessory condition device information (_NB_CNDINF_B) is “1”. Therefore, the accessory condition device information (_NB_CNDINF_B) is “10000001B”.
When the winning number is “13” in the “N” game, the D0 to D5 bits of the winning and replay condition device information (_NB_CNDINF_N) are “001101” (= “13”). The replay condition device information (_NB_CNDINF_N) is “01001101B”.

In the “N” game, while the condition device output time value is “24” to “13”, “Yes” is obtained in step S576 of FIG. 63, and the accessory condition device information set in step S575 is output. To do. Next, while the condition device output time value is “12” to “1”, “No” is determined in step S576 of FIG. 63, and the winning and replay condition device information set in step S577 is output. Next, when the condition device output time value becomes “0”, “No” is obtained in step S574 of FIG. 63, and thus the condition device information (“00000000B”) cleared in step S573 is output.
Then, when the next game is started and the lottery of the “N + 1” game is performed and the winning number is “1”, while the condition device output time value is “24” to “13”, Similarly to the “N” game, “10000001B” is output, and “0100010001B” is output while the condition device output time value is “12” to “1”. Thereby, the signal waveform shown in FIG. 65 is obtained.
Here, since the output of the “N” game accessory condition device information is started (when the condition device output time value is “24”), the “N + 1” game accessory condition device information is output. Until the start time (when the condition device output time value is “24”), when the game is consumed in the shortest time, the minimum game time is 4.1 seconds (“1836” interrupt). . Therefore, as described above, the testing machine measures the time from when the output of the accessory condition device information is started to when the output of the accessory condition device information is started in the next game. If 1 second has elapsed, it can be determined that the slot machine 10 guarantees the minimum game time.

Next, information processing on the sub control board 80 side will be described.
FIG. 66 is a flowchart showing a program start process of the sub control board 80 and a main process on the sub side.
In FIG. 66, when the power is turned on in step S700 and the program of the sub-control board 80 is started, first, in step S701, the sub-control board 80 prohibits interrupt processing. In the next step S702, the sub-control board 80 executes various initialization processes. The initialization process includes initialization of the sub CPU 83 and the RWM 81.

  The RWM 81 to be initialized here is not an RWM (register) built in the sub CPU 83 but an RWM provided on the sub control board 80 and provided outside the MPU (sub CPU 83). In the following description, the RWM 81 indicates this external RWM. Also, the initialization of the RWM 81 in step S702 means initialization of a range to be initialized by power-off (erasing of data to be erased by power-off).

In the next step S703, the sub control board 80 determines whether or not the checksums match. In this process, a checksum is calculated when the power is turned on and compared with the checksum stored in the RWM 81 when the power is turned off to determine whether or not they match.
If it is determined that the checksums match, the process proceeds to step S704. If it is determined that the checksums do not match, the process proceeds to step S705.

  In step S704, it is determined whether or not a power failure has occurred during the main process on the sub-control board 80 side, that is, the “1 command process” in step S710. When it is determined that a power interruption has occurred during the processing of one command (“Yes” in step S704), the processing according to this flowchart is terminated, and the program during the one command processing executed before the power interruption Return to. On the other hand, when it is determined that the power is not cut off during one command processing, the process proceeds to step S706.

  On the other hand, when the process proceeds from step S703 to step S705, the RWM 81 is cleared. Here, clearing the RWM 81 means clearing data that has not been initialized in step S702. For example, the RWM 81 stores data that is erased (cleared) every time the power is turned off and data that is not erased only when the power is turned off. As data that is not erased only by turning off the power, for example, an effect stage is cited.

When the process proceeds from step S704 or step S705 to step S706, the main process on the sub-control board 80 side is started.
First, in step S706, the sub-control board 80 clears the mounted watchdog timer. In step S707, the watchdog timer operation process (measurement) is started. The watchdog timer outputs a pulse for determining whether the sub CPU 83 is out of control and continues to count the number of output pulses. As will be described later, when the count value (time value) of the number of pulses reaches a predetermined value (for example, “500 ms”) before the watchdog timer is cleared, it is determined that the sub CPU 83 is running out of control, The processing of the sub-control board 80 is shifted to processing at power-on.

Next, the process proceeds to step S708, and interrupt processing (which was prohibited in step S701) is permitted. When interrupt processing is permitted in step S708, interrupt processing is performed.
In the next step S709, processing is performed every 16 ms (processing per frame). The processing executed by the sub-control board 80 includes processing performed once every 16 ms (processing every 16 ms or one frame processing) and one command processing performed within 16 ms. In step S709, the process is executed every 16 ms out of these processes.
As processing for every 16 ms, monitoring whether the image display device 23 (liquid crystal display) is operating normally, monitoring whether the sound source amplifier of the speaker 22 is operating normally, measurement of power-on time, push Generation of level data and rising data based on the operation of the button 24 and the cross key 25, measurement of error time, reel 31 drive time, and the like are executed.

  Next, proceeding to step S710, one command processing (processing for one instruction) is executed. As one command processing, for example, effect lottery, receiving a command from the main control board 60, and performing error notification or the like can be mentioned.

Further, when commands of different systems (for example, a first system command and a second system command) are received as one command process, the one command process is executed for each command.
For example, as a first system command, a command (such as a command showing a lottery result, an error number command, a setting change start command, etc.) necessary for smoothly progressing the game, and as a second system command, a game Commands that do not directly affect the progress of the command (commands in which the start switch 41 is operated when the role lottery is not performed, commands for which the stop switch 42 is operated in the case where the stop control of the reel 31 is not performed, and the like are input to input ports) Information).
In such a case, in the one command processing, the command processing is executed in a series of order such as the first system command → the second system command.

If a power interruption occurs during the processing of one command, complete recovery processing is performed. In the complete recovery process, the process returns from the timing when the power interruption occurred during the processing of one command.
On the other hand, when power interruption occurs other than during one command processing, normal return processing is performed. In the normal return process, the sub CPU 83 and the RWM 81 are initialized, and the process is executed from the beginning of the sub process.

After execution of the one command process, the process proceeds to step S711, and it is determined whether 16 ms has elapsed. In this embodiment, whether or not 16 ms has elapsed is provided by providing a counter that increments “+1” for each interrupt process (every 1 ms), and determining whether or not the counter value has reached “+16”. .
If it is determined that 16 ms has not elapsed, the process returns to step S710 to continue the one-command processing. On the other hand, if it is determined in step S711 that 16 ms has elapsed, the counter value for counting 16 ms is reset, the process returns to step S706, and the watchdog timer started in step S707 is cleared. Therefore, at this time, the number of pulses (time) of the watchdog timer that has been counted is cleared.

  As shown in FIG. 66, the watchdog timer is cleared every 16 ms, but if it is not cleared for a certain time (for example, 500 ms), a watchdog timer interrupt process is generated and the process returns to step S701. Control.

  FIG. 67 is a flowchart showing setting change start processing in the sub-control board 80. When the setting value change is started on the main control board 60, in the setting change process (M_RANK_SET) of FIG. 25, an output request at the start of the setting change is set in step S807, and the control command set 1 is set in the next step S808. Executed.

  Then, in the interrupt processing (FIG. 59) by the main control board 60, the control command indicating that the setting change has been started is transmitted in the control command transmission (FIG. 62) in step S613. When the control command is received, it is determined that the change of the setting value is started on the main control board 60 side. In response to this, the processing of FIG. 67 is started.

The sub-control board 80 is controlled by interrupt processing (NMI may be higher) than the above-described 1 ms interrupt processing and other interrupt processing to prevent the control command from the main control board 60 from being missed. The command reception process is executed, and the received control commands are sequentially stored in the RWM 81 (which may be a circuit in the chip) having a predetermined storage area of the sub-control board 80.
This storage area is a storage area that is not erased even in the setting change process. Thus, even when a control command is transmitted from the main control board 60 when the sub control board 80 is initialized, processing based on the command is normally executed.

The setting change start process is a process performed in step S710 (one command process) in FIG.
In FIG. 67, when the setting change process is started in step S750, the interrupt process is prohibited in step S751. Note that interruption of a control command (every 2.235 ms) transmitted from the main control board 60 to the sub control board 80 is not prohibited. Also, the control command reception process does not prohibit interrupts in order to prevent the control command from being missed.

  For example, when the input port of the push button 25 is detected by a 1 ms interrupt, the detection result is stored in the RWM 81, and it is detected that the push button 25 is turned on by all 16 interrupts (the number of loops) A specification that determines that the push button 25 has been operated in every 16 ms processing (one frame processing; step S709) is conceivable. In this case, if a 1 ms interrupt is executed during initialization, the data in the storage area of the RWM 81 related to the input of the push button 25 may be updated. That is, although the data of the RWM 81 is being initialized, there is a possibility that the data is updated to new data according to the operation of the push button 25. Thus, during the initialization, the interrupt processing is prohibited, so that the data update in the storage area of the RWM 81 can be eliminated.

In the next step S752, the sub control board 80 stops the watchdog timer. This process is to prevent the watchdog timer clear process from being executed during the initialization process of the RWM 81 to be executed later. In other words, if it is determined as a runaway, the initialization process is interrupted.
Next, proceeding to step S753, the sub-control board 80 designates an address for starting initialization of the RWM 81. Here, the range of addresses to be initialized is specified. Next, the process proceeds to step S754, and initialization processing for the range is executed.

In step S755, it is determined whether the initialization process of the RWM 81 is completed. When it is determined that the initialization process has not been completed, the initialization process is continued. When it is determined that the initialization process has been completed, the process proceeds to step S756. When it is determined that the initialization process has not been completed, Returning to step S754, the initialization process is continued.
In step S756, the stop of the watchdog timer stopped in step S752 is released. The cancellation of the stop is considered to be the case where the timing is started from the middle when the watchdog timer is stopped, and the case where the timing is started from the initial value, not the time when the watchdog timer is stopped. .
In the next step S757, the interrupt prohibited in step S751 is permitted. And the process by this flowchart is complete | finished.

As described above, when the sub control board 80 receives the control command for starting the setting change from the main control board 60, the sub control board 80 executes initialization of a predetermined range of the RWM 81 on the sub control board 80 side.
In the above process, since the watchdog timer is stopped and then the process proceeds to the initialization process of the RWM 81, the restart process by the watchdog timer can be prevented from being executed during the initialization process.
In the present embodiment, at the time of the setting change start process, the watchdog timer is stopped in step S752. However, instead of this, a process of clearing the watchdog timer may be performed.

  Further, the main control board 60 can wait until the initialization process (step S754 in FIG. 67) is completed on the sub control board 80 side by the 2-byte time waiting process in steps S809 and S810 in FIG. As a result, it is possible to prevent the post-initialization process from proceeding on the main control board 60 side even though the sub-control board 80 is still being initialized. Therefore, even if the initialization end at the time of setting change in the sub control board 80 is delayed from the end of the initialization at the time of setting change in the main control board 60, both control processes can be synchronized.

Second Embodiment
The second embodiment differs from the first embodiment in that the value stored in the BC register is different when the 2-byte time waiting process (R_2BYTE_WAIT) is executed.
The second embodiment will be described by taking the setting change process of FIG. 25 as an example.
In step S809 in FIG. 25, the main control board 60 sets a standby time for starting the setting change. As described above, in the first embodiment, the interrupt count “224” (about 500 ms) is set as the waiting time at the start of setting change. However, in the second embodiment, the interrupt counter (_CT_INTR) at that time is further set. Value (any value from “0” to “65535”) is acquired. Then, a value obtained by adding the interrupt count “224”, which is the waiting time, and the interrupt counter value is set in the BC register. For example, when the interrupt counter value is “1000”, “224 + 1000 = 1224”. Therefore, the B register value = “00000100B” and the C register value = “11001000B”.

  For example, in step S145 of FIG. 34, the number of interruptions “46” is set as the waiting time for automatically loading one sheet, and the interrupt counter (_CT_INTR) at that time is set to this value. Since the values are added, for example, when the interrupt counter value is “50”, “46 + 50 = 96”. Therefore, the B register value = “00000000B” and the C register value = “01100000B”.

FIG. 68 is a flowchart showing the standby time setting process in the second embodiment. In the second embodiment, the standby time setting process in the first embodiment (step S809 in FIG. 25, step S69 in FIG. 32, step S136 in FIG. 34, step S145 in FIG. 34, step S300 in FIG. 46, step in FIG. 55). Step S470 and step S567 in FIG. 58 are replaced with the flowchart in FIG.
Further, in the second embodiment, the “2-byte time waiting process” following the standby time setting process is replaced with the process of FIG. 69 (step S31 ′) described later.
In FIG. 68, when the standby time setting process is started in step S901, the standby time is acquired in step S902. For example, in the example of step S809 described above, this corresponds to the process of storing “224” in the A register.

In the next step S903, the value of the interrupt counter (_CT_INTR) of the RWM 61 is acquired and stored in, for example, the D register.
In step S904, the A register value and the D register value are added, and the operation result is stored in the BC register. As shown in the above example, for example, when the interrupt counter value is “1000”, the calculation result by addition is “1224”, and the value is stored in the BC register. And the process by this flowchart is complete | finished.

FIG. 69 is a flowchart showing a 2-byte time waiting process in the second embodiment. After the processing in FIG. 68, the process proceeds to step S31 ′ in FIG.
In step S911, an interrupt counter value is acquired. This process is the same as step S41 in FIG. 29, and is a process for storing the interrupt counter value in the A register. In step S912, it is determined whether the interrupt counter value (A register value) acquired in step S911 is equal to or greater than the BC register value. In this process, for example, the BC register value is subtracted from the interrupt counter value (A register value). When zero flag = “1” or carry flag = “1”, it is determined as “Yes”, and zero flag ≠ “1”. If the carry flag is not “1”, “No” is determined.
When “Yes” is determined in the step S912, the process according to this flowchart is ended, and when “No”, the process proceeds to the step S32. In step S32, an interrupt wait process (C_INTR_WAIT; FIG. 29) (wait for one interrupt) is executed. After waiting for one interrupt, the process returns to step S911.
In FIG. 69, the process may return to S911 if NO is determined in step S912 without executing the interrupt waiting process in step S32. In other words, the standby process may be realized by circulating step S911 and step S912.

<Third Embodiment>
In the first embodiment, the operation state of the special combination and the replay is managed by providing the operation state flag (_FL_ACTION). In other words, an RWM address corresponding to the output of the test signal is provided.
On the other hand, when there are many types of special combinations, a special combination operation state flag for managing the operation state of the special combination may be provided.
FIG. 70 is a diagram illustrating an example of the special combination operating state flag. The special combination operation state flag of FIG. 70 manages the operation state of each special combination with numbers from “0” to “7”. In addition, the information corresponding to each number is obtained by displaying the number as a binary number in 8 bits.
In the special combination operation state flag of FIG. 70, the RB operation of “1” is a regular bonus for winning alone. The SB operation of “4” is a single bonus that is won by itself. For example, if the SB is won while the special role is not inside, the SB won with “PB = 1” in the game wins, and the SB game is played in one game of the next game. After the SB game is finished (SB game) Is finished in one game), and is controlled to return to the inside of the special role non-inside.

  Furthermore, the “5” CB operation is a challenge bonus for winning alone. For example, if a CB is won while the special role is not inside, the CB won with “PB = 1” in the game will win, and the CB game will be played in one game of the next game, after the CB game ends (CB game) Is finished in one game), and is controlled to return to the inside of the special role non-inside. In this CB game, as in the case of continuous operation of CB during 2BB game, only a specific reel 31 (for example, the right reel 31) is stopped for 75 ms, and in the game, the winning flags of all small roles are turned on. Is controlled so that a winning combination can be won.

The special combination operating state flag is “0” when the special combination is not won. In the third embodiment, the RB operation during the 1BB game is the same as in the first embodiment.
As shown in Example 1) of FIG. 70, when 1BB is won from the time when the bonus is not operated and 1BB game is started, the 1BB operating state is set, and the special combination operating state flag number is changed from “0” to “3”. Will be changed. When two RB games are executed and the RB operation state flag is set to “0” at the end of the game, the number is changed from “3” to “2” (“−1”).

Further, during 1BB operation, at the end of each game, it is determined whether or not the last two digits are “10” in the 8-bit information of the current number. Since the number is “3” during the operation of the RB, it becomes “00000011B”, and the last two digits are “11”. Thus, when the last two digits are “11”, nothing is done. On the other hand, when the operation status flag of the RB is set to “0” and the number is changed from “3” to “2”, the information of the number becomes “00000010B” and the last two digits become “10”. In this case, the number is controlled to be “+1” at the start of the next game. As a result, at the start of the next game, the number is changed from “2” to “3”, and the information again indicates “1BB + RB” operation.
Furthermore, when the operation of 1BB is finished, the number is changed from “3” to “0”.

  Further, in Example 2) of FIG. 70, when 2BB is won from the time when the bonus is not operated and 2BB game is started, the 2BB operating state is set, and the special combination operating state flag number is changed from “0” to “7”. Will be changed. In the 2BB game, the CB operation state flag is set to “0” at the end of each game. At this time, the special combination operation state flag number is changed from “7” to “6” (“−” 1 ”). At the end of each game, similarly to the above, it is determined whether or not the last two digits are “10” in the 8-bit information of the number. When the operation of the CB is finished and the number is “6”, the information is “00000110B”, that is, the last two digits are “10”. Therefore, during 2BB operation, the number of the special combination operation state flag is changed from “7” to “6” at the end of each game, and the last two digits of the information become “10”. Therefore, in this case, similarly to the above, the number is controlled to be “+1” at the start of the next game. Thereby, at the start of the next game, the number of the special combination operation state flag is changed from “6” to “7”, and becomes information indicating the “2BB + CB” operation again.

Note that during 2BB games, the CB operating state flag is “1” at the start of each game, the game is “0” at the end of the game. As with the RB of the embodiment, for example, a process of waiting for a “5” interrupt is executed.
Furthermore, when the operation of 2BB ends, the number is changed from “7” to “0”.

In addition, in Example 3) to Example 5) shown in FIG. 71, each of RB, SB, and CB wins a single prize (and wins) and shifts to RB game, SB game, and CB game. An example is shown.
As shown in Example 3), when the RB (single) is activated, the number of the special combination operation state flag is changed from “0” to “1”. Thereby, it becomes the information which shows the single operation state of RB. When the RB operation ends, the number of the special combination operation state flag is changed from “1” to “0”.

Further, as shown in Example 4), during the SB operation, the number of the special combination operation state flag is changed from “0” to “4”. Thereby, it becomes the information which shows the operating state of SB. At the end of the operation of SB, the number of the special combination operation state flag is changed from “4” to “0”.
Furthermore, as shown in Example 5), when the CB (single) operation is performed, the number of the special combination operation state flag is changed from “0” to “5”. Thereby, it becomes the information which shows the single operation state of CB.
At the end of the operation of the CB, the number of the special combination operation state flag is changed from “5” to “0”.

In the above special combination operating state flag, whether the special combination is operating or not can be determined depending on whether the number is “0” or not. Furthermore, it is possible to determine which special combination is in an operating state by determining which number.
At this time, when a test signal is transmitted to the testing machine, the information stored in the special combination operation state flag may be transmitted as it is as a test signal, or stored in the special combination operation state flag. Information processed and synthesized based on the information may be transmitted as a test signal. For example, when a special combination operation state flag and a replay / small combination operation state flag (flags for managing replay and small combination operations) are stored in a plurality of RWMs 61, a test signal is generated based on these pieces of information. It may be generated and sent to a testing machine.

As mentioned above, although one Embodiment of this invention was described, this invention is not limited to the said embodiment, For example, the following various deformation | transformation are possible.
(1) Freezing In the slot machine 10, it is possible to perform freezing.
Here, “freezing” means delaying the progress of the game by pausing for a predetermined period of time. For example, receiving a medal, receiving an operation of the bet switch 40, operating the start switch 41 and the stop switch 42. Is to temporarily stop the function relating to the acceptance of the (reception of the stop operation of the reel 31). It is possible to execute such a freeze and output various effects during the freeze period.
Furthermore, while performing the freeze, it is also possible to perform a reel effect using the reel 31 (shake the reel 31 in small increments, reversely rotate the reel 31 and stop at a predetermined position, etc.).

(2) In the above embodiment, the game state (RT) is changed, and ART is executed when the state is changed to RT2.
On the other hand, it is also possible to control the gaming state as follows.
First, an MB (special role) that carries over the winning is provided, and control is performed so that the MB is difficult to win even when the MB is won. For example, MB can be awarded on condition that the pressing order is right middle left. Thus, unless the player reverse-presses when winning the MB, the MB will not win in the game. Also, if you set the replay and small role winning during the inside of the MB and set the probability of non-winning to be extremely low, the MB winning opportunity inside the MB will be very low, so the MB will not win It is possible to increase the probability that the state, that is, the game inside the MB continues all the time.

In the game inside the MB, non-AT, AT preparation, and AT are provided as internal states on the main control means 60 side, so that transition from non-AT to AT is not accompanied by RT (game state) transition. .
Further, the non-AT has a low probability, a normal probability, and a high probability that the probability of winning the AT is different. If an AT is won during these low, normal, and high probabilities, the game moves to a precursor, which is a game period before the start of AT, although the AT is won. During this sign, the player is informed that the AT has been won.
Also, the period between the end of the warning and the start of AT is AT preparation. Furthermore, the AT has a normal probability and a high probability of different expected values on which the number of games of the AT is added.

The transition of these internal states is performed by a winning combination in the game. Further, the transition from one internal state to another internal state is performed at the end of the game in the one internal state (when all the reels 31 are stopped and the game result of the game is displayed).
In the present embodiment, when it is decided to shift to a precursor among the internal states, it corresponds to winning of the AT.
The game state and the internal state as described above may be used.

  (3) Although the interrupt cycle is 2.235 ms, it is not limited to this value. For example, various times such as 1 ms may be mentioned. Then, as in this embodiment, when the digit lighting time is set to one interrupt time, the lighting time of one digit depends on the interrupt time. Further, since the 2-byte time waiting process uses an interrupt counter, the waiting time (value stored in the BC register) also varies depending on how long the interrupt cycle is set.

(4) In this embodiment, when the 2-byte time waiting process is executed, the waiting time is stored in the BC register. However, which register stores the waiting time is arbitrary, and may be set in, for example, the DE register or the HL register.
Further, in this embodiment, “00000000B” is stored in the B register even when the standby time of “0” to “255” is stored. However, the present invention is not limited to this, and when the standby time is 1 byte ("255" or less), only the B register or only the C register may be used.

  (5) In the present embodiment, the upper limit value of the number of games at the time of RB operation is set to “2”, and the upper limit value of the number of times of winning at the time of RB operation is set to “2”. However, the present invention is not limited to this, and according to the current rules, the upper limit value of the number of games at the time of RB operation is “12” or less, and the upper limit value of the number of times of winning at the time of RB operation is “8” or less, any Good.

(6) In this embodiment, the 2-byte time wait process (interrupt wait process) is executed using the interrupt counter (_CT_INTR). However, the present invention is not limited to this, and any other counter may be used as long as it is a counter that changes for each interrupt.
For example, it may be determined that an interrupt is executed (counts up or down) based on a change in the random number data, using the value of random number data in which random number data used in AT lottery or the like is stored. In this case, in FIG. 29, “obtain random number data” in step S41. In the next step S42, “whether or not the random number data value has changed” is determined, and when “Yes” is determined, the processing according to this flowchart may be terminated.

(7) As described with reference to FIG. 70, as a special role, in addition to 1BB, a single RB (regular bonus, first type special character), CB (second type special character), SB (single bonus, normal) When a special combination is awarded, a 2-byte waiting process can be executed as shown in steps S69 and S70 of FIG.
When these special roles are won, the 2-byte time waiting process is executed and the effects at the time of winning the special role are output, so that the effects can be shown to the player without canceling the effects, as in 1BB. .

  Furthermore, during the SB game, a lottery including the SB can be performed. When the SB wins / wins in the SB game, the SB game is also executed in the next game. In this case, the SB operates continuously for a plurality of games, but at the end of the SB operation (at the end of the SB game), it is possible to provide a 2-byte waiting process similar to steps S567 and S568 of FIG. is there. This is because when the SB is continuously operated over a plurality of games, the division between the end of the SB operation and the start of the next SB operation is clarified so that the testing machine can correctly judge.

(8) In the medal payout process by winning in FIG. 55, in the present embodiment, even when one medal is paid out (at the time of storage addition), the process goes through steps S470 and S471 (that is, waits for 2 bytes). Processing is performed). However, the present invention is not limited to this, and at the time of one medal payout process (at the time of storage addition), the 2-byte time waiting process is not executed, but only at the time of two or more medal payout processes (at the time of storage addition). Alternatively, a 2-byte time waiting process may be executed every time one is added.
For example, the processing may be executed in the order of steps S469, S472, S474, S475, and S476, and if “No” in S476, the processing may return to step S468 after executing steps S470 and S471. Even if it controls in this way, the effect that it can be shown to a player so that storage number display LED71 counts up can be exhibited.

On the other hand, when one medal is stored and added when controlled as described above, the 2-byte time waiting process is not executed, and therefore, step S472 is executed at the moment when one winning combination is won.
On the other hand, as shown in FIG. 55, even when one medal is stored and added, the two-byte waiting process is executed before the storage and addition are performed, so that the storage and addition is performed after winning a single piece. Since a weight can be provided in front, it is not stored and added at the moment when the winning combination is won. This means that in FIG. 34, a wait is provided by executing a 2-byte waiting process in steps S136 and S137 before automatically betting the first one (step S144) at the time of replay winning. The same.

(9) In the flowchart shown in the present embodiment, the order of processing is not limited to the order shown in the figure, and when the order of processing can be changed, the order of processing can be changed. .
(10) In this embodiment, the slot machine 10 is taken as an example of a gaming machine, but the present invention can also be applied to a ball game machine, an enclosed game machine, and the like.
(11) The present embodiment and the above-described various modifications are not limited to being implemented alone, and can be implemented in appropriate combination.

<Appendix>
The inventions (initial inventions) described in the initial specification and the like of the present application can include, for example, the following initial inventions 1 to 8, in order to solve the problems to be solved by the original invention and the problems related to the original invention, respectively. The means and the effect of the initial invention are as follows. However, the initial invention is not meant to be limited to the following initial inventions 1 to 8.
The initial invention according to the claims of the present application corresponds to the following initial invention 5.

1. Initial invention 1
(A) Problems to be solved by the original invention In the conventional technique, when executing wait processing, for example, a value corresponding to the wait time is stored in a predetermined address of the RWM, and the value is subtracted for each interrupt processing. It is possible to wait until it reaches zero. Here, since it is necessary to provide an address in the RWM for each type of wait processing, there is a problem of pressing the capacity of the RWM.
In addition, when zero-checking a predetermined address value of RWM, a program capacity of several bytes (for example, about 4 bytes) is required, so that there is a problem that the program capacity increases.
The problem to be solved by the invention is to reduce the program capacity without executing the RWM capacity by executing the wait process with a simple process when executing the wait process.

(B) Means for Solving the Problems Related to the Initial Invention The first solving means is:
The main process (M_MAIN) that controls the progress of the game,
During execution of the main process, an interrupt process (I_INTR) for executing a process different from the main process by an interrupt at regular intervals;
Interrupt counter value storage means (_CT_INTR) for storing an interrupt counter value updated for each interrupt processing,
In the main process, when a predetermined condition is satisfied, the main process includes a wait process (2-byte time wait process (R_2BYTE_WAIT)) that temporarily delays the progress of the process,
In the waiting process,
A value corresponding to the waiting time is stored in the register R1 (BC register) (waiting time setting process),
The interrupt counter value stored in the interrupt counter value storage means is stored in the register R2 (A register) (step S41), and the interrupt counter value stored in the interrupt counter value storage means and the register R2 are stored. Whether or not the interrupt counter value stored in the interrupt counter value storage means is updated after the interrupt counter value is stored in the register R2 by calculating the value (subtracting the interrupt counter value from the A register value) (Step S42),
When it is determined that the interrupt counter value stored in the interrupt counter value storage means has been updated, the value stored in the register R1 is updated (step S33),
When the value stored in the register R1 becomes a predetermined value (“0”) (“Yes” in step S31), it is determined that the standby time has elapsed.

The second solution is
The main process (M_MAIN) that controls the progress of the game,
During execution of the main process, an interrupt process (I_INTR) for executing a process different from the main process by an interrupt at regular intervals;
Interrupt counter value storage means (_CT_INTR) for storing an interrupt counter value updated for each interrupt processing,
In the main process, when a predetermined condition is satisfied, the main process includes a wait process (2-byte time wait process (R_2BYTE_WAIT)) that temporarily delays the progress of the process,
In the waiting process,
The value t1 corresponding to the waiting time is added to the interrupt counter value t2 stored in the interrupt counter value storage means, and the calculation result t3 is stored in the register R1 (BC register) (step S904).
The interrupt counter value stored in the interrupt counter value storage means is stored in the register R2 (A register) (step S911), and the value stored in the register R2 and the value stored in the register R1 are calculated (A By subtracting the BC register value from the register value), it is determined whether or not the value stored in the register R2 has reached t3 (step S912),
When the value stored in the register R2 becomes t3 (“Yes” in step S912), it is determined that the standby time has elapsed.

(C) Effect of Initial Invention According to the initial invention, interrupt counter value storage means (for example, one address or two addresses of RWM) and registers R1 and R2 (for example, registers built in the CPU of the main control means) are used. Thus, the wait process can be executed.
As a result, the storage capacity of the main control means (for example, the capacity of the RWM) can be prevented from being compressed. Further, since it is not necessary to provide a program for zero check of the storage means (for example, RWM), the program capacity can be reduced.

2. Initial invention 2
(A) Problem to be solved by the original invention Same as the problem in the original invention 1.
(B) Means for Solving the Problems Related to the Initial Invention The first solving means is:
The main process (M_MAIN) that controls the progress of the game,
During execution of the main process, an interrupt process (I_INTR) for executing a process different from the main process by an interrupt at regular intervals;
Interrupt counter value storage means (_CT_INTR) for storing an interrupt counter value updated for each interrupt processing,
In the main process, when a combination of symbols corresponding to a special combination for starting a special game (1BB game) advantageous to the player is displayed, a standby process (2 byte time) for temporarily delaying the progress of the process Wait process (R_2BYTE_WAIT))
In the waiting process,
A value corresponding to the waiting time is stored in the register R1 (BC register) (waiting time setting process),
The interrupt counter value stored in the interrupt counter value storage means is stored in the register R2 (A register) (step S41), and the interrupt counter value stored in the interrupt counter value storage means and the register R2 are stored. Whether or not the interrupt counter value stored in the interrupt counter value storage means is updated after the interrupt counter value is stored in the register R2 by calculating the value (subtracting the interrupt counter value from the A register value) (Step S42),
When it is determined that the interrupt counter value stored in the interrupt counter value storage means has been updated, the value stored in the register R1 is updated (step S33),
When the value stored in the register R1 becomes a predetermined value (“0”) (“Yes” in step S31), it is determined that the standby time has elapsed.

The second solution is
The main process (M_MAIN) that controls the progress of the game,
During execution of the main process, an interrupt process (I_INTR) for executing a process different from the main process by an interrupt at regular intervals;
Interrupt counter value storage means (_CT_INTR) for storing an interrupt counter value updated for each interrupt processing,
In the main process, when a combination of symbols corresponding to a special combination for starting a special game (1BB game) advantageous to the player is displayed, a standby process (2 byte time) for temporarily delaying the progress of the process Wait process (R_2BYTE_WAIT))
In the waiting process,
The value t1 corresponding to the waiting time is added to the interrupt counter value t2 stored in the interrupt counter value storage means, and the calculation result t3 is stored in the register R1 (BC register) (step S904).
The interrupt counter value stored in the interrupt counter value storage means is stored in the register R2 (A register) (step S911), and the value stored in the register R2 and the value stored in the register R1 are calculated (A By subtracting the BC register value from the register value), it is determined whether or not the value stored in the register R2 has reached t3 (step S912),
When the value stored in the register R2 becomes t3 (“Yes” in step S912), it is determined that the standby time has elapsed.

(C) Effect of Initial Invention According to the initial invention, interrupt counter value storage means (for example, one address or two addresses of RWM) and registers R1 and R2 (for example, registers built in the CPU of the main control means) are used. Thus, the wait process can be executed.
As a result, the storage capacity of the main control means (for example, the capacity of the RWM) can be prevented from being compressed. Further, since it is not necessary to provide a program for zero check of the storage means (for example, RWM), the program capacity can be reduced.
Further, since the wait process is executed when the special combination is won, for example, by outputting the special combination winning effect during the wait process, it is possible to show the player without canceling the effect.

3. Initial invention 3
(A) Problem to be solved by the original invention Same as the problem in the original invention 1.
(B) Means for Solving the Problems Related to the Initial Invention The first solving means is:
Main control means (main control board 60) for controlling the progress of the game;
Sub-control means (sub-control board 80) that receives a command from the main control means and controls the output of the effect,
As the processing of the main control means,
The main process (M_MAIN) that controls the progress of the game,
An interrupt process (I_INTR) that executes a process different from the main process by an interrupt at regular intervals during the execution of the main process,
Interrupt counter value storage means (_CT_INTR) for storing an interrupt counter value updated for each interrupt process is provided,
The main process includes a setting change process (M_RANK_SET) that can determine any setting value from among a plurality of setting values that determine the player's advantage.
In the main process, when executing the setting change process, a process for transmitting a command related to the execution of the setting change to the sub-control means, and a waiting process for temporarily delaying the progress of the process (2-byte time waiting process (R_2BYTE_WAIT)) ) And
In the waiting process,
A value corresponding to the waiting time is stored in the register R1 (BC register) (waiting time setting process),
The interrupt counter value stored in the interrupt counter value storage means is stored in the register R2 (A register) (step S41), and the interrupt counter value stored in the interrupt counter value storage means and the register R2 are stored. Whether or not the interrupt counter value stored in the interrupt counter value storage means is updated after the interrupt counter value is stored in the register R2 by calculating the value (subtracting the interrupt counter value from the A register value) (Step S42),
When it is determined that the interrupt counter value stored in the interrupt counter value storage means has been updated, the value stored in the register R1 is updated (step S33),
When the value stored in the register R1 becomes a predetermined value (“0”) (“Yes” in step S31), it is determined that the standby time has elapsed,
When receiving a command related to execution of setting change, the sub-control unit executes initialization processing for a predetermined storage area (step S754).
It is characterized by that.

The second solution is
Main control means (main control board 60) for controlling the progress of the game;
Sub-control means (sub-control board 80) that receives a command from the main control means and controls the output of the effect,
As the processing of the main control means,
The main process (M_MAIN) that controls the progress of the game,
An interrupt process (I_INTR) that executes a process different from the main process by an interrupt at regular intervals during the execution of the main process,
Interrupt counter value storage means (_CT_INTR) for storing an interrupt counter value updated for each interrupt process is provided,
The main process includes a setting change process (M_RANK_SET) that can determine any setting value from among a plurality of setting values that determine the player's advantage.
In the main process, when executing the setting change process, a process for transmitting a command related to the execution of the setting change to the sub-control means, and a waiting process for temporarily delaying the progress of the process (2-byte time waiting process (R_2BYTE_WAIT)) ) And
In the waiting process,
The value t1 corresponding to the waiting time is added to the interrupt counter value t2 stored in the interrupt counter value storage means, and the calculation result t3 is stored in the register R1 (BC register) (step S904).
The interrupt counter value stored in the interrupt counter value storage means is stored in the register R2 (A register) (step S911), and the value stored in the register R2 and the value stored in the register R1 are calculated (A By subtracting the BC register value from the register value), it is determined whether or not the value stored in the register R2 has reached t3 (step S912),
When the value stored in the register R2 becomes t3 (“Yes” in step S912), it is determined that the standby time has elapsed,
When receiving a command related to execution of setting change, the sub-control unit executes initialization processing for a predetermined storage area (step S754).
It is characterized by that.

(C) Effect of Initial Invention According to the initial invention, interrupt counter value storage means (for example, one address or two addresses of RWM) and registers R1 and R2 (for example, registers built in the CPU of the main control means) are used. Thus, the wait process can be executed.
As a result, the storage capacity of the main control means (for example, the capacity of the RWM) can be prevented from being compressed. Further, since it is not necessary to provide a program for zero check of the storage means (for example, RWM), the program capacity can be reduced.
In addition, since the wait process is executed during the setting change process, the progress on the main control means side can be stopped until the initialization process associated with the setting change process is completed on the sub control means side. Can be synchronized.

4). Initial invention 4
(A) Problem to be solved by the original invention Same as the problem in the original invention 1.
(B) Means for Solving the Problems Related to the Initial Invention The first solving means is:
The main process (M_MAIN) that controls the progress of the game,
During execution of the main process, an interrupt process (I_INTR) for executing a process different from the main process by an interrupt at regular intervals;
Storage number storage means (storage number display data (_NB_CREDIT_LED)) for storing the storage number of game media,
A payout amount storage means (medal payout number data (_NB_PAY_MEDAL)) for storing the payout number of game media when paying out game media;
Interrupt counter value storage means (_CT_INTR) for storing an interrupt counter value updated for each interrupt processing,
The main process is:
In the case of paying out game media, when the stored number stored in the stored number storage means is not the upper limit value, “1” is added to the stored number stored in the stored number storage means (step S472),
When adding “1” to the stored number stored in the stored number storage means, a standby process (2-byte time waiting process (R_2BYTE_WAIT)) is executed at a predetermined timing,
In the waiting process,
A value corresponding to the waiting time is stored in the register R1 (BC register) (waiting time setting process),
The interrupt counter value stored in the interrupt counter value storage means is stored in the register R2 (A register) (step S41), and the interrupt counter value stored in the interrupt counter value storage means and the register R2 are stored. Whether or not the interrupt counter value stored in the interrupt counter value storage means is updated after the interrupt counter value is stored in the register R2 by calculating the value (subtracting the interrupt counter value from the A register value) (Step S42),
When it is determined that the interrupt counter value stored in the interrupt counter value storage means has been updated, the value stored in the register R1 is updated (step S33),
When the value stored in the register R1 becomes a predetermined value (“0”), it is determined that the standby time has elapsed (“Yes” in step S31).
It is characterized by that.

The second solution is
The main process (M_MAIN) that controls the progress of the game,
During execution of the main process, an interrupt process (I_INTR) for executing a process different from the main process by an interrupt at regular intervals;
Stored number storage means for storing the number of stored game media (stored number display data (_NB_CREDIT_LED),
A payout amount storage means (medal payout number data (_NB_PAY_MEDAL)) for storing the payout number of game media when paying out game media;
Interrupt counter value storage means (_CT_INTR) for storing an interrupt counter value updated for each interrupt processing,
The main process is:
In the case of paying out game media, when the stored number stored in the stored number storage means is not the upper limit value, “1” is added to the stored number stored in the stored number storage means (step S472),
When the process of adding “1” to the stored number stored in the stored number storage means is repeated two or more times, “1” is added to the stored number, and then “1” is added to the stored number. Execute wait processing (2-byte time wait processing (R_2BYTE_WAIT)) before adding,
In the waiting process,
A value corresponding to the waiting time is stored in the register R1 (BC register) (waiting time setting process),
The interrupt counter value stored in the interrupt counter value storage means is stored in the register R2 (A register) (step S41), and the interrupt counter value stored in the interrupt counter value storage means and the register R2 are stored. Whether or not the interrupt counter value stored in the interrupt counter value storage means is updated after the interrupt counter value is stored in the register R2 by calculating the value (subtracting the interrupt counter value from the A register value) (Step S42),
When it is determined that the interrupt counter value stored in the interrupt counter value storage means has been updated, the value stored in the register R1 is updated (step S33),
When the value stored in the register R1 becomes a predetermined value (“0”), it is determined that the standby time has elapsed (“Yes” in step S31).
It is characterized by that.

The third solution is
The main process (M_MAIN) that controls the progress of the game,
During execution of the main process, an interrupt process (I_INTR) for executing a process different from the main process by an interrupt at regular intervals;
Stored number storage means for storing the number of stored game media (stored number display data (_NB_CREDIT_LED),
A payout amount storage means (medal payout number data (_NB_PAY_MEDAL)) for storing the payout number of game media when paying out game media;
Interrupt counter value storage means (_CT_INTR) for storing an interrupt counter value updated for each interrupt processing,
The main process is:
In the case of paying out game media, when the stored number stored in the stored number storage means is not the upper limit value, “1” is added to the stored number stored in the stored number storage means (step S472),
When adding “1” to the stored number stored in the stored number storage means, a standby process (2-byte time waiting process (R_2BYTE_WAIT)) is executed at a predetermined timing,
In the waiting process,
The value t1 corresponding to the waiting time is added to the interrupt counter value t2 stored in the interrupt counter value storage means, and the calculation result t3 is stored in the register R1 (BC register) (step S904).
The interrupt counter value stored in the interrupt counter value storage means is stored in the register R2 (A register) (step S911), and the value stored in the register R2 and the value stored in the register R1 are calculated (A By subtracting the BC register value from the register value), it is determined whether or not the value stored in the register R2 has reached t3 (step S912),
When the value stored in the register R2 becomes t3 (“Yes” in step S912), it is determined that the standby time has elapsed.

The fourth solution is
The main process (M_MAIN) that controls the progress of the game,
During execution of the main process, an interrupt process (I_INTR) for executing a process different from the main process by an interrupt at regular intervals;
A storage number storage means for storing the storage number of game media;
When paying out game media, payout amount storage means (stored number display data (_NB_CREDIT_LED) for storing the number of payout of game media,
Interrupt counter value storage means (_CT_INTR) for storing an interrupt counter value updated for each interrupt processing,
The main process is:
In the case of paying out game media, when the stored number stored in the stored number storage means is not the upper limit value, “1” is added to the stored number stored in the stored number storage means (step S472),
When the process of adding “1” to the stored number stored in the stored number storage means is repeated two or more times, “1” is added to the stored number, and then “1” is added to the stored number. Execute wait processing (2-byte time wait processing (R_2BYTE_WAIT)) before adding,
In the waiting process,
The value t1 corresponding to the waiting time is added to the interrupt counter value t2 stored in the interrupt counter value storage means, and the calculation result t3 is stored in the register R1 (BC register) (step S904).
The interrupt counter value stored in the interrupt counter value storage means is stored in the register R2 (A register) (step S911), and the value stored in the register R2 and the value stored in the register R1 are calculated (A By subtracting the BC register value from the register value), it is determined whether or not the value stored in the register R2 has reached t3 (step S912),
When the value stored in the register R2 becomes t3 (“Yes” in step S912), it is determined that the standby time has elapsed.

(C) Effect of Initial Invention According to the initial invention, interrupt counter value storage means (for example, one address or two addresses of RWM) and registers R1 and R2 (for example, registers built in the CPU of the main control means) are used. Thus, the wait process can be executed.
As a result, the storage capacity of the main control means (for example, the capacity of the RWM) can be prevented from being compressed. Further, since it is not necessary to provide a program for zero check of the storage means (for example, RWM), the program capacity can be reduced.
In addition, when the number of pools is added when paying out game media, such as when winning a small role, the addition process of the pool number is performed while executing the weight process. For example, an apparatus (LED or the like) for displaying the pool number When the display is changed, it can be displayed so as to count up.

5. Initial invention 5
(A) Problem to be solved by the original invention Same as the problem in the original invention 1.
(B) Means for Solving the Problems Related to the Initial Invention The first solving means is:
The main process (M_MAIN) that controls the progress of the game,
During execution of the main process, an interrupt process (I_INTR) for executing a process different from the main process by an interrupt at regular intervals;
Interrupt counter value storage means (_CT_INTR) for storing an interrupt counter value updated for each interrupt processing,
In the main process, when a combination of symbols corresponding to replay is displayed, a wait process (2-byte wait process (R_2BYTE_WAIT)) that temporarily delays the progress of the process is executed,
In the waiting process,
A value corresponding to the waiting time is stored in the register R1 (BC register) (waiting time setting process),
The interrupt counter value stored in the interrupt counter value storage means is stored in the register R2 (A register) (step S41), and the interrupt counter value stored in the interrupt counter value storage means and the register R2 are stored. Whether or not the interrupt counter value stored in the interrupt counter value storage means is updated after the interrupt counter value is stored in the register R2 by calculating the value (subtracting the interrupt counter value from the A register value) (Step S42),
When it is determined that the interrupt counter value stored in the interrupt counter value storage means has been updated, the value stored in the register R1 is updated (step S33),
When the value stored in the register R1 becomes a predetermined value (“0”) (“Yes” in step S31), it is determined that the standby time has elapsed.

The second solution is
The main process (M_MAIN) that controls the progress of the game,
During execution of the main process, an interrupt process (I_INTR) for executing a process different from the main process by an interrupt at regular intervals;
Interrupt counter value storage means (_CT_INTR) for storing an interrupt counter value updated for each interrupt processing,
In the main process, when a combination of symbols corresponding to replay is displayed, a wait process (2-byte wait process (R_2BYTE_WAIT)) that temporarily delays the progress of the process is executed,
In the waiting process,
The value t1 corresponding to the waiting time is added to the interrupt counter value t2 stored in the interrupt counter value storage means, and the calculation result t3 is stored in the register R1 (BC register) (step S904).
The interrupt counter value stored in the interrupt counter value storage means is stored in the register R2 (A register) (step S911), and the value stored in the register R2 and the value stored in the register R1 are calculated (A By subtracting the BC register value from the register value), it is determined whether or not the value stored in the register R2 has reached t3 (step S912),
When the value stored in the register R2 becomes t3 (“Yes” in step S912), it is determined that the standby time has elapsed.

(C) Effect of Initial Invention According to the initial invention, interrupt counter value storage means (for example, one address or two addresses of RWM) and registers R1 and R2 (for example, registers built in the CPU of the main control means) are used. Thus, the wait process can be executed.
As a result, the storage capacity of the main control means (for example, the capacity of the RWM) can be prevented from being compressed. Further, since it is not necessary to provide a program for zero check of the storage means (for example, RWM), the program capacity can be reduced.
In addition, since the wait process is executed at the time of winning the replay, automatic betting is not performed at the moment when the replay wins, and the start timing of automatic betting can be made appropriate by appropriately setting the waiting time. .

6). Initial invention 6
(A) Problem to be solved by the original invention Same as the problem in the original invention 1.
(B) Means for Solving the Problems Related to the Initial Invention The first solving means is:
The main process (M_MAIN) that controls the progress of the game,
During execution of the main process, an interrupt process (I_INTR) for executing a process different from the main process by an interrupt at regular intervals;
Interrupt counter value storage means (_CT_INTR) for storing an interrupt counter value updated for each interrupt processing,
In the main process, when a predetermined condition is satisfied (when 1BB is won and 1BB wins), a first special game (1BB game) that is advantageous to the player is executed,
In the first special game, when the first special game start condition is satisfied, the second special game (RB game) is started, and when the second special game end condition is satisfied (the number of games or winnings is a predetermined number of times) (When it reaches (twice)), the second special game is finished, and when the second special game is finished, if the first special game finish condition (payout of 200 cards) is not satisfied, the second special game is again made. Control to start the game,
In the main process, when the second special game is ended and the second special game is started again, the process proceeds between the end of the second special game and the start of the next second special game. Execute the wait process (2 byte time wait process (R_2BYTE_WAIT)) that temporarily delays
In the waiting process,
A value corresponding to the waiting time is stored in the register R1 (BC register) (waiting time setting process),
The interrupt counter value stored in the interrupt counter value storage means is stored in the register R2 (A register) (step S41), and the interrupt counter value stored in the interrupt counter value storage means and the register R2 are stored. Whether or not the interrupt counter value stored in the interrupt counter value storage means is updated after the interrupt counter value is stored in the register R2 by calculating the value (subtracting the interrupt counter value from the A register value) (Step S42),
When it is determined that the interrupt counter value stored in the interrupt counter value storage means has been updated, the value stored in the register R1 is updated (step S33),
When the value stored in the register R1 becomes a predetermined value (“0”) (“Yes” in step S31), it is determined that the standby time has elapsed.

The second solution is
The main process (M_MAIN) that controls the progress of the game,
During execution of the main process, an interrupt process (I_INTR) for executing a process different from the main process by an interrupt at regular intervals;
Interrupt counter value storage means (_CT_INTR) for storing an interrupt counter value updated for each interrupt processing,
In the main process, when a predetermined condition is satisfied (when 1BB is won and 1BB wins), a first special game (1BB game) that is advantageous to the player is executed,
In the first special game, when the first special game start condition is satisfied, the second special game (RB game) is started, and when the second special game end condition is satisfied (the number of games or winnings is a predetermined number of times) (When it reaches (twice)), the second special game is finished, and when the second special game is finished, if the first special game finish condition (payout of 200 cards) is not satisfied, the second special game is again made. Control to start the game,
In the main process, when the second special game is ended and the second special game is started again, the process proceeds between the end of the second special game and the start of the next second special game. Execute the wait process (2 byte time wait process (R_2BYTE_WAIT)) that temporarily delays
In the waiting process,
The value t1 corresponding to the waiting time is added to the interrupt counter value t2 stored in the interrupt counter value storage means, and the calculation result t3 is stored in the register R1 (BC register) (step S904).
The interrupt counter value stored in the interrupt counter value storage means is stored in the register R2 (A register) (step S911), and the value stored in the register R2 and the value stored in the register R1 are calculated (A By subtracting the BC register value from the register value), it is determined whether or not the value stored in the register R2 has reached t3 (step S912),
When the value stored in the register R2 becomes t3 (“Yes” in step S912), it is determined that the standby time has elapsed.

(C) Effect of Initial Invention According to the initial invention, interrupt counter value storage means (for example, one address or two addresses of RWM) and registers R1 and R2 (for example, registers built in the CPU of the main control means) are used. Thus, the wait process can be executed.
As a result, the storage capacity of the main control means (for example, the capacity of the RWM) can be prevented from being compressed. Further, since it is not necessary to provide a program for zero check of the storage means (for example, RWM), the program capacity can be reduced.

Furthermore, there is known a slot machine having a specification in which the second special game is repeated in the first special game (the RB is continuously operated during the 1BB game), but according to the rules, the second special game has the number of games or winnings. Needs to be terminated when a predetermined number of times is reached. When the second special game is continuously executed during the first special game, it is necessary to clearly separate the end of the second special game from the start of the second special game.
Then, like the said invention, after a 2nd special game is complete | finished, a division | segmentation can be clarified by restarting a 2nd special game after performing a weight process.
Furthermore, by setting the wait time appropriately, the main process is stopped during the wait process while clarifying the break from the end of the second special game to the restart (for example, it can be clearly notified to the testing machine). Can be set to such an extent that the player cannot experience it.

7). Initial invention 7
(A) Problem to be solved by the original invention Same as the problem in the original invention 1.
(B) Means for Solving the Problems Related to the Initial Invention The first solving means is:
The main process (M_MAIN) that controls the progress of the game,
During execution of the main process, an interrupt process (I_INTR) for executing a process different from the main process by an interrupt at regular intervals;
Interrupt counter value storage means (_CT_INTR) for storing an interrupt counter value updated for each interrupt processing,
The first special combination operation state flag (D3 bit of the operation state flag (_FL_ACTION)) indicating the operation / non-operation of the first special combination and the second special combination operation / non-operation as the operation state flag of the combination 2 special combination operating state flag (D4 bit of the operating state flag),
In the main process, when a combination of symbols corresponding to the first special combination is displayed, the first special game (1BB game) is executed,
When starting the first special game, the first special combination operation state flag and the second special combination operation state flag are turned on to start the second special game (RB game), and the second special game end condition is satisfied. (When the number of games or the number of winnings reaches a predetermined number (twice)), the second special role operating state flag is turned off to end the second special game, and at the end of the second special game, the first special When the game end condition (200 payouts) is not satisfied, the second special combination operation state flag is turned on again to control to start the second special game,
In the main process, when the second special combination operation state flag is turned off in the first special game, the second special combination operation state flag is turned on again to start the second special game. 2 Waiting process (2-byte time waiting process (R_2BYTE_WAIT)) that temporarily delays the progress of the process when the special function operating state flag is turned off is executed, and the second special function operating state flag is set after the standby process is completed. Control to turn on and start the second special game,
In the waiting process,
A value corresponding to the waiting time is stored in the register R1 (BC register) (waiting time setting process),
The interrupt counter value stored in the interrupt counter value storage means is stored in the register R2 (A register) (step S41), and the interrupt counter value stored in the interrupt counter value storage means and the register R2 are stored. Whether or not the interrupt counter value stored in the interrupt counter value storage means is updated after the interrupt counter value is stored in the register R2 by calculating the value (subtracting the interrupt counter value from the A register value) (Step S42),
When it is determined that the interrupt counter value stored in the interrupt counter value storage means has been updated, the value stored in the register R1 is updated (step S33),
When the value stored in the register R1 becomes a predetermined value (“0”) (“Yes” in step S31), it is determined that the standby time has elapsed.

The second solution is
The main process (M_MAIN) that controls the progress of the game,
During execution of the main process, an interrupt process (I_INTR) for executing a process different from the main process by an interrupt at regular intervals;
Interrupt counter value storage means (_CT_INTR) for storing an interrupt counter value updated for each interrupt processing,
The first special combination operation state flag (D3 bit of the operation state flag (_FL_ACTION)) indicating the operation / non-operation of the first special combination and the second special combination operation / non-operation as the operation state flag of the combination 2 special combination operating state flag (D4 bit of the operating state flag),
In the main process, when a combination of symbols corresponding to the first special combination is displayed, the first special game (1BB game) is executed,
When starting the first special game, the first special combination operation state flag and the second special combination operation state flag are turned on to start the second special game (RB game), and the second special game end condition is satisfied. (When the number of games or the number of winnings reaches a predetermined number (twice)), the second special role operating state flag is turned off to end the second special game, and at the end of the second special game, the first special When the game end condition (200 payouts) is not satisfied, the second special combination operation state flag is turned on again to control to start the second special game,
In the main process, when the second special combination operation state flag is turned off in the first special game, the second special combination operation state flag is turned on again to start the second special game. 2 Waiting process (2-byte time waiting process (R_2BYTE_WAIT)) that temporarily delays the progress of the process when the special function operating state flag is turned off is executed, and the second special function operating state flag is set after the standby process is completed. Control to turn on and start the second special game,
In the waiting process,
The value t1 corresponding to the waiting time is added to the interrupt counter value t2 stored in the interrupt counter value storage means, and the calculation result t3 is stored in the register R1 (BC register) (step S904).
The interrupt counter value stored in the interrupt counter value storage means is stored in the register R2 (A register) (step S911), and the value stored in the register R2 and the value stored in the register R1 are calculated (A By subtracting the BC register value from the register value), it is determined whether or not the value stored in the register R2 has reached t3 (step S912),
When the value stored in the register R2 becomes t3 (“Yes” in step S912), it is determined that the standby time has elapsed.
(C) Effect of original invention Same effect as original invention 6.

8). Initial invention 8
(A) Problems to be solved by the original invention In the conventional technique, a slot having a specification that repeats the second special game (RB game) during the first special game (1BB game) (the RB is continuously operated during the 1BB game). The machine is known. In this case, according to the rules, the second special game needs to be ended when the number of games or the number of winnings reaches a predetermined number. When the second special game is continuously executed during the first special game, it is necessary to clearly separate the end of the second special game from the start of the second special game and transmit it to the testing machine side.
Therefore, the problem to be solved by the original invention is that the end of the second special game and the start of the second special game are clarified and transmitted to the testing machine side in the slot machine having the specification of repeating the second special game during the first special game. Is to make it possible.

(B) Means for Solving the Problems Related to the Initial Invention
The main process (M_MAIN) that controls the progress of the game,
An interrupt process (I_INTR) that executes a process different from the main process by an interrupt at regular intervals during the execution of the main process,
The first special combination operation state flag (D3 bit of the operation state flag (_FL_ACTION)) indicating the operation / non-operation of the first special combination and the second special combination operation / non-operation as the operation state flag of the combination 2 special combination operating state flag (D4 bit of the operating state flag),
In the main process, when a combination of symbols corresponding to the first special combination is displayed, the first special game (1BB game) is executed,
When starting the first special game, the first special combination operation state flag and the second special combination operation state flag are turned on to start the second special game (RB game), and the second special game end condition is satisfied. (When the number of games or the number of winnings reaches a predetermined number (twice)), the second special combination operating state flag is turned off (step S566), the second special game is ended, and the second special game is ended. Sometimes when the first special game end condition (200 payouts) is not satisfied, the second special combination operation state flag is turned on again (step S88), and control is performed so as to start the second special game.
In the main process, when the second special combination operation state flag is turned off in the first special game, the second special combination operation state flag is turned on again to start the second special game. 2 Waiting process (2-byte time waiting process (R_2BYTE_WAIT)) that temporarily delays the progress of the process when the special function operating state flag is turned off is executed, and the second special function operating state flag is set after the standby process is completed. Control to turn on and start the second special game,
In the interrupt process, information based on the operating state flag is transmitted to the outside as a test signal (step S616).
It is characterized by that.

(C) Effect of the Initial Invention According to the initial invention, it is possible to transmit a test signal that clearly indicates ON / OFF of the second special combination operating state flag (to a testing machine or the like) using standby processing.

10 Slot machines (gaming machines)
DESCRIPTION OF SYMBOLS 13 Display window 16 Door switch 21 Effect lamp 22 Speaker 23 Image display apparatus 24 Cross key 25 Push button 31 Reel 32 Motor 35 Medal paying device 35a Hopper 35b Sub tank 36 Hopper motor 37a, 37b Discharge sensor 38 Full sensor 39 Reel sensor 40a 1 bed Switch 40b 3-bet switch 41 Start switch 42 Stop switch 43 Medal insertion slot 43a Passage sensor 44a, 44b Insertion sensor 45 Blocker 46 Settling switch 51 Power switch 52 Setting key switch 53 Setting change / reset switch 54 Setting door switch 60 Main control board ( Main control means)
61 RWM
62 ROM
63 Main CPU
63a Setting change means 63b Role lottery means 63c Reel control means 63d Winning determination means 63e Payout means 63f Game state control means 63g Command control means 64 Set value display LED
70 Display board 71 Storage number display LED
72 Acquisition number display LED
73 Status display LED
73a Replay display LED
73b LED indicating that it can be inserted
73c Checkout LED
73d Game start LED
73e Single-load indicator LED
73f Two-sheet loading display LED
73g Three-sheet loading indicator LED
80 Sub-control board (sub-control means)
81 RWM
82 ROM
83 Sub CPU
83a Production output control means 100 External concentration terminal board

Claims (1)

Main control means for controlling the progress of the game;
A storage number display means for displaying the storage number;
The main control means includes
Control to start the special gaming state based on meeting the special gaming state start condition,
In the special game state, it enables the operation of special objects,
When the special game state end condition is not satisfied and the predetermined end condition is satisfied during the operation of the special character, the special character is ended and the first weight processing for the predetermined time is performed. after the execution, again, to start the operation of the special role material,
And it can execute the interrupt processing in a time interval shorter than the predetermined time,
In the interrupt process that is executed when a special character is operating in the special game state, a process for outputting a test signal indicating that the special character is operating in the special game state is executed. Made possible
In the interrupt process executed during the first wait process in the special game state, it is possible to execute a process for outputting a test signal indicating that the special game state and the special accessory are not operating,
When the combination of symbols corresponding to the small role is stopped, as a process for giving a profit, it is possible to execute the addition process of the storage number displayed by the storage number display means,
In the storage number adding process displayed by the storage number display means, after adding the storage number “1”, before adding the storage number “1” next, the second time which is longer than the predetermined time. A gaming machine characterized by executing weight processing.

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