JP5750326B2 - Electronic device protection circuit - Google Patents

Description

  The present invention relates to a protection circuit for protecting an electronic device from overvoltage, and more particularly to a protection circuit for an electronic device having a power supply terminal.

  In recent years, data transmission and power supply between a plurality of electronic devices have been performed via USB (Universal Sirial Bus) terminals. As an example of data transmission performed using a USB terminal, for example, there is data transmission / reception between a USB memory and a personal computer. As an example of power supply, for example, a personal computer supplies power to a secondary battery in a USB memory for holding data.

The USB terminal has a plurality of pins exposed to the atmosphere, and there is a gap between the pins. Due to such a structure, a surge voltage (overvoltage) may be generated at the USB terminal when the USB terminal is attached to or detached from an electronic device such as a personal computer. When a surge voltage is generated at the USB terminal, the internal circuit of the electronic device connected to the USB terminal may be destroyed.
As a conventional technique for solving such a problem, for example, there is a protection circuit described in Patent Document 1 described in FIG. The prior art shown in FIG. 13 is a protection circuit that protects an internal circuit of an electronic device that mounts a USB terminal on a personal computer or the like and charges a secondary battery via a USB device from a surge voltage.

  In the protection circuit of Patent Document 1 shown in FIG. 13, a switch 131 is provided on a power supply line 130 that supplies power to a charging control IC inside the USB device. In addition, a voltage dividing circuit that divides the input voltage by the resistance elements 132 and 133, and a comparator 134 that controls on / off of the switch by comparing the divided voltage with the reference voltage are provided. The comparator 134 turns off the switch 131 when a surge voltage is input.

JP 2008-009898 A

  However, the above-described conventional protection circuit cannot function as a protection circuit unless power is supplied to the comparator. That is, the conventional protection circuit operates as a protection circuit only when an internal voltage equal to or higher than a predetermined value is supplied to the protection circuit. In such a protection circuit, the voltage of the secondary battery in the electronic device is so low that the protection circuit cannot be operated, and an LDO (Low Drop Out) in the protection circuit rises (an internal voltage equal to or higher than a predetermined voltage value). If a surge voltage is applied before the generation), the circuit inside the electronic device may be destroyed by the surge voltage.

That is, when the internal power is not applied, the gate of the switch 131 is in a floating state (not driven), and the surge voltage is applied to the gate of the switch 131 via the gate-source capacitance and the gate-drain capacitance. introduce. Then, the switch 131 is turned on and the surge voltage is transmitted to a circuit inside the electronic device.
In addition, the surge voltage may include a voltage mainly including a high frequency component (AC component), a voltage mainly including a low frequency component (DC component), or a voltage including both of them. In order to cope with such various surge voltages using the above-described protection circuit of the prior art, the switch 131 is turned off almost simultaneously with the input of the surge voltage and kept off until the internal voltage reaches a predetermined voltage. There must be.

  As described above, the protection circuit according to the prior art cannot turn off the switch 131 simultaneously with the input of the surge voltage when both the voltage of the secondary battery and the internal voltage are low. In addition, if the time until the switch 131 is turned on is shorter than the time when the surge voltage is input, the internal circuit of the electronic device may be destroyed. If the time is longer, the electronic device receives power supply and operates. The start timing is delayed.

  The present invention has been made in view of the above points, and provides a protection circuit for protecting a circuit inside an electronic device from a surge voltage applied to a power supply terminal without using an internal power source of the electronic device. Objective. In addition, the present invention provides a protection circuit that protects an internal circuit of an electronic device against any surge voltage regardless of the frequency component of the input surge voltage without using an internal power supply. Objective.

(Claim equivalent)
In order to solve the above problems, the protection circuit for an electronic device according to the present invention is a protection circuit for an electronic device that protects an electronic device having a power supply terminal, and an input terminal (for example, shown in FIG. An input terminal 101), an output terminal (for example, the output terminal 102 shown in FIG. 1) that outputs a voltage input from the input terminal to the inside of the electronic device, and the input terminal and the output terminal are electrically connected When the input voltage input from the switch (eg, the switch 103 shown in FIG. 1) and the input terminal is larger than a preset voltage, the discharge control signal is generated using the self voltage of the input voltage as a power source. a discharge signal generating circuit for generating (e.g., discharge signal generating circuit 105 shown in FIG. 1), an internal voltage generation count for generating an internal voltage of the input voltage as a power source (E.g., LDO106 shown in FIG. 1) has, wherein said other protection circuit which operates by the internal voltage of the electronic device (e.g., noted in embodiment 1 "General Protection circuit"), a The discharge control signal causes the switch to operate so as to cut a signal transmission path between the input terminal and the output terminal, and the discharge signal generation circuit has a value in which the value of the internal voltage is set in advance. When reached, it characterized that you stop the operation.

The self-voltage means the voltage of the input voltage itself, and in the present invention, it means that the discharged input voltage becomes the power source of the discharge control signal .

In the electronic device protection circuit of the present invention, the discharge signal generation circuit includes an arithmetic circuit (for example, the capacitive element 202 and the resistive element 203 shown in FIG. 2) that differentiates or integrates the discharge voltage of the input voltage. Is desirable.
In the electronic device protection circuit according to the present invention, the discharge signal generation circuit includes a first impedance element (for example, the capacitive element 202 shown in FIG. 2) and the first impedance between the input terminal and the ground. A second impedance element (for example, the resistance element 203 shown in FIG. 2) connected in series to the element, and a connection point (for example, FIG. 2) where the first impedance element and the second impedance element are connected in series. It is desirable to output the discharge control signal (for example, the discharge control signal X shown in FIG. 2) from the connection portion p) shown in FIG.

In the protection circuit for an electronic device according to the present invention, the first impedance element is a capacitive element (for example, the capacitive element 202 shown in FIG. 2), and the second impedance element is a resistive element (for example, the resistance shown in FIG. 2). The element 203) is desirable.
In the electronic device protection circuit of the present invention, the first impedance element is a resistance element (for example, the resistance element 502 shown in FIG. 5), and the second impedance element is directed from the input terminal toward the ground. It is desirable that the diode has a forward direction (for example, the diode 503 shown in FIG. 5).

  According to the protection circuit for an electronic device of the present invention, in the above-described invention, the discharge signal generation circuit includes a first unit connected between the input terminal and the ground, and the first unit in parallel. A second unit connected between the input terminal and the ground, wherein the first unit includes a capacitive element (for example, the capacitive element 202 shown in FIG. 8) and a first connected in series to the capacitive element. 1 resistance element (for example, the resistance element 203 shown in FIG. 8), and the second unit is connected to the resistance element (for example, the resistance element 502 shown in FIG. 8) and the resistance element in series. A diode having a forward direction from the input terminal toward the ground (for example, a diode 503 shown in FIG. 8), and the capacitive element and the first resistive element are connected in series. A first discharge control signal (for example, the discharge control signal X illustrated in FIG. 8) is output from the connection point (for example, the connection portion p illustrated in FIG. 8), and the second resistance element and the diode are connected in series. It is desirable to output the second discharge control signal (for example, the discharge control signal Y illustrated in FIG. 8) from the connection point (for example, the connection portion q illustrated in FIG. 8).

  The present invention as described above can provide a protection circuit for an electronic device that protects a circuit inside the electronic device from a surge voltage without using an internal power supply.

It is a circuit diagram for demonstrating the protection circuit of the electronic device of Embodiment 1 of this invention. FIG. 2 is a diagram for explaining a circuit configuration of a discharge signal generation circuit shown in FIG. 1. It is a schematic diagram which compares and shows the discharge control signal X and surge voltage of Embodiment 1 of this invention. 3 is a timing chart for explaining the operation of the protection circuit of the first embodiment. It is a figure for demonstrating the discharge signal generation circuit of Embodiment 2 of this invention. It is a schematic diagram which compares and shows the discharge control signal Y and surge voltage of Embodiment 2 of this invention. It is a circuit diagram for demonstrating the protection circuit of the USB device of Embodiment 3 of this invention. It is a figure for demonstrating the discharge signal generation circuit of Embodiment 3 of this invention. It is a schematic diagram which compares and shows the discharge control signals X and Y of Embodiment 3 of this invention, and the high frequency surge voltage. It is a schematic diagram which compares and shows the discharge control signal X of Embodiment 3 of this invention, the discharge control signal Y, and the surge voltage of a low frequency. It is a schematic diagram which compares and shows the discharge control signals X and Y of Embodiment 3 of this invention, and a surge voltage. 10 is a timing chart for explaining the operation of the protection circuit of the third embodiment. It is a figure for demonstrating the prior art of this invention.

Hereinafter, Embodiments 1 to 3 of a protection circuit for an electronic device according to the present invention (hereinafter, simply referred to as a protection circuit) will be described with reference to the drawings.
(Embodiment 1)
(Constitution)
FIG. 1 is a circuit diagram for explaining a protection circuit for an electronic apparatus according to the first embodiment. The illustrated protection circuit is provided inside the electronic device and functions to protect the electronic device from a surge voltage input from a power supply terminal to which a terminal (not shown) such as a cable is attached. In the first embodiment, it is assumed that both the cable terminal and the power supply terminal are USB terminals manufactured according to the USB standard.

  The protection circuit has an input terminal 101 and an output terminal 102. The input terminal 101 is connected to the attached USB. The output terminal 102 is connected to a subsequent circuit of an electronic device (hereinafter referred to as a USB device), and supplies a voltage input from the input terminal (hereinafter referred to as an input voltage) to the subsequent circuit. When a surge occurs in the input voltage, the surge voltage is prevented from being transmitted to the output terminal 102 and the subsequent circuit is damaged.

  The protection circuit shown in FIG. 1 includes a general protection circuit similar to the prior art and a protection circuit that can cope with a surge voltage before the internal voltage of the USB device reaches a predetermined voltage (hereinafter referred to as Vdd). Contains. Hereinafter, in this specification, the protection circuit of the first embodiment refers to a protection circuit that can cope with a surge voltage before the internal voltage of the USB device reaches Vdd. A general protection circuit is a protection circuit that operates after the internal voltage of the USB device reaches Vdd.

  The protection circuit of Embodiment 1 includes a switch 103 that connects and disconnects between the input terminal 101 and the output terminal 102. The switch 103 is constituted by a MOS transistor, and a MOS transistor 104 for controlling charge / discharge of charges stored in the gate capacitance is connected to a gate terminal of the switch 103. In addition, the protection circuit according to the first embodiment includes a discharge signal generation (DSCGEN) circuit 105 that outputs a discharge control signal to the gate terminal of the MOS transistor 104.

In the circuit shown in FIG. 1, the switch 103 and the MOS transistor 104 are both N-channel MOS transistors. The forward direction of the body diode of the switch 103 is the direction from the output terminal 102 to the input terminal 101.
The switches 103 and 104 are not limited to those configured as MOS transistors having the above-described polarity. When the switch 103 is configured by a P-channel MOS transistor, a signal having a reverse polarity to that of an N-channel MOS transistor is applied to the gate of the switch 103. When the MOS transistor 104 is composed of a P-channel MOS transistor, a discharge control signal having a reverse polarity to that when the MOS transistor 104 is composed of an N-channel MOS transistor is applied to the gate of the MOS transistor 104.

The discharge signal generation circuit 105 passively outputs a discharge control signal X to the gate of the MOS transistor 104 when a surge voltage is generated. The gate of the MOS transistor 104 is turned on by the discharge control signal X. When the MOS transistor 104 is turned on, the gate of the switch 103 is short-circuited (forced) to the ground.
As described above, since the switch 103 is an N-channel MOS transistor, it is completely turned off when the gate is short-circuited to the ground. For this reason, the surge generated in the input voltage is not transmitted to the output terminal 102, and the circuit subsequent to the output terminal 102 is protected from the surge voltage.

  A general protection circuit includes an LDO (Low Drop-Out) 106 that receives an input voltage from the input terminal 101 and generates a voltage having a constant value. The voltage generated by the LDO 106 is input to the discharge signal generation circuit 105. The discharge signal generation circuit 105 stops operating when the voltage generated by the LDO 106 reaches the internal voltage of the USB device Vdd.

  Further, a general protection circuit receives a supply of an internal voltage and compares the reference voltage Vref of the power supply 114 with an input voltage dropped by the resistance element 113 whose resistance values are divided into Ra and Rb. It has. The comparator 107 outputs a discharge control signal Z when the dropped input voltage is larger than the reference voltage Vref.

In addition, the circuit shown in FIG. 1 includes a MOS transistor 108 that receives a discharge control signal Z at its gate and is turned on and off by the discharge control signal Z. The MOS transistor 108 is an N-channel MOS transistor that is turned on when the discharge control signal Z is input.
Further, the circuit shown in FIG. 1 includes an oscillator 109 and a booster circuit 110. The oscillator 109 and the booster circuit 110 receive the voltage Vdd generated by the LDO 106 or the voltage supplied from the secondary battery 112 and output a drive signal PG that boosts the gate voltage of the switch 103. The gate of the switch 103 is turned on by boosting the gate voltage, and the input voltage Vin is transmitted from the input terminal 101 to the output terminal 102.

  FIG. 2 is a diagram for explaining the circuit configuration of the discharge signal generation circuit 105. In the discharge signal generation circuit 105, a resistance element 201 (resistance value R1), a capacitance element 202 (capacitance value C1), and a resistance element 203 (resistance value R2) are connected in series between the input terminal 101 and the ground. A discharge control signal X is output from a connection portion p between the capacitive element 202 and the resistive element 203. A MOS transistor 204 is connected between the node 208 from which the discharge control signal X is output and the ground.

  In addition, an element protection circuit 205 is connected between the connection between the resistance element 201 and the capacitor 202 and the ground. The element protection circuit 205 includes Zener diodes 206 and 207. The element protection circuit 205 protects the resistance element 201, the capacitance element 202, and the resistance element 203 by discharging the overvoltage when the input voltage Vin becomes higher than the breakdown voltage due to the surge.

The capacitive element 202 and the resistive element 203 of the discharge signal generating circuit 105 constitute a high pass filter (HPF). For this reason, the discharge control signal X is a signal obtained by differentiating the waveform of a high-frequency (AC) surge voltage with a high-pass filter.
Further, the voltage generated by the LDO 106 is applied to the gate of the MOS transistor 204 connected between the node 208 and the ground. When the voltage generated by the LDO 106 reaches Vdd, the MOS transistor 204 is turned on, the node 208 is short-circuited to the ground, and the output of the discharge control signal X is stopped.

(Operation)
Next, the operation of the configuration described above will be described. The operation of the configuration shown in FIG. 1 is performed when the internal voltage of the USB device reaches Vdd (1) and when the internal voltage does not reach Vdd, a voltage of Vdd or higher is supplied from the secondary battery 112. The case (2) is different from the case (3) in which both the internal voltage and the voltage of the secondary battery 112 are less than Vdd. The protection circuit of Embodiment 1 operates when both the internal voltage of (3) and the voltage of the secondary battery 112 are less than Vdd.

  That is, when both the internal voltage and the voltage of the secondary battery 112 are less than Vdd, when a surge occurs in the input terminal voltage Vin, the surge voltage is input to the resistance element 113, the LOD 106, and the discharge signal generation circuit 105. At this time, the protection circuit of the first embodiment operates until the internal voltage generated by the LOD 106 reaches Vdd, and the general protection circuit cannot operate.

  In the discharge signal generation circuit 105, the surge voltage is input to the HPF configured by the capacitive element 202 and the resistance element 203. A discharge signal X corresponding to the magnitude of the surge voltage is output from the connection portion p between the capacitive element 202 and the resistive element 203. The magnitude of the discharge signal X depends on the cutoff frequency determined by the capacitive element 202 and the resistive element 203. The larger the value of the capacitance C1 of the capacitive element 202 and the resistance value R2 of the resistive element 203, the more the discharge control signal X becomes. growing.

  FIG. 3 is a schematic diagram showing a comparison between the discharge control signal X and the surge voltage. In FIG. 3, the vertical axis represents voltage, and the horizontal axis represents time. When a surge occurs in the input voltage Vin, a discharge control signal X that rises with a change in the input voltage Vin is passively generated by the HPF shown in FIG. The discharge control signal X is input to the gate of the MOS transistor 104 shown in FIG.

  When the discharge control signal X is input to the gate of the MOS transistor 104, the MOS transistor 104 is turned on and the gate of the switch 103 is forced to the ground. Since the gate of the switch 103 is forced to the ground, a surge voltage is not input to the gate via a parasitic capacitance such as a gate-drain capacitance and a gate-source capacitance of the switch 103, and the switch 103 is not turned on.

As described above, in the first embodiment, when the surge voltage is input before the internal voltage reaches Vdd, the switch 103 is completely turned off, so that the surge voltage is not transmitted from the input terminal 101 to the output terminal 102.
That is, the protection circuit of the first embodiment can turn off the switch 103 by using the self power (self energy) of the surge voltage as a power source without using the internal voltage. For this reason, even if the voltage of the secondary battery 112 is lower than Vdd and the internal voltage of Vdd is generated from the input voltage Vin, the internal circuit of the USB device can be protected from the surge voltage. The protection circuit according to the first embodiment is particularly effective for a high-frequency surge voltage because the switch 103 can be turned off at high speed against the surge voltage. Further, as the capacitance value C1 of the capacitive element 202 and the resistance value R2 of the resistive element 203 are increased, the internal circuit can be protected from a surge voltage in a wider frequency range.

Next, the operation of the protection circuit of Embodiment 1 will be described using a timing chart.
4A to 4C are timing charts for explaining the operation of the protection circuit of the first embodiment. 4A to 4C show the input voltage Vin, the internal voltage, the drive signal PG, the discharge control signal Z, the discharge control X, and the gate voltage (GATE) of the switch 103 when no surge voltage is input to the USB device. ), The output voltage Vout. FIG. 4A shows the parameters when no surge voltage is input. FIG. 4A shows a case where the internal voltage of the USB device does not reach the voltage Vdd that can operate the protection circuit.

  FIG. 4B shows the above parameters when the internal voltage of the USB device is Vdd or higher and a surge voltage is input, and FIG. 4C shows that there is no internal voltage of Vdd or higher inside the USB device. The above parameters are shown when a surge voltage including a high frequency component and a low frequency component is input. Hereinafter, the operation of the protection circuit of Embodiment 1 will be described for each case.

(1) When no surge voltage is input When the input voltage Vin is input at time t0, the discharge signal generation circuit 105 outputs a discharge control signal X according to the change in the input voltage Vin.
When the internal voltage reaches Vdd at time t2, the discharge signal generation circuit 105 stops and the booster circuit 110 shown in FIG. 1 operates. Booster circuit 110 outputs drive signal PG to the gate of switch 103 at time t3. The gate of the switch 103 is turned on by the drive signal PG, and the output voltage Vout is output.

(2) When the internal voltage is Vdd or higher and a surge voltage is input When the internal voltage is Vdd or higher, the LDO 106 stops the operation of the discharge signal generation circuit 105. For this reason, even if a surge voltage is input as the input voltage Vin, the discharge signal generation circuit 105 does not operate.
The comparator 107 compares the input voltage Vin with the reference voltage Vref. Now, since a surge voltage is input to the protection circuit, the input voltage Vin is larger than the reference voltage Vref, and the discharge control signal Z is output from the comparator 107. The MOS transistor 108 is turned on by the discharge control signal Z, and the gate of the switch 103 is forced to the ground. For this reason, the switch 103 is turned off, and the surge voltage input from the input terminal 101 is not transmitted to the inside of the USB device via the output terminal 102.

However, in such an operation, the discharge control signal Z is output at time t1 with a delay from the time t0 when the surge voltage is input by the time required for the comparator 107 to compare the surge voltage with the reference voltage Vref. For this reason, a surge voltage is input to the switch 103 for a short time from the time t0 to the time t1, and the gate voltage slightly increases due to the capacitance of the switch 103 and the like. Further, the output voltage Vout is slightly output as the gate voltage increases.
Further, when the drive signal PG is output at time t3, the gate voltage of the switch 103 increases and the switch 103 is turned on. When a surge occurs again in the input voltage Vin at time t4, the comparator 107 outputs the discharge control signal Z and turns off the gate of the switch 103 while the input voltage Vin exceeds the reference voltage Vref (time t4 to t5). For this reason, it can be seen that the output voltage Vout slightly decreases between times t4 and t5.

(3) When the internal voltage is smaller than Vdd and a surge voltage is input When the surge voltage is input as the input voltage Vin at time t0, the discharge signal generation circuit 105 detects the discharge control signal X according to the change in the input voltage Vin. Is output. At this time, since the value of the input voltage Vin is larger than a preset value due to the occurrence of a surge, the value of the discharge control signal X is increased. When the value of the discharge control signal X reaches or exceeds the threshold voltage of the MOS transistor 104, the MOS transistor 104 is turned on.

When the MOS transistor 104 is turned on, the gate of the switch 103 is forced to the ground, and the switch 103 is completely turned off. For this reason, while the internal voltage is less than the voltage Vdd capable of operating a general protection circuit, the protection circuit of the first embodiment can protect the internal circuit of the USB device from the surge voltage.
In addition, since the discharge control signal X is a signal that is passively generated by a surge voltage, the discharge control signal X is generated substantially simultaneously with the input of the surge voltage from the input terminal 101. For this reason, the first embodiment can output the discharge control signal X more quickly than the conventional technique for comparing the input voltage Vin with the reference voltage Vref, so that the switch 103 is completely turned off and the gate voltage is slightly increased. Can also be suppressed.

When the internal voltage reaches Vdd at time t3, the discharge signal generation circuit 105 stops and the booster circuit 110 shown in FIG. 1 operates. Booster circuit 110 outputs drive signal PG to the gate of switch 103 at time t4. The gate of the switch 103 is turned on by the drive signal PG, and the output voltage Vout is output.
Further, when the drive signal PG is output at time t4, the gate voltage of the switch 103 increases and the switch 103 is turned on. When a surge occurs again in the input voltage Vin at time t5, the comparator 107 outputs the discharge control signal Z and turns off the gate of the switch 103 while the input voltage Vin exceeds the reference voltage Vref (time t5 to t6). . For this reason, it can be seen that the output voltage Vout slightly decreases between times t5 and t6.

(Embodiment 2)
Next, Embodiment 2 of the present invention will be described.
(Constitution)
As in the first embodiment, the protection circuit according to the second embodiment is a protection circuit that operates before the internal voltage of the USB device reaches Vdd. The protection circuit of the second embodiment is different from the first embodiment in that the configuration of the discharge signal generating circuit shown in FIG. 1 is different. In the overall view of the protection circuit including the protection circuit of the first embodiment, the discharge signal generation circuit 105 in FIG. 1 is the discharge signal generation circuit 505, and therefore illustration and description thereof are omitted.

  FIG. 5 is a diagram for explaining the discharge signal generation circuit 505 of the second embodiment. The discharge signal generation circuit 505 includes a resistance element 501, a resistance element 502, and a diode 503 connected in series between the input terminal 101 and the ground. A discharge control signal Y is output from a common connection q between the anode of the diode 503 and the resistance element 502. The cathode of the diode 503 is connected to the ground.

The resistance element 501, the resistance element 502, and the diode 503 constitute a voltage dividing circuit. The depletion layer capacitance of the diode 503 forms a low-pass filter (LPF) together with the gate capacitance of the MOS transistor 104 shown in FIG. 1, and a low frequency (DC) surge voltage is generated from the resistance element 502 and the common connection portion q of the diode 503. Output as a discharge control signal Y.
In addition, an element protection circuit 507 including a Zener diode 506 is connected between the common connection q between the resistance element 501 and the resistance element 502 and the ground. The anode of the Zener diode 506 is connected to the ground, and the cathode is connected to a common connection portion of the resistance element 501 and the resistance element 502. The element protection circuit 507 protects the applied voltage to the resistance element 501, the resistance element 502, and the diode 503 from exceeding the element withstand voltage and being destroyed when an overvoltage is applied to the input terminal 101. For this reason, when the input voltage Vin exceeds the breakdown voltage, a current flows through the element protection circuit 507, and the overvoltage is discharged as the discharge control signal Y.

(Operation)
Next, the operation of the protection circuit of the second embodiment will be described.
In the protection circuit of the second embodiment, when a surge voltage is input to the input terminal 101, the voltage dividing circuit of the combined resistance of the resistance elements 501 and 502 and the diode 503 causes the common connection portion q between the resistance element 502 and the diode 503 to be connected. A discharge signal Y is output. The current-voltage characteristic between the anode and the cathode of the diode 503 has an exponential function characteristic. That is, the diode 503 acts as a non-linear resistance.

  When the input voltage Vin increases, a large current flows through the diode 503 beyond the threshold voltage, and a discharge operation is started. At this time, the divided voltage of the resistance elements 501 and 502 and the diode 503 is output as the discharge control signal Y to the MOS transistor 104 shown in FIG. 5 is connected to the MOS transistor 204 of the common connection portion q and the ground, and the internal voltage of Vdd is applied to the gate of the MOS transistor 204 from the LDO 106 shown in FIG. The output of the discharge control signal Y is stopped.

  FIG. 6 is a schematic diagram showing a comparison between the discharge control signal Y and the surge voltage. In FIG. 6, the vertical axis represents voltage, and the horizontal axis represents time. When a surge occurs in the input voltage Vin, a discharge control signal Y corresponding to the surge voltage is output as shown in FIG. The discharge control signal Y is input to the gate of the MOS transistor 104 shown in FIG. When the discharge control signal Y is input to the gate of the MOS transistor 104, the MOS transistor 104 is turned on, and the gate of the switch 103 shown in FIG. 1 is forced to the ground.

Since the gate of the switch 103 is forced to the ground, the surge voltage is not input to the gate through the parasitic capacitance such as the gate-drain capacitance and the gate-source capacitance of the switch 103, and the switch 103 is not turned on.
As described above, in the second embodiment, when the surge voltage is input before the internal voltage reaches Vdd, the switch 103 is completely turned off, so that the surge voltage is not transmitted from the input terminal 101 to the output terminal 102.

That is, the protection circuit according to the second embodiment can turn off the switch 103 using the self-power of the surge voltage without using an internal power supply. For this reason, even if the voltage of the secondary battery 112 is lower than Vdd and the internal voltage of Vdd is generated from the input voltage Vin, the internal circuit of the USB device can be protected from the surge voltage.
In the second embodiment, since the discharge voltage is output as the discharge control signal Y from the low-pass filter, the discharge control signal Y can be output from the surge voltage that gradually rises. For this reason, the protection circuit according to the second embodiment can effectively turn off the switch 103 against a surge voltage having a low frequency. Further, as the depletion layer capacitance of the diode 503 and the gate capacitance of the MOS transistor 104 are reduced, the capacitance of the low-pass filter can be reduced, so that the internal circuit of the USB device is protected from a surge voltage in a wider frequency range. be able to.

(Embodiment 3)
Next, Embodiment 3 of the present invention will be described.
(Constitution)
FIG. 7 is a circuit diagram for explaining a protection circuit of the USB device according to the third embodiment. Among the configurations illustrated in the third embodiment, the same reference numerals are given to the same configurations as the configurations illustrated in the first embodiment, and the description thereof is partially omitted.
As in the first embodiment, the protection circuit shown in FIG. 7 is a general protection circuit and a protection circuit that can cope with a surge voltage before the internal voltage of the USB device reaches a predetermined voltage (hereinafter referred to as Vdd). Including. The protection circuit of the third embodiment indicates a protection circuit that can cope with a surge voltage before the internal voltage of the USB device reaches Vdd.
The protection circuit of the third embodiment is a protection circuit that can cope with both a high-frequency surge voltage to which the protection circuit of the first embodiment corresponds and a low-frequency surge voltage to which the protection circuit of the second embodiment corresponds. Therefore, the protection circuit according to the third embodiment includes a discharge signal generation circuit 705 instead of the discharge signal generation circuit 105 shown in FIG.

  The discharge signal generation circuit 705 is a discharge signal generation circuit that outputs a discharge control signal X and a discharge control signal Y. The third embodiment includes a MOS transistor 104 whose gate is turned on / off by a discharge control signal X and a MOS transistor 704 whose gate is turned on / off by a discharge control signal Y. Both the drain of the MOS transistor 704 and the drain of the MOS transistor 704 are connected to the gate of the switch 103, and the source thereof is connected to the ground.

When the gate of the MOS transistor 104 or the MOS transistor 704 is turned on, the gate of the switch 103 is forced to the ground. The switch 103 is completely turned off when the gate is forced to the ground, and prevents the surge of the input voltage Vin input to the input terminal 101 from being transmitted to the output terminal 102.
FIG. 8 is a diagram for explaining the discharge signal generation circuit 705 according to the third embodiment. The discharge signal generation circuit 705 is configured by connecting the discharge signal generation circuit 105 shown in FIG. 2 and the discharge signal generation circuit 505 shown in FIG. 5 in parallel. The surge voltage input to the input terminal 101 is input to both the discharge signal generation circuits 105 and 505. The discharge signal generation circuit 105 functions as an AC protection unit that protects the USB device from an AC surge voltage. Further, the discharge signal generation circuit 505 functions as a DC protection unit that protects the USB device from a DC surge voltage.

(Operation)
Next, the operation of the protection circuit of Embodiment 3 will be described. The operation of the protection circuit according to the third embodiment differs depending on the frequency of the surge voltage input from the input terminal 101. Here, the frequency of the surge voltage is divided into two stages of a relatively high frequency and a low frequency, and the operation of the protection circuit according to the third embodiment will be described for each surge voltage frequency.

(1) High Frequency Surge Voltage FIG. 9 is a schematic diagram showing a comparison between the discharge control signal X and a high frequency surge voltage. In FIG. 9, the vertical axis represents voltage and the horizontal axis represents time. When a high frequency surge occurs in the input voltage Vin, the discharge control signal X that rises with a change in the input voltage Vin is passively generated by the HPF of the discharge signal generation circuit 105 shown in FIG. On the other hand, since the discharge signal generation circuit 505 shown in FIG. 5 has LPF characteristics, a discharge control signal Y having an attenuated waveform is generated.

The discharge control signal X is input to the gate of the MOS transistor 104, and the MOS transistor 104 is turned on. On the other hand, the discharge control signal Y is input to the MOS transistor 704. Since the discharge control signal Y is attenuated, the MOS transistor 704 remains off. Since the MOS transistor 104 is turned on among the MOS transistor 104 and the MOS transistor 704, the gate of the switch 103 is forced to the ground.
Because the gate of switch 103 is forced to ground, switch 103 remains completely off. For this reason, the protection circuit of Embodiment 3 can prevent the input voltage Vin from being transmitted to the output terminal 102 via the switch 103.

(2) Surge Voltage is Low Frequency FIG. 10 is a schematic diagram showing a comparison between the discharge control signal X, the discharge control signal Y, and the low frequency surge voltage. In FIG. 10, the vertical axis represents voltage, and the horizontal axis represents time. When a low frequency surge occurs in the input voltage Vin, the attenuated discharge control signal X is passively generated by the HPF of the discharge signal generation circuit 105 shown in FIG. On the other hand, since the discharge signal generation circuit 505 shown in FIG. 5 has LPF characteristics, the discharge control signal Y having a waveform that rises more slowly than the surge voltage is passively generated.

The discharge control signal Y is input to the gate of the MOS transistor 704, and the MOS transistor 704 is turned on. On the other hand, since the discharge control signal X is attenuated, even if it is input to the gate of the MOS transistor 104, the MOS transistor 104 remains off.
When the MOS transistor 704 is turned on, the switch 103 is turned off. For this reason, even when a low-frequency surge voltage is input to the input terminal 101, the surge voltage is not transmitted from the input terminal 101 to the output terminal 102, and the subsequent circuit of the USB device is protected from the surge voltage. be able to.

(3) The surge voltage includes a high-frequency component and a low-frequency component. FIG. 11 shows a discharge control signal X when a surge voltage including both a high-frequency component and a low-frequency component is input to the input terminal 101. It is a schematic diagram which compares and shows Y and a surge voltage. In FIG. 3, the vertical axis represents voltage, and the horizontal axis represents time. In such a case of the third embodiment, both the discharge signal generation circuits 105 and 505 shown in FIG. 8 function.

  From the discharge signal generation circuit 105, a discharge control signal X corresponding to the high frequency component of the surge voltage is output to the MOS transistor 104. From the discharge signal generation circuit 505, a discharge control signal Y corresponding to the low frequency component of the surge voltage is output to the MOS transistor 704. At this time, both the MOS transistors 104 and 704 are turned on, and the gate of the switch 103 is forced to the ground. For this reason, since the switch 103 is completely turned off, the surge voltage is not transmitted from the input terminal 101 to the output terminal 102.

  According to FIG. 11, it can be seen that the protection circuit of the third embodiment can turn off the switch 103 over the entire range of time during which the surge voltage is input by outputting both the discharge control signal X and the discharge control signal Y. . For this reason, the protection circuit according to the third embodiment of the present invention reduces the self-power of the surge voltage without using an internal power source even when a surge voltage including various frequency components from a low frequency component to a high frequency component is input. Utilizing this, the switch 103 can be turned off.

Next, the operation of the protection circuit of Embodiment 3 will be described using a timing chart.
12A to 12C are timing charts for explaining the operation of the protection circuit of the third embodiment. 12A to 12C show the input voltage Vin, internal voltage, drive signal PG, discharge control signal Z, discharge control signal X, discharge control signal Y, and switch 103 when no surge voltage is input to the USB device. The gate voltage (GATE) and the output voltage Vout are shown. FIG. 12A shows the parameters when no surge voltage is input. FIG. 12A shows a case where the internal voltage of the USB device does not reach the voltage Vdd that can operate the protection circuit.

  FIG. 12B shows the above parameters when the internal voltage of the USB device is Vdd or higher and a surge voltage is input, and FIG. 12C shows that there is no internal voltage of Vdd or higher inside the USB device. The above parameters are shown when a surge voltage including a high frequency component and a low frequency component is input. Hereinafter, the operation of the protection circuit of Embodiment 3 will be described for each case.

(1) When no surge voltage is input When the input voltage Vin is input at time t0, the discharge signal generation circuit 105 outputs a discharge control signal X according to the change in the input voltage Vin.
The discharge signal generation circuit 505 integrates the input voltage Vin and outputs a discharge control signal Y until time t2 when the internal voltage reaches Vdd.
When the internal voltage reaches Vdd at time t2, the discharge signal generation circuits 105 and 505 are stopped and the booster circuit 110 shown in FIG. 7 is operated. Booster circuit 110 outputs drive signal PG to the gate of switch 103 at time t3. The gate of the switch 103 is turned on by the drive signal PG, and the output voltage Vout is output.

(2) When the internal voltage is Vdd or higher and a surge voltage is input When the internal voltage is Vdd or higher, the LDO 106 stops the operation of the discharge signal generation circuit 705. For this reason, even if a surge voltage is input as the input voltage Vin, the discharge signal generation circuit 705 does not operate.
The comparator 107 compares the input voltage Vin with the reference voltage Vref. Now, since a surge voltage is input to the protection circuit, the input voltage Vin is larger than the reference voltage Vref, and the discharge control signal Z is output from the comparator 107. The MOS transistor 108 is turned on by the discharge control signal Z, and the gate of the switch 103 is forced to the ground. For this reason, the switch 103 is turned off, and the surge voltage input from the input terminal 101 is not transmitted to the inside of the USB device via the output terminal 102.

  However, in such an operation, the discharge control signal Z is output at time t1 with a delay from the time t0 when the surge voltage is input by the time required for the comparator 107 to compare the surge voltage with the reference voltage Vref. For this reason, a surge voltage is input to the switch 103 for a short time from the time t0 to the time t1, and the gate voltage slightly increases due to the capacitance of the switch 103 or the like. Further, the output voltage Vout slightly increases as the gate voltage increases.

  Further, when the drive signal PG is output at time t3, the gate voltage of the switch 103 increases and the switch 103 is turned on. When a surge occurs again in the input voltage Vin at time t4, the comparator 107 outputs the discharge control signal Z and turns off the gate of the switch 103 while the input voltage Vin exceeds the reference voltage Vref (time t4 to t5). For this reason, it can be seen that the output voltage Vout slightly decreases between times t4 and t5.

(3) When the internal voltage is smaller than Vdd and a surge voltage is input When the surge voltage is input as the input voltage Vin at time t0, the discharge signal generation circuit 105 detects the discharge control signal X according to the change in the input voltage Vin. Is output. At this time, since the value of the input voltage Vin is larger than a preset value due to the occurrence of a surge, the value of the discharge control signal X is increased. When the value of the discharge control signal X reaches or exceeds the threshold voltage of the MOS transistor 104, the MOS transistor 104 is turned on.

  The discharge signal generation circuit 505 integrates the input voltage Vin and outputs a discharge control signal Y until time t3 when the internal voltage reaches Vdd. At this time, since the value of the input voltage Vin is greater than a preset value due to the occurrence of a surge, the value of the discharge control signal Y is increased. When the value of the discharge control signal Y reaches the threshold voltage of the MOS transistor 704 or more, the MOS transistor 704 is turned on.

When the MOS transistors 104 and 704 are turned on, the gate of the switch 103 is forced to the ground and the switch 103 is completely turned off. For this reason, while the internal voltage is less than the voltage Vdd capable of operating a general protection circuit, the protection circuit of the third embodiment can protect the internal circuit of the USB device from the surge voltage.
Further, since both the discharge control signal X and the discharge control signal Y are passively generated by the surge voltage, the surge voltage is generated almost simultaneously with the input from the input terminal 101. For this reason, the third embodiment can output the discharge control signal X more quickly than the prior art that compares the input voltage Vin with the reference voltage Vref. Therefore, the switch 103 is completely turned off and the gate voltage is slightly increased. Can also be suppressed.

Further, in the third embodiment, the discharge control signal X and the discharge control signal Y are used in combination. For this reason, even when the surge voltage includes both a high frequency component and a low frequency component, the switch 103 can be turned off while the surge voltage is being input to prevent the surge voltage from being transmitted to the inside of the USB device. .
When the internal voltage reaches Vdd at time t3, the discharge signal generation circuits 105 and 505 are stopped and the booster circuit 110 shown in FIG. 7 is operated. Booster circuit 110 outputs drive signal PG to the gate of switch 103 at time t4. The gate of the switch 103 is turned on by the drive signal PG, and the output voltage Vout starts to be output.

  Further, when the drive signal PG is output at time t4, the gate voltage of the switch 103 increases and the switch 103 is turned on. When a surge occurs again at the time t5, the comparator 107 outputs the discharge control signal Z to turn off the gate of the switch 103 while the input voltage Vin exceeds the reference voltage Vref (time t5 to t6). For this reason, it can be seen that the output voltage Vout slightly decreases between times t5 and t6.

  The present invention is effective for protecting a circuit provided inside a computer peripheral device connected to another device by a SUB terminal.

DESCRIPTION OF SYMBOLS 101 Input terminal 102 Output terminal 103 Switch 104,108,204,704 MOS transistor 105,505,705 Discharge signal generation circuit 107 Comparator 109 Oscillator 110 Booster circuit 112 Secondary battery 201,203,501,502 Resistance element 202 Capacitance element 205 , 507 Element protection circuit 206, 506 Zener diode 208 Node 503 Diode

Claims (6)

An electronic device protection circuit for protecting an electronic device having a power terminal,
An input terminal to which voltage is input;
An output terminal that outputs the voltage input from the input terminal to the inside of the electronic device;
A switch for electrically connecting and disconnecting the input terminal and the output terminal;
A discharge signal generating circuit that generates a discharge control signal using the self-voltage of the input voltage as a power source when the input voltage input from the input terminal is greater than a preset voltage ;
An internal voltage generation circuit that generates an internal voltage using an input voltage as a power source, and includes another protection circuit that operates according to the internal voltage of the electronic device,
The discharge control signal causes the switch to operate so as to cut a signal transmission path between the input terminal and the output terminal ;
The protection circuit for an electronic device, wherein the discharge signal generation circuit stops the operation when the value of the internal voltage reaches a preset value . 2. The protection circuit for an electronic device according to claim 1, wherein the discharge signal generation circuit includes an arithmetic circuit for differentiating or integrating the discharge voltage of the input voltage. The discharge signal generation circuit includes:
A first impedance element and a second impedance element connected in series to the first impedance element between the input terminal and the ground;
The protection circuit for an electronic device according to claim 1 or 2 , wherein the discharge control signal is output from a connection point where the first impedance element and the second impedance element are connected in series. The first impedance element is a capacitive element;
The electronic device protection circuit according to claim 3 , wherein the second impedance element is a resistance element. The first impedance element is a resistance element;
4. The electronic device protection circuit according to claim 3 , wherein the second impedance element is a diode having a forward direction from the input terminal toward the ground. 5. The discharge signal generation circuit includes:
A first unit connected between the input terminal and ground; and a second unit connected between the input terminal and ground in parallel with the first unit;
The first unit includes a capacitive element, a first resistive element connected in series to the capacitive element,
Including
The second unit includes a second resistance element and a diode connected in series to the resistance element and having a forward direction from the input terminal toward the ground,
A first discharge control signal is output from a connection point where the capacitive element and the first resistance element are connected in series, and a second discharge control signal is output from a connection point where the second resistance element and the diode are connected in series. 3. The protection circuit for an electronic device according to claim 1, wherein a signal is output.

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