JP5656010B2 - Method for forming hard mask film and apparatus for forming hard mask film - Google Patents

Description

  The present invention relates to a hard mask film used in a semiconductor process. The present invention also relates to a method and apparatus for forming the hard mask film.

  The hard mask film is usually used as a sacrificial layer in a lithography patterning process such as a damascene trench formation and / or via formation. In the damascene process, a hard mask film is usually formed on a dielectric layer that needs to be patterned. A photoresist layer is formed over the hard mask film (optionally, an antireflection layer may be provided between the hard mask and the photoresist), and the photoresist is patterned as desired. Since a laser is typically used to align the pattern with the underlying structure, the hard mask must be substantially transparent at the alignment wavelength. After developing the photoresist, the hard mask film exposed under the pattern is removed, and the exposed dielectric is etched to form concave features having the required dimensions. The remaining portion of the hard mask protects the portion of the dielectric that needs to remain during the etching process. For this reason, the material of the hard mask must be a material with good etching selectivity relative to the dielectric. Reactive ion etching (RIE) is an etching that uses a halogen-based plasma chemical reaction and is a technique that is typically used for dielectric etching.

  Then, the concave feature formed by etching is filled with a conductive material such as copper to form a conductive path of the integrated circuit. Usually, after filling the concave features, the hard mask material is completely removed from the semiconductor substrate being manufactured.

  In this field, titanium nitride formed by physical chemical vapor deposition (PVD) is generally used as a hard mask material at present. It is also described in US Pat. No. 6,455,409 and US Pat. No. 6,506,692 that silicon carbide can also be used as a hard mask material.

  Improve hard mask film characteristics and manufacturing method. In lithography technology, if the material has high compressive stress or tensile stress, the hard mask film formed on the substrate will be buckled or delaminated, and the accuracy of pattern alignment in lithography will be low. Material is needed. In addition to low stress, the hard mask material is also required to have high hardness and / or high Young's modulus in order to properly protect the underlying material. This is because there is usually a high correlation between hardness and Young's modulus and etch selectivity.

  Realizing both low stress and high hardness (or high Young's modulus) at the same time is particularly difficult as the hardness of the material usually increases the compressive stress. For example, conventionally used titanium nitride is a relatively hard material, and the compressive stress exceeds about 1,000 MPa. Such a hard mask having a high compressive stress, together with a soft dielectric having a very low dielectric constant (low-k) (k = 2.8 or less) and a feature having a particularly high aspect ratio (for example, an aspect ratio of 2: When used in defining one or more features), alignment may not be successful and the resulting structure may be twisted. Silicon carbide generally has a wide range of physical properties, and unless prepared using a special film forming process according to the present invention, the hardness cannot be increased while the stress is kept low.

According to some aspects of the present invention, a low stress and high hardness hard mask material is provided. According to some embodiments, the membrane according to the invention has a hardness of at least about 12 GPa, preferably at least about 16 GPa, for example at least about 20 GPa, and a stress in the range of about −600 MPa to 600 MPa, For example, it is in the range of about -300 MPa to 300 MPa, and most preferably in the range of about 0 MPa to 300 MPa. The film according to the present invention usually contains almost no metal and may or may not be doped, but Si _x B _y C _z and Si _x B _y N _z which are silicon carbide having high hardness and low stress. And a material selected from the group consisting of: Si _x B _y C _z N _w , B _x N _y , and B _x C _y . These materials can be formed by plasma enhanced chemical vapor deposition (PECVD) and other CVD based processes. The hard mask obtained by the present invention can be used in various lithography steps of front-end and back-end semiconductor processes. The film forming conditions for obtaining the characteristics of low stress and high hardness are described. The structural characteristics of the film corresponding to such characteristics are also described.

According to one aspect, a method of forming a hard mask film with high hardness and low stress on a semiconductor substrate includes introducing the semiconductor substrate into a plasma enhanced chemical vapor deposition (PECVD) processing chamber;
Forming a doped multilayer silicon carbide film or an undoped multilayer silicon carbide film by performing the plasma densification process a plurality of times. The plasma densification process is preferably performed after the silicon carbide sub-layers are formed. According to some embodiments, introducing a process gas including a silicon-containing precursor (tetramethylsilane) into a process chamber and forming a plasma to form a first sublayer of a silicon carbide hardmask film. Prepare. Subsequently, the silicon-containing precursor is removed from the processing chamber, for example, by purging the processing chamber with a purge gas. Thereafter, plasma processing gas is introduced into the processing chamber to form plasma, and the silicon carbide sub-layer is plasma processed to increase the density. The plasma processing gas and the purge gas may be the same gas or different gases. Suitable gases for purging and / or plasma processing include inert gases (eg, He, Ar), CO ₂ , N ₂ , NH ₃ , and H ₂ . According to some embodiments, He, Ar, H ₂ , or various mixed gases thereof are preferably utilized for both purging and plasma processing. After the silicon carbide first sublayer is subjected to plasma treatment, film formation, purging, and plasma treatment are repeated to form a plurality of silicon carbide sublayers to increase the density. Each sublayer is typically less than about 100 mm thick, for example, less than about 50 mm, to facilitate densification. According to the method according to some embodiments, a hard mask film is formed by forming and densifying 10 or more sublayers, for example, 20 or more sublayers, and the hard mask film according to some embodiments. Has a thickness in the range of about 1,000 to about 6,000 inches.

By performing the plasma treatment a plurality of times, the hardness is improved as compared with a single silicon carbide film. According to some embodiments, the high hardness and low stress film thus formed comprises an undoped silicon carbide film with a high Si-C bond content. According to some embodiments, the ratio of the peak area of Si—C in the infrared spectrum to Si—H is at least about 20. According to some embodiments, the ratio of the peak area of Si—C in the infrared spectrum to C—H is at least about 50. The formed silicon carbide film typically has a density of at least about 2 g / cm ³ . According to some embodiments, it is preferable to perform plasma post-processing based on plasma generation with high frequency radio frequency (HFRF) and low frequency radio frequency (LFRF). In this case, the LF / HF power ratio is at least about 1.5, for example at least about 2.

According to another aspect of the present invention, a method of forming a film having high hardness and low _{stress, Si x B y C z,} Si x B y N z, Si x B y C z N w, B x N y, And depositing a boron-containing film selected from the group consisting of B _x C _y . The film can be deposited by PECVD using a suitable silicon-containing precursor, carbon-containing precursor, or boron-containing precursor. For example, according to one embodiment, when depositing Si _x B _y C _z , a boron-containing precursor (eg, B ₂ H ₆ ) and a precursor containing carbon and silicon (eg, tetramethylsilane) are processed by PECVD. A chamber is supplied to form a Si _x B _y C _z film in plasma. In forming a high hardness and low stress film, it is preferable to utilize a dual frequency plasma having an LF / HF power ratio of at least about 1.5, such as at least about 2. According to some embodiments, the film has a high boron content and a BC / [BC + SiC] ratio determined by the corresponding peak area in the infrared spectrum is at least about 0.35. According to some embodiments, a high hardness and high boron content Si _x B _y C _z film is obtained by flowing B ₂ H ₆ at a flow rate of at least about twice that of tetramethylsilane. . Since the boron-containing film is generally hydrophilic and soluble in the chemical reaction of CMP, there is an advantage that it can be easily removed by chemical mechanical polishing (CMP) after the patterning is completed.

According to another aspect of the present invention, a method of forming a GeN _x hard mask film is provided. According to some embodiments, the method includes introducing a semiconductor substrate into a PECVD processing chamber and forming a GeN _x hard mask film. The film can be formed by flowing a germanium-containing precursor and a nitrogen-containing precursor into a PECVD processing chamber and forming a plasma. According to some embodiments, the formed GeN _x film has a Young's modulus of at least about 100 GPa and a high germanium content. According to some embodiments, such a high germanium content film comprises at least about 60 atomic percent, preferably 70 atomic percent germanium (excluding hydrogen). The density of the film may exceed 4 g / cm ³ . GeN _x has the advantage of being substantially transparent at the alignment wavelength utilized in lithographic patterning (eg, wavelengths in the visible and near infrared regions of the spectrum). According to some embodiments, the GeN _x film is deposited by forming a plasma in a process gas comprising germane, ammonia, and nitrogen. Note that the germane / ammonia flow ratio is at least about 0.05. According to some embodiments, it is preferred to deposit the GeN _x film using a dual frequency plasma source. According to some embodiments, the LF / HF power ratio during deposition is at least about 1. The GeN _x film, like the other films described above, can be used in many processing steps of back-end and front-end semiconductor processes.

  According to some embodiments, the hard mask film (eg, any of the films described above) is a dielectric, eg, a layer of dielectric that has a dielectric constant less than about 3, eg, less than about 2.8. A film is formed. A photoresist layer is usually formed on the hard mask film (however, it is not necessarily formed in direct contact with the hard mask, and an antireflection layer may be provided between them). This is followed by lithographic patterning to form concave features (vias and / or trenches) in the dielectric layer. After patterning is complete and the feature is filled with metal, the hard mask is removed (eg, by CMP). According to some embodiments, the etch selectivity of the hard mask film to the dielectric is typically an RIE process, but at least about a reference to the chemical reaction utilized in etching vias and / or trenches. 8: 1.

  According to other embodiments, a hard mask film (eg, any of the above films) is deposited on the polysilicon layer in a front end process and used as a film to protect the polysilicon in various processing steps. Is done. According to some embodiments, the hard mask material is not removed and remains in the device that is the finished product.

  These and other features and advantages of the present invention will be described in more detail below with reference to the corresponding drawings.

For example, in a back-end lithography process for semiconductor device manufacturing, it is a cross-sectional view showing a device structure formed using a hard mask described herein. For example, in a back-end lithography process for semiconductor device manufacturing, it is a cross-sectional view showing a device structure formed using a hard mask described herein. For example, in a back-end lithography process for semiconductor device manufacturing, it is a cross-sectional view showing a device structure formed using a hard mask described herein. For example, in a back-end lithography process for semiconductor device manufacturing, it is a cross-sectional view showing a device structure formed using a hard mask described herein. For example, in a back-end lithography process for semiconductor device manufacturing, it is a cross-sectional view showing a device structure formed using a hard mask described herein. For example, in a back-end lithography process for semiconductor device manufacturing, it is a cross-sectional view showing a device structure formed using a hard mask described herein. For example, in a back-end lithography process for semiconductor device manufacturing, it is a cross-sectional view showing a device structure formed using a hard mask described herein. For example, in a back-end lithography process for semiconductor device manufacturing, it is a cross-sectional view showing a device structure formed using a hard mask described herein. For example, in a back-end lithography process for semiconductor device manufacturing, it is a cross-sectional view showing a device structure formed using a hard mask described herein. For example, in a back-end lithography process for semiconductor device manufacturing, it is a cross-sectional view showing a device structure formed using a hard mask described herein. For example, in a back-end lithography process for semiconductor device manufacturing, it is a cross-sectional view showing a device structure formed using a hard mask described herein. For example, in a front-end lithography process of semiconductor device manufacturing, it is a cross-sectional view showing a device structure formed using a hard mask described herein. For example, in a front-end lithography process of semiconductor device manufacturing, it is a cross-sectional view showing a device structure formed using a hard mask described herein. For example, in a front-end lithography process of semiconductor device manufacturing, it is a cross-sectional view showing a device structure formed using a hard mask described herein. For example, in a front-end lithography process of semiconductor device manufacturing, it is a cross-sectional view showing a device structure formed using a hard mask described herein. For example, in a front-end lithography process of semiconductor device manufacturing, it is a cross-sectional view showing a device structure formed using a hard mask described herein. 6 is a process flow diagram for describing a back-end lithography process that is appropriate to utilize a hard mask as described herein. 6 is a process flow diagram for illustrating a front-end lithography process that is appropriate to utilize a hard mask as described herein. It is a processing flowchart for demonstrating the method to form the silicon carbide hard mask according to embodiment described in this specification. It is a figure which shows the infrared spectrum of the multilayer silicon carbide film obtained by implementing plasma post-densification multiple times compared with the infrared spectrum of a single layer silicon carbide film, and the Si-C peak is more prominent You can see that It is a figure which shows the experimental result of the stress characteristic and hardness characteristic of a multilayer silicon carbide film | membrane compared with a single layer film | membrane. It is a figure which shows the experimental result of the stress characteristic and Young's modulus characteristic of a multilayer silicon carbide film | membrane compared with a single layer film | membrane. 5 is a process flowchart illustrating an example of a processing method that utilizes a boron-containing hard mask according to embodiments described herein. It is a figure which shows the experimental result of the stress characteristic and hardness characteristic of a boron containing film | membrane suitable for the use as a hard mask. It is a figure which shows the experimental result of the stress characteristic and Young's modulus characteristic of a boron containing film | membrane suitable for the use as a hard mask. The hardness of the Si _x B _y C _z film is a diagram showing experimental results indicating how much depends on the flow ratio of _B 2 _{H 6} / tetramethylsilane during PECVD processing. Young's modulus and the stress parameter of Si _x B _y C _z film is a diagram showing experimental results indicating how much depends on the ratio of infrared peak area of BC / [BC + SiC]. Young's modulus and the stress parameter of Si _x B _y N _z film is a diagram showing experimental results indicating how much depends on the ratio of infrared peak area of BN / [BN + SiN]. The Si _x B _y C _z film results contact angle of the hydrophobic test for an experimental result showing compared with silicon carbide film of undoped, it is higher and more hydrophilic Si _x B _y C _z film I understand. 6 is a process flowchart illustrating an example of a processing method using a GeN _x hardmask according to embodiments described herein. 1 illustrates a PECVD apparatus that can utilize a low frequency (LF) radio frequency plasma source and a high frequency (HF) radio frequency plasma source that can be utilized when depositing a hard mask film according to some embodiments of the present invention. FIG. 1 is a schematic diagram illustrating a multi-station PECVD apparatus suitable for forming a hard mask film according to some embodiments of the present invention. FIG.

<Introduction and introduction>
A hard mask film used in back-end and front-end semiconductor processes will be described. Hard mask film, SiC _x (may be is doped, may be _{undoped), Si x B y C z} , Si x B y N z, Si x B y C z N w, B including _{x N y, B x C y} , a material selected from the group consisting of GeN _x.

The material basically contains the elements described in the respective chemical formulas, optionally containing hydrogen, but no explicit hydrogen. The subscripts x, y, z and w mean that the material is not necessarily stoichiometric. The material includes the dopant only if it is specified that the dopant is included. For example, the undoped SiC _x (silicon carbide) described herein is essentially formed from silicon and carbon (the proportion is not necessarily stoichiometric) and optionally includes hydrogen. The doped SiC _x further includes a dopant element such as boron, oxygen, phosphorus, or nitrogen.

  According to some embodiments, the materials described herein have one or more of the advantageous properties of high hardness, high Young's modulus, and low stress. According to a preferred embodiment, the material simultaneously achieves high hardness and low stress, so that it has a low mechanical strength ultra-low dielectric constant (low-k) (ULK) dielectric patterning and an aspect ratio of 2 Is particularly suitable for use as a hard mask in high-function technology nodes (e.g. 45 nm or less, e.g. 22 nm technology nodes) that perform the formation of recesses of 1 or more (e.g. 4: 1 or more)

  According to some embodiments, the hard mask material has a hardness of at least about 12 GPa, such as at least about 16 GPa, such as at least about 18 GPa, or at least about 20 GPa. Hardness is a well-defined property in the field of materials engineering, for example, a reliable measurement result can be obtained by any suitable apparatus having a nano-indentation device. According to some embodiments, the hard mask material described herein has low hardness, in addition to high hardness, in the range of about -600 to 600 MPa, such as in the range of about -300 MPa to 300 MPa, about Within the range of 0 to 600 MPa, and most preferably within the range of about 0 MPa to 300 MPa.

  Compressive and tensile stresses are measured on a single scale, with positive values corresponding to tensile stress and negative values corresponding to compressive stress. On this scale, a larger compressive stress is represented by a smaller negative value, and a larger tensile stress is represented by a larger positive value. A film with zero residual stress corresponds to zero on this scale. The stress is a parameter having a clear definition, and can be measured using, for example, a tool called “Flexus” manufactured by KLA-Tencor Corporation.

  Materials with high compressive stress can cause substrate buckling, but materials with high tensile stress can cause delamination (especially if the adhesion between the materials is weak). It is not desirable for a hard mask material to have a high value for either type of stress. However, some low and moderate tensile stresses (eg, 200 to 600 MPa) that some of the boron-containing materials described herein have can be tolerated over the same amount of compressive stress. .

  According to some embodiments, the hard mask film described herein has a Young's modulus of at least about 100 Mpa, such as at least about 125 MPa, such as 150 Mpa or more. Young's modulus can be measured using standard methods utilizing nanoindentation devices.

  It should be understood that the hard mask materials described herein are typically distinct from the materials utilized as dielectric diffusion barrier layers and etch stop layers. The materials for the dielectric diffusion barrier layer and the etch stop layer are typically relatively soft materials with a hardness of less than about 10 GPa and a dielectric constant of less than about 5. The diffusion barrier layer remains in the finished integrated circuit structure and the dielectric constant must be low. In contrast, the hard mask materials described herein do not necessarily have a low dielectric constant, and typically have a dielectric constant greater than about 4, greater than about 5, or greater than about 6. Sometimes. This is because the hard mask according to many embodiments is a sacrificial layer and is completely removed from the structure after the patterning is completed, so that it does not affect the electrical characteristics of the final integrated circuit. . In the embodiment in which the hard mask remains in the finished product, the hard mask is disposed at a place where it is not necessary to lower the dielectric constant or a material having a relatively high dielectric constant is allowed. Also, the hard mask material deposited by PECVD is typically deposited with a much higher plasma generation power than the softer, lower dielectric constant (low-k) diffusion barrier layer material. In terms of structure, hard mask materials are usually packed more densely and more densely than softer, low dielectric constant (low-k) diffusion barrier layer materials.

  The hard mask material according to many embodiments is substantially transparent at the wavelength of the laser used for patterning alignment (wavelength in the visible and near infrared regions of the spectrum, eg, 633 nm).

  The thickness of the hard mask film to be formed varies depending on many parameters, for example, the etching selectivity between a specific hard mask material and the material below it, the thickness of the lower material that requires etching, And it fluctuates according to the chemical reaction etc. used for etching. In general, as the hardness of the hard mask material increases and the etching selectivity increases, the deposited film may be thinner as compared with a material having a lower hardness and lower etching selectivity. In addition, when a thin hard mask layer is formed of a material having both high hardness and etching selectivity, the transparency becomes relatively high when the hard mask film is thinned, so that optical alignment is performed better. There are advantages. According to some embodiments, the hard mask film is deposited to a thickness in the range of about 100 to 10,000 inches, for example, in the range of about 500 to 6,000 inches.

The film according to the present invention is a dielectric (for example, a dielectric having a dielectric constant of 3.0 or less, such as 2.8 or less, or 2.4 or less) in a chemical reaction used in etching of vias and / or trenches. Etching selectivity to the body). As an example of an etching chemical reaction, a plasma formed by a processing gas containing C _x F _y (eg, CF ₄ ), an inert gas (eg, Ar), and an oxidizing agent (eg, O ₂ ) is used. There is RIE to use. Other dry etching, for example, plasma etching using a processing gas containing Cl ₂ and N ₂ may be used. According to some embodiments, for a plasma etch chemistry comprising C _x F _y as described above, the etch selectivity is at least about 5: 1, such as at least about 8: 1 (ie, the dielectric etch rate is It may be at least 8 times the etching rate of the hard mask material. The film according to some embodiments may be used as a hard mask in wet etching, for example when performing selective wet etching with a wet etching chemical reaction of fluoride on a silicon oxide based material. It may be used as a hard mask.

  As a dielectric that can be etched with the hard mask material described in this specification exposed, silicon oxide, silicon-doped silicon oxide (SiCOH), and TEOS (tetraethyl orthosilicate) are used. Filmed oxides, various silicate glasses, HSQ (hydrogen silsesquioxane), MSQ (methyl silsesquioxane), and porous such as polyimide, polynorbornene, benzocyclobutene And / or organic dielectrics. The hard mask described in the present specification is used when patterning organic and / or porous dielectrics having a dielectric constant of 2.8 or less, for example, 2.4 or less and low mechanical strength. Demonstrate the greatest utility.

The hard mask materials described herein may typically be deposited using various methods based on CVD and PVD. There is a PECVD method as a particularly preferable film forming method, and a PECVD method that generates dual frequency plasma is more preferable. SEQUEL (registered trademark) and VECTOR (registered trademark) manufactured by Novellus Systems (San Jose, Calif., USA) are examples of devices equipped with a high frequency power source and a low frequency power source. Low frequency radio frequency (RF) power means RF power whose frequency is in the range of 100 kHz to 2 MHz. The frequency range of the LF plasma source is typically in the range of about 100 kHz to 500 kHz, for example, a frequency of 400 kHz may be utilized. During deposition of the hard mask layer, the LF power density is typically in the range of about 0.001 to 1.3 W / cm ² , and in certain embodiments, about 0.1 to 0.7 W / cm 2. ² . For HF power, it is typically in the range of about 0.001 to 1.3 W / cm ² , and in certain embodiments in the range of about 0.02 to 0.28 W / cm ² . The high frequency power means RF power having a frequency exceeding 2 MHz. The frequency of HFRF power is typically in the range of about 2 MHz to 30 MHz. Commonly used HFRF frequency values include 13.56 MHz and 27 MHz. According to certain embodiments, when depositing the hard mask, the LF / HF power ratio is set to at least about 1, such as at least about 1.5, such as at least about 2.

  When forming a film by PECVD, the reaction gas or vapor is usually supplied to the processing chamber with a flow rate set in the range of 0.001 sccm to about 10,000 sccm, preferably in the range of about 1 sccm to about 1000 sccm. The temperature of the substrate stage is in the range of about 20 degrees Celsius to about 500 degrees Celsius, preferably about 200 degrees Celsius to about 450 degrees Celsius. According to some embodiments, when depositing a hard mask, the temperature is preferably less than about 400 degrees Celsius (eg, about 200 degrees Celsius to about 400 degrees Celsius). The pressure may be in the range of about 10 mTorr to about 100 Torr, and is preferably in the range of about 0.5 Torr to 5 Torr. It should be understood that the flow rate of the precursor will vary depending on the size of the substrate and chamber.

<Use in back-end process>
The films described herein can be utilized as various hard masks. An example of the use of the hard mask film in the back-end process will be described with reference to the structure shown in FIGS. 1A to 1K and the process flowchart shown in FIG. The process will be described with reference to an example of the process flow shown in FIG. 3. The process 301 is started by preparing a substrate having a dielectric layer exposed in process 301. The substrate is typically a semiconductor (eg, silicon) wafer provided with one or more material layers (eg, a conductor layer or a dielectric layer). The exposed portion of the substrate includes a dielectric layer where vias and trenches need to be patterned. The hard masks described herein can typically be utilized in patterning the various dielectric materials listed above. The hard mask materials described herein can be used to pattern ULK dielectrics with a dielectric constant of 2.8 or less, such as 2.4 or less, such as porous and organic dielectrics with lower mechanical strength. It is particularly useful when used. As described above, hard masks according to many embodiments may occur when using a high stress hard mask material when patterning a ULK dielectric with very low stress and low mechanical strength. Many buckling and pattern alignment mistakes can be greatly reduced. It should be noted that according to some embodiments, a buffer layer made of a material with higher mechanical strength is formed between the fragile ULK dielectric and the hard mask. Thus, according to some embodiments, the supplied substrate has a buffer layer (eg, a layer of dielectric with higher mechanical strength) formed over the layer of ULK material and exposed. ing. For example, a buffer layer including a dielectric with k higher than 2.8 may be formed on a dielectric with lower dielectric constant and lower mechanical strength. For example, carbon-doped silicon oxide (SiCOH), oxides formed using TEOS (tetraethylorthosilicate), various silicate glasses, HSQ (hydrogen silsesquioxane), MSQ ( A buffer layer comprising a material selected from the group consisting of methylsilsesquioxane (methylsilsesquioxane) may be formed on a porous and / or organic dielectric such as polyimide, polynorbornene, benzocyclobutene. The ULK dielectric and the dielectric for the buffer layer may be formed by, for example, a spin-on method or a PECVD method. According to some embodiments, the ULK dielectric and / or buffer layer is deposited in the same PECVD module as the hard mask layer deposited thereon. This is a further advantage over a titanium nitride hard mask that requires a PVD module for film formation. In process 303, a hard mask material is deposited over a dielectric layer (or a buffer layer typically also formed of a dielectric) in a PECVD process chamber. Subsequently, one or more anti-reflective layers, such as a back-surface anti-reflective coating (BARC), are optionally deposited, and then a photoresist is deposited over the hard mask in process 305. Since one or more antireflection layers are usually formed between the hard mask and the photoresist, the photoresist does not necessarily have to be in direct contact with the hard mask material. In the next process 307, vias and / or trenches are etched into the dielectric layer using the deposited hard mask and lithographic patterning technique. An appropriate etching method is the RIE described above. According to RIE, the dielectric material is etched with the hard mask having high etching selectivity exposed.

  Various lithography processes include the formation and removal of a plurality of photoresist layers, the formation of a fill layer, and the like, and based on these, concave features having a desired pattern are formed. Such a lithography process is known and will not be described in detail. The process of forming the partial via after first defining the trench is shown in FIGS. 1A to 1K as an example. However, it should be understood that various other steps are performed in the back-end process. After the vias and / or trenches are formed, in process 309, the vias and / or trenches are filled with metal (eg, electrodeposited copper or copper alloy) and in process 311, for example, CMP or a suitable wet etch or dry process. The hard mask film is removed by etching. According to some embodiments, it is preferable to remove the hard mask using a wet etching composition or a CMP composition (eg, an acidic slurry containing hydrogen peroxide) containing peroxide.

1A to 1K are schematic cross-sectional views showing a semiconductor substrate in the middle of manufacturing during back-end processing according to an example of processing steps. FIG. 1A is a diagram illustrating a portion of a semiconductor substrate (the underlying silicon layer and active elements are not shown) in which a copper layer 101 is embedded in a first dielectric layer 103 (for example, a ULK dielectric layer). . A diffusion barrier layer 105 (including, for example, Ta, Ti, W, TaN _x , TiN _x , WN _x , or a mixture thereof) is provided at the interface between the dielectric layer and the copper layer. . A dielectric diffusion barrier layer (also called an etch stop layer) 107 made of silicon nitride or silicon carbide doped with nitrogen is provided on the copper 101 and the dielectric 103. A second dielectric layer 109 (for example, a ULK dielectric film formed by a spin-on method or a PECVD method) is provided on the dielectric diffusion barrier layer 107. Dielectric layer 109 has a low mechanical strength and can be damaged during hard mask deposition, so a dielectric buffer layer 111 with a higher mechanical strength, for example an oxide doped with TEOS dielectric or carbon Silicon (SiCOH) is deposited on the layer 109. The hard mask layer 113 includes a high hardness material described in this specification, and is formed on the buffer layer 111 by a PECVD method. Unlike the dielectric diffusion barrier layer 107, the hard mask layer 113 is formed on the surface where the metal is not exposed. A photoresist layer 115 is formed on the hard mask layer 113 by a spin-on method. Usually, one or more antireflection layers are immediately formed between the hard mask and the photoresist. The antireflection layer is not shown in order to facilitate understanding.

  The photoresist 115 is deposited and then patterned using standard lithography techniques to form an opening with a width t that will be used later in forming a trench. A result of patterning the photoresist layer 115 is shown in FIG. 1B. Subsequently, the hard mask layer 113 under the removed photoresist is opened (etched) to form a pattern exposing the dielectric 111 as shown in FIG. 1C. The remaining portion of the hard mask serves to protect the dielectric when the photoresist is removed and later when the dielectric is etched. Subsequently, the photoresist layer 115 is removed by, for example, ashing to form a structure in which the patterned hard mask 113 is exposed. At this stage, patterning for forming vias is started. In the via patterning, a filling layer 117 containing a dielectric material such as HSQ or MSQ that is easy to remove is formed on the structure surface to fill the opening of the hard mask as shown in FIG. 1E. Subsequently, a second photoresist layer 119 is formed on the filling layer 117 (an antireflection layer may optionally be provided therebetween) to form the structure shown in FIG. 1F. Thereafter, the photoresist 119 is patterned to form an opening having a width V used for forming a via as shown in FIG. 1G. Subsequently, by using, for example, RIE, the hard mask below the photoresist pattern is removed, and the dielectric 109 is etched to form a part of the via. Photoresist 119 and fill layer 117 are removed to form a structure including a partially etched via and a defined trench, as shown in FIG. 1H. Subsequently, as shown in FIG. 1I, the dielectric layers 111 and 109 are etched until the via reaches the etch stop layer 107, and the etching is continued until the metal layer 101 is exposed at the bottom of the via. Thereafter, a diffusion barrier material layer 105 is formed along the shape using PVD to cover the inside of the concave feature and the field region of the substrate. After that, when the concave feature is filled with the metal 121 (for example, copper or copper alloy is electrodeposited), an excessive portion is often formed in the field to some extent, and the structure shown in FIG. 1J is obtained. Subsequently, the excessively formed metal portion, the diffusion barrier material layer 105, the hard mask layer 113, and the dielectric buffer layer 111 are removed from the field region of the structure, and as shown in FIG. A mid-fabricated device in which a metal interconnect is formed in the dielectric layer 109 is formed. According to another processing method, the buffer layer 111 is not removed and remains on the substrate.

  The processing steps including the step of forming a partial via as shown in FIGS. 1A to 1K are given to describe an example of a patterning method that can be used in the case of a low-k dielectric. The hard mask materials described herein can be used in a variety of processing methods other than those described above, including both the formation of vias first and the formation of trenches first. .

<Use in front-end process>
Another example of the use of the hard mask described herein may be used to protect polysilicon in a front-end process. Polysilicon is widely used in forming active devices (eg, transistors) on a semiconductor wafer. According to some embodiments, the hardmask material described herein is deposited on polysilicon to protect the polysilicon during various processing steps utilized in manufacturing active devices. To play a role. According to many embodiments, the hard mask layer described herein is not utilized as a sacrificial layer when used in a front-end process, but remains in the final device in contact with the polysilicon. Please note that.

An example of the front-end process is shown in the process flowchart of FIG. 4 and is further illustrated in the schematic cross-sectional views of the structure in the middle of manufacture shown in FIGS. 2A to 2E. Referring to FIG. 4, starting with process 401, a polysilicon layer is provided over an oxide (eg, silicon oxide, hafnium oxide, etc.) layer and exposed. According to other embodiments, polysilicon may be provided on other active layers. The oxide is usually provided on the single crystal silicon layer. When patterning the oxide layer and the polysilicon layer, two hard mask layers are formed on the polysilicon layer. The first hard mask is deposited directly on the polysilicon layer, as shown in operation 403, and is SiC _x (which may or may not be doped), Si _x B _{y. C z, Si x B y N} z, Si x B y C z N w, B x N y, B x C y, and include materials described herein, such as GeN _x. The hard mask is formed using a CVD method, more preferably a PECVD method. Subsequently, as shown in a process 405, an ashable hard mask (for example, a hard mask basically made of carbon and optionally containing hydrogen) is formed on the first hard mask layer. The deposition of the ashable hard mask may also be performed by a CVD method, for example, a PECVD deposition method using a hydrocarbon precursor. Subsequently, as shown in process 407, a photoresist layer is formed over the ashable hard mask, and the photoresist is patterned according to a desired pattern. One or more antireflection layers may be optionally formed between the ashable hard mask and the photoresist, but such an antireflection layer is not shown for easy understanding. An example of a structure including a photoresist before patterning is shown in FIG. 2A. Note that the layer 201 is a single crystal silicon layer. The layer 203 provided over the silicon layer 201 is an oxide layer. The layer 205 provided on the oxide layer 203 is a polysilicon layer. The hard mask material 207 described herein is provided directly on the polysilicon 205, and an ashable hard mask (eg, carbon hard mask) 209 is formed on the first hard mask layer 207. Is provided. A photoresist layer 211 is provided on the ashable hard mask 209 (an antireflection layer optionally provided between them is not shown). The structure after patterning the photoresist is shown in FIG. 2B, with the two portions removed from the photoresist and the portions in between.

  Returning to the description with reference to FIG. 4, in a subsequent operation 409, patterning is performed using an ashable hard mask, and the polysilicon layer and the oxide layer are etched to form the desired pattern. This is shown in FIGS. 2C to 2E. In the structure shown in FIG. 2C, the ashable hard mask layer 209 is opened (etched) at a portion exposed by photoresist patterning. Subsequently, when all of the photoresist 211 is removed and portions of the first hard mask layer 207, the polysilicon layer 205, and the oxide layer 203 that are not protected by the ashable hard mask layer 209 are etched, FIG. A structure shown in 2D is obtained.

Returning to the description with reference to FIG. 4, in process 411, SiC _x (which may or may not be doped), Si _x B _y C _z , Si _x B _y N _z , Si leaving a first hard mask layer on the polysilicon layer comprising a material selected from the group consisting of _x B _y C _z N _w , B _x N _y , B _x C _y , and GeN _x , for example, The ashable hard mask is removed by oxygen plasma treatment. The resulting structure is shown in FIG. 2E. The hard mask layer 207 remains unremoved in subsequent front end processes and serves to protect the polysilicon in various subsequent processes, such as when dopants are implanted into the crystalline silicon. In the above-described processing procedure, the hard mask material described in this specification does not perform an actual masking process (the actual masking process is performed by the ashable hard mask 209), and mainly for protecting polysilicon. Note that it is used for Depending on the integration method, the hard mask 207 is utilized to perform a masking process with subsequent front-end processing, eg, dry or wet etching for cleaning, or oxide etching to define the gate. It is good. The hard mask materials described herein may be eventually removed from the finished device or left depending on the integration method utilized.

  The back-end process and front-end process described above are described by way of example, and the materials described in this specification are not limited to the above, but various processes that require a high-hardness material to protect the lower layer. It should be understood that it is available in

  The preparation of a suitable hard mask material is described in detail below.

<Multilayer silicon carbide film>
According to one embodiment, a high hardness and low stress multilayer silicon carbide film is provided. Specifically, according to some embodiments, the multilayer silicon carbide film has a hardness greater than about 12 GPa, such as greater than about 18 GPa, and the stress is in the range of about −600 MPa to 600 MPa, such as In the range of about -300 MPa to 300 MPa. A multilayer silicon carbide film forms a plurality of sublayers of doped silicon carbide material or undoped silicon carbide material, and performs a densified plasma post-treatment each time a sublayer is formed. Formed by.

  Silicon carbide deposition can be performed using a variety of methods, but according to some embodiments, it is preferable to perform sublayer deposition and post-plasma treatment in a single PECVD apparatus. The thickness of each sublayer is typically less than about 100 mm, such as less than about 50 mm, to more fully densify the material. In the film forming process, an arbitrary number of sublayers for forming a hard mask with an appropriate thickness are formed, and plasma processing is performed. According to some embodiments, at least two sublayers are deposited, for example, at least 10 sublayers, or at least about 20 sublayers.

  An example of a process flowchart for forming a multilayer silicon carbide film is shown in FIG. 5A. In process 501, a semiconductor substrate (eg, a substrate with an exposed dielectric layer or polysilicon layer) is supplied to a PECVD process chamber. The PECVD processing chamber includes a precursor inlet and a plasma generator. According to some embodiments, a dual frequency RF plasma generator having an HF generator and an LF generator is preferred.

Process 503 forms a first sub-layer of doped silicon carbide or undoped silicon carbide. In the film forming process, a silicon-containing precursor is injected into a processing chamber to form plasma. As an example, a dual frequency plasma having an HFRF frequency of about 13.56 MHz and an LFRF frequency of 400 kHz is used. According to this example, HF power density in the range of about 0.04 to 0.2W / cm ^2, LF power density is in the range of about 0.17 to 0.6 W / cm ^2.

  Various silicon-containing precursors may be utilized, for example, organosilicon precursors such as alkyl silanes, alkenyl silanes, and alkynyl silanes may be utilized. According to some embodiments, saturated precursors such as tetramethylsilane, triisopropylsilane, and 1,1,3,3-tetramethyl 1,3-disilacyclobutane are preferred.

  The silicon-containing precursor according to some embodiments includes carbon as in the above example. According to another embodiment, a silicon-containing precursor (for example, silane) that does not contain carbon and a carbon-containing precursor (for example, hydrocarbon) prepared separately may be included in the processing gas. Also, according to some embodiments, the process gas may include hydrocarbons and organosilicon precursors.

The silicon-containing precursor is typically introduced into the processing chamber with a carrier gas, for example, with an inert gas such as He, Ne, Ar, Kr or Xe. According to some embodiments, H ₂ may be included in the deposition process gas. According to one example, the deposition process gas basically consists of tetramethylsilane (flow rate in the range of about 500 to 2,000 sccm) and helium (flow rate of about 3 to 5 slm).

If it is necessary to form a layer of doped silicon carbide, an appropriate dopant is added to the process gas. For example, N ₂ , NH ₃ , N ₂ H ₄ , an amine, or another nitrogen-containing precursor is added to the process gas to form nitrogen-doped silicon carbide. A boron-containing precursor such as diborane may be added to form a boron-containing silicon carbide. A phosphorus-containing precursor (eg, PH ₃ ) may be added to form phosphorus-doped silicon carbide.

Once the plasma is generated to form the silicon carbide sublayer to the desired thickness, the process 505 removes the silicon-containing precursor from the process chamber. The removal of the silicon-containing precursor is selected from the group consisting of an inert gas (eg, He, Ar), CO ₂ , N ₂ , NH ₃ , H ₂ and mixtures thereof, according to some embodiments. By purging the processing chamber with a purge gas containing a gas. According to some embodiments, He, Ar, H ₂ or various mixed gases thereof are preferred as the purge gas. In the process 507, after all of the silicon-containing precursor is removed, a plasma processing gas (which may be the same gas as the purge gas or a different gas) is introduced into the processing chamber, so that the first sub-gas is introduced. The layer is treated with plasma. In this case, it is preferable to perform the plasma treatment under the condition that the LF / HF power ratio is at least about 1.5, for example, at least about 2. In the process 509, film formation and plasma post-treatment are repeatedly performed to form a multilayer film including at least two sub-layers, for example, at least 10 layers. The plasma post-treatment for each of the sublayers may be performed for a time required for film densification and may depend on the thickness of the sublayer. According to some embodiments, the plasma post-treatment for each sublayer is performed for about 5 to 25 seconds, eg, about 8 to 15 seconds.

  The resulting multilayer silicon carbide film has been found to be clearly different in structure and properties from conventional silicon carbide films. A multilayer film obtained by performing multiple densification plasma post-treatments was not possible with the conventional film formation method, but the unexpected fact that high hardness and low stress can be realized at the same time was found. ing.

According to the structural characteristic evaluation of such a multilayer film, the Si—C / Si—H peak ratio and the Si—C / C—H peak ratio are high as a feature of the infrared (IR) spectrum. These peak ratios are the ratios of the corresponding IR peak areas, with the centers at about 760-800 cm ⁻¹ (Si—C), 2070-2130 cm ⁻¹ (Si—H), and 2950-3000 cm ⁻¹ (C -H).

According to some embodiments, the ratio of the Si—C peak area to the C—H peak area in the IR spectrum is at least about 50 and the Si—C / Si—H ratio is at least about 20. Also, the density of the films described herein is typically at least about 2 g / cm ³ .

FIG. 5B shows an IR spectrum (curve a) of a single layer type undoped silicon carbide film obtained without performing plasma post-treatment and a multilayer type obtained by performing multiple densification plasma treatments. It is a figure which shows IR spectrum (curve b) of the silicon carbide film | membrane which is not doped. The monolayer film was formed on a 300 mm wafer by injecting a processing gas containing tetramethylsilane (flow rate: 1,000 sccm) and helium (flow rate: 3,000 sccm) at a pressure of 2.1 Torr. At the time of film formation, a dual frequency plasma having an LF power density of about 0.25 W / cm ² and an HF power density of about 0.13 W / cm ² was used. In the case of a multilayer film, the sublayer was formed under the same conditions, but an additional plasma post-treatment was performed each time the sublayer was formed. In the plasma post-treatment, the flow rate is 3 slm, the chamber pressure is 2.1 Torr, argon is introduced into the treatment chamber as a post-treatment gas, the LF power density is about 0.25 W / cm ² , and the HF power density is about 0.13 W. A dual frequency plasma of / cm ² was formed. The resulting single layer film had an SiC / SiH area ratio of about 15. The multilayer film formed by performing the densified plasma treatment a plurality of times has an IR peak area ratio of SiC / SiH of about 24. The multilayer film had a Young's modulus of about 170 GPa and a hardness of about 20.4 GPa, while the single-layer film had a Young's modulus of about 95 GPa and a hardness of only about 12 GPa. Regarding the stress values, the single layer film was −20 MPa, and the multilayer film was 179 MPa.

FIG. 5C shows stress values and hardness values of two types of undoped silicon carbide films obtained by performing multiple densification plasma post-treatments, as well as a single layer formed without performing post-treatment. It is a figure which shows the stress value and hardness value about two types of silicon carbide films | membranes which are not doped of a layer type. FIG. 5D is a diagram showing the stress and Young's modulus of the same silicon carbide film as described above. Table 1 summarizes the film forming conditions and post-processing conditions of each silicon carbide film.

  All the silicon carbide films were obtained by using a mixed gas of tetramethylsilane and helium as a film forming process gas and setting the pressure to about 2 Torr. In forming any silicon carbide film, double frequency plasma generation was used. The HF plasma power density and LF plasma power density are listed in the table, and the power density is calculated by dividing the power by the substrate area. Film A and film D are single layer films formed without performing plasma post-treatment. It can be seen that the films A and D cannot simultaneously achieve high hardness and low stress. For example, the film A has a relatively high hardness (22.4 GPa), but has a very high compressive stress of -830 MPa. The film D has a low stress (−20 MPa), but the hardness of 12 GPa is only moderate.

  Films B and C were multilayer films, and were formed by performing plasma post-treatment each time a silicon carbide sublayer was formed. Argon was used as the plasma processing gas, and the pressure was about 2 Torr. In plasma post-treatment, dual frequency plasma generation was utilized. The power density of HF plasma and LF plasma is listed in the table. Unexpectedly, it has been found that the multilayer film simultaneously achieves high hardness (and / or high Young's modulus) and low stress. For example, the film B has a hardness of 20.86 GPa and a stress of −412 MPa (less than a half of the stress of the film A). The film C which is a multilayer film has a high hardness of 20.4 GPa and a tensile stress of 179 MPa. The hardness of the film C is 1.5 times or more of the hardness of the film D. Note that the films C and D are formed under the same conditions except for the presence or absence of plasma post-treatment. It can be seen that by performing the plasma post-treatment, the hardness of the film can be increased without increasing the compressive stress of the film.

According to some embodiments, a dual frequency plasma was utilized where the LF power was set to be greater than the HF power and the LF / HF power ratio was set to be at least about 1.5, or at least about 2. Post-processing is preferably performed on the silicon carbide sublayer. Although it was an unexpected result, when the ratio of LF electric power / HF electric power utilized when performing a post-process is enlarged, the characteristic of the silicon carbide film | membrane formed will be improved. When the ratio of LF power / HF power is increased, the refractive index, which is a parameter having a positive correlation with the hardness of the formed silicon carbide film, increases. According to some embodiments, a multilayer silicon carbide film having a refractive index of at least about 2.25, such as at least about 2.30 is obtained. Table 2 shows how the refractive index of the silicon carbide film increases as the LF / HF power ratio increases.

<Boron-containing hard mask film>
According to another aspect, a boron-containing hard mask film is provided. The boron-containing film includes a material selected from the group consisting of Si _x B _y C _z , Si _x B _y N _z , Si _x B _y C _z N _w , B _x N _y , and B _x C _y . According to some embodiments, the material has a high hardness (eg, at least about 12 GPa, preferably at least about 16 GPa) and a low stress (eg, in the range of about −600 to 600 MPa, preferably , Approximately in the range of −300 to 300 MPa). Some embodiments have the advantage that a boron-containing film with zero compressive stress, eg, a film with very low tensile stress (eg, in the range of about 0-300 Mpa), is obtained. Also, boron-containing films are usually more hydrophilic than undoped silicon carbide films and can be more easily removed by CMP (eg, using an acidic slurry containing hydrogen peroxide). In general, boron-containing hard masks can be prepared by a variety of methods including CVD and PVD based methods. According to some embodiments, it is preferred to utilize PECVD when preparing the boron-containing hard mask.

  FIG. 6A is an example of a process flow that utilizes a boron-containing hard mask in a back-end process. Process 601 begins with supplying a semiconductor substrate with an exposed dielectric layer to a PECVD process chamber. The dielectric layer can be, for example, an ultra-low dielectric constant (low-k) dielectric layer (eg, k is less than about 2.8, such as less than about 2.4), or a buffer dielectric with a higher dielectric constant. It may be a body layer.

High hardness and low stress selected from the group consisting of Si _x B _y C _z , Si _x B _y N _z , Si _x B _y C _z N _w , B _x N _y , and B _x C _{y in} process 601. A boron-containing hard mask film is formed. Film formation is performed by introducing a processing gas containing a suitable precursor into a processing chamber to form a plasma. According to some embodiments, dual frequency plasma is preferred. According to some embodiments, when the power density of the LF plasma is greater than the power density of the HF plasma, eg, the LF / HF power ratio is at least about 1.5, such as at least about 2, the hard mask film The parameters are particularly good.

  After depositing the boron-containing hard mask film, in process 605, the dielectric is patterned to form trenches and / or vias, as described with reference to FIGS. 1A-1K, for example. The boron-containing film serves as a hard mask when the dielectric is dry-etched by RIE. Subsequently, in process 607, vias and / or trenches are formed in the dielectric and then filled with metal. Thereafter, in process 609, the boron-containing hard mask is removed by CMP, typically after removing excess metal.

The film formation of Si _x B _y C _z using PECVD can be performed using a processing gas including a silicon-containing precursor, a boron-containing precursor, and a carbon-containing precursor. One or more of these precursors may be the same molecule. For example, tetraalkylsilanes function as both carbon-containing precursors and silicon-containing precursors. Diborane is commonly used as a boron-containing precursor, and alkylsilanes (eg, tetramethylsilane), alkenylsilanes, and alkynylsilanes can be used as silicon-containing and carbon-containing precursors. . In addition, saturated hydrocarbons and unsaturated hydrocarbons (C _x H _y ) can be used as the carbon-containing precursor, and SiH ₄ can be used as the silicon-containing precursor.

The deposition of Si _x B _y C _z N _w is accomplished by forming a plasma in a process gas that includes a silicon-containing precursor, a boron-containing precursor, a carbon-containing precursor (as described above), and a nitrogen-containing precursor. Executed. Nitrogen-containing precursors include ammonia, hydrazine, N ₂ , and mixtures thereof. Also, the nitrogen-containing precursor may be the same as the carbon-containing precursor and may include amines such as monoalkylamines, dialkylamines, and trialkylamines. The nitrogen-containing precursor may be the same as the boron-containing precursor and may include trimethylborazine. The nitrogen-containing precursor may further be the same as the silicon-containing precursor, for example silazane.

The deposition of Si _x B _y N _w includes silicon-containing precursors (eg, SiH ₄ ), boron-containing precursors (eg, diborane), and nitrogen-containing precursors (eg, ammonia, idrazine, N ₂ , and It can be performed by forming a plasma in a process gas containing these various gas mixtures).

B _x N _y deposition is performed using a process gas that includes a boron-containing precursor (eg, diborane) and a nitrogen-containing precursor (eg, ammonia, idrazine, N ₂ , and various mixed gases thereof). can do.

B _x C _y deposition can be performed utilizing a process gas that includes a boron-containing precursor (eg, diborane) and a carbon-containing precursor (eg, saturated or unsaturated hydrocarbon). An inert carrier gas such as helium or argon is usually used as a part of the processing gas when forming the boron-containing film. According to some embodiments, H ₂ is also included in the process gas.

FIG. 6B shows hardness and stress parameters for various Si _x B _y C _z films, Si _x B _y N _z films, and Si _x B _y C _z N _w films deposited using the PECVD method. FIG. 6C shows the Young's modulus and stress parameters for these films. Table 3 shows the deposition conditions and characteristics of these films.

Both films have a dual frequency plasma with an HFRF power density in the range of about 0.08 to about 0.30 W / cm ² and an LFRF power density in the range of about 0.10 to about 0.24 W / cm ^2. The film was formed on a 300 mm wafer by setting the pressure within the range of about 2 to about 4 torr.

According to one embodiment, the Si _x B _y C _z film is deposited using a process gas consisting essentially of B ₂ H ₆ , tetramethylsilane (4MS), and He. The flow rate of B ₂ H ₆ is in the range of about 2,000 to 4,000 sccm, preferably in the range of about 3,500 to 4,000 sccm, and the flow rate of tetramethylsilane is about 1,000 to 1, It may be in the range of 500 sccm. The flow rate of the carrier gas (eg, He) is preferably set within the range of about 3 to 8 slm. In some embodiments, a dual frequency with an HFRF power density in the range of about 0.04 to 0.26 W / cm ² and an LFRF power density in the range of about 0.14 to 0.53 W / cm ^2. Use plasma.

An unexpected result was obtained that the hardness of the boron-containing film thus obtained was greatly influenced by the ratio of B ₂ H ₆ to tetramethylsilane (4MS). In order to obtain a film with high hardness and high boron content, it is preferred that the flow rate ratio of B ₂ H ₆ / 4MS be at least about 2, for example at least about 3.

FIG. 6D shows the hardness of the Si _x B _y C _z film as a function of the flow rate ratio of B ₂ H ₆ / 4MS. It can be seen that as the flow rate ratio increases from about 0.5 to about 3.5, the hardness increases by a factor of about two. Table 3 shows the values of hardness and stress when the flow rate ratio is changed.

The structure will be described. A film having a high hardness and a high Young's modulus is characterized by a high content of B—C bonds. In some embodiments, high hardness films with a BC / [BC + SiC] infrared peak area ratio of at least about 0.35 are preferred. This ratio is the ratio of the IR peak area centered around about 1120 to 1160 cm ⁻¹ (B—C) and 760 to 800 cm ⁻¹ (Si—C), respectively.

FIG. 6E shows how the Young's modulus and stress parameters of various Si _x B _y C _z films depend on the area ratio of BC / [BC + SiC]. It can be seen that a film with BC / [BC + SiC] less than about 0.3 has a much lower hardness than a film with a high BC bond content. Table 4 summarizes the data obtained for the three types of Si _x B _y C _z films. All three of these films use a process gas consisting of B ₂ H ₆ (flow rate in the range of 500 to 3,500 sccm), 4MS (flow rate is 1,000 sccm), and He (flow rate is 3,000 sccm). The film was formed at a pressure of 2.1 Torr using a dual frequency plasma in which the HFRF power density was set to about 0.12 W / cm ² and the LFRF power density was set to about 0.22 W / cm ² . In Table 4, the parameters of hardness, stress, and Young's modulus are shown as a function of BC bond content.

According to some embodiments, deposition of the Si _x B _y C _z film may be performed by setting the LF power to be higher than the HF power and the LF / HF power ratio is at least about 1.5, at least about 2, for example, It is preferable to use a dual frequency plasma of at least about 3. It has been found that when the power ratio of LF / HF at the time of film formation is increased, the characteristics of the formed film are improved. As the LF / HF power ratio increases, the refractive index having a positive correlation with the hardness of the formed film increases. According to some embodiments, a Si _x B _y C _z film having a refractive index of at least about 2.3, such as at least about 2.5, such as at least about 2.6 is obtained. Table 5 shows how the refractive index of the film increases as the LF / HF power ratio increases.

An important structural feature of the Si _x B _y N _z film is the content of BN bonds. The content is calculated based on BN / [BN + SiN], which is the ratio of peak areas in the IR spectrum. This ratio is a ratio of IR peak areas centered at about 1400 cm ⁻¹ (B—N) and 820 to 850 cm ⁻¹ (Si—N), respectively.

FIG. 6F is a diagram showing that both stress and Young's modulus are greatly influenced by the parameter. More specifically, the compressive stress increases rapidly as the content of BN bonds increases. According to some embodiments, for a Si _x B _y N _z film, it is preferred that BN / [BN + SiN] be less than about 0.7, for example, less than about 0.6. The BN bond content can be adjusted as necessary by appropriately changing the flow rates of the silicon-containing precursor and the boron-containing precursor. Table 6 shows the film characteristics when the BN / [BN + SiN] ratio is changed.

As mentioned above, boron-containing films are very suitable for use as a hard mask. One of the significant advantages of boron-containing films is hydrophilicity and ease of removal by CMP. FIG. 6G shows the hydrophilicity of various Si _x B _y C _z films compared to undoped silicon carbide films based on the results of contact angle tests performed with water drops placed on the films. The contact angle of the water droplet with respect to the membrane is measured, and the smaller the contact angle, the higher the hydrophilicity. When the test was performed on 4 to 6 of the Si _x B _y C _z films listed in Table 3, the contact angle was 38 degrees to 42 degrees. In contrast, undoped silicon carbide films are very hydrophobic, with evidence that the contact angle is as high as 66 degrees.

<Hard mask film of germanium nitride>
According to another aspect, a GeN _x hard mask film is provided. According to some embodiments, the GeN _x hardmask film is characterized by a high Young's modulus, such as at least about 100 GPa, such as at least about 130 GPa, and a high density (eg, greater than about 4 g / cm ³ ). . The GeN _x film can be used as a hard mask in a variety of back-end and front-end processing methods, and is sufficiently transparent at the wavelengths used for laser patterning alignment, after which CMP or wet etching is used. Can be easily removed from the substrate.

According to some embodiments, it is preferred to utilize a GeN _x hard mask film with a high germanium content. In such a high germanium content film, excluding hydrogen, the germanium concentration is at least about 60 atomic percent, such as at least about 70 atomic percent, such as at least about 75 atomic percent. If the germanium nitride film has a high germanium content, it is easily removed by CMP and wet etching after being used in patterning. According to some embodiments, the removal of the germanium nitride film is performed by contacting the hard mask with a composition comprising hydrogen peroxide in a CMP process or a wet etching process. For example, an acidic slurry for CMP containing hydrogen peroxide may be used.

According to one example, a GeN _x hardmask film having a germanium concentration of about 79 atomic percent, a Young's modulus of about 144 GPa, and a density of about 4.4 g / cm ³ was prepared.

Germanium nitride hard masks can usually be prepared using various CVD and PVD methods. Of these, the PECVD method will be described as an example. Referring to the back-end process flowchart shown in FIG. 7, the process starts from a process 701 for supplying a semiconductor substrate with an exposed dielectric layer to a PECVD process chamber. In process 703, a GeN _x hardmask film having a germanium content of at least about 60 atomic percent is deposited. Film deposition introduces a processing gas including a germanium-containing precursor (eg, germane) and a nitrogen-containing precursor (eg, NH ₃ , N ₂ , N ₂ H ₄ , and various mixed gases thereof) into the processing chamber. Then, it is performed by forming plasma and forming a germanium nitride layer. The processing gas for film formation is optional and may contain an inert gas such as helium or argon. The flow ratio of the nitrogen-containing precursor and the germanium-containing precursor is selected so that a germanium nitride film with a high germanium content is formed. In one example where the precursor is germane and ammonia, the germane to ammonia ratio is at least about 0.05.

As an example, a GeN _x hardmask is basically composed of germane (flow rate in the range of about 50 to 100 sccm), NH ₃ (flow rate in the range of about 600 to 1,200 sccm), and N ₂ (flow rate in the range of A processing gas comprising about 12 slm) is introduced into the processing chamber to form a dual frequency plasma, and the temperature of the stage is set within a range of about 350 to 450 degrees Celsius to form a germanium nitride film on the substrate. By forming a film, a 300 mm wafer is formed. In this example, the pressure during film formation is in the range of about 2.5 to 4 Torr. In this film forming process, the frequency of the HFRF component is about 13.56 MHz (power density is about 0.18 W / cm ² ), and the frequency of the LFRF component is about 400 kHz (power density is about 0.23 W / cm ² ). And In some embodiments, it is preferable to increase the power density of the LF component over the HF component.

Returning to the process flow chart shown in FIG. 7, after the germanium nitride film is deposited, process 707 patterns the dielectric to provide trench and / or pattern as described with reference to FIGS. 1A-1K, for example. Form a via. The germanium nitride hard mask can be used for patterning by dry etching such as reactive ion etching (RIE) for a dielectric. For example, using a processing gas including C _x F _y (eg, CF ₄ ), an inert gas (eg, Ar), and an oxidizing agent (eg, O ₂ ) with the GeN _x hard mask exposed. Vias and / or trenches can be etched into the dielectric by contacting the plasma with a substrate comprising an exposed hardmask layer and dielectric layer. Other dry etching, for example, plasma etching using a processing gas containing Cl ₂ and N ₂ may be used.

After patterning the dielectric, in process 707, the vias and / or trenches are filled with metal. For example, copper may be deposited on a concave feature by electrodeposition. Subsequently, in process 709, the hard mask is removed by CMP. For example, the hard mask may be removed by removing excess copper and diffusion barrier material by CMP. According to some embodiments, the GeN _x hardmask is removed using a CMP slurry that is acidic in pH and that includes a peroxide (eg, hydrogen peroxide). According to other embodiments, the GeN _x hard mask film may be removed by wet etching (eg, using a solution containing H ₂ SO ₄ and H ₂ O ₂ in a ratio of 3: 1).

The process flowchart of FIG. 7 is for explaining the back-end process. The GeN _x film can also be used as a hard mask in the front end process. The germanium nitride film can also be used as a hard mask during wet etching. For example, it can also be used when patterning a silicon oxide-based material by a fluoride-containing wet etching chemical reaction.

<Device>
The deposition of the hard mask material described herein can generally be performed in various types of equipment, such as CVD equipment and PVD equipment. According to a preferred embodiment, a PECVD apparatus with HFRF and LFRF power supplies is utilized. Examples of suitable devices are SEQUEL® and VECTOR® manufactured by Novellus Systems, Inc., San Jose, Calif., USA.

  Generally, an apparatus is used that houses one or more wafers and that includes one or more chambers or “reactors” (which may include multiple stations) suitable for wafer processing. Each chamber may store one or more wafers to be processed. One or more chambers hold the wafer in one or more predetermined positions (in each position, for example, it may show movement such as rotation, vibration, etc., or it may be stationary without movement). According to some embodiments, the wafer on which the hard mask layer is deposited is moved between stations in the reactor during processing. During processing, each wafer is held in place by a platform, wafer chuck, and / or other wafer holding device. The apparatus may include a heater such as a heating plate for the process of heating the wafer.

  FIG. 8 is a simplified block diagram illustrating various components of a PECVD reactor suitably configured to practice the present invention. As shown in the figure, the reactor 800 includes a processing chamber 824. The processing chamber 824 houses the other components of the reactor inside and holds the plasma generated by the capacitor type system having a showerhead 814 that cooperates with a grounded heater block 820 inside. The high frequency RF generator 804 and the low frequency RF generator 802 are connected to a matching network 806, and the matching network 806 is connected to the showerhead 814.

  Within the reactor, wafer stage 818 supports substrate 816. The table usually has a chuck, a fork or a lift pin for holding and moving the substrate during the film formation reaction period and between the film formation reaction periods. The chuck may be an electrostatic chuck, a mechanical chuck, or various other types of chucks available in industry and / or academia.

  Process gas is introduced through an inlet 812. The plurality of source gas lines 810 are connected to the manifold 808. A plurality of types of gases may be mixed in advance or not. Appropriate valve mechanisms and mass flow control mechanisms are used so that gases are properly distributed during film formation and plasma processing. When distributing chemical precursors in the liquid phase, a liquid flow rate control mechanism is utilized. Then, the liquid precursor is vaporized and mixed with another processing gas while being transported by a manifold heated to a temperature higher than the boiling point before reaching the film forming chamber.

  Process gas is exhausted from chamber 824 through outlet 822. A vacuum pump 826 (eg, a single-stage or two-stage mechanical dry pump and / or a turbomolecular pump) typically draws process gas into the reactor by a closed loop controlled flow restriction device such as a throttle or pendulum valve. Is maintained at an appropriate low pressure.

  According to one embodiment, the hard mask layer may be deposited using a multi-station apparatus. The multi-station reactor improves wafer processing efficiency because the same or different processes can be performed simultaneously in multiple chambers. An example of the multi-station device is shown in FIG. A schematic top view is shown. The apparatus chamber 901 has four stations 903-909. The number of stations provided in one chamber of a general multi-station apparatus can be arbitrarily determined. The station 903 is used for loading and unloading the substrate wafer. Stations 903-909 may have the same or different functions, and may be operated under different processing conditions (eg, at different temperature conditions) according to some embodiments.

  According to some embodiments, the hard mask layer is deposited entirely at one of the apparatus stations. According to another embodiment, a first portion of the hard mask layer is deposited at a first station, and then the wafer is moved to a second station, where a second of the same hard mask layer is transferred at the second station. The process of depositing the part is repeated until the wafer returns to the first station and is removed from the apparatus.

  According to one embodiment, the deposition and plasma post-treatment of the silicon carbide sublayer is performed at one of the apparatus stations. According to another embodiment, the sub-layer deposition is performed at one or more dedicated stations and the plasma post-treatment is performed at one or more other stations.

  According to one embodiment, stations 903, 905, 907, and 909 are all utilized for depositing the hard mask layer. The index plate 911 lifts the substrate from the table and positions it accurately at the next processing station. After the wafer substrate is loaded into station 903, it is assigned sequentially to stations 905, 907, and 909, and a portion of the hard mask layer is deposited at each station. When the processing is completed, the wafer is taken out of the station 903 and a new wafer is loaded. During normal processing, a separate substrate is assigned to each station and these substrates are moved to a new station each time the process is repeated. Thus, an apparatus comprising four stations 903, 905, 907, and 909 can process four wafers simultaneously.

The processing conditions and the processing flow itself can be controlled by the control unit 913. The controller 913 has program instructions for observing, maintaining, and / or adjusting process variables such as HF power and LF power, precursor flow rate, temperature, pressure, and the like. The control unit has program instructions for executing any one of the hard mask film forming processes described in this specification. For example, according to some embodiments, the controller deposits a silicon carbide sublayer (ie, introduces an appropriate process gas to generate a plasma based on the required power parameters), and sets the chamber Purge with purge gas, plasma treatment of sublayer with plasma treatment gas, and program instructions to repeat deposition and plasma treatment as many times as desired (eg, as many times as at least 10 sublayers are deposited and processed) . According to some embodiments, the control unit has a program command for forming a boron-containing hard mask, and a processing gas having an appropriate composition as described above is introduced into the program command. , Instructions for generating a plasma of an appropriate power level (eg, LF / HF power ratio is at least about 1.5). According to another embodiment, the controller has a program instruction for depositing the GeN _x hardmask, and the program instruction includes a film having a germanium content of at least about 60 atomic percent. Instructions are included for introducing a process gas comprising a germanium-containing precursor and a nitrogen-containing precursor at a flow rate that is preferably formed. The command that the control unit has associated with each station of the device may be a different command or the same command, and the stations may operate independently or be synchronized. It is also possible to operate.

The examples and embodiments described herein are merely examples for explaining the present invention, and it should be understood by those skilled in the art that various modifications or changes are allowed. For the sake of convenience of explanation, detailed descriptions are omitted, but various alternative examples may be possible. Thus, the foregoing examples are to be construed as illustrative and not limiting of the invention, and the invention is not limited to the details described herein, but is claimed. Variations can be made within the scope of the term. It should be understood that in certain embodiments, it is not necessary to actively utilize a hard mask film for lithographic masking, but may simply serve as a hard protective layer for the underlying material.
[Item 1]
A method of forming a hard mask film on a semiconductor substrate,
Inserting a semiconductor substrate into a plasma enhanced chemical vapor deposition (PECVD) processing chamber;
Forming a hard mask film having a hardness higher than about 12 GPa and a stress within a range of about −600 MPa to 600 MPa by PECVD;
Prepared,
The step of forming the hard mask film by PECVD includes:
Forming a doped multilayer silicon carbide film or an undoped multilayer silicon carbide film by performing the densified plasma treatment a plurality of times (i);
Si _x B _y C _z, forming the _{Si x B y N z, Si} x B y C z N w, B x N y, and high hardness boron-containing film is selected from the group consisting of _B x _{C y} Stage (ii) and
Having a process selected from the group consisting of
Method.
[Item 2]
Item 2. The method according to Item 1, wherein the film has a stress in the range of about -300 MPa to 300 MPa.
[Item 3]
Item 2. The method according to Item 1, wherein the film has a stress in the range of about 0 MPa to 600 MPa.
[Item 4]
The method of item 1, wherein the membrane has a hardness of at least about 16 Gpa.
[Item 5]
The method of item 1, wherein the membrane has an elastic modulus of at least about 100 GPa.
[Item 6]
Step (i) above is
Introducing a processing gas containing a silicon-containing precursor into the processing chamber, forming a plasma, and forming a first sublayer of the silicon carbide hardmask film;
Removing the silicon-containing precursor from the processing chamber (b);
Introducing a plasma processing gas into the processing chamber, processing the substrate with plasma, and densifying the formed sublayer (c);
Repeating the step (a), the step (b), and the step (c) to further form a plurality of silicon carbide sub-layers to increase the density (d);
The method according to item 1, comprising
[Item 7]
Item 7. The method according to Item 6, wherein the silicon carbide is not doped and the silicon-containing precursor is a saturated precursor.
[Item 8]
Item 7. The method according to Item 6, wherein the silicon-containing precursor contains tetramethylsilane (Me ₄ Si).
[Item 9]
Item 7. The method according to Item 6, wherein the processing gas used at the time of film formation further includes a carrier gas selected from the group consisting of He, Ne, Ar, Kr, and Xe.
[Item 10]
The plasma processing _{gas, He, Ar, CO 2,} N 2, NH 3, and The method of claim 6 which is selected from the group consisting of _{H 2.}
[Item 11]
The method of item 6, wherein the thickness of each of the sublayers is less than about 100 mm.
[Item 12]
Item 12. The method according to Item 11, comprising the step of forming at least 10 sublayers.
[Item 13]
The step of forming the silicon carbide sub-layer includes the step of forming a dual frequency plasma by introducing a processing gas containing Me ₄ Si and an inert gas, and the power level of the high frequency plasma is about 0.04. from a range of 0.2 W / cm ^2, the power level of the low frequency plasma is in the range of about 0.17 to 0.6 W / cm ^2,
Removing the silicon carbide precursor comprises purging the processing chamber with a gas selected from the group consisting of Ar, He, H ₂ and mixtures thereof;
The step of densifying the sub-layer includes introducing a processing gas selected from the group consisting of Ar, He, H ₂ , and a mixed gas thereof so that the LF / HF power ratio is at least about 1.5. 7. A method according to item 6, comprising the step of forming a dual frequency plasma.
[Item 14]
In the formed silicon carbide film, the ratio of the peak area of SiC in the infrared spectrum to SiH is at least about 20, and the ratio of the peak area of SiC in the infrared spectrum to CH is at least about 50. The method described in 1.
[Item 15]
7. The method of item 6, wherein the formed silicon carbide film has a density of at least about 2 g / cm ³ .
[Item 16]
The step (ii) includes the step of forming a high hardness Si _x B _y C _z film,
The film forming step includes introducing a processing gas including a boron-containing precursor, a silicon-containing precursor, and a carrier gas into the processing chamber;
Forming a dual frequency plasma having an LF / HF power ratio of at least about 1.5 to form a high hardness Si _x B _y C _z film on the substrate;
The method according to item 1, comprising:
[Item 17]
Item 17. The method according to Item 16, wherein the formed high-hardness Si _x B _y C _z film has a BC / [BC + SiC] infrared peak area ratio of at least about 0.35.
[Item 18]
The formed hard mask layer is formed above a dielectric layer having a dielectric constant of less than about 2.8, and the formed hard mask film is formed on the dielectric in the case of dry plasma etching. The method of item 1, wherein the etch selectivity is at least about 8: 1.
[Item 19]
The method according to Item 1, wherein the hard mask layer formed is formed above a polysilicon layer.
[Item 20]
The method of item 1, wherein the hard mask is formed at a temperature of less than about 400 degrees Celsius.
[Item 21]
The method according to item 1, wherein the step (ii) includes a step of forming a high hardness Si _x B _y C _z N _w film.
[Item 22]
A membrane comprising doped silicon carbide or undoped silicon carbide having a hardness of at least about 12 GPa and a stress in the range of about -600 MPa to 600 MPa.
[Item 23]
An apparatus for forming a hard mask film,
(A) a processing chamber for forming plasma;
(B) a support for the wafer substrate that holds the wafer substrate in place during hard mask deposition;
(C) forming a doped multilayer silicon carbide film or an undoped multilayer silicon carbide film by performing the densified plasma treatment a plurality of times (i), and Si _x B _y C _z ; _{Si x B y N z, Si} x B y C z N w, B x N y, and the group consisting of step (ii) of forming a boron-containing film having high hardness selected from the group consisting of _B x _{C y} A controller having program instructions for executing a process selected from
A device comprising:
[Item 24]
A method of forming a hard mask film on a semiconductor substrate,
Inserting a semiconductor substrate into a plasma enhanced chemical vapor deposition (PECVD) processing chamber;
Forming a GeN _x hard mask film having an elastic modulus of at least about 100 GPa ;
A method comprising:
[Item 25]
(A) a PECVD processing chamber;
(B) a support portion for holding the semiconductor substrate in place during film formation;
(C) a controller having a program command for introducing a processing gas containing a germanium-containing precursor and a nitrogen-containing precursor, forming plasma, and forming a GeN _x hardmask film on the substrate ;
A semiconductor process apparatus comprising:

Claims (18)

A method of forming a hard mask film on a semiconductor substrate,
Inserting a semiconductor substrate into a plasma enhanced chemical vapor deposition (PECVD) processing chamber;
Forming a hard mask film having a hardness higher than 12 GPa and a stress in a range of −600 MPa to 600 MPa on the semiconductor substrate by PECVD, and
The step of forming the hard mask film by PECVD comprises:
Forming a non-doped multilayer silicon carbide film by performing the densified plasma treatment a plurality of times, and
The step of forming the multilayer silicon carbide film comprises
Introducing a processing gas containing a saturated silicon-containing precursor into the processing chamber, forming a plasma, and forming a sublayer of the multilayer silicon carbide film;
Removing the saturated silicon-containing precursor from the processing chamber (b);
Introducing a plasma processing gas into the processing chamber, processing the substrate with plasma, and densifying the formed sublayer (c);
It said step (a), said step (b), and, by repeating said step (c), a sublayer of silicon carbide plurality further formed, viewed contains a step (d) to densify,
The hard mask film has at least 10 sublayers,
The method wherein the thickness of each of the sublayers is less than 100 mm .   The method of claim 1, wherein the film has a stress in the range of −300 MPa to 300 MPa.   The method of claim 1, wherein the film has a stress in the range of 0 MPa to 600 MPa.   The method according to claim 1, wherein the film has a hardness of at least 16 Gpa.   The method according to claim 1, wherein the film has an elastic modulus of at least 100 GPa. The method according to claim 1, wherein the saturated silicon-containing precursor includes tetramethylsilane (Me ₄ Si).   The method according to any one of claims 1 to 6, wherein the processing gas used at the time of film formation further includes a carrier gas selected from the group consisting of He, Ne, Ar, Kr, and Xe. The plasma processing _{gas, He, Ar, CO 2,} N 2, NH 3, and A method according to any one of claims 1 to 7 which is selected from the group consisting of _{H 2.} The ratio of the area of the SiC peak in the infrared spectrum to the SiH peak in the formed silicon carbide film is at least 20 and the ratio of the area of the SiC peak in the infrared spectrum to the CH peak is at least 50. The method according to any one of 1 to 8 . Said silicon carbide film is formed, the method according to any one of claims 1 to 9 density of at least 2 g / cm ^3. The formed hard mask film is formed above a dielectric layer having a dielectric constant of less than 2.8, and the formed hard mask film is etched into the dielectric in the case of dry plasma etching. 11. The method according to any one of claims 1 to 10 , wherein the selectivity of is at least 8: 1. The hard mask layer formed in the method according to claims 1, which is deposited over the polysilicon layer in any one of 10. The hard mask layer A method according to any one of claims 1 to 12, which is formed at temperatures below 400 degrees Celsius.   The step of forming the hard mask film by PECVD generates a dual frequency plasma, and the power of the low frequency (LF) plasma is larger than the power of the high frequency (HF) plasma. The method according to item.   The ratio of the power of the low frequency (LF) plasma to the power of the high frequency (HF) plasma in the step of forming the hard mask film by PECVD is between 1.5 and 2.0. Method. An apparatus for forming a hard mask film,
A processing chamber for forming a plasma;
A support for the wafer substrate that holds the wafer substrate in place during hard mask deposition;
A controller having program instructions for executing a step of forming an undoped multilayer silicon carbide film by performing the densified plasma treatment a plurality of times, and
The step of forming the multilayer silicon carbide film comprises
Introducing a processing gas containing a saturated silicon-containing precursor into the processing chamber, forming a plasma, and forming a sublayer of the multilayer silicon carbide film;
Removing the saturated silicon-containing precursor from the processing chamber (b);
Introducing a plasma processing gas into the processing chamber, processing the substrate with plasma, and densifying the formed sublayer (c);
It said step (a), said step (b), and, by repeating said step (c), a sublayer of silicon carbide plurality further formed, viewed contains a step (d) to densify,
The multilayer silicon carbide film has at least 10 sublayers,
The apparatus, wherein the thickness of each of the sublayers is less than 100 mm .   17. The apparatus of claim 16, wherein in the step of depositing the multilayer silicon carbide film, a dual frequency plasma is generated, and the power of the low frequency (LF) plasma is greater than the power of the high frequency (HF) plasma.   The ratio of the power of the low frequency (LF) plasma to the power of the high frequency (HF) plasma is between 1.5 and 2.0 in the step of forming the multilayer silicon carbide film. apparatus.

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