JP5515068B2 - Fluorescent display tube module, driving method - Google Patents

Description

  The present invention relates to a fluorescent display tube module configured to include a fluorescent display tube and a drive circuit unit thereof, and a driving method of the fluorescent display tube.

JP-A-8-278763

FIG. 15 is a schematic structural diagram of a VFD (Vacuum Fluorescent Display).
In FIG. 15, only the structure of the portion related to the display of information for one digit is extracted from the VFD structure.
As is well known, a VFD has a filament 100 (directly heated cathode), a grid 101, and an anode (segment) 102 arranged in a vacuum vessel. In the VFD, an alternating voltage is applied to the filament 100 and heated to emit thermoelectrons, and the thermoelectrons are accelerated by the grid 101 so as to collide with the phosphor on the anode 102 to emit light in a desired pattern. Display is performed.

The acceleration of the thermal electrons is performed by applying a DC voltage to the grid 101. The grid 101 is actually provided corresponding to the display digit, and the digit to be displayed can be selected depending on which grid 101 the DC voltage is applied to.
For example, when the anode 102 is a display device for alphanumeric characters, the anode 102 is formed so that a plurality of segments exist per grid (digit) as shown in the figure. In this case, selection of the anode (segment) 102 is performed by applying a DC voltage to the corresponding anode 102.

  When displaying predetermined information on a predetermined display digit, a DC voltage is applied to the grid 101 and the predetermined anode 102 formed corresponding to the display digit. Thereby, only the phosphor on the predetermined anode 102 in the display digit is excited and emitted by the thermoelectrons emitted from the filament 100, and predetermined information display is realized.

FIG. 16 is a diagram for explaining the grid signal g and the anode signal a during information display.
Here, for convenience of explanation, it is assumed that the number of grids (the number of display digits) is four (G1 to G4) as shown in FIG. 16A. In each display digit (grid G), it is assumed that eight anodes A1 to A8 as shown in FIG.
FIGS. 16C and 16D respectively show grid signals g1 to g4 and anode signals a1 to a8 when “4321” is displayed as a 4-digit numerical value as illustrated in FIG. 16A. The grid signals g1 to g4 represent drive signals for the grids G1 to G4, respectively, and the anode signals a1 to a8 represent drive signals for the anodes A1 to A8, respectively.

For example, only the grid G1 corresponding to the first display digit will be described. In this example, the numerical value to be displayed in the digit of the grid G1 is “4”, and therefore the anode A to be activated is There are four anodes A2, A3, A6 and A7. For this reason, in the selection period of the grid G1 (period in which the grid signal g1 is on), the anode signals a2, a3, a6, and a7 corresponding to the anodes A2, A3, A6, and A7 are turned on.
Thereby, the display of the numerical value “4” in the digit of the grid G1 is realized.

  For confirmation, the period from when the grid G1 to the grids G2, G3, and G4 are sequentially turned on until the grid G1 is turned on again is one scan period. Thus, predetermined information can be displayed for each digit by scanning the grid G at a predetermined cycle (that is, sequentially selecting each grid G) and appropriately turning on a predetermined anode A at a predetermined timing. it can.

Incidentally, some VFDs allow adjustment of display luminance.
As a technique for adjusting the luminance in the VFD, a technique for changing the on / off duty of the anode signal a or a technique for changing the on / off duty of the grid signal g can be given.

With reference to FIG. 17, a method of performing luminance adjustment by changing the on / off duty of the anode signal a will be described.
FIG. 17 illustrates only the relationship between the grid signal g1 that is the drive signal of the grid signal G1 and the anode signal a1 that is the drive signal of the anode A1. That is, only the luminance adjustment for the anode A1 in the grid G1 is illustrated.

As shown in the figure, in the method in this case, the on period of the anode signal a is lengthened corresponding to the high luminance, and the on period of the anode signal a is shortened corresponding to the low luminance.
If the ON period of the anode signal a is set long, the anode lighting period of the anode A becomes longer. On the other hand, when the ON period of the anode signal a is set short, the anode lighting period of the anode A is shortened.
As described above, the length of the anode lighting period is adjusted by changing the ON period of the anode signal a, and thereby the brightness is adjusted.

As can be understood from the description of FIG. 16, the “anode lighting period” means the grid signal g for the grid G (in this case, the grid G1) corresponding to the formation position of the anode A, This is the period during which both the anode signal a (in this case, the anode signal a1) for the anode A is on.
Considering that the “anode lighting period” that determines the display luminance is a period in which both the grid signal g and the anode signal a are turned on, a method of changing the on period of the grid signal g instead of the anode signal a. It goes without saying that the same brightness adjustment can be realized even when the above is adopted.

  By the way, in the VFD, the length of the anode lighting period as described above is the main factor that determines the luminance. However, as another factor, the driving voltage of the filament 100 can also change the luminance. . Specifically, the length of the period during which the filament drive voltage is at the H level within the anode lighting period can be an element that determines the luminance. This is because the potential difference between the filament 100 and the grid 101 and the anode 102 is small during the period in which the filament driving voltage is at the H level within the anode lighting period, and the brightness of the anode 102 is reduced accordingly.

  Here, conventionally, as the filament drive voltage (filament drive signal), a signal asynchronous with the grid signal and the anode signal (frequency and phase) is generated. This is because when thermionic electrons are emitted from the filament 100, the filament 100 is simply driven by an alternating voltage with a required period.

A configuration of a conventional generation system of a filament driving voltage (hereinafter referred to as Ef) is disclosed in, for example, Patent Document 1 (particularly FIG. 3).
As can be seen with reference to FIG. 3 of the patent document 1, the conventional filament drive voltage Ef is provided with a dedicated secondary winding on the secondary side of the transformer of the DC / DC converter. And an anode signal a and a grid signal g generated based on a predetermined timing signal are asynchronous signals.

  Here, in the conventional VFD using the filament driving signal which is asynchronous with respect to the grid signal g and the anode signal a as described above, the anode lighting period is controlled to be shortened according to the luminance adjustment particularly at the low luminance. In such a state, there is a problem that display flicker is perceived.

FIG. 18 is a diagram for explaining the principle of occurrence of such display flicker.
In FIG. 18, on the premise that there are m grids G by the grids G1 to Gm and n anodes A by the anodes A1 to An in the VFD, the waveforms of the grid signals g1 to gm and the anode signals a1 to an are shown. Is illustrated.
In FIG. 18, regarding the luminance control, attention is paid to the luminance of the anode A1 in the grid G1. In the drawing, “lighting period of A1 in G1” represents an anode lighting period of the anode A1 in the grid G1 at a relatively high luminance (a period in which both the grid signal g1 and the anode signal a1 are turned on). In the figure, the anode signal a1 of the anode A1 in the grid G1 at the time of low luminance is shown, and the anode lighting period of the anode A1 in the grid G1 at the time of low luminance is expressed as “lighting period of A1 in G1 at low luminance. ".

  In FIG. 18, the waveform of the conventional filament drive voltage Ef is shown as “conventional Ef”. As can be seen with reference to this “conventional Ef”, the conventional filament drive voltage (drive signal) Ef is: The phase and frequency are asynchronous with respect to the grid signal g and the anode signal a that determine the anode lighting period. For this reason, the edge timing (edge position) of the filament drive voltage Ef does not coincide with the start timing of the anode lighting period based on the grid signal or the anode signal, and the relationship between these timings changes for each scan. It will follow. That is, the relationship between the edge position of the filament driving voltage Ef and the start timing of the anode lighting period varies from scan to scan.

When such an edge position of the filament drive voltage Ef and the start timing of the anode lighting period vary for each scan, a period during which the filament drive voltage Ef is at the H level within the anode lighting period (that is, between the filament, the grid, and the anode). The length of the period during which the potential difference is small and the luminance is reduced also varies from scan to scan.
In the figure, the period during which the filament driving voltage Ef is at the H level within the anode lighting period is indicated by hatching. With reference to this hatched portion, the length of the period during which the filament driving voltage Ef is at the H level during the anode lighting period. It can be confirmed that the length varies from scan to scan.

As understood from the above description, in the conventional case where the filament 100 is driven by the filament driving voltage Ef asynchronous to the grid signal g and the anode signal a, the brightness of the anode varies from scan to scan. .
Such variation in luminance causes display flicker.

  However, such luminance variations (display flicker) are difficult to perceive in a state where the anode lighting period is controlled to be longer in response to high luminance. That is, in the state where the anode lighting period is lengthened corresponding to the high luminance time, the number of pulses of the filament driving voltage Ef in the anode lighting period increases (the potential difference between the grid and the filament is small in the anode lighting period). Therefore, the variation in luminance for each scan due to the variation in the edge position of the filament driving signal with respect to the start timing of the anode lighting period as described above is reduced accordingly. For this reason, at the time of high luminance, it is difficult to perceive the flickering of the display for each scan.

On the other hand, when the anode lighting period is controlled to be shortened corresponding to the low luminance, the number of pulses of the filament driving voltage Ef in the anode lighting period is reduced as shown in FIG. The amount of variation in luminance for each scan due to the variation in the edge position of the filament driving voltage Ef with respect to the start timing of the anode lighting period is larger than that in the case of high luminance, and as a result, the display flickers for each scan. Is easily perceived.
Actually, it has been confirmed that such flickering of the display is observed when the number of pulses of the filament driving voltage Ef within the anode lighting period is about 3 or less (in FIG. 18, it corresponds to high luminance). The number of pulses of the filament driving signal within the anode lighting period is 3 or less, but this is for the convenience of illustration).

  The present invention has been made in view of such problems, and it is an object of the present invention to prevent the occurrence of display flicker perceived particularly at low luminance in a VFD whose luminance can be adjusted.

In order to solve the above problems, the present invention is configured as follows as a fluorescent display tube module.
That is, the fluorescent display tube module of the present invention includes a fluorescent display tube in which an anode, a grid, and a filament are formed.
In addition, each of the scans of the grid is a signal that is inverted for each one edge position of a selected grid switching period signal that represents a switching period of sequential selection of the grid by one edge position of rising or falling edge positions. Filament drive signal generating means for generating, as a filament drive signal, a signal in which the difference in edge position with respect to the start timing of the start anode lighting period located at the start of the period is constant in each scan period.
Also, Ru comprising a filament driving unit for driving the filament by the filament drive signal.
The number of grids is an even number, and the filament drive signal generating means generates the filament drive signal having an odd number of pulses per scan period by inserting a dummy pulse into the selected grid switching period signal. It is.
Alternatively, another fluorescent display tube module of the present invention includes a fluorescent display tube having an anode, a grid, and a filament, and a luminance width that represents a division of an adjustment width of the anode lighting period by one edge position of rising or falling edge positions. A signal and a selected grid switching period signal indicating a switching period of sequential selection of the grid by one edge position of rising or falling edge positions are input, and a logical sum of the luminance width signal and the selected grid switching period signal is input. A filament driving signal generating means for generating a filament driving signal in which the difference in edge position with respect to the start timing of the leading anode lighting period located at the beginning of each scanning period of the grid is constant in each scanning period; and Based on the filament drive signal, the filament Those comprising a filament driving unit for driving the.

In the present invention, the following method is proposed as a driving method.
In other words, the driving method of the present invention is a driving method of a fluorescent display tube having an anode, a grid, and a filament, and a selection that represents a switching cycle of sequential selection of the grid by one edge position of rising or falling edge positions. This signal is inverted at each edge position of the grid switching period signal, and the difference in edge position with respect to the start timing of the leading anode lighting period located at the beginning of each scanning period of the grid is constant in each scanning period. It has a filament driving signal generation procedure for generating a certain signal as a filament driving signal.
Further, that having a filament driving instructions for driving the filament based on the filament drive signal.
The number of grids is an even number, and the filament drive signal generation procedure generates the filament drive signal having an odd number of pulses per scan period by inserting a dummy pulse into the selected grid switching period signal. It is.
Alternatively, another driving method of the present invention is a driving method of a fluorescent display tube having an anode, a grid, and a filament, and the adjustment width of the anode lighting period is divided by one of the rising or falling edge positions. And a selected grid switching cycle signal indicating a switching cycle of sequential selection of the grids by one edge position of rising or falling edge positions, and the luminance width signal and the selected grid switching cycle signal, A filament driving signal generation procedure for generating a filament driving signal in which the difference in edge position with respect to the start timing of the leading anode lighting period located at the beginning of each scanning period of the grid is constant in each scanning period based on the logical sum of And the filler based on the filament driving signal. Those having a filament driving steps of driving the cement.

According to the present invention , a filament driving signal is generated in which the difference in edge position with respect to the start timing of the leading anode lighting period is constant in each scanning period . According to this filament drive signal , it is possible to prevent the length of the period during which the filament drive signal is at the H level during the anode lighting period from varying from scan to scan. Alternatively, even if variations occur, regularity can be given to the variations.
If the variation in the length of the period during which the filament drive signal is at the H level during the anode lighting period can be prevented, the luminance can be prevented from decreasing for each scan, and the display flicker can be prevented.
Alternatively, it is possible to prevent display flicker from being perceived by providing regularity to the variation in the length of the H level period of the filament drive signal for each scan as described above.
Here, for example, for a certain anode, the amount of decrease in luminance due to the filament drive signal becoming H level within the anode lighting period of the first scan is set to “N”. At this time, if regularity can be given to the variation for each scan, for example, the amount of decrease in luminance caused by the filament drive signal becoming H level during the anode lighting period of the anode in the even-numbered scan is “0”. The amount of decrease in luminance due to the filament drive signal becoming H level during the anode lighting period in the second scan can be set to “N”. If such regularity can be provided in the variation in brightness for each scan, it is possible to prevent humans from visually perceiving display flicker. That is, since the grid scanning period is relatively high, such as 120 Hz, for example, even if the brightness is bright / dark for each scan as described above, the brightness of “light” and “dark” is the same. For this reason, the flickering of the display is not perceived by human eyes.

  As described above, according to the present invention, it is possible to prevent the occurrence of display flicker, which is perceived particularly at low luminance, with respect to a VFD (fluorescent display tube) whose luminance can be adjusted.

It is a figure for demonstrating the drive method as 1st Embodiment. It is the figure which showed the internal structure of the VFD module as 1st Embodiment. 3 is a timing chart relating to generation of a filament drive clock according to the first embodiment; It is the figure which showed the internal structure of the VFD module as 2nd Embodiment. It is a timing chart which concerns on the production | generation of the filament drive clock of 2nd Embodiment. It is a figure for demonstrating an effect | action at the time of using the filament drive signal of 2nd Embodiment. It is the figure which showed the internal structure of the VFD module as a modification of 2nd Embodiment. It is the figure which showed the internal structure of the VFD module as 3rd Embodiment. It is a timing chart which concerns on the production | generation of the filament drive clock of 3rd Embodiment. It is a figure for demonstrating an effect | action at the time of using the filament drive signal of 3rd Embodiment. It is the figure which showed the structural example of the filament drive clock generation circuit which should be prepared when generating the filament drive signal by which the pulse number for every grid selection period is made into an odd number. It is a figure for demonstrating the filament drive clock produced | generated by the filament drive clock generation circuit shown in FIG. It is the figure which showed the internal structure of the VFD module as a modification of 3rd Embodiment. It is a figure for demonstrating the modification which concerns on the alternating drive of a filament. It is a schematic structure figure of VFD. It is a figure for demonstrating the grid signal (g) at the time of information display, and an anode signal (a). It is a figure for demonstrating the brightness | luminance adjustment of VFD. It is a figure for demonstrating the generation | occurrence | production principle of a display flicker.

Embodiments according to the present invention will be described below.
The description will be given in the following order.

<1. First Embodiment (Filament Drive Signal Synchronized with INT Signal)>
<2. Second Embodiment (Filament Drive Signal Synchronized with BK Signal)>
<3. Third Embodiment (Filament Drive Signal Synchronized with GCP Signal)>
<4. Modification>

<1. First Embodiment (Filament Drive Signal Synchronized with INT Signal)>

FIG. 1 is a diagram for explaining a driving method according to the first embodiment.
Here, in the following description including FIG. 1, m (m is a natural number of 2 or more) grids G1 to Gm as grids G and anodes A formed on a VFD (Vacuum Fluorescent Display). It is assumed that there are n (A is a natural number of 2 or more) anodes A by the grid G and the anodes A1 to An. The drive signals for the grids G1 to Gm are denoted as grid signals g1 to gm, respectively, and the drive signals for the anodes A1 to An are denoted as anode signals a1 to an, respectively.
In FIG. 1, waveforms similar to those in FIG. 18 are illustrated as examples of the waveforms of the grid signals g1 to gm and the anode signals a1 to an. As for the anode signal a1, a signal at low luminance is also shown.
Further, “conventional Ef” in the figure represents a conventional filament driving signal (driving voltage) as in the case of FIG.

  Also in FIG. 1, as in the previous FIG. 18, the luminance control is focused on the luminance of the anode A1 in the grid G1. In the figure, the “lighting period of A1 in G1” indicates that the anode lighting period of the anode A1 in the grid G1 at the time of relatively high luminance (that is, both the grid signal g1 and the anode signal a1 are on, as in FIG. Period). In the drawing, “lighting period of A1 in G1 at low luminance” represents the lighting period of the anode A1 in the grid G1 at low luminance.

  As described with reference to FIG. 18, when “conventional Ef” asynchronous with the grid signal g and the anode signal a is used, the start timing of the anode lighting period as a period in which both the grid signal g and the anode signal a are turned on Since the relationship with the edge timing (edge position) of the filament driving voltage Ef varies from scan to scan, the period during which the filament driving voltage Ef is at the H level within the anode lighting period (the potential difference between the filament, the grid, and the anode is small). Therefore, the length of the period in which the luminance decreases (shaded portion in the figure) also varies for each scan, and as a result, the luminance varies for each scan.

Such variations in brightness from scan to scan can cause display flicker, but as described above, display flicker is perceived in a state where the anode lighting period is controlled to be longer in response to high brightness. This is difficult to be perceived, and is particularly easily perceived in a state where the anode lighting period is controlled to be short in response to low luminance.
This is because the length of the period in which “conventional Ef” is H level in the “lighting period of A1 in G1” corresponding to the high luminance and the “conventional Ef” in the “lighting period of A1 in G1 at low luminance”. Compared with the length of the period in which H is at the H level, the amount of variation for each scan of the length of the period at the time of low luminance is higher than that at the time of high luminance (ratio of change in the length of the period for each scan) It is also clear that is large.

  In the present invention, in order to prevent the occurrence of display flicker perceived at the time of low luminance as described above, the edge position of the filament driving signal with respect to the start timing of the leading anode lighting period positioned at the beginning of each scanning period of the grid is determined. A signal in which the difference is constant in each scanning period is used. In other words, in the example of FIG. 1, the filament drive signal ((1) is set so that the difference in edge position with respect to the start timing of the leading anode lighting period as a period in which both the grid signal g1 and the anode signal a1 are on is constant in each scanning period. Drive voltage) Ef.

Specifically, in the first embodiment, as the filament drive signal Ef, a signal in which the edge position is matched (synchronized) with a signal representing a grid scanning period (more specifically, an INT signal described later) is generated. To do.
In FIG. 1, the filament drive signal Ef generated in the first embodiment is indicated as “Ef of this example”. As shown in the figure, the filament drive signal Ef of this example is a signal that is inverted every scan of the grid.

  According to the filament drive signal Ef of the first embodiment as “Ef of this example”, the length of the period during which the filament drive signal Ef is at the H level within the anode lighting period is shown in FIG. A predetermined length (“N”) can be set for odd-numbered scans, and “0” can be set for even-numbered scans. In other words, the length of the period during which the filament drive signal Ef is at the H level within the anode lighting period varies for each scan, but the variation can be regularized.

  Here, the grid scanning period is relatively high, such as 120 Hz. Therefore, even if brightness / darkness occurs for each scan as described above, the brightness of each of these “light” and “dark” is the same (“N” or “0”). In particular, the flickering of the display can be prevented from being perceived.

  FIG. 1 illustrates “the length of the period during which the filament drive signal Ef is at the H level within the anode lighting period” for only the anode A1 in the grid G1, but the first embodiment as described above. According to the filament drive signal Ef, for all other anodes A, “the length of the period during which the filament drive signal Ef is at the H level within the anode lighting period is“ N ”during the odd-numbered scan, "It will be" 0 "at the time of scanning" holds. That is, for all the anodes A, display flickering at low luminance can be prevented.

FIG. 2 shows an internal configuration of the VFD module as the first embodiment for realizing the filament driving as the first embodiment described above.
The VFD module is a module that displays required information in response to an instruction from a host device connected to the VFD module so as to be capable of data communication.
As shown in the figure, the VFD module of the first embodiment includes a VFD 1, a CPU (Centeral Processing Unit) 2, a controller 3, a driver 4, a filament drive clock generation circuit 5, and a filament drive circuit 6.

  The VFD 1 is a fluorescent display tube, and m grids G including grids G1 to Gm, n anodes A including anodes A1 to An, and filaments 1a are formed in the vacuum vessel.

  The CPU 2 includes a calculation unit, a ROM (Read Only Memory), and a RAM (Random Access Memory), and the calculation unit performs a calculation according to a program stored in the ROM. The RAM is used for temporary storage of data handled by the CPU 2.

The CPU 2 executes processing in accordance with a predetermined procedure (program) in accordance with an instruction from the host device (instruction for information to be displayed), so that m grids G formed in the VFD 1 are processed. Generation of grid data, which is information on how to drive each of them, and anode data, which is information on how to drive each of the n anodes A, is generated (in the figure, these are “data”). ).
The CPU 2 performs generation and output processing of these grid data and anode data based on an INT signal (a signal representing a grid scanning period) supplied from the controller 3 described below.

The controller 3 generates various timing signals such as the INT signal, and also gives the driver 4 m grid data corresponding to each of the grids G1 to Gm and n anodes corresponding to each of the anodes A1 to An. Supply data.
Here, examples of the timing signal generated by the controller 3 include the BK signal and the GCP signal together with the INT signal.
The BK signal is a signal representing a cycle for switching selection of the grid G in a scanning operation performed by sequentially selecting the grids G1 to Gm.
Further, the GCP signal is a periodic signal that represents a delimiter of the adjustment width for luminance adjustment performed by adjusting the length of the anode lighting period.

The INT signal generated by the controller 3 is supplied to the CPU 2. In the case of this example, the INT signal is also supplied to the filament drive clock generation circuit 5 as shown in the figure.
On the other hand, the BK signal and the GCP signal generated by the controller 3 are supplied to the driver 4.

The driver 4 receives a grid voltage VHG (DC voltage) and an anode voltage VHA (DC voltage) generated by a power supply circuit (not shown).
The driver 4 generates and outputs grid signals g1 to gm by turning on / off (switching) the grid voltage VHG according to grid data corresponding to each of the grids G1 to Gm supplied from the controller 3.
The driver 4 generates and outputs anode signals a1 to an by switching the anode voltage VHA in accordance with anode data corresponding to the anodes A1 to An supplied from the controller 3, respectively.
For confirmation, the grid signals g1 to gm are signals for driving the grids G1 to Gm formed in the VFD 1, respectively, and the anode signals a1 to an are anodes A1 to An formed in the VFD1. Is a signal for driving the.

The filament drive clock generation circuit 5 is a circuit for generating a filament drive clock F_CLK necessary for generating a drive signal for the filament 1a.
The filament drive clock generation circuit 5 in this case is configured to include a flip-flop 5a that is a D flip-flop. A DC voltage Vd is input to the data terminal (D) of the flip-flop 5a, and an INT signal from the controller 3 is input to the clock terminal (CK).
As a result, filament drive clocks F_CLK1 and F_CLK2 that are inverted at each rising edge position of the INT signal are obtained at the output terminal (Q) and the inverted output terminal (Q bar) of the flip-flop 5a.
Note that two types of F_CLK1 and F_CLK2 that are in an inverted relationship are generated as the filament driving clock F_CLK, respectively. In this example, the filament driving circuit 6 that drives the filament 1a by a so-called alternating driving method is provided as will be described later. This is to make it correspond.

FIG. 3 shows a timing chart relating to generation of the filament drive clock F_CLK according to the first embodiment.
FIG. 3 shows the waveforms of the grid signals g1 to gm, the INT signal, the filament drive clock F_CLK1, and the filament drive signal Ef.

  First, as can be understood from the above description, in a scan operation in which the grid signals g1 to gm are sequentially turned on (that is, the grids G1 to Gm are sequentially selected) in one scan period, the grid signal g1 is turned on. It means a period from when the grid signal g1 is turned on again.

The INT signal used in this embodiment is a signal whose rising edge position indicates the start timing of one scan period as shown in the figure.
As described above, the filament drive clock F_CLK (see F_CLK1 in the figure) in the first embodiment is generated as a signal that is inverted at each rising edge position of the INT signal. That is, the signal is inverted every scan.
Accordingly, the filament drive signal Ef generated based on the filament drive clock F_CLK is also a signal that is inverted every scan as shown in FIG.

Returning to FIG.
Filament drive clocks F_CLK1 and F_CLK2 generated by the filament drive clock generation circuit 5 are supplied to the filament drive circuit 6.
The filament drive circuit 6 is configured to drive the filament 1a by the alternating drive system based on the filament drive clocks F_CLK1 and F_CLK2.

  Specifically, the filament driving circuit 6 includes a first series connection circuit in which a switching element Q1 made of Pch (ch: channel) MOS-FET and a switching element Q2 made of NchMOS-FET are connected in series, and a switching element made of PchMOS-FET. A second series connection circuit in which Q3 and an NchMOS-FET switching element Q4 are connected in series and a Zener diode ZD are provided.

As shown in the figure, the source of the switching element Q1 and the source of the switching element Q3 are both connected to the positive potential side (E_f +) of the filament voltage E_f, the drain of the switching element Q1 is connected to the drain of the switching element Q2, and the switching element Q3 Are respectively connected to the drain of the switching element Q4.
The source of the switching element Q2 and the source of the switching element Q4 are both connected to the negative potential side (E_f−) of the filament voltage E_f.
Furthermore, one end of the filament 1a is connected to the connection point between the switching element Q1 and the switching element Q2, and the other end of the filament 1a is connected to the connection point between the switching element Q3 and the switching element Q4.

  Here, the filament voltage E_f only needs to be a DC voltage at a required level required for driving the filament 1a, and the generation method is not limited to a specific one. In this example, it is assumed that the filament voltage E_f generated in a power supply circuit (not shown) is input to the filament drive circuit 6.

The Zener diode ZD has its anode grounded, and its cathode is connected to a connection point (that is, E_f−) between the source of the switching element Q2 and the source of the switching element Q4.
The Zener diode ZD is provided to apply a cut-off bias voltage to the grid G and the anode A in order to prevent so-called leakage light emission (see, for example, the following references 1 and 2).

-Reference 1 ... JP 2-190893 A-Reference 2 ... JP 2007-72323 A

Note that the cut-off bias voltage can also be applied by providing a resistor instead of the Zener diode ZD.

The filament drive clock F_CLK1 supplied to the filament drive circuit 6 is given to the gates of the switching elements Q1 and Q2 in the first series connection circuit.
The filament drive clock F_CLK2 is given to the gates of the switching element Q3 and the switching element Q4 in the second series connection circuit.

In the filament driving circuit 6 configured as described above, during the period in which the filament driving clock F_CLK1 is at the H level, that is, the period in which the filament driving clock F_CLK2 is at the L level, the pair of the switching element Q2 and the switching element Q3 is turned on. And the pair of switching elements Q4 are turned off. During this period, the filament current is passed through the switching element Q3 → the filament 1a → the switching element Q2. The filament current at this time is referred to as a forward filament current.
On the other hand, in the period in which the filament drive clock F_CLK1 is at the L level (period in which F_CLK2 is at the H level), the pair of the switching element Q2 and the switching element Q3 is turned off and the pair of the switching element Q1 and the switching element Q4 is turned on. Thus, the filament current flows through the switching element Q1 → the filament 1a → the switching element Q4. That is, a reverse filament current flows.

As described above, in the filament driving circuit 6, so-called alternating driving is performed in which the filament la is driven (that is, thermionic electrons are emitted) by flowing filament currents alternately in different directions.

<2. Second Embodiment (Filament Drive Signal Synchronized with BK Signal)>

Next, a second embodiment will be described.
In the second embodiment, a signal in which the edge position is synchronized with a signal indicating a switching period of sequential selection of grids accompanying a scanning operation is generated as a filament driving signal Ef.
Specifically, a signal whose edge position is synchronized with any one of the rising / falling edge positions of the BK signal is generated as the filament drive clock F_CLK.

FIG. 4 is a diagram showing an internal configuration of the VFD module as the second embodiment.
In the following description including FIG. 4, parts that are the same as the parts that have already been described are denoted by the same reference numerals and description thereof is omitted.

  In FIG. 4, the VFD module according to the second embodiment is different from the VFD module according to the first embodiment in that the filament drive clock generation circuit 5 (clock terminal of the flip-flop 5a) is connected to the controller 3 instead of the INT signal. The difference is that the BK signal from is input.

FIG. 5 shows a timing chart relating to generation of the filament drive clock F_CLK according to the second embodiment.
First, the falling edge position of the BK signal used in this example is a signal representing the selection switching timing of the grid G as shown in the figure. The pulse width of the BK signal is very short, and the rising and falling edge positions are very close as shown in the figure.
For confirmation, the pulse width of the BK signal is constant.

As described above, the filament driving clock generation circuit 5 (flip-flop 5a) generates a signal that is inverted every rising edge position of the input signal as the filament driving clock F_CLK.
Therefore, as the filament driving clock F_CLK1 in this case, as shown in FIG. 5, a signal that is inverted at every rising edge position of the BK signal is obtained, and as a result, the filament driving signal Ef is also as shown in the figure. The waveform is inverted every rising edge position of the BK signal.

FIG. 6 is a diagram for explaining the operation when the filament drive signal Ef of the second embodiment is used.
In FIG. 6, for the sake of illustration, only three grids G1 to G3 are formed (that is, only g1 to g3 exist as grid signals g). Further, in FIG. 6, focusing only on the anode A1, the anode signal a1 which is a drive signal of the anode A1 is set to ON when the grid G1 is selected, ON when the grid G2 is selected = ON, and OFF when the grid G3 is selected as illustrated. (That is, only the anode A1 in the grid G1 and the anode A1 in the grid G2 are turned on).

Here, focusing on the anode A1 in the grid G1 to be lit (the lighting target anode A in the odd-numbered grid G) and the anode A1 in the grid G2 (the anode A to be lit in the even-numbered grid G), In the first scan, there is a period in which the filament drive signal Ef is at the H level within the anode lighting period for the anode A1 in the grid G1 (“Yes” in the figure), whereas the anode A1 in the grid G2 It can be seen that there is no period during which the filament drive signal Ef is at the H level within the anode lighting period for “No” in the figure.
In the second scan, on the contrary, the period during which the filament driving signal Ef is at the H level during the anode lighting period of the anode A1 in the grid G1 is “none”, and the filament driving signal Ef is within the anode lighting period of the anode A1 in the grid G2. Becomes “H”, the relationship is switched again in the third scan, and the period in which the filament drive signal Ef is in the H level during the anode lighting period of the anode A1 in the grid G1 as in the first scan is “ “Yes”, the period during which the filament drive signal Ef is at the H level within the anode lighting period of the anode A1 in the grid G2 is “absent”.
In the figure, regarding the presence / absence of the period during which the filament driving signal Ef is at the H level within the anode lighting period, the presence / absence of the period of the anode A1 in the grid G1 is indicated by a circle, and the period of the anode A1 in the grid G2 Presence / absence is indicated by a square mark.

As described above, according to the filament driving signal Ef of the second embodiment generated based on the BK signal, the period during which the filament driving signal Ef is at the H level within the anode lighting period is set for each scan for the anode A to be lit. Can be set to “present” / “not present” (that is, the amount of decrease in luminance is set to “N” / “0” for each scan), and therefore the filament drive signal Ef becomes H level within the anode lighting period. Regarding the decrease in luminance due to the above, regularity similar to that of the first embodiment can be given to the variation for each scan.
For this reason, occurrence of display flicker can be prevented also by the second embodiment.

  In the above description, since the filament drive signal Ef (filament drive clock F_CLK) is generated at the rising edge position of the BK signal, the edge position of the filament drive signal Ef is the start timing of the anode lighting period. Is generated as a filament driving clock F_CLK, and a signal to be inverted at each falling edge position of the BK signal is generated, and a filament driving signal Ef whose edge position matches the start timing of the anode lighting period is obtained. However, it is also possible to provide regularity to the luminance variation for each scan so that the display flicker is not perceived.

Here, as can be seen with reference to FIG. 6, what is important in preventing the occurrence of display flickering is that the difference (time difference) in the edge position of the filament drive signal Ef with respect to the start timing of the anode lighting period is different in each scanning period. It is constant (including the case where the difference is equal to 0). That is, if the difference in the edge position of the filament drive signal Ef with respect to the start timing of the anode lighting period is constant in each scan period, as shown in FIG. 6 or FIG. It is possible to provide regularity to the variation in each scan during the period in which the filament drive signal Ef is at the H level (that is, the decrease in luminance for each scan is set to “N” / “0”).
Alternatively, as will be described later in the third embodiment, it is possible to prevent the occurrence of variations for each scan in the “period in which the filament drive signal Ef is at the H level within the anode lighting period”. .

As described above, in order to make “the difference in the edge position of the filament driving signal Ef with respect to the start timing of the anode lighting period constant in each scanning period”, at least in the first anode lighting period of each scan, The difference between the start timing and the edge position of the filament drive signal Ef may be made constant.
Since the filament drive signal Ef is a signal having a constant period, if the difference in edge position with respect to the start timing of the head anode lighting period for each scan is made constant as described above, the head grid G ( With respect to the anode A of each grid G after the grid G1), the difference in the edge position of the filament drive signal Ef with respect to the start timing of the anode lighting period can be made constant for each scan.

By the way, in the previous FIG. 6 (and FIG. 5), the case where the number of grids G formed is an odd number is illustrated, so that the relationship of the waveform of the filament drive signal Ef is inverted every scan, thereby The luminance decrease amount of the anode A in the grid G and the luminance decrease amount of the anode A in the even-numbered grid G can be alternately “N” / “0” for each scan. Occurrence could be prevented.
However, when the number of grids G formed is an even number, the waveform of the filament drive signal Ef becomes the same in each scan period, and accordingly, the anode A in the odd-numbered grid G in each scan period. The luminance decrease amount is “N” and the luminance decrease amount of the anode A in the even-numbered grid G is fixed to “0”. As a result, the anode A and the even-numbered grid G formed in the odd-numbered grid G are fixed. Brightness unevenness with the anode A formed on the substrate. That is, proper brightness adjustment cannot be realized.

  Therefore, when the number of grids G formed is an even number, the waveform of the filament drive signal Ef is inverted for each scan by inserting a dummy pulse into the BK signal input to the filament drive clock generation circuit 5. You just have to make it. Specifically, one (odd number) of dummy pulses may be inserted for each scan with respect to the BK signal.

  In the above description, the hardware controller 3 exists and the BK signal output from the controller 3 is input to the filament drive clock generation circuit 5. However, the controller 3 is omitted as a VFD module. There may also be a configured.

FIG. 7 shows an internal configuration of a VFD module as a modification of the second embodiment in which the controller 3 by hardware is omitted.
In this case, the function of the controller 3 is implemented on the CPU 10 by software. The configuration in which the controller 3 is omitted in this way is employed when a CPU 10 having a relatively high computing capability is used.

In the configuration shown in FIG. 7, the BK signal and GCP signal output from the controller 3 in FIGS. 4 and 2 are output from the CPU 10 to the driver 4.
Correspondingly, the BK signal output from the CPU 10 is input to the filament drive clock generation circuit 5 in this case, and the filament drive clocks F_CLK1 and F_CLK2 are generated based on the BK signal. Done.

<3. Third Embodiment (Filament Drive Signal Synchronized with GCP Signal)>

Subsequently, a third embodiment will be described.
In the third embodiment, a signal in which the edge position is synchronized with a signal that represents a break in the adjustment width of the anode lighting period by the edge position is generated as the filament drive signal Ef. Specifically, a signal whose edge position is synchronized with any one of the rising / falling edge positions of the GCP signal is generated as the filament drive clock F_CLK.

FIG. 8 is a diagram showing an internal configuration of the VFD module as the third embodiment.
In FIG. 8, the VFD module of the third embodiment has a BK in the filament drive clock generation circuit 5 (clock terminal of the flip-flop 5a) as compared with the VFD module of the second embodiment shown in FIG. The difference is that a GCP signal, not a signal, is input from the controller 3.

FIG. 9 shows a timing chart relating to generation of the filament drive clock F_CLK according to the third embodiment.
In FIG. 9, only the waveforms during the selection period of the grid G1 are mainly extracted and shown with respect to the waveforms of the grid signal g1, the BK signal, the filament drive clock F_CLK1, and the filament drive signal Ef for the grid G1. The waveform of each signal after the selection period of the grid G1 is a repetition of the waveform in the selection period of the grid G1.

First, as a premise, in this example, the gradation of luminance adjustment is 16 bits, and the GCP signal corresponding to this is assumed to have 14 pulses in one grid selection period as shown in the figure. .
According to such a GCP signal, by selecting a predetermined edge position from among the edge positions of the GCP signal, the width of the ON period of the anode signal a (and hence the width of the anode lighting period) at the time of luminance adjustment is set. It can be set at a predetermined step (gradation).

As can be seen from FIG. 8, the filament drive clock generation circuit 5 in this case is also configured to output a signal that is inverted at each rising edge position of the input signal as the filament drive clock F_CLK. Accordingly, as the filament drive clock F_CLK1 in this case, as shown in FIG. 9, a signal that is inverted at each rising edge position of the GCP signal is obtained.
Accordingly, the filament drive signal Ef also has a waveform that is inverted at each rising edge position of the GCP signal as shown in the figure.

FIG. 10 is a diagram for explaining the operation when the filament drive signal Ef of the third embodiment is used.
For convenience of illustration in FIG. 10 as well, only three grids G1 to G3 are formed as the grid G as in the case of FIG. 6 (that is, only g1 to g3 exist as the grid signal g). ) Also in this case, as in FIG. 6, only the anode A1 is focused, and the anode signal a1, which is a drive signal for the anode A1, is selected when the grid G1 is selected as shown in FIG. An example is shown in which the grid G3 is selected = off.

  Here, paying attention to the anode A (the anode A1 in the grid G1 and the anode A1 in the grid G2 in the example of this figure) that is the lighting target, in the anode lighting period of those anodes A, the filament driving is performed with respect to the start timing. It can be seen that the rising edge positions of the signal Ef coincide and the falling edge position of the filament drive signal Ef coincides with the end timing. This is because the GCP signal that is the generation source of the filament drive signal Ef is a signal for setting the width of the ON period of the anode signal a as described above.

As understood from this, depending on the third embodiment, “the length of the period during which the filament driving signal Ef is at the H level in the anode lighting period” for all the anodes A in all the scan periods. Can be made constant. That is, with respect to all the anodes A, the occurrence of variations for each scan of “the length of the period during which the filament driving signal Ef is at the H level within the anode lighting period” is completely prevented (the luminance variation itself for each scan is completely eliminated). As a result, the occurrence of display flicker can be prevented.
This means that, according to the third embodiment, display flicker can be prevented from being perceived even when the grid scanning period is set to be relatively low (for example, 60 Hz).

  Here, in the above, since a signal with an even number (14) of pulses per grid selection period is used as the GCP signal, the number of pulses of the filament drive signal Ef during the grid selection period is an even number. Accordingly, the filament drive signal Ef has the same waveform in each grid selection period. As a result, as shown in FIG. 10, “the length of the period during which the filament drive signal Ef is at the H level within the anode lighting period”. Although the occurrence of variations for each scan is completely prevented, the third embodiment is also based on the same idea as in the second embodiment, and the filament for each grid selection period. The number of pulses of the drive signal Ef is set to an odd number so that the waveform of the filament drive signal Ef is inverted every grid selection period. It is also possible to so as to impart a regularity in variation display flicker to not be perceived.

FIG. 11 shows a configuration example of the filament drive clock generation circuit 11 to be provided when generating the filament drive signal Ef having an odd number of pulses for each grid selection period.
As a method for generating the filament driving signal Ef having an odd number of pulses for each grid selection period, a method of taking a logical sum (OR) of the GCP signal and the BK signal can be cited.
Corresponding to this method, the filament drive clock generation circuit 11 shown in this figure is provided with an OR gate circuit 11a for inputting the GCP signal and the BK signal as shown in the figure, and then outputs the output of the OR gate circuit 11a. A flip-flop 5a for inputting to the clock terminal is provided.

FIG. 12 is a diagram for explaining the filament drive clock F_CLK generated by the filament drive clock generation circuit 11 shown in FIG.
In FIG. 12, the waveforms of the grid signal g1, the BK signal, and the GCP signal are also shown.
In this example, as the BK signal, a signal whose falling timing is slightly ahead of the start timing of one grid selection period is used as shown in the figure.

  As can be seen with reference to FIG. 12, if the filament drive clock F_CLK1 is generated based on the logical sum of the GCP signal and the BK signal, the filament drive clock F_CLK1 is selected as one grid selection period as shown in the figure. The number of pulses is odd, and a signal whose waveform is inverted every grid selection period is obtained.

If such a filament drive clock F_CLK1 is used, the waveform of the filament drive signal Ef is inverted every grid selection period, so that the anode A of the anode A in the odd-numbered grid G is turned on as in the case of FIG. The period in which the filament drive signal Ef is at the H level in the period is “present”, and the period in which the filament drive signal Ef is at the H level in the anode lighting period of the anode A in the even-numbered grid G is “no”. For example, predetermined “bright” and “dark” can be given to the luminance of the anode A in the odd-numbered grid G and the luminance of the anode A in the even-numbered grid G.
In this case as well, if the number of grids G formed is an odd number, the relationship between the brightness of the odd-numbered grid G and the even-numbered grid G between “bright” and “dark” is reversed for each scan. As a result, as in the case of the second embodiment, regularity can be given to variations in luminance for each scan. That is, as a result, display flicker can be prevented from being perceived.
In this case as well, when the number of grids G formed is an even number, the filament drive signal Ef has a waveform of 1 by inserting a dummy pulse for each scan with respect to the BK signal, as in the second embodiment. What is necessary is just to adjust so that it may invert for every scan.

By the way, as can be understood with reference to FIG. 10 and the like, the GCP signal used in the third embodiment is a signal having a higher frequency than the grid signal g and the anode signal a.
Thus, in the third embodiment that generates the filament drive signal Ef based on a signal having a relatively high frequency, the loss of power consumption is correspondingly larger compared to the first and second embodiments. It becomes a trend. Specifically, the power consumption loss increases in the order of the first embodiment <the second embodiment <the third embodiment.
In other words, this means that the loss of power consumption can be reduced in the order of the third, second, and first embodiments. Therefore, in terms of reduction of power consumption, the frequency is the highest. The first embodiment that generates a low filament driving signal Ef is most advantageous.

As described as a modification of the second embodiment, the controller 3 that outputs a BK signal or a GCP signal may be omitted.
FIG. 13 shows the internal configuration of the VFD module as a modified example of the third embodiment in which the controller 3 by hardware is omitted. In this case as well, the function of the controller 3 is software for the CPU 10. The BK signal and the GCP signal are output to the driver 4 from the CPU 10.
Correspondingly, the GCP signal output from the CPU 10 is input to the filament drive clock generation circuit 5 in this case, and the filament drive clocks F_CLK1 and F_CLK2 are generated based on the GCP signal. Become.

<4. Modification>

While the embodiments of the present invention have been described above, the present invention should not be limited to the specific examples described above.
For example, in the description so far, when the filament 1a is alternately driven, the switching circuit by the switching elements Q1 to Q4 is formed. However, the alternating drive of the filament 1a can be realized by a configuration as shown in FIG. 14, for example. .

  In the configuration shown in FIG. 14, a DC / DC converter is formed in which the primary side switching circuit performs a switching operation based on the filament drive clock F_CLK1 when generating the filament drive signal (drive voltage) Ef. Specifically, it is a DC / DC converter having an input side capacitor Ci, a switching element Q5, a transformer TR, a rectifier diode Do1, a rectifier diode Do2, an output side capacitor Co1, an output side capacitor Co2, and a Zener diode ZD in the figure. .

In the DC / DC converter, the input side capacitor Ci has a positive terminal connected to the input voltage Vcc, and a negative terminal grounded as shown in the figure. A series connection circuit of the primary winding N1 of the transformer TR and the switching element Q5 is inserted between the connection point between the input side capacitor Ci and the input voltage Vcc and the ground.
The switching element Q5 is an NchMOS-FET, its drain is connected to the primary winding N1, and its source is grounded.
As shown in the figure, the filament driving clock F_CLK1 is applied to the gate of the switching element Q5, and thereby the primary current switched according to the filament driving clock F_CLK1 flows through the primary winding N1.

In the transformer TR, an alternating voltage is generated for the winding wound around the secondary side in response to the flow of the primary side current through the primary winding N1.
In this case, the secondary winding N2 and the secondary winding N2 ′ are wound around the secondary side of the transformer TR as shown in the figure.

For the secondary winding N2, a first rectifying / smoothing circuit including a rectifying diode Do1 and an output-side capacitor Co1 and a second rectifying / smoothing circuit including a rectifying diode Do2 and an output-side capacitor Co2 are formed. .
Specifically, the secondary winding N2 has one end connected to the anode of the rectifier diode Do1, and the other end grounded. The cathode of the rectifier diode Do1 is connected to the positive terminal of the output capacitor Co1, and the negative terminal of the output capacitor Co1 is grounded.
The secondary winding N2 is provided with an intermediate tap, and the anode of the rectifier diode Do2 is connected to the intermediate tap. The cathode of the rectifier diode Do2 is connected to the positive terminal of the output side capacitor Co2, and the negative terminal of the output side capacitor Co2 is grounded.

Here, when the winding portion from the one end portion to the intermediate tap in the secondary winding N2 is a first winding portion and the remaining winding portion is a second winding portion, the first rectifying and smoothing is performed. The circuit performs a rectifying and smoothing operation based on the alternating voltage generated in the first winding section, thereby generating a first DC output voltage across the smoothing capacitor Co1. This first DC output voltage is supplied to the driver 4 as the anode voltage VHA.
The second rectifying / smoothing circuit performs a rectifying / smoothing operation based on the alternating voltage generated in the second winding section, thereby generating a second DC output voltage across the smoothing capacitor Co2. This second DC output voltage is supplied to the driver 4 as the grid voltage VHG.

The secondary winding N2 'has one end connected to one end of the filament 1a formed in the VFD 1, and the other end to the other end of the filament 1a. It is connected.
The secondary winding N2 ′ is also provided with an intermediate tap, and the intermediate tap is grounded via a Zener diode ZD (cathode → anode) as shown in the figure. The action of the Zener diode ZD is the same as that described in the first embodiment.
With such a configuration, the filament 1a can be driven alternately with a period corresponding to the filament drive clock F_CLK1. Specifically, during the period in which the filament drive clock F_CLK1 is at the H level, a current (forward current: “+ Ef” in the figure) flowing from the other end side to the one end side in the secondary winding N2 ′. On the other hand, while the filament drive clock F_CLK1 is at the L level, the secondary winding N2 ′ is moved from the one end to the other end. A flowing current (reverse direction current: corresponding to “−Ef” in the figure) can flow to the filament 1a.

  Here, the DC / DC converter described above constitutes the power supply circuit section of the VFD module. However, according to the configuration of the DC / DC converter shown in FIG. 14, the filament drive signal Ef is generated. There is an advantage that the power supply circuit and the power supply circuit for generating the anode voltage VHA and the grid voltage VHG can be shared.

  1 VFD, 1a filament, A1 to An anode, G1 to Gm grid, a1 to an anode signal, g1 to gm grid signal, 2,10 CPU, 3 controller, 4 driver, 5,11 Filament drive clock generation circuit, 5a flip-flop 6 Filament drive circuit, Q1-Q5 switching element, 11a OR gate circuit

Claims (6)

A fluorescent display tube having an anode, a grid, and a filament;
A signal that is inverted for each one edge position of a selected grid switching period signal that represents a switching period of sequential selection of the grid by one edge position of rising edge or falling edge position, and for each scan period of the grid Filament driving signal generating means for generating a signal for which the difference in edge position with respect to the start timing of the leading anode lighting period located at the leading is constant in each scanning period as a filament driving signal;
Filament driving means for driving the filament based on the filament driving signal ,
The number of grids is an even number,
The filament drive signal generation means includes:
A fluorescent display tube module that generates the filament drive signal having an odd number of pulses per scan period by inserting a dummy pulse into the selected grid switching period signal .   A fluorescent display tube having an anode, a grid, and a filament;
  A luminance width signal that indicates the separation of the adjustment width of the anode lighting period by one edge position of the rising or falling edge position, and a switching cycle of sequential selection of the grid by one edge position of the rising or falling edge position. The selected grid switching period signal is input, and based on the logical sum of the luminance width signal and the selected grid switching period signal, its edge with respect to the start timing of the leading anode lighting period located at the beginning of each scanning period of the grid Filament driving signal generating means for generating a filament driving signal in which the difference in position is constant in each scanning period;
  Filament driving means for driving the filament based on the filament driving signal.
  Fluorescent display tube module. The fluorescent display tube module according to claim 1 or 2 , wherein the filament driving means drives the filament by an alternating drive system. The filament drive signal generation means includes:
Based on the alternating voltage generated in the secondary winding of the DC / DC converter in which the primary side switching circuit performs switching operation according to a signal whose difference in edge position with respect to the start timing of the leading anode lighting period is constant in each scanning period, Get filament drive signal
The fluorescent display tube module according to claim 3 . A method for driving a fluorescent display tube having an anode, a grid, and a filament,
A signal that is inverted for each one edge position of a selected grid switching period signal that represents a switching period of sequential selection of the grid by one edge position of rising edge or falling edge position, and for each scan period of the grid A filament driving signal generating procedure for generating a signal in which the difference in edge position with respect to the start timing of the leading anode lighting period located at the leading is constant in each scanning period as a filament driving signal;
A filament driving procedure for driving the filament based on the filament driving signal ,
The number of grids is an even number,
In the filament drive signal generation procedure,
A driving method for generating the filament driving signal having an odd number of pulses per scan period by inserting a dummy pulse to the selected grid switching period signal .   A method for driving a fluorescent display tube having an anode, a grid, and a filament,
  A luminance width signal that indicates the separation of the adjustment width of the anode lighting period by one edge position of the rising or falling edge position, and a switching cycle of sequential selection of the grid by one edge position of the rising or falling edge position. The selected grid switching period signal is input, and based on the logical sum of the luminance width signal and the selected grid switching period signal, its edge with respect to the start timing of the leading anode lighting period located at the beginning of each scanning period of the grid A filament driving signal generation procedure for generating a filament driving signal in which the difference in position is constant in each scanning period;
  A filament driving procedure for driving the filament based on the filament driving signal.
  Driving method.

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