JP5483046B2 - Printed wiring board and manufacturing method thereof - Google Patents
Printed wiring board and manufacturing method thereof Download PDFInfo
- Publication number
- JP5483046B2 JP5483046B2 JP2008304089A JP2008304089A JP5483046B2 JP 5483046 B2 JP5483046 B2 JP 5483046B2 JP 2008304089 A JP2008304089 A JP 2008304089A JP 2008304089 A JP2008304089 A JP 2008304089A JP 5483046 B2 JP5483046 B2 JP 5483046B2
- Authority
- JP
- Japan
- Prior art keywords
- hole
- insulating layer
- printed wiring
- wiring board
- copper plate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000004519 manufacturing process Methods 0.000 title description 12
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 116
- 229910052802 copper Inorganic materials 0.000 claims description 66
- 239000010949 copper Substances 0.000 claims description 66
- 239000011889 copper foil Substances 0.000 claims description 52
- 239000010410 layer Substances 0.000 claims description 44
- 238000007747 plating Methods 0.000 claims description 41
- 239000011347 resin Substances 0.000 claims description 26
- 229920005989 resin Polymers 0.000 claims description 26
- 239000011229 interlayer Substances 0.000 claims description 24
- 238000011049 filling Methods 0.000 claims description 14
- 230000000149 penetrating effect Effects 0.000 claims description 7
- 239000000853 adhesive Substances 0.000 description 14
- 230000001070 adhesive effect Effects 0.000 description 13
- 239000000758 substrate Substances 0.000 description 11
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 10
- 238000005530 etching Methods 0.000 description 10
- 229910052751 metal Inorganic materials 0.000 description 10
- 239000002184 metal Substances 0.000 description 10
- 239000004065 semiconductor Substances 0.000 description 10
- 238000000034 method Methods 0.000 description 8
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 6
- 239000000835 fiber Substances 0.000 description 6
- 239000002313 adhesive film Substances 0.000 description 5
- 238000005520 cutting process Methods 0.000 description 5
- 239000000945 filler Substances 0.000 description 5
- 238000003475 lamination Methods 0.000 description 5
- 229910052759 nickel Inorganic materials 0.000 description 5
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 4
- 229910052782 aluminium Inorganic materials 0.000 description 4
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 4
- 239000011888 foil Substances 0.000 description 4
- 238000007772 electroless plating Methods 0.000 description 3
- 238000009713 electroplating Methods 0.000 description 3
- 239000003822 epoxy resin Substances 0.000 description 3
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 3
- 229910052737 gold Inorganic materials 0.000 description 3
- 239000010931 gold Substances 0.000 description 3
- 229910000510 noble metal Inorganic materials 0.000 description 3
- 229910052763 palladium Inorganic materials 0.000 description 3
- 239000002245 particle Substances 0.000 description 3
- 238000005498 polishing Methods 0.000 description 3
- 229920000647 polyepoxide Polymers 0.000 description 3
- 229920001721 polyimide Polymers 0.000 description 3
- 230000003014 reinforcing effect Effects 0.000 description 3
- 239000011342 resin composition Substances 0.000 description 3
- 238000007740 vapor deposition Methods 0.000 description 3
- 229910001369 Brass Inorganic materials 0.000 description 2
- VTYYLEPIZMXCLO-UHFFFAOYSA-L Calcium carbonate Chemical compound [Ca+2].[O-]C([O-])=O VTYYLEPIZMXCLO-UHFFFAOYSA-L 0.000 description 2
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 description 2
- MHAJPDPJQMAIIY-UHFFFAOYSA-N Hydrogen peroxide Chemical compound OO MHAJPDPJQMAIIY-UHFFFAOYSA-N 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 2
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 2
- 239000000956 alloy Substances 0.000 description 2
- 229910045601 alloy Inorganic materials 0.000 description 2
- LJCFOYOSGPHIOO-UHFFFAOYSA-N antimony pentoxide Chemical compound O=[Sb](=O)O[Sb](=O)=O LJCFOYOSGPHIOO-UHFFFAOYSA-N 0.000 description 2
- ADCOVFLJGNWWNZ-UHFFFAOYSA-N antimony trioxide Chemical compound O=[Sb]O[Sb]=O ADCOVFLJGNWWNZ-UHFFFAOYSA-N 0.000 description 2
- 239000010425 asbestos Substances 0.000 description 2
- 239000010951 brass Substances 0.000 description 2
- 239000003054 catalyst Substances 0.000 description 2
- 239000011248 coating agent Substances 0.000 description 2
- 238000000576 coating method Methods 0.000 description 2
- 239000002131 composite material Substances 0.000 description 2
- 150000001879 copper Chemical class 0.000 description 2
- 238000005553 drilling Methods 0.000 description 2
- 239000011737 fluorine Substances 0.000 description 2
- 229910052731 fluorine Inorganic materials 0.000 description 2
- 229910052742 iron Inorganic materials 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 239000009719 polyimide resin Substances 0.000 description 2
- 239000000843 powder Substances 0.000 description 2
- 239000010970 precious metal Substances 0.000 description 2
- 238000004080 punching Methods 0.000 description 2
- 230000005855 radiation Effects 0.000 description 2
- 229910052895 riebeckite Inorganic materials 0.000 description 2
- 229910052709 silver Inorganic materials 0.000 description 2
- 239000004332 silver Substances 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- RNFJDJUURJAICM-UHFFFAOYSA-N 2,2,4,4,6,6-hexaphenoxy-1,3,5-triaza-2$l^{5},4$l^{5},6$l^{5}-triphosphacyclohexa-1,3,5-triene Chemical compound N=1P(OC=2C=CC=CC=2)(OC=2C=CC=CC=2)=NP(OC=2C=CC=CC=2)(OC=2C=CC=CC=2)=NP=1(OC=1C=CC=CC=1)OC1=CC=CC=C1 RNFJDJUURJAICM-UHFFFAOYSA-N 0.000 description 1
- 239000004925 Acrylic resin Substances 0.000 description 1
- 229920000178 Acrylic resin Polymers 0.000 description 1
- 229920000742 Cotton Polymers 0.000 description 1
- 239000004952 Polyamide Substances 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- 239000004721 Polyphenylene oxide Substances 0.000 description 1
- 239000004372 Polyvinyl alcohol Substances 0.000 description 1
- 239000000654 additive Substances 0.000 description 1
- WNROFYMDJYEPJX-UHFFFAOYSA-K aluminium hydroxide Chemical compound [OH-].[OH-].[OH-].[Al+3] WNROFYMDJYEPJX-UHFFFAOYSA-K 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 239000003963 antioxidant agent Substances 0.000 description 1
- 230000003078 antioxidant effect Effects 0.000 description 1
- 239000002585 base Substances 0.000 description 1
- 238000005452 bending Methods 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 229910000019 calcium carbonate Inorganic materials 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 239000003638 chemical reducing agent Substances 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 239000004927 clay Substances 0.000 description 1
- 229910052570 clay Inorganic materials 0.000 description 1
- 239000000084 colloidal system Substances 0.000 description 1
- 239000003086 colorant Substances 0.000 description 1
- 238000002485 combustion reaction Methods 0.000 description 1
- 238000000354 decomposition reaction Methods 0.000 description 1
- 239000012765 fibrous filler Substances 0.000 description 1
- 239000003063 flame retardant Substances 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 239000003365 glass fiber Substances 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 239000012784 inorganic fiber Substances 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 239000004745 nonwoven fabric Substances 0.000 description 1
- 239000003960 organic solvent Substances 0.000 description 1
- 239000005011 phenolic resin Substances 0.000 description 1
- -1 polyacryl Substances 0.000 description 1
- 229920002647 polyamide Polymers 0.000 description 1
- 229920006122 polyamide resin Polymers 0.000 description 1
- 229920000728 polyester Polymers 0.000 description 1
- 229920006380 polyphenylene oxide Polymers 0.000 description 1
- 229920002451 polyvinyl alcohol Polymers 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 230000003746 surface roughness Effects 0.000 description 1
- 239000012209 synthetic fiber Substances 0.000 description 1
- 229920002994 synthetic fiber Polymers 0.000 description 1
- 239000000454 talc Substances 0.000 description 1
- 229910052623 talc Inorganic materials 0.000 description 1
- 229920001169 thermoplastic Polymers 0.000 description 1
- 229920005992 thermoplastic resin Polymers 0.000 description 1
- 229920001187 thermosetting polymer Polymers 0.000 description 1
- 239000004416 thermosoftening plastic Substances 0.000 description 1
- 229920006337 unsaturated polyester resin Polymers 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Description
本発明は、プリント配線板およびその製造方法に関するものである。特に、電子部品素子や半導体素子等を搭載したプリント配線板のなかで、一旦、プリント配線板に電子部品素子や半導体素子等の素子を高密度に搭載後、それをマザーボード上に搭載するモジュール基板や、電子部品素子や半導体素子等の素子を搭載したチップ電子部品用のベース基板などの基板に関し、またその製造方法に関するものである。 The present invention relates to a printed wiring board and a manufacturing method thereof. In particular, among printed wiring boards on which electronic component elements and semiconductor elements are mounted, a module substrate on which elements such as electronic component elements and semiconductor elements are once mounted on a printed wiring board at a high density and then mounted on a motherboard. The present invention also relates to a substrate such as a base substrate for a chip electronic component on which an element such as an electronic component element or a semiconductor element is mounted, and a manufacturing method thereof.
従来、モジュール基板や、チップ電子部品用のベース基板は、2枚の銅箔を絶縁材で貼り合わせた両面銅張積層板を使用し、層間の接続にはめっき膜によるスルーホールを、また、外部との接続には下面電極のほかスルーホールを裁断した端面電極を設けるのが一般的である。
また、特に上記素子を樹脂被覆する場合で端面電極を有するプリント配線板を製造するには、被覆樹脂がスルーホールの穴から流れ出ないよう、穴の入り口をテンティングしたり、または、例えば特許文献1のように、スルーホールの穴に樹脂充填したりしていた。
In addition, in order to manufacture a printed wiring board having an end face electrode particularly when the above-described element is resin-coated, the entrance of the hole is tented so that the coating resin does not flow out of the hole of the through-hole, or, for example, Patent Document As shown in FIG. 1, the through holes were filled with resin.
しかしながら、端面電極を形成するのにスルーホールを裁断する場合、裁断刃によりスルーホールのめっき膜が破損したり、またはめっき強度が弱い場合、リフロー中にプリント配線板から端面電極が剥離したりする問題がある。 However, when the through hole is cut to form the end face electrode, the plated film of the through hole is damaged by the cutting blade, or when the plating strength is weak, the end face electrode is peeled off from the printed wiring board during reflow. There's a problem.
そこで本発明は、上記の問題を抜本的に解決するものであり、製造時また実装時の、端面電極の接続強度を改善するプリント配線板を提供することを目的とする。
SUMMARY OF THE INVENTION Accordingly, it is an object of the present invention to provide a printed wiring board that drastically solves the above problems and that improves the connection strength of the end face electrodes during manufacture and mounting.
本発明は、上記課題を解決するために、絶縁層と、この絶縁層の片面に設けた回路パターンに加工した銅箔と、前記絶縁層のもう片面に設けた回路パターンに加工した厚さが50〜500μmの銅板と、前記絶縁層を貫通し前記銅板に到る穴を通して前記銅箔と前記銅板とを電気的に導通した層間導通部と、を備え、前記層間導通部が、前記絶縁層を貫通した穴にめっきもしくは導電性ペーストで充填するか、または前記絶縁層を貫通した穴壁面にめっきを設けた後、残り中心部を導電性もしくは絶縁性樹脂で充填して形成され、回路パターンに加工した前記銅板のところで分割され、この銅板の分割による端面が、前記絶縁層の端面と面一であり、前記層間導通部を介して前記銅箔と電気的に導通した端面電極を形成するプリント配線板を提供するものである。
また、層間導通部が、銅箔とそれに続く絶縁層を貫通し銅板に到る穴に、めっきを充填して形成されるプリント配線板を提供するものである。
また、層間導通部が、貫通穴にスルーホールめっきを行った後、穴埋め樹脂を充填して形成されるプリント配線板を提供するものである。
In order to solve the above problems, the present invention provides an insulating layer, a copper foil processed into a circuit pattern provided on one side of the insulating layer, and a thickness processed into a circuit pattern provided on the other side of the insulating layer. A copper plate having a thickness of 50 to 500 μm, and an interlayer conductive portion that electrically connects the copper foil and the copper plate through a hole that penetrates the insulating layer and reaches the copper plate, and the interlayer conductive portion is the insulating layer. After filling the hole penetrating with plating or a conductive paste, or providing plating on the wall surface of the hole penetrating the insulating layer, the remaining central portion is filled with a conductive or insulating resin to form a circuit pattern. The end face electrode is divided at the copper plate processed into a copper plate, and the end face of the copper plate is flush with the end face of the insulating layer, and forms an end face electrode that is electrically connected to the copper foil through the interlayer conductive portion. Printed wiring board It is intended to provide.
Further, the present invention provides a printed wiring board in which the interlayer conductive portion is formed by filling a hole that penetrates the copper foil and the subsequent insulating layer and reaches the copper plate.
Further, the present invention provides a printed wiring board in which an interlayer conductive portion is formed by filling a through hole with a hole filling resin after through hole plating.
本発明のプリント配線板は、製造時また実装時の、端面電極の接続強度を改善したプリント配線板を提供することができる。
The printed wiring board of the present invention can provide a printed wiring board with improved connection strength of the end face electrodes at the time of manufacture and mounting.
本発明に述べる銅箔は、厚さが1μmから20μm程度の銅シートからなり、容易に変形可能なものである。一般にプリント配線板の回路パターン用に使用する銅箔からなる。厚さが1μmより薄いと取扱が困難になりやすく、厚さが20μmより厚いとプリント配線板全体の厚さが増加するほか、高速回路には不向きになりやすい。また、レーザーによる直接穿孔はより困難になる。
また、銅箔は、アルミニウム、真鍮、ニッケル、鉄等の単独、合金又は複合箔からなる金属箔に置き換えることもできる。また、表面にニッケル、アルミニウム、銀、金などのめっき、蒸着層を設ける場合もある。また、下地との密着に問題がないかぎり、銅箔は、それ自体めっき膜または蒸着膜でもよい。
The copper foil described in the present invention is made of a copper sheet having a thickness of about 1 μm to 20 μm and can be easily deformed. Generally, it consists of copper foil used for the circuit pattern of a printed wiring board. If the thickness is less than 1 μm, handling tends to be difficult, and if the thickness is more than 20 μm, the thickness of the entire printed wiring board increases, and it tends to be unsuitable for high-speed circuits. Also, direct drilling with a laser becomes more difficult.
Further, the copper foil can be replaced with a metal foil made of aluminum, brass, nickel, iron or the like alone, alloy or composite foil. In some cases, a plating or vapor deposition layer of nickel, aluminum, silver, gold or the like is provided on the surface. Further, as long as there is no problem with the adhesion to the base, the copper foil itself may be a plating film or a vapor deposition film.
本発明に述べる銅板は、厚さが50μmから500μm程度、好ましくは70μmから200μm程度の銅シートからなり、たわみ変形強度が大きいものが好ましい。厚さが50μmより薄いとプリント配線板のたわみ強度が減少し、また銅板の断面高さが減少することからプリント配線板の端面電極としてのフィレット機能が低下しやすい。また、プリント配線板の放熱特性も減少しやすい。厚さが500μmより厚いとプリント配線板全体の厚さや重量が増加するほか、電極形成のためのエッチング加工が困難になりやすい。
また、銅板は、アルミニウム、真鍮、ニッケル、鉄等の単独、合金又は複合箔からなる金属板に置き換えることもできる。また、表面にニッケル、アルミニウム、銀、金などのめっき、蒸着層を設ける場合もある。
The copper plate described in the present invention is preferably made of a copper sheet having a thickness of about 50 μm to 500 μm, preferably about 70 μm to 200 μm, and having a large deflection deformation strength. If the thickness is less than 50 μm, the flexural strength of the printed wiring board is reduced and the cross-sectional height of the copper board is reduced, so that the fillet function as an end face electrode of the printed wiring board is likely to be lowered. Also, the heat dissipation characteristics of the printed wiring board are likely to decrease. If the thickness is greater than 500 μm, the thickness and weight of the entire printed wiring board increase and etching processing for electrode formation tends to be difficult.
The copper plate can be replaced with a metal plate made of aluminum, brass, nickel, iron or the like alone, alloy or composite foil. In some cases, a plating or vapor deposition layer of nickel, aluminum, silver, gold or the like is provided on the surface.
本発明に述べる絶縁層は、絶縁性のシート状の物質で、プリプレグのような補強基材に樹脂組成物を含浸し加熱等により硬化する樹脂含浸基材や、接着剤が使用できる。特に本発明で使用される銅板の厚さが比較的薄くたわみ変形しやすい場合、絶縁層の補強基材を強化し絶縁層のたわみ強度を増す必要がある。
上記の樹脂組成物としては、通常、耐熱性、耐薬品性の良好な熱硬化性樹脂がベースとして用いられ、フェノ−ル樹脂、エポキシ樹脂、ポリイミド樹脂、不飽和ポリエステル樹脂、ポリフェニレンオキサイド樹脂、フッ素樹脂等の樹脂の1種類または2種類以上を混合して用い、必要に応じてタルク、クレー、シリカ、アルミナ、炭酸カルシウム、水酸化アルミニウム、三酸化アンチモン、五酸化アンチモン等の無機質粉末充填剤、ガラス繊維、アスベスト繊維、パルプ繊維、合成繊維、セラミック繊維等の繊維質充填剤を添加したものである。また、樹脂組成物には、誘電特性、耐衝撃性、フィルム加工性などを考慮して、熱可塑性樹脂がブレンドされてあっても良い。さらに必要に応じて有機溶媒、難燃剤、硬化剤、硬化促進剤、熱可塑性粒子、着色剤、紫外線不透過剤、酸化防止剤、還元剤などの各種添加剤や充填剤を加えて調合する。
上記の補強基材としては、ガラス、アスベスト等の無機質繊維、ポリエステル、ポリアミド、ポリアクリル、ポリビニルアルコール、ポリイミド、フッ素樹脂等の有機質繊維、木綿等の天然繊維の織布、不織布、紙、マット等を用いるものである。
接着剤としては、例えば、エポキシ樹脂、ポリアミド樹脂、アクリル樹脂やポリイミド樹脂等の樹脂主体の接着剤、接着フィルム、または接着シートが使用できる。本発明で使用される銅板が厚く変形に対して強度がある場合、硬化後も、可撓性があり合わせて強靱性を有しているものでもよい。接着フィルムと接着シートとの区別は、薄い方が接着フィルム、厚い方が接着シートであるが、その境界も含め同様なものである。樹脂分以外には必要に応じて絶縁性の無機質粉末充填剤や繊維質充填剤を添加してもよい。充填剤を添加したほうが寸法精度にとって好ましく、絶縁性も良好に保たれる。
厚さは、接着剤の場合、5μmから20μm程度のもの、接着フィルムの場合、10μmから50μm程度のもの、接着シートの場合、30μmから500μm程度のものが特に限定なく使用できる。
The insulating layer described in the present invention is an insulating sheet-like substance, and a resin-impregnated base material that is impregnated with a resin composition in a reinforcing base material such as a prepreg and cured by heating or the like can be used. In particular, when the thickness of the copper plate used in the present invention is relatively thin and easily deforms, it is necessary to reinforce the reinforcing base of the insulating layer and increase the bending strength of the insulating layer.
As the above resin composition, a thermosetting resin having good heat resistance and chemical resistance is usually used as a base, and phenol resin, epoxy resin, polyimide resin, unsaturated polyester resin, polyphenylene oxide resin, fluorine Inorganic powder fillers such as talc, clay, silica, alumina, calcium carbonate, aluminum hydroxide, antimony trioxide, antimony pentoxide, etc. A fiber filler such as glass fiber, asbestos fiber, pulp fiber, synthetic fiber or ceramic fiber is added. In addition, the resin composition may be blended with a thermoplastic resin in consideration of dielectric properties, impact resistance, film processability, and the like. Further, various additives and fillers such as an organic solvent, a flame retardant, a curing agent, a curing accelerator, thermoplastic particles, a colorant, an ultraviolet light impermeant, an antioxidant and a reducing agent are added as necessary.
Examples of the reinforcing substrate include inorganic fibers such as glass and asbestos, polyester, polyamide, polyacryl, polyvinyl alcohol, polyimide, organic fibers such as fluorine resin, natural fibers such as cotton, nonwoven fabric, paper, mats, etc. Is used.
As the adhesive, for example, an epoxy resin, a polyamide resin, a resin-based adhesive such as an acrylic resin or a polyimide resin, an adhesive film, or an adhesive sheet can be used. When the copper plate used in the present invention is thick and strong against deformation, it may be flexible and tough even after curing. The distinction between the adhesive film and the adhesive sheet is the same as the adhesive film, while the thinner one is the adhesive film and the thicker one is the adhesive sheet. In addition to the resin, an insulating inorganic powder filler or fibrous filler may be added as necessary. It is preferable for the dimensional accuracy to add a filler, and the insulating property is also kept good.
The thickness of the adhesive may be about 5 to 20 μm, the thickness of the adhesive film may be about 10 to 50 μm, and the thickness of the adhesive sheet may be about 30 to 500 μm.
以下、本発明を図面に示す実施の形態に基づいて説明する。 Hereinafter, the present invention will be described based on embodiments shown in the drawings.
図1は、本発明のプリント配線板の概略断面図を示している。
本発明のプリント配線板は、銅箔1と銅板2との間に絶縁層3を設けた積層体の構造をとり、銅箔1は、加工して回路パターンを形成していて、また、銅板2も、加工して回路パターンを形成している。
別の言い方をすると、絶縁層3の片面に設けた回路パターンに加工した銅箔1と、前記絶縁層3のもう片面に設けた回路パターンに加工した銅板2との積層体の構造をとっている。
そして、絶縁層3を貫通した穴を通して前記銅箔と前記銅板とを電気的に導通した層間導通部4を備えている。
層間導通部4の構造は、めっきまたは導電性ペーストで充填するか、または穴壁面にめっきを設けた後残り中心部を導電性または絶縁性樹脂で充填する方法がとられる。層間導通部4入口または出口部分に銅箔または銅板がない場合で導電性ペーストや絶縁性樹脂で充填する場合は、出入口と同じ高さに研磨し、プリント配線板の表面にめっき層(蓋めっき)を設けることにより、その後の配線加工および素子の実装がしやすくなる。また、層間導通部4をフィルドめっきにより形成する場合にはできるだけ層間導通部4上面に凹みが生じないめっき条件を選ぶか、表面研磨して平面性を持たせるとその後の素子の実装、または特にワイヤーボンディング接続がしやすくなる。
本発明のプリント配線板は、電子部品素子や半導体素子等を搭載した後、また必要に応じて素子を樹脂被覆した後、切り分けて使用される。切り分けを銅板2の所で行うと、その部分をプリント配線板の端面電極として使用することができる。
FIG. 1 is a schematic sectional view of a printed wiring board according to the present invention.
The printed wiring board of the present invention has a laminated structure in which an
In other words, a structure of a laminate of a
And the interlayer conduction |
The structure of the interlayer
The printed wiring board of the present invention is used after mounting an electronic component element, a semiconductor element, or the like, or after coating the element with a resin as necessary. When the cutting is performed at the
図2は、本発明のプリント配線板を切り分けする例を示している。図2(a)は、切断前、図2(b)は、切断後を示している。
図2(a)には、本発明のプリント配線板の銅箔1上に、半導体素子5と半導体素子5から伸びる配線ワイヤ9が接続されていて、半導体素子5と配線ワイヤ9とは封止樹脂7により封止されていることを示している。また、銅箔1は、絶縁層3を貫通する層間導通部4を通して絶縁層3の裏面の銅板2と電気的に導通している。
図2(b)には、ダイシングカッタ8等により、個々の半導体素子付きプリント配線板が、銅板2のところで切り分けされていることを示している。切り分けされた個々の半導体素子付きプリント配線板の銅板2は厚さが厚いために底面だけではなく切断面を含む端面で端面電極の機能を有している。
FIG. 2 shows an example of cutting the printed wiring board of the present invention. FIG. 2A shows a state before cutting, and FIG. 2B shows a state after cutting.
In FIG. 2A, a
FIG. 2B shows that each printed wiring board with a semiconductor element is cut at the
図3は、本発明のプリント配線板の製造方法の一例を示している。図3(a)は、積層前、図3(b)は、貫通した穴10を設けた後、図3(c)は、その穴10に層間導通部4を設けた後、図3(d)は、銅箔1と銅板2とを回路パターン加工した後の状態を示している。
FIG. 3 shows an example of a method for producing a printed wiring board according to the present invention. FIG. 3A shows a state before lamination, FIG. 3B shows a case where a through
図3(a)には、プリプレグまたは接着剤の絶縁層3を介して銅箔1と銅板2とを重ねた状態を示している。この状態で積層される。銅板2に、接着剤を塗布した片面銅張積板を積層することもできる。
図3(b)には、次にエッチングにより銅箔1に窓を開け、レーザー加工により絶縁層を貫通した穴10を設けるコンフォーマル加工を行った状態を示している。また、銅箔1より銅板2の放熱は良好なのでレーザー加工されにくいため、銅箔1の種類とレーザー加工の条件によっては、直接レーザーにより銅箔1とそれに続く絶縁層3を貫通し銅板2に到る穴10を設けることもできる。レーザーとしては、CO2やCO、エキシマ等の気体レーザーやYAG等の固体レーザーがある。CO2レーザーが容易に大出力を得られる事からφ50μm以上のIVHの加工に適している。φ50μm以下の微細なIVHを加工する場合は、より短波長で集光性のよいYAGレーザーが適している。
図3(c)には、次にデスミア処理後、基板をフィルドめっき11し、穴10にめっきを充填し、層間導通部4を設け、銅箔1と銅板2を導通した状態を示している。
図3(d)には、次にエッチング等により銅箔1部分の金属と銅板2部分の金属とを回路パターン加工した後の状態を示している。
この後、必要に応じて絶縁レジストや、銅箔1と銅板2に貴金属めっき等を設け、プリント配線板が完成する。
FIG. 3A shows a state in which the
FIG. 3B shows a state in which conformal processing is performed in which a window is opened in the
FIG. 3C shows a state in which, after the desmear process, the substrate is filled 11, the
FIG. 3D shows a state after the circuit pattern processing is performed on the metal of the
Thereafter, an insulating resist, noble metal plating, or the like is provided on the
この方法は、以下の方法に比べて工数が低減した方法である。 This method is a method in which man-hours are reduced as compared with the following method.
図4は、本発明のプリント配線板の製造方法の別例を示している。図4(a)は、積層前、図4(b)は、貫通穴12に層間導通部4を設けた後、図4(c)は、その貫通穴12を埋めて、図4(d)は、銅箔1と銅板2とを回路パターン加工した後の状態を示している。
FIG. 4 shows another example of the method for manufacturing a printed wiring board according to the present invention. 4 (a) shows a state before lamination, FIG. 4 (b) shows a case where the through
図4(a)には、図3(a)と同様に、プリプレグや接着剤の絶縁層3を介して銅箔1と銅板2とを重ねた状態を示している。この状態で積層される。銅板2に、接着剤を塗布した片面銅張積板を積層することもできる。
図4(b)には、次にドリル等により貫通穴12を設けた後、スルーホールめっき13を行った状態を示している。スルーホールめっき13により、この貫通穴12に層間導通部4を設けることができる。
図4(c)には、次にこの貫通穴12にエポキシ樹脂等の穴埋め樹脂14を充填し、基板表面が平らになるように絶縁樹脂表面を研磨後、基板両面に蓋めっき15を設けた状態を示している。穴埋め樹脂14は樹脂単独のものでも、樹脂に導電粒子を混合したものでも、また樹脂に無電解めっき用のパラジウム活性粒子等を混合したものでもよい。
図4(d)には、次にエッチング等により銅箔1部分の金属と銅板2部分の金属とを回路パターン加工した後の状態を示している。
この後、必要に応じて絶縁レジストや、銅箔1と銅板2に貴金属めっき等を設け、プリント配線板が完成する。
FIG. 4A shows a state in which the
FIG. 4B shows a state in which through-
4C, the through
FIG. 4D shows a state after the circuit pattern processing is performed on the metal of the
Thereafter, an insulating resist, noble metal plating, or the like is provided on the
この方法は、層間導通部4の上面表面が、フラットになりやすく、素子の搭載やワイヤボンディングの接続が容易になりやすい。
In this method, the surface of the upper surface of the interlayer
図5は、本発明のプリント配線板の製造方法のもう一つの別例を示している。図5(a)は、銅板2を回路パターン加工した後を、図5(b)は、穴10を設けた後を、図5(c)は、層間導通部4を設けた後、図5(d)は、銅箔1と銅板2とを回路パターン加工した後の状態を示している。
FIG. 5 shows another example of the method for producing a printed wiring board according to the present invention. 5A shows a state after processing the circuit pattern of the
図5(a)には、プリプレグまたは接着剤の絶縁層3を介して、銅箔1と、打ち抜きまたはエッチング等により回路パターン加工した銅板2とを重ねた状態を示している。この状態で積層される。また、銅板2に、接着剤を塗布した片面銅張積板を積層することもできる。
図5(b)には、次にエッチングにより銅箔1に窓を開け、レーザー加工により絶縁層3を貫通し銅板2に到る穴10を設けるコンフォーマル加工を行った状態を示している。また、銅箔1より銅板2の放熱は良好なので、銅板2は銅箔1に比べレーザー加工されにくいため、銅箔1の種類とレーザー加工の条件によっては、直接レーザーにより銅箔1とそれに続く絶縁層3を貫通した穴10を設けることもできる。
図5(c)には、次に基板をフィルドめっき11し、穴10にめっきを充填し、銅箔1と銅板2を導通して層間導通部4を設けた状態を示している。
図5(d)には、次にエッチング等により銅箔1部分の金属と銅板2部分の金属とを回路パターン加工した後の状態を示している。
この後、必要に応じて絶縁レジストや、銅箔1と銅板2に貴金属めっき等を設け、プリント配線板が完成する。
FIG. 5A shows a state in which the
FIG. 5B shows a state in which a window is formed in the
FIG. 5C shows a state in which the substrate is next subjected to filled plating 11, the
FIG. 5D shows a state after the circuit pattern processing is performed on the metal of the
Thereafter, an insulating resist, noble metal plating, or the like is provided on the
この方法は、厚さの厚い銅板を貫通するような加工を銅板単独で先に行ってから、その他の部材と張り合わされるので、厚さの厚い銅板を使用でき、プリント配線板としてのたわみ強度をこの銅板でもたせることができる。そのため、絶縁層を薄くでき、またフィルドめっきの穴の深さが浅くできるので、フィルドめっきの穴上面表面の凹みを低減することができる。また、積層体になってからのエッチング作業時間が短縮できる。
In this method, processing that penetrates the thick copper plate is performed with the copper plate alone and then pasted with other members, so that thick copper plates can be used, and the flex strength as a printed wiring board Can be applied with this copper plate. Therefore, the insulating layer can be made thin and the depth of the hole of the filled plating can be made shallow, so that the dent on the upper surface of the hole of the filled plating can be reduced. Moreover, the etching work time after becoming a laminated body can be shortened.
以下、本発明を実施例に基づいて説明する。
先ず、銅箔は、厚さ18μmの外層配線用の銅箔(三井金属鉱業株式会社製、商品名:MT18S5DH)
を使用し、また銅板は、厚さ105μmのものをCZ処理(メック株式会社製、商品名:メックエッチボンドCZ−8100)により、表面粗さが3〜5μmの凹凸を設けたものを使用する。そして粗面化した面どうしを、厚さ70μmのプリプレグ(日立化成工業株式会社製、商品名:GEA−679FG)を介して温度185℃で張り合わせた。
次に、銅箔にレーザー穴あけ加工用のコンフォーマルマスクを形成した。次に、銅箔を除去し樹脂が露出しているコンフォーマルマスクの部分へ、CO2レーザー(日立ビアメカニクス株式会社製、レーザー加工条件:周波数1000Hz、パルス幅15μsec、サイクル数4回)を照射し、樹脂を燃焼分解して除去することにより、銅箔とそれに続く絶縁層を貫通し銅板に到る直径80μmの穴を設けた。
次に、穴内のデスミア処理は、過マンガン酸液で行った。
次に、金属箔上及び穴内部にパラジウムコロイド触媒(日立化成工業株式会社製、商品名:HS201B)を使用して触媒核を付与後、無電解めっき液(日立化成工業株式会社製、商品名:CUST2000)を使用して厚さ2μmの下地無電解めっき層を形成する。次に、上層面の厚さとしては20μm、穴内がめっきで埋まるように電解フィルドめっき液による電解めっき層を形成した。
次に、50g/lの硫酸及び50g/lの過酸化水素を主成分とするエッチング液を用いてエッチング加工により両面の銅層を配線に加工した。次に表面に仕様にそってレジストを形成し、次に、銅配線上に、膜厚5μmのニッケルめっき皮膜、膜厚0.2μmのパラジウムめっき皮膜及び膜厚0.4μmの金めっき皮膜を順に形成しプリント配線板を作製した。
Hereinafter, the present invention will be described based on examples.
First, the copper foil is a copper foil for outer layer wiring having a thickness of 18 μm (Mitsui Metal Mining Co., Ltd., trade name: MT18S5DH).
In addition, a copper plate having a thickness of 105 μm is provided with irregularities having a surface roughness of 3 to 5 μm by CZ treatment (trade name: MEC etch bond CZ-8100, manufactured by MEC Co., Ltd.). . The roughened surfaces were bonded to each other at a temperature of 185 ° C. via a prepreg having a thickness of 70 μm (manufactured by Hitachi Chemical Co., Ltd., trade name: GEA-679FG).
Next, a conformal mask for laser drilling was formed on the copper foil. Next, the CO 2 laser (manufactured by Hitachi Via Mechanics Co., Ltd., laser processing conditions: frequency 1000 Hz,
Next, the desmear treatment in the hole was performed with a permanganate solution.
Next, after applying a catalyst core using a palladium colloid catalyst (made by Hitachi Chemical Co., Ltd., trade name: HS201B) on the metal foil and inside the hole, an electroless plating solution (made by Hitachi Chemical Co., Ltd., trade name) : CUST2000) is used to form a base electroless plating layer having a thickness of 2 μm. Next, an electrolytic plating layer with an electrolytic filled plating solution was formed so that the thickness of the upper surface was 20 μm and the inside of the hole was filled with plating.
Next, the copper layers on both sides were processed into wiring by etching using an etching solution mainly composed of 50 g / l sulfuric acid and 50 g / l hydrogen peroxide. Next, a resist is formed on the surface according to the specifications, and then a nickel plating film with a thickness of 5 μm, a palladium plating film with a thickness of 0.2 μm, and a gold plating film with a thickness of 0.4 μm are sequentially formed on the copper wiring. A printed wiring board was formed.
まず、実施例1と同様に、貼り合わせ面を粗面化した厚さ18μmの銅箔と厚さ70μmの銅板とを、厚さ70μmのプリプレグ(日立化成工業株式会社製、商品名:GEA−679FG)を介して温度185℃で張り合わせた。
次に、ドリルにより直径が150μmの貫通穴を設けた後、実施例1と同様にデスミア処理し、その後スルーホールめっきを行った。スルーホールめっきは電解めっきを20μm形成した。
次に、この貫通穴に穴埋めインク(山栄化学製、商品名:IR−10F)の穴埋めを行った。表面に盛り上がった穴埋めインクは乾燥硬化後バフロール(ジャブロ工業製、#600番、#800番)を使用し、研磨電流1.2Aで基板表面上の機械研磨を行った。研磨後、銅蓋めっきを設けた。銅蓋めっきは、厚さが12μmになるように電解めっきをした。
後は実施例1と同様に両面銅層を配線に加工と貴金属めっきしプリント配線板を作製した。
First, in the same manner as in Example 1, a 18 μm thick copper foil and a 70 μm thick copper foil having a roughened bonding surface were combined with a 70 μm thick prepreg (manufactured by Hitachi Chemical Co., Ltd., trade name: GEA-). 679FG) at a temperature of 185 ° C.
Next, after a through hole having a diameter of 150 μm was provided by a drill, desmear treatment was performed in the same manner as in Example 1, and then through-hole plating was performed. The through-hole plating was 20 μm in electrolytic plating.
Next, a hole filling ink (trade name: IR-10F, manufactured by Yamaei Chemical Co., Ltd.) was filled in the through hole. The ink filling up the surface was dry-cured and then used buffol (# 600, # 800 manufactured by Jablo Industries), and mechanical polishing on the substrate surface was performed at a polishing current of 1.2A. After polishing, copper lid plating was provided. The copper lid plating was electrolytic plating so that the thickness was 12 μm.
Thereafter, as in Example 1, the double-sided copper layer was processed into wiring and precious metal plated to produce a printed wiring board.
まず、実施例1と同様にして貼り合わせ面を粗面化した厚さ175μmの銅板を、打ち抜き加工により配線パターンの加工をした。この銅板と貼り合わせ面を粗面化した厚さ18μmの銅箔とを厚さ50μmの接着シート(利昌工業株式会社製、商品名:AD−7006)を介して 温度170℃で加圧積層した。後は、実施例1と同様にフィルドめっきと両面銅層を配線に加工と貴金属めっきしプリント配線板を作製した。
First, a wiring pattern was processed by punching a copper plate having a thickness of 175 μm having a roughened bonding surface in the same manner as in Example 1. This copper plate and a 18 μm thick copper foil having a roughened bonding surface were pressure laminated at a temperature of 170 ° C. via a 50 μm thick adhesive sheet (trade name: AD-7006, manufactured by Risho Kogyo Co., Ltd.). . Thereafter, similarly to Example 1, filled plating and double-sided copper layer were processed into wiring and precious metal plating was performed to produce a printed wiring board.
1…銅箔、2…銅板、3…絶縁層、4…層間導通部、5…半導体素子、6…配線ワイヤ、7…封止樹脂、8…ダイシングカッタ、9…配線ワイヤ、10…穴、11…フィルドめっき、12…貫通穴、13…スルーホールめっき、14…穴埋め樹脂、15…蓋めっき。
DESCRIPTION OF
Claims (3)
この絶縁層の片面に設けた回路パターンに加工した銅箔と、
前記絶縁層のもう片面に設けた回路パターンに加工した厚さが50〜500μmの銅板と、
前記絶縁層を貫通し前記銅板に到る穴を通して前記銅箔と前記銅板とを電気的に導通した層間導通部と、を備え、
前記層間導通部が、前記絶縁層を貫通した穴にめっきもしくは導電性ペーストで充填するか、または前記絶縁層を貫通した穴壁面にめっきを設けた後、残り中心部を導電性もしくは絶縁性樹脂で充填して形成され、
回路パターンに加工した前記銅板のところで分割され、この銅板の分割による端面が、前記絶縁層の端面と面一であり、前記層間導通部を介して前記銅箔と電気的に導通した端面電極を形成するプリント配線板。 An insulating layer;
Copper foil processed into a circuit pattern provided on one side of this insulating layer,
A copper plate having a thickness of 50 to 500 μm processed into a circuit pattern provided on the other surface of the insulating layer;
An interlayer conductive portion that penetrates the insulating layer and electrically connects the copper foil and the copper plate through a hole reaching the copper plate;
After the interlayer conductive portion fills a hole penetrating the insulating layer with plating or a conductive paste, or after plating is provided on a hole wall surface penetrating the insulating layer, the remaining central portion is made of a conductive or insulating resin. Formed by filling with,
Divided at the copper plate processed into a circuit pattern, the end face by the division of the copper plate is flush with the end face of the insulating layer, and the end face electrode electrically connected to the copper foil through the interlayer conductive portion Printed wiring board to be formed.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2008304089A JP5483046B2 (en) | 2008-11-28 | 2008-11-28 | Printed wiring board and manufacturing method thereof |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2008304089A JP5483046B2 (en) | 2008-11-28 | 2008-11-28 | Printed wiring board and manufacturing method thereof |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2010129838A JP2010129838A (en) | 2010-06-10 |
JP5483046B2 true JP5483046B2 (en) | 2014-05-07 |
Family
ID=42330020
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2008304089A Expired - Fee Related JP5483046B2 (en) | 2008-11-28 | 2008-11-28 | Printed wiring board and manufacturing method thereof |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP5483046B2 (en) |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5003940B2 (en) * | 2007-02-02 | 2012-08-22 | 日立化成工業株式会社 | Wiring board |
-
2008
- 2008-11-28 JP JP2008304089A patent/JP5483046B2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JP2010129838A (en) | 2010-06-10 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP2001168481A (en) | Copper-clad laminate, and circuit substrate for printed wiring board and manufacturing method therefor | |
TWI481318B (en) | Laminated multilayer printed wiring board and method of manufacturing the same | |
JP2009099619A (en) | Core substrate and manufacturing method thereof | |
KR100747022B1 (en) | Embedded printed circuit board and its manufacturing method | |
JP4857433B2 (en) | Metal laminate, metal laminate manufacturing method and printed circuit board manufacturing method | |
TWI487451B (en) | Manufacturing method of multilayer printed wiring board | |
JP4396493B2 (en) | Wiring board manufacturing method | |
JP3582704B2 (en) | Manufacturing method of multilayer printed wiring board | |
JP2019121766A (en) | Printed wiring board and manufacturing method thereof | |
JP5483046B2 (en) | Printed wiring board and manufacturing method thereof | |
JP5057653B2 (en) | Flex-rigid wiring board and manufacturing method thereof | |
JP2007208229A (en) | Manufacturing method of multilayer wiring board | |
JP2004207338A (en) | Wiring board | |
JP5935186B2 (en) | Wiring board | |
JP2007335631A (en) | Manufacturing method of laminated wiring board | |
JP2003046226A (en) | Wiring board and its manufacturing method | |
JP2002043751A (en) | Multilayer printed circuit board | |
JP4492071B2 (en) | Wiring board manufacturing method | |
JP2005005417A (en) | Multilayer printed wiring board and its manufacturing method | |
JP2004253774A (en) | Multilayer printed wiring board provided with recess for embedding electronic component, and its manufacturing method | |
JP3881528B2 (en) | Wiring board and manufacturing method thereof | |
JPH10270851A (en) | One-sided circuit board for multilayered printed wiring board, its manufacture, and multilayered printed wiring board | |
JP3593957B2 (en) | Multilayer wiring board and method of manufacturing the same | |
JP3988664B2 (en) | Multilayer printed wiring board and manufacturing method thereof | |
WO2019130496A1 (en) | Laminated body and method for manufacturing same |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20111019 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20120518 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20120614 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20120809 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20121025 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20121221 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20130321 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20130516 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20130822 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20131018 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20140123 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20140205 |
|
R151 | Written notification of patent or utility model registration |
Ref document number: 5483046 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R151 |
|
S111 | Request for change of ownership or part of ownership |
Free format text: JAPANESE INTERMEDIATE CODE: R313111 |
|
S533 | Written request for registration of change of name |
Free format text: JAPANESE INTERMEDIATE CODE: R313533 |
|
R350 | Written notification of registration of transfer |
Free format text: JAPANESE INTERMEDIATE CODE: R350 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
LAPS | Cancellation because of no payment of annual fees |