JP5374111B2 - Display device and Cu alloy film used therefor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a Cu alloy film for a display device that has a lower electric resistivity than a conventional Cu alloy film, can realize direct connection of low contact resistance to transparent conductive films without forming any barrier metal, and, when applied to a liquid crystal display or the like, can provide a high display quality. <P>SOLUTION: The Cu alloy film for a display device comprising films 25, 26, 34 is directly connected to transparent conductive films 5, 41 on the substrate, and contains 0.1 to 0.5 atom% of Ge and 0.1 to 0.5 atom% in total of one kind or more selected from a group comprising Ni, Zn, Fe and Co. <P>COPYRIGHT: (C)2009,JPO&amp;INPIT

Description

  The present invention relates to a display device and a Cu alloy film used therefor, and in particular, a display device directly connected to a transparent conductive film in a thin film transistor (hereinafter, sometimes referred to as TFT) of the display device. The present invention relates to a Cu alloy film for use, and a flat panel display (display device) such as a liquid crystal display or an organic EL display in which the Cu alloy film is used in the thin film transistor, and a sputtering target used to form the Cu alloy film. In the following, a liquid crystal display will be described as an example of the display device, but it is not intended to be limited to this.

  For example, liquid crystal displays are used in various fields ranging from small mobile phones to large televisions exceeding 30 inches. This liquid crystal display is classified into a simple matrix type liquid crystal display and an active matrix type liquid crystal display depending on the pixel driving method. Of these, active matrix liquid crystal displays incorporating TFTs as switching elements are the mainstream of liquid crystal displays because of their high image quality and high-speed moving images.

  FIG. 1 shows a configuration of a typical liquid crystal display applied to an active matrix liquid crystal display. The configuration and operating principle of this liquid crystal display will be described with reference to FIG.

  First, the liquid crystal display 100 includes a TFT substrate 1, a counter substrate 2 disposed to face the TFT substrate 1, and a liquid crystal layer 3 that is disposed between the TFT substrate 1 and the counter substrate 2 and functions as a light modulation layer. And.

  The TFT substrate 1 has a TFT 4 disposed on an insulating glass substrate 1a, a pixel electrode (transparent conductive film) 5, and a wiring portion 6 including a scanning line and a signal line.

  The counter substrate 2 includes a common electrode 7 formed on the entire surface of the glass plate, a color filter 8 disposed at a position facing the pixel electrode (transparent conductive film) 5 on the TFT substrate 1 side, and the TFT substrate 1. And a light shielding film 9 disposed at a position facing the TFT 4 and the wiring portion 6. The counter substrate 2 further has an alignment film 11 for aligning liquid crystal molecules contained in the liquid crystal layer in a predetermined direction.

  Polarizing plates 10a and 10b are disposed outside the TFT substrate 1 and the counter substrate 2 (opposite the liquid crystal layer), respectively.

  In the liquid crystal display 100, in each pixel, the electric field between the counter substrate 2 and the pixel electrode (transparent conductive film) 5 is controlled by the TFT 4, and the orientation of the liquid crystal molecules in the liquid crystal layer 3 is changed by this electric field. The light passing through 3 is modulated (shielded or translucent). As a result, the amount of light transmitted through the counter substrate 2 is controlled and displayed as an image.

  A backlight 22 is installed in the lower part of the liquid crystal display 100, and this light passes from the lower part to the upper part in FIG.

  Further, the TFT substrate 1 is driven by a driver circuit 13 and a control circuit 14 connected via a TAB tape 12.

  FIG. 2 is an enlarged view of a main part A in FIG. In FIG. 2, a scanning line (gate wiring) 25 is formed on the glass substrate 1a, and a part of the scanning line 25 functions as a gate electrode 26 for controlling on / off of the TFT. A gate insulating film (SiN) 27 is formed so as to cover the gate electrode 26. A signal line (source-drain wiring) 34 is formed so as to cross the scanning line 25 via the gate insulating film 27, and a part of the signal line 34 functions as a source electrode 29 of the TFT. On the gate insulating film 27, an amorphous silicon channel layer (active semiconductor film) 33, a signal line (source-drain wiring) 34, and an interlayer insulating film (SiN) 30 are sequentially formed. This type is generally called a bottom gate type.

The pixel region on the gate insulating film 27, for example (In ₂ O _3), indium tin oxide (ITO) film containing about 10 wt% tin oxide (SnO) in zinc oxide in (In ₂ O ₃₎ A pixel electrode (transparent conductive film) 5 formed of an IZO film containing silicon is disposed. In FIG. 2, the drain electrode 28 of the TFT is in direct contact with and electrically connected to the pixel electrode (transparent conductive film) 5. It has a structure.

  When a gate voltage is applied to the TFT substrate via the scanning line to the gate electrode 26, the TFT 4 is turned on, and the driving voltage previously applied to the signal line passes from the source electrode 29 to the pixel via the drain electrode 28. Applied to the electrode (transparent conductive film) 5. When a predetermined level of driving voltage is applied to the pixel electrode (transparent conductive film) 5 in this way, a sufficient potential difference is generated between the counter substrate 2 and the liquid crystal molecules contained in the liquid crystal layer 3 are aligned. Light modulation occurs.

  In addition, a reflective electrode (not shown) may be provided on the TFT structure to improve luminance.

  The source-drain wiring 34, the scanning line 25, and the gate electrode 26 are formed of a thin film of an Al alloy such as Al-Nd (hereinafter referred to as an Al-based alloy) for reasons such as easy processing. ing.

However, in recent years, due to circumstances such as an increase in the size of a liquid crystal display and a change in operating frequency from 60 kHz to 120 kHz, reduction of electrical resistance of wiring has become an essential issue, and wiring materials having a lower electrical resistivity can be obtained. Needs are growing. Therefore, a Cu-based material having a lower electrical resistivity than that of an Al-based material such as pure Al or Al alloy and having excellent hillock resistance has attracted attention (the electrical resistivity of metal [bulk material] is pure Al Is 2.7 × 10 ⁻⁶ Ω · cm, whereas pure Cu is 1.8 × 10 ⁻⁶ Ω · cm).

  However, when a Cu-based material is applied to the wiring, there remains a technical problem that the oxidation resistance is low. For example, when a Cu-based material is applied to a gate wiring or source-drain wiring, the gate wiring is connected to a transparent conductive film (ITO film) by a gate pad, and the source-drain wiring is connected to a transparent conductive film (ITO film) by a source pad. ). In the step of forming the structure, there is a step of exposing to the atmosphere at about 300 ° C. after the formation of the gate wiring and the source-drain wiring, and in this step, the Cu-based wiring constituting the gate wiring and the source-drain wiring is formed. An oxide film is formed on the surface. When a transparent conductive film (ITO film) is formed on a Cu-based wiring on which such an oxide film is formed, the oxide film serves as a Schottky barrier, so that good contact with the transparent conductive film cannot be obtained. There are challenges.

In addition, when a Cu-based material is applied to the wiring, there is a problem that adhesion to a glass substrate (usually glass mainly composed of SiO ₂ , Al ₂ O ₃ , BaO, B ₂ O ₃ ) or an insulating film is poor. The gate wiring of the liquid crystal display is formed on a glass substrate and the source-drain wiring is formed on an insulating film. However, when a Cu-based material is used for these wirings, the Cu-based wiring is peeled off from the glass substrate, so that there is a problem that the Cu-based wiring cannot be applied alone to the gate wiring.

  In order to solve the above problem, conventionally, high-melting point metals such as Mo, Cr, Ti, and W are respectively formed on the upper and lower portions of the source electrode 29, the drain electrode 28, the signal line 34, the gate electrode 26, and the scanning line 25. A thin film (hereinafter sometimes referred to as a barrier metal layer) has been formed.

  However, in a two-layer structure such as a Cu-based wiring / barrier metal layer, there is a problem that the wiring resistance (effective wiring resistance) of the entire two layers becomes high because there is a barrier metal (Mo or the like) with high electrical resistivity. . Further, in such a two-layer structure, since thin films of different materials are laminated, (1) the process becomes complicated, (2) wet etching when patterning into a wiring shape (ensure etching rate, taper control, etc.) As the cost reduction associated with mass production of liquid crystal displays has progressed, the increase in manufacturing costs and the decline in productivity associated with the formation of barrier metal layers cannot be neglected. Yes. Therefore, a wiring material that can be directly connected to the transparent conductive film without forming the barrier metal layer is desired.

  So far, a Cu alloy film capable of omitting the formation of the barrier metal layer has been proposed. For example, Patent Document 1 includes 0.1 to 3.0 atomic percent of Zn and / or Mg in total. Cu alloy film containing Ni and / or Mn in a total amount of 0.1 to 0.5 atomic%, and further Fe and / or Co in a total amount of 0.02 to 1.0 atomic% and P of 0.005 A Cu alloy film containing ˜0.5 atomic% is shown.

  However, it is necessary to further study the component composition of the Cu alloy film in order to cope with the further reduction in electrical resistivity of the Cu alloy film accompanying the increase in the size of the liquid crystal display described above.

  In Patent Document 2, a Cu—Ge alloy is proposed for use in large-scale integrated circuit (LSI) wiring, and its composition is defined. It is desirable that the LSI wiring has an effective electrical resistivity of 5 μΩ · cm or less. In this case, the electrical resistivity can be realized even with the Cu—Ge alloy. However, when it is used for wiring of a liquid crystal display, it is desired that the effective electrical resistivity of the wiring is 2.5 to 3.0 μΩ · cm or lower, but the Cu—Ge alloy has a low electrical resistivity. It is difficult to realize.

Furthermore, Patent Documents 1 and 2 do not consider improving the adhesion between the Cu alloy film and the glass substrate.
JP 2007-017926 A JP 2005-191363 A

  The present invention has been made paying attention to the above situation, and the first object of the present invention is to further improve the low electrical resistivity characteristic of the Cu alloy film and to omit the formation of the barrier metal layer. It is another object of the present invention to provide a Cu alloy film that can obtain good contact properties when directly connected to a transparent conductive film (ITO film, IZO film, etc.).

  The second object of the present invention is to maintain the low electrical resistivity characteristic of the Cu alloy film and to have excellent adhesion to the glass substrate and to omit the barrier metal layer between the glass substrate (that is, a single layer). It is to provide a Cu alloy film.

  The present invention further includes (1) a flat panel display (display device) represented by, for example, a liquid crystal display using the above Cu alloy film for a TFT; and (2) a Cu alloy film having the above excellent performance. It is also an object to provide a sputtering target for forming.

  The Cu alloy film for a display device of the present invention that has achieved the first object is a Cu alloy film for a display device that is directly connected to a transparent conductive film on a substrate, and has a Ge content of 0.1 to 0. It is characterized in that it contains 5 atomic% (at%) and contains at least one or more selected from the group consisting of Ni, Zn, Fe, and Co in a total amount of 0.1 to 0.5 atomic%.

  The present invention also includes a display device characterized in that the Cu alloy film is used for a thin film transistor. As an aspect thereof, the Cu alloy film is used for a gate electrode and a scanning line of a thin film transistor, Examples include those directly connected to a transparent conductive film, and those in which the Cu alloy film is used for a source electrode and / or drain electrode of a thin film transistor and a signal line, and is directly connected to the transparent conductive film.

  Examples of the transparent conductive film include those formed of indium tin oxide (ITO) or indium zinc oxide (IZO).

  The present invention also provides a sputtering target used for forming the Cu alloy film, which contains 0.1 to 0.5 atomic% of Ge and is selected from the group consisting of Ni, Zn, Fe, and Co. A sputtering target comprising a Cu alloy containing 0.1 to 0.5 atomic percent in total of seeds or more is also included.

  The Cu alloy film for a display device of the present invention that can achieve the second object is a Cu alloy film for a display device that is directly connected to a glass substrate, and the Cu alloy film comprises (1) Ge and Ni. 0.2 to 1 atomic% in total (ie, excluding the case where Ge is 0 atomic% or Ni is 0 atomic%); or (2) Ge and Zn are 0.2 to 1 atomic% in total (ie , Ge is 0 atom% or Zn is 0 atom%).

  The present invention also includes a display device characterized in that the Cu alloy film is used in a thin film transistor. As an aspect thereof, the thin film transistor has a bottom-gate structure, and the Cu alloy A film is used for a gate electrode and a scanning line of the thin film transistor and is directly connected to a glass substrate.

  The present invention also provides a sputtering target used for forming the Cu alloy film, wherein (1) the total content of Ge and Ni is 0.2 to 1 atomic% (that is, Ge is 0 atomic% or Ni is 0). Cu alloy (not including the case of atomic%); or (2) containing 0.2 to 1 atomic% in total of Ge and Zn (that is, including the case where Ge is 0 atomic% or Zn is 0 atomic%) And a sputtering target characterized in that it comprises a Cu alloy.

  ADVANTAGE OF THE INVENTION According to this invention, the display apparatus which has a Cu alloy film | membrane of the low electrical resistivity which can respond to the enlargement of a liquid crystal display and the raise of an operating frequency is realizable. Further, according to the present invention that has achieved the first object (hereinafter sometimes referred to as “first invention”), a Cu alloy film and a transparent conductive film such as ITO or IZO are directly contacted with low contact resistance. Can be made. Furthermore, according to the present invention that can achieve the second object (hereinafter sometimes referred to as “second invention”), the Cu alloy film and the glass substrate can be directly connected. As a result, a high-performance display device that can omit the refractory metal thin film (barrier metal layer) can be provided at low cost.

  First, the first invention will be described. The present inventors have further improved the low electrical resistivity, which is a characteristic of the Cu alloy film, and is good even when the barrier metal layer is omitted and the transparent conductive film (ITO film, IZO film, etc.) is directly connected. In order to realize a Cu alloy film that can provide a good contact property, and a display device using the Cu alloy film, an extensive study was conducted.

First, attention was focused on a Cu—Ge alloy film that is excellent in oxidation resistance and has good contact properties when directly connected to a transparent conductive film (ITO film, IZO film, etc.). As described in Patent Document 2, the Cu—Ge alloy film is an As-deposited state (which means a state immediately after being formed by sputtering; the same applies hereinafter), in which Ge is uniformly dissolved in Cu, and the concentration of Ge The distribution is uniform over the thickness direction. However, when this Cu-Ge alloy film is heated in the presence of oxygen partial pressure, Ge diffuses and concentrates on the surface of the Cu thin film, forming a strong oxide film (oxide film with a high GeO ₂ content ratio) on the surface. To do. Since this oxide film is extremely excellent in oxygen diffusion barrier properties, a thick oxide film is not formed on the surface of the Cu alloy film after exposure to high temperature (about 300 ° C.) (as a result, a Schottky barrier is formed). It is possible to ensure good contact with the transparent conductive film. Therefore, the kind of the third element that can further lower the electrical resistivity based on the Cu-Ge alloy film that can realize high-temperature oxidation resistance as well as a certain low electrical resistivity. And the content was examined. As a result, it has been found that it is effective to employ Ni, Zn, Fe, and Co as the third element.

  Hereinafter, the reason why the components and compositions of the Cu alloy film of the present invention, which can ensure low electrical resistivity and obtain good ohmic contact properties when directly connected to the transparent conductive film, will be described in detail.

  First, the Cu alloy film of the present invention contains Ge as an essential component. By including this Ge, as described above, the oxidation resistance is remarkably improved as compared with the case of pure Cu or a binary Cu alloy containing an element other than Ge. Even after passing, good ohmic contact property with the transparent conductive film formed on the upper part of the Cu alloy film can be ensured.

In order to sufficiently exhibit such an effect, Ge is contained in an amount of 0.1 atomic% or more. If the absolute amount of Ge with respect to the Cu thin film is small, it becomes difficult to form the oxide film (GeO ₂ ) uniformly as a continuous film. As a result, it does not function effectively as an oxygen diffusion barrier layer, and is resistant to high temperatures. It is because is not fully exhibited. Preferably, Ge is contained in an amount of 0.2 atomic% or more. The higher the Ge content, the higher the high temperature oxidation resistance of the Cu alloy film. However, since the electrical resistivity of the Cu alloy film increases, the Ge content is 0.5 atomic% or less (preferably 0.3%). (Atomic% or less).

  However, the Cu—Ge binary Cu alloy film tends to increase in electrical resistivity as the Ge content increases, and has a higher electrical resistivity than a pure Cu film. In addition, the Cu—Ge alloy film is less likely to decrease in electrical resistivity even when subjected to heat treatment (preferably 450 ° C. or less, more preferably 400 ° C. or less), and a low electrical resistivity due to thermal history is expected. I can't.

  Therefore, as the third element, one or more selected from the group consisting of Ni, Zn, Fe, and Co (hereinafter sometimes referred to as X) contains 0.1 to 0.5 atomic% in total. When the Cu—Ge—X alloy film was used, it was found that when the alloy film was heat treated, the precipitation of Ge was promoted and the electrical resistivity was sufficiently lower than that of the Cu—Ge alloy film.

In this way, the electrical resistivity decreases when the Cu—Ge—X alloy film is heat-treated. For example, in the case of a Cu—Ge—Ni alloy film, Ni ₃ Ge or NiGe is precipitated, and the Cu—Ge— In the case of a Zn alloy film, Cu ₁₅ Ge ₄ Zn is precipitated, in the case of a Cu—Ge—Fe alloy film, Fe ₂ Ge and FeGe ₂ are precipitated, and in the case of a Cu—Ge—Co alloy film. , Co ₂ Ge, CoGe, Co ₂ Ge ₃ , and CoGe ₂ are precipitating, respectively, to reduce the solid solution amount of Ge and the third element.

  Examples of combinations of a plurality of X include Cu—Ge—Ni—Zn, Cu—Ge—Zn—Co, and Cu—Ge—Ni—Co. The X and Ge precipitates are formed respectively. Therefore, also in this case, the effect of reducing the electrical resistivity is exhibited without canceling out the effects of the respective element additions.

  In order to exert the above effect, the X content is preferably 0.1 atomic% or more in total. Preferably it is 0.2 atomic% or more. However, if the total amount exceeds 0.5 atomic%, the third element will be present in excess of the Ge content and the third element that cannot react with Ge (reacts with Ge to form an intermetallic compound). 3rd element) remains as a surplus element (a solid solution element in the Cu alloy film), which increases the electrical resistivity of the Cu alloy film, which is not preferable. From such a viewpoint, it is considered that the ratio of Ge content (atomic%) / X content (atomic%) is preferably 1 to 2.

  Next, the second invention will be described. Similarly to the Cu alloy film of the first invention, the Cu alloy film of the second invention is also made of a Cu-Ge-X (third element) alloy, but the first invention is that Ni or Zn is selected as X. Is different.

  In order to achieve the second purpose, that is, to improve the adhesion between the Cu wiring and the glass substrate while ensuring the low electrical resistance characteristic of the Cu alloy film, the bonding between the Cu wiring and the glass substrate is performed. It is desirable to form high energy chemical bonds. In other words, if “chemical bonds such as chemical adsorption or the formation of an interfacial reaction layer” with a larger binding energy (bonding force) than “physical bonds such as physical adsorption” can be formed, stronger adhesion is achieved. The power can be realized. However, since it is difficult to form a chemical bond between the Cu wiring and the glass substrate, the Cu wiring has poor adhesion to the glass substrate.

Therefore, the present inventors have added a predetermined alloy element to Cu and formed a chemical bond between the alloy element and the constituent element of the glass substrate, thereby improving the adhesion with the glass substrate. Inspired. Ge acts effectively on the formation of this chemical bond. Ge has a strong affinity for oxygen (it is easy to form an oxide) and reacts with SiO ₂ which is the main component of the glass substrate to form a bond (Si—O—Ge) via the oxygen at the glass substrate interface. . In addition, since Ge has a large diffusion coefficient in Cu, even if added in a small amount to the Cu film, it diffuses and concentrates at the glass substrate interface, forms a bond via oxygen at the interface, and dramatically improves adhesion. .

  By adding Ni or Zn in combination with Ge having such an adhesion improving effect, the adhesion of the Cu alloy film to the glass substrate is further improved. The effect of this (Ge, Ni) or (Ge, Zn) composite addition is not clear, but it is thought that the addition of Ni or Zn into Cu promotes diffusion concentration at the Ge interface. .

Moreover, adding an alloying element to Cu usually causes an increase in electrical resistivity, but adding Ni or Zn to Cu hardly increases the electrical resistivity of the Cu alloy. The Cu—Ni alloy is a complete solid solution system, and since Ni completely dissolves in Cu, it seems that the contribution of the increase in electrical resistivity is small. On the other hand, the Cu—Zn alloy is a peritectic system, but the solid solubility limit of Zn in Cu is as wide as about 30%. Further, as described above, Cu ₃ Ge 4 Ni precipitates as an intermetallic compound by heat treatment in Cu—Ge—Ni alloy, and Cu ₁₅ Ge ₄ Zn precipitates as an intermetallic compound in Cu—Ge—Zn alloy wiring by heat treatment. The addition of Ni or Zn into the alloy effectively works to reduce the electrical resistivity.

  In order to achieve both good adhesion to the glass substrate as described above and low electrical resistivity, the total amount of (Ni, Ge) or (Zn, Ge) is 0.2 atomic% or more (preferably Is 0.3 atomic% or more) and 1 atomic% or less (preferably 0.6 atomic% or less). If the total amount of these is too small, the degree of concentration of the alloy element at the glass substrate interface is small, the degree of chemical bond formation at the interface is small, and high adhesion cannot be satisfactorily exhibited. If the total amount of these is excessive, the adhesion is improved, but the electrical resistivity of the Cu alloy film itself is increased. In addition, a preferred Ge content (atomic%) / X content (atomic%) ratio in the second invention is 0.5 to 2.0.

  In the second invention, in order to improve the high temperature oxidation resistance of the Cu alloy film to achieve good contact properties with the transparent conductive film, and to further reduce the electrical resistivity, the element amount of the first invention It is also preferable to satisfy the requirements. That is, also in the second invention, the Ge amount is preferably 0.1 atomic% or more (more preferably 0.2 atomic% or more), preferably 0.5 atomic% or less (more preferably 0.3 atomic% or less). Yes, each amount of Ni and Zn is preferably 0.1 atomic% or more (more preferably 0.2 atomic% or more), preferably 0.5 atomic% or less (more preferably 0.4 atomic% or less). is there.

  The Cu—Ge—X alloy film (that is, the first invention and the second invention) contains the above-mentioned prescribed amounts of Ge and the third element (X), and is the remaining Cu and inevitable impurities. Examples of the inevitable impurities include oxygen, nitrogen, carbon, argon and the like, and the total is 0.1 atomic% or less. In order to improve other characteristics (for example, corrosion resistance), the Cu—Ge—X alloy film may further contain other elements.

  It is desirable to employ a sputtering method for the formation of the Cu—Ge—X alloy film. In sputtering, an inert gas such as Ar is introduced into a vacuum, a plasma discharge is formed between a substrate and a sputtering target (hereinafter sometimes referred to as a target), and Ar ionized by the plasma discharge is formed. This is a method of making a thin film by colliding with the target and knocking out atoms of the target and depositing them on a substrate. Thin films with better in-plane uniformity of components and film thickness can be easily formed than thin films formed by ion plating, electron beam evaporation, and vacuum evaporation, and alloy elements are uniform in an as-deposited state. This is because a high-temperature oxidation resistance and the like can be effectively expressed because a thin film that is solid-dissolved in the film can be formed. As the sputtering method, for example, any sputtering method such as a DC sputtering method, an RF sputtering method, a magnetron sputtering method, or a reactive sputtering method may be employed, and the formation conditions may be set as appropriate.

  Further, in order to form the Cu—Ge—X alloy film by the sputtering method, if a Cu—Ge—X alloy sputtering target having the same component and composition as the desired Cu—Ge—X alloy film is used, the composition deviation is caused. Therefore, a Cu—Ge—X alloy film having a desired component / composition can be formed. That is, to form the Cu—Ge—X alloy film of the first invention, Ge is 0.1 to 0.5 atomic% and one or more selected from the group consisting of Ni, Zn, Fe, and Co. A Cu-Ge-X alloy sputtering target having the same composition and composition as the desired Cu-Ge-X alloy film may be used. In order to form the Cu—Ge—X alloy film of the second invention, (1) a Cu alloy containing Ge and Ni in a total amount of 0.2 to 1 at%; or (2) Ge and Zn in total 0 And a Cu-Ge-X alloy sputtering target having the same components and composition as the desired Cu-Ge-X alloy film.

  The shape of the target includes those processed into an arbitrary shape (such as a square plate shape, a circular plate shape, or a donut plate shape) according to the shape or structure of the sputtering apparatus.

  As a method for producing the above target, a method for producing an ingot made of a Cu-based alloy by a melt casting method, a powder sintering method, or a spray forming method, or a preform made of a Cu-based alloy (the final dense body is formed). Examples thereof include a method obtained by producing an intermediate before being obtained) and then densifying the preform by a densification means.

It is desirable to perform heat treatment after the Cu—Ge—X alloy film is formed by a sputtering method or the like. By the heat treatment, the electrical resistivity (wiring resistance) is reduced in the Cu alloy film of the first invention, and the adhesion to the glass substrate is improved and the electrical resistivity is also reduced in the Cu alloy film of the second invention. The reason why the electrical resistivity is reduced by these Cu alloy films is considered to be that Ni ₃ Ge or the like is precipitated as described above and the solid solution amount of Ge and the third element (X) is reduced. Further, the adhesion with the glass substrate is improved by the Cu alloy film of the second invention because the concentration of the alloy element at the interface between the Cu alloy film and the glass substrate is promoted by the heat treatment (thermal energy), and the chemistry at the interface is enhanced. This is thought to be because the formation of a natural bond is promoted.

  It is considered that the higher the heat treatment temperature and the longer the heat treatment time (holding time), the more effective the electrical resistivity is reduced and the adhesion is improved. However, if the temperature and time of the heat treatment are excessive, the glass substrate is adversely affected and productivity is lowered. Therefore, the heat treatment temperature is preferably 350 ° C. or more, preferably 450 ° C. or less (more preferably 400 ° C. or less), and the heat treatment time is preferably 30 minutes or more, preferably 120 minutes or less.

The Cu—Ge—X alloy film of the present invention is particularly used for TFTs of display devices.
Among them, the characteristics of the Cu-Ge-X alloy film of the first invention are sufficiently exerted particularly when used for a gate electrode and a scanning line of a TFT and / or a source electrode and / or a drain electrode and a signal line. Because it is done.
In addition, it is preferable that the Cu—Ge—X alloy film of the second invention is used as a single layer for the gate electrode and the scanning line of the TFT having a bottom gate structure without the barrier metal layer.

  When the Cu—Ge—X alloy film of the present invention is used for a plurality of gate electrodes and scanning lines, source electrodes and / or drain electrodes, and signal lines of the TFT, Cu—Ge constituting them is used. The components and composition of the -X alloy film may be the same, or the components and composition may be different within a specified range.

  Hereinafter, preferred embodiments of a display device of the present invention will be described with reference to the drawings. In the following, a liquid crystal display device having an amorphous silicon TFT substrate will be described as a representative example. However, the present invention is not limited to this, and is implemented with appropriate modifications within a range that can meet the purpose described above and below. Any of these may be included in the technical scope of the present invention.

  In FIG. 2, the source electrode 29 and the drain electrode 28, the signal line (not shown in FIG. 2), and / or the scanning line (gate wiring) 25 and the gate electrode 26 are formed on the Cu alloy film of the present invention (for example, Cu -0.3 atomic% Ge-0.3 atomic% Ni alloy) may be mentioned as an embodiment.

  According to the present embodiment (first invention), the Cu alloy film can be directly connected to the transparent conductive film without interposing a barrier metal layer made of Mo or the like on the source-drain electrodes as in the prior art. And good TFT characteristics equivalent to or higher than those of the conventional TFT substrate can be realized (see Examples described later). According to the second invention, the Cu alloy film can be directly connected to the glass substrate without interposing a barrier metal layer below the scanning line (gate wiring) or the gate electrode.

  Next, a manufacturing method of the TFT substrate according to the present embodiment shown in FIG. 2 will be described with reference to FIGS. 3 to 7 have the same reference numerals as those in FIG.

  First, as shown in FIG. 3, a Cu alloy film (for example, Cu-0.3 atomic% Ge-0.3 atomic% Ni alloy) having a thickness of about 200 nm is formed on a glass substrate (transparent substrate) 1a using a sputtering method. ). By patterning this film, the gate electrode 26 and the scanning line 25 are formed. At this time, in FIG. 4 to be described later, the side surface of the laminated thin film is preferably etched into a tapered shape with an inclination angle of about 30 ° to 60 ° so that the coverage of the gate insulating film 27 is improved.

  Next, as shown in FIG. 4, a gate insulating film (SiN) 27 having a thickness of about 300 nm is formed using a method such as plasma CVD. The film formation temperature of the plasma CVD method may be about 350 ° C.

Subsequently, as shown in FIG. 5, an undoped hydrogenated amorphous silicon film (a-Si: H) having a thickness of about 200 nm is formed on the gate insulating film (SiN) 27 by using a method such as plasma CVD. And an amorphous silicon channel film (active semiconductor film) 33 made of an n ⁺ type hydrogenated amorphous silicon film (n ⁺ a-Si: H) doped with phosphorus having a thickness of about 50 nm is formed, and this film 33 is patterned. . Then, a Cu alloy film (for example, Cu-0.3 atomic% Ge-0.3 atomic% Ni alloy) having a thickness of about 300 nm is formed thereon using a sputtering method, and then patterned. As shown in FIG. 6, a source electrode 29 integral with the signal line and a drain electrode 28 directly connected to the pixel electrode (transparent conductive film) 5 are formed. Note that the film formation temperature of the sputtering may be about 150 ° C.

  Next, as shown in FIG. 7, an interlayer insulating film 30 having a thickness of about 300 nm is formed using, for example, a plasma CVD apparatus. Next, after a photoresist (not shown) is formed on the interlayer insulating film 30, the interlayer insulating film 30 is patterned, and contact holes are formed in the interlayer insulating film 30 by, for example, dry etching. At the same time, a contact hole is formed in a portion corresponding to connection with TAB on the gate electrode at the end of the panel.

  Finally, for example, within the range of storage time (about 8 hours), as shown in FIG. 2, for example, an ITO film having a thickness of about 40 nm is formed and patterned by wet etching to form pixel electrodes (transparent Conductive film) 5 is formed. At the same time, when the ITO film 41 for bonding to the TAB is patterned at a connection portion of the gate electrode at the edge of the panel with the TAB, the TFT array substrate 1 is completed.

  In the TFT substrate thus fabricated, the drain electrode 28 and the pixel electrode (transparent conductive film) 5 are in direct contact, and the scanning line 25 and the ITO film for TAB connection are also in direct contact.

  In the above description, an ITO film is used as the pixel electrode (transparent conductive film) 5, but an IZO film (InOx—ZnOx-based conductive oxide film) may be used. Further, polysilicon may be used as the active semiconductor film instead of amorphous silicon.

  Using the TFT substrate thus obtained, for example, the liquid crystal display shown in FIG. 1 is manufactured by the method described below.

  First, for example, polyimide is applied to the surface of the TFT substrate 1 manufactured as described above and dried, and then a rubbing process is performed to form an alignment film.

  On the other hand, the counter substrate 2 forms the light shielding film 9 on the glass substrate by patterning, for example, Cr in a matrix. Next, resin-made red, green, and blue color filters 8 are formed in the gaps between the light shielding films 9. A counter electrode is formed by disposing a transparent conductive film such as an ITO film as the common electrode 7 on the light shielding film 9 and the color filter 8. Then, for example, polyimide is applied to the uppermost layer of the counter electrode, and after drying, a rubbing process is performed to form the alignment film 11.

  Next, the TFT substrate 1 and the counter substrate 2 are arranged so as to face each other on the surface on which the alignment film 11 is formed, and the TFT substrate 1 and the counter substrate are removed by a sealing material 16 made of resin, excluding the liquid crystal sealing port. 2 and pasted together. At this time, a gap between the two substrates is kept substantially constant by interposing a spacer 15 between the TFT substrate 1 and the counter substrate 2.

  The empty cell thus obtained is placed in a vacuum, and gradually returned to atmospheric pressure with the sealing port immersed in the liquid crystal, whereby a liquid crystal material containing liquid crystal molecules is injected into the empty cell to form a liquid crystal layer. Form and seal the sealing port. Finally, polarizing plates 10a and 10b are attached to both sides of the empty cell to complete the liquid crystal panel.

  Next, as shown in FIG. 1, the driver circuit 13 for driving the liquid crystal display is electrically connected to the liquid crystal display and disposed on the side portion or the back surface portion of the liquid crystal display. Then, the liquid crystal display is held by the holding frame 23 including the opening serving as the display surface of the liquid crystal display, the backlight 22 serving as the surface light source, the light guide plate 20, and the holding frame 23, thereby completing the liquid crystal display.

  In the display device of the present invention, since the wiring and electrode portions are formed of a prescribed Cu alloy film, it is possible to realize remarkably superior performance and reliability.

  Hereinafter, the present invention will be described in more detail with reference to examples. However, the following examples are not intended to limit the present invention, and may be implemented with appropriate modifications within a range that can meet the purpose described above and below. These are all possible and are within the scope of the present invention.

<First invention>
First, the first invention will be described using Experimental Examples 1 and 2.

(Sample preparation)
A Cu alloy film having a predetermined component and composition is formed on a glass substrate (Corning Eagle # 2000, diameter 50 mm × thickness 0.7 mm) at room temperature by a DC magnetron sputtering method (deposition conditions are as follows). 0.3 μm was formed. At this time, Cu—Ge alloy films were formed using Cu—Ge alloy targets having various compositions prepared by a vacuum melting method as a sputtering target. Further, on the Cu—Ge alloy target, a pure metal tip of the third element: X or a tip containing a third element other than X (Nb, Hf, Zr or Sb) is installed to adjust the composition, Cu-Ge-X alloy films and Cu-Ge- (third elements other than X) alloy films having components and compositions were formed.

  The composition of the obtained Cu-Ge alloy film, Cu-Ge-X alloy film, Cu-Ge- (third element other than X) alloy film is determined by the ICP emission spectroscopic analyzer (ICP emission spectroscopic analyzer manufactured by Shimadzu Corporation). "ICP-8000 type") was quantitatively analyzed.

(Deposition conditions)
・ Back pressure: 1.0 × 10 ⁻⁶ Torr or less ・ Ar gas pressure: 2.0 × 10 ⁻³ Torr
Ar gas flow rate: 30sccm
Sputtering power: 3.2 W / cm ²
・ Distance between electrodes: 50mm
・ Substrate temperature: Room temperature

[Experiment 1]
Using the various Cu-Ge alloy films, Cu-Ge-X alloy films or Cu-Ge- (third elements other than X) alloy films, the electrical resistivity was measured and evaluated as shown below. It was.

(Measurement of electrical resistivity)
The Cu—Ge alloy film or the Cu—Ge—X alloy film is subjected to photolithography and wet etching to be processed into a stripe pattern (pattern for measuring electrical resistivity) having a width of 100 μm and a length of 10 mm, The electrical resistivity of the pattern was measured at room temperature by a direct current four-probe method using a prober.

The electrical resistivity was measured at 400 ° C. in a vacuum (≦ 1 × 10 ⁻⁶ Torr) by simulating the stripe pattern in the As-deposited state and the heat treatment after the Cu alloy film was formed. The striped pattern was subjected to a heat treatment for 5 minutes on the Cu alloy film.

(Electric resistivity of Cu-Ge alloy film)
The results of measuring the electrical resistivity of various Cu—Ge alloy films with different Ge contents are summarized in FIG.

  FIG. 8 shows the relationship between the electrical resistivity and the Ge content of the Cu—Ge alloy film for the As-deposited state and after the 400 ° C. vacuum heat treatment. From FIG. 8, the electrical resistivity of the Cu—Ge alloy film increases almost linearly as the Ge content increases in the As-deposited state. The absolute value of the electrical resistivity of the sample subjected to the heat treatment is slightly lower than that of the sample in the As-deposited state, but the electrical resistivity of the sample subjected to the heat treatment is also increased in the Ge content. It can be seen that there is a tendency to increase linearly.

(Electric resistivity of Cu-0.1 atomic% Ge-X alloy film)
The results of measuring the electrical resistivity of various Cu-0.1 atomic% Ge-X alloy films with different X contents are summarized in FIG.

  FIG. 9 shows the relationship between the electrical resistivity and the X content of the Cu-0.1 atomic% Ge—X alloy film for the As-deposited state and after the 400 ° C. vacuum heat treatment. From FIG. 9, it can be considered as follows. That is, the electrical resistivity of the Cu-0.1 atomic% Ge-X alloy film increases almost linearly as the content of the third element: X increases in the As-deposited state. It can be seen that the effect on the increase in the electric resistance varies depending on the type of the third element: X (Co, Fe, Ni, Zn), and the effect on the increase in electrical resistivity increases in the order of Co> Fe> Ni> Zn.

  On the other hand, the electrical resistivity of the sample after the vacuum heat treatment at 400 ° C. is significantly smaller than that in the As-deposited state at the same X content, and with the addition of the third element: X, Cu-0.1 atomic% Ge There is a tendency to lower or maintain the electrical resistivity of the alloy film. The absolute value of the electrical resistivity after the vacuum heat treatment at 400 ° C. differs depending on the type of the third element: X (Co, Fe, Ni, Zn) and the content, but the second element is the Cu-0.1 atomic% Ge binary system component. It can be seen that when any of the three elements (Co, Fe, Ni, Zn) is added to 0.5 atomic%, the electrical resistivity is lower than that of the Cu-0.1 atomic% Ge alloy film.

(Electric resistivity of Cu-0.3 atomic% Ge-X alloy film)
The results of measuring the electrical resistivity of various Cu-0.3 atomic% Ge-X alloy films with different X contents are summarized in FIG.

  FIG. 10 shows the relationship between the electrical resistivity and the X content of the Cu-0.3 atomic% Ge—X alloy film for the As-deposited state and after the 400 ° C. vacuum heat treatment. From FIG. 10, it can be considered as follows. That is, the electrical resistivity of the Cu-0.3 atomic% Ge-X alloy film increases almost linearly in the As-deposited state as the content of the third element: X increases. At this time, the effect on the increase in electrical resistivity varies depending on the type of the third element: X (Co, Fe, Ni, Zn), and the effect on the increase in electrical resistivity in the order of Co> Fe> Zn> Ni ( It turns out that it becomes large (especially with Co and Fe).

  On the other hand, the electrical resistivity of the sample after the 400 ° C. vacuum heat treatment is significantly smaller than that in the As-deposited state at the same X content, and with the addition of the third element: X, Cu-0.3 atomic% Ge There is a tendency to lower or maintain the electrical resistivity of the alloy film. The absolute value of the electrical resistivity after the vacuum heat treatment at 400 ° C. differs depending on the type of the third element: X (Co, Fe, Ni, Zn) and the content thereof. It can be seen that when any of the three elements (Co, Fe, Ni, Zn) is added to 0.5 atomic%, the electrical resistivity is lower than that of the Cu-0.3 atomic% Ge alloy film.

(Electric resistivity of Cu-0.5 atomic% Ge-X alloy film)
The results of measuring the electrical resistivity of various Cu-0.5 atomic% Ge-X alloy films with different X contents are summarized in FIG.

  FIG. 11 shows the relationship between the electrical resistivity and the X content of the Cu-0.5 atomic% Ge—X alloy film for the As-deposited state and after the 400 ° C. vacuum heat treatment. From FIG. 11, it can be considered as follows. That is, the electrical resistivity of the Cu-0.5 atomic% Ge-X alloy film increases almost linearly with an increase in the content of the third element: X in the As-deposited state. At this time, the influence on the increase in electrical resistivity differs depending on the type of the third element: X (Co, Fe, Ni, Zn), and the influence on the increase in electrical resistivity in the order of Co> Fe> Ni> Zn ( It turns out that it becomes large (especially with Co and Fe).

  On the other hand, the electrical resistivity of the sample after the vacuum heat treatment at 400 ° C. is significantly smaller than that in the As-deposited state at the same X content. There is a tendency to lower or maintain the electrical resistivity of the alloy film. The absolute value of the electrical resistivity after the vacuum heat treatment at 400 ° C. differs depending on the type of the third element: X (Co, Fe, Ni, Zn) and the content. It can be seen that when any of the three elements (Co, Fe, Ni, Zn) is added to 0.5 atomic%, the electrical resistivity is lower than that of the Cu-0.5 atomic% Ge alloy film.

  As a comparative example, the case where an element other than X (Nb, Hf, Zr, Sb) was used as the third element was also examined. FIG. 12 shows the relationship between the electrical resistivity of the Cu-0.5 atomic% Ge— (third element other than X) alloy film and the content of the third element other than X, the As-deposited state and the 400 ° C. vacuum. It is the figure shown about each after heat processing. From FIG. 12, although the electrical resistivity is lowered by performing the vacuum heat treatment at 400 ° C., it is equal to or larger than the electrical resistivity of the Cu-0.5 atomic% Ge alloy film shown in FIG. Thus, it can be seen that even if an element other than X is added as the third element, the effect of reducing the electrical resistivity due to the addition of the third element cannot be obtained.

[Experiment 2]
Using the various Cu—Ge alloy films or Cu—Ge—X alloy films described above, contact resistance was measured as described below, and ohmic contact properties due to direct connection with the transparent conductive film (ITO film) were evaluated.

(Measurement of contact resistance)
First, a Kelvin pattern as shown in FIG. 13 was produced as follows. Specifically, various Cu—Ge alloy films or Cu—Ge—X alloy films were subjected to photolithography and wet etching to be processed into patterns having the shape shown in FIG. 13 (lower wiring pattern of Kelvin pattern). Next, a SiN thin film (thickness: 0.3 μm insulating film) was formed by CVD, and a contact hole (connection hole) of size: 10 μm square was formed on the pattern by photolithography and dry etching. Next, a transparent conductive film (ITO film) is formed thereon with a DC magnetron sputtering method at 0.2 μm at room temperature, and a pattern having the shape shown in FIG. 13 (Kelvin pattern upper wiring pattern) is formed by photolithography and wet etching. It was processed into.

  The electrical resistance (contact resistance) at the interface between the Cu alloy film and the ITO film was measured using the Kelvin pattern (evaluation element) thus prepared.

  For the measurement of contact resistance, a four-terminal manual prober and a semiconductor parameter analyzer “HP4156A” (manufactured by Hewlett-Packard Company) were used. In this measurement, as shown in FIG. 13, a current I is passed between one terminal (I1) of the Cu alloy film and one terminal (I2) of ITO, and the voltage V between V1 and V2 is monitored to connect. The contact resistance R of the part C was determined as [R = V / I].

  The contact resistance is measured after the formation of the contact hole (connection hole) in the production of the Kelvin pattern (evaluation element) by simulating the heat treatment after forming the As-deposited Kelvin pattern and the Cu alloy film. Before the transparent conductive film (ITO film) was formed, the Kelvin pattern was subjected to atmospheric oxidation treatment (250 ° C. × 5 minutes).

(Contact resistance at the interface between Cu-Ge alloy film and ITO film)
The results of measuring the contact resistance at the interface with the ITO film for various Cu-Ge alloy films with different Ge contents are summarized in FIG.

  FIG. 14 shows the relationship between the contact resistance at the interface between the Cu—Ge alloy film and the ITO film and the Ge content for the case without the atmospheric oxidation heat treatment and after the atmospheric oxidation heat treatment.

  From FIG. 14, when the atmospheric oxidation treatment is not performed, the contact resistance is as small as about 20Ω even if the Ge content is zero. When the atmospheric oxidation treatment is not performed, the contact resistance further decreases as the Ge content increases, and the contact resistance decreases to about 6Ω in the Cu-0.5 atomic% Ge alloy film. On the other hand, when the atmospheric oxidation treatment is performed, the contact resistance of the Cu film (pure Cu film) with zero Ge content is as large as about 138Ω. However, the contact resistance is remarkably reduced by adding Ge, and the contact resistance is reduced to about 76Ω in the Cu-0.5 atomic% Ge alloy film.

  Therefore, even when the atmospheric oxidation treatment is performed by simulating the heat treatment after forming the Cu alloy film, high temperature oxidation resistance is improved by adding a small amount of Ge to the Cu film and alloying it, and the transparent conductive film It can be seen that good contact properties can be secured.

(Contact resistance at the interface between Cu-Ge-X alloy film and ITO film)
The Cu alloy film according to the present invention can ensure excellent ohmic contact properties by including a specified amount of Ge, but even when the third element is contained, it is equal to or higher than Cu-Ge. An experiment was conducted to confirm that excellent contact resistance could be secured.

  As described above, the contact resistance at the interface with the ITO film was measured for various Cu-Ge-X alloy films in which the Ge content and the type and content of X were changed. In this experiment, in any case, in the production of the Kelvin pattern (evaluation element), the atmospheric oxidation treatment (250 ° C. × 250 ° C.) is performed after the formation of the contact hole (connection hole) and before the formation of the transparent conductive film (ITO film). 5 minutes).

  FIG. 15 shows the relationship between the contact resistance at the interface of the Cu—Ge—X alloy film with the ITO film and the Ge content, according to the type and content of X.

  From FIG. 15, it can be considered as follows. That is, the contact resistance when adding 0.1 atomic%, 0.2 atomic%, and 0.3 atomic% of the third element; X as the third element; X to the Cu—Ge alloy film has the same Ge amount. In this case, the contact resistance is equal to or slightly lower than that in the case where the third element is not added (Cu—Ge alloy film). On the other hand, when 0.5 atomic% of Ni is added as the third element to the Cu—Ge alloy film, the contact resistance value is remarkably lowered, and a good ohmic contact property is obtained as compared with the Cu—Ge alloy film. You can see that

<Second invention>
Next, Experimental Example 3-6 demonstrates 2nd invention.

(Sample preparation)
Using a DC magnetron sputtering method (film formation conditions are as described above (Experimental Examples 1 and 2)), a Cu alloy wiring thin film having a predetermined component and composition is 0.3 μm on a glass substrate (Corning Eagle # 2000) at room temperature. At this time, a Cu alloy film was formed using a sputtering target in which an additive element was added to pure Cu as a target, and a heat treatment was performed in a vacuum atmosphere at 350 ° C. for 30 minutes to form a sample. The composition of the obtained Cu alloy film was quantitatively analyzed using an ICP emission spectrometer (ICP emission spectrometer “ICP-8000 type” manufactured by Shimadzu Corporation).

[Experiment 3]
The adhesion between the Cu—Ge—Ni alloy film and the glass substrate was evaluated by a tape peeling test. Specifically, first, a grid-like cut was made on the surface of the Cu alloy film at intervals of 1 mm using a cutter / knife. Next, a 3M black polyester tape (product number 8422B) was firmly attached onto the film-forming surface, and the tape was peeled off at once while holding the tape at a peeling angle of 60 °. . Then, the number of sections of the grids that were not peeled off by the tape was counted to obtain a ratio (adhesion ratio = film remaining ratio) with respect to all sections. For comparison, the adhesion of pure Cu film, Cu—Ge alloy film and Cu—Ni alloy film was also evaluated.

  FIG. 16 and FIG. 17 summarize the adhesion ratio between the As-deposited state and the pure Cu film heat-treated (350 ° C. × 30 minutes) and the Cu alloy film, respectively. In this experimental example, the Ge addition amount and the Ni addition amount were changed in the range of 0 to 1.0 atomic%, respectively. From FIG. 16 and FIG. 17, the Cu—Ge—Ni alloy film satisfying the requirements of the present invention exhibits an extremely excellent adhesion of 20% or more than that in the As-deposited state by heat treatment. I understand that.

[Experimental Example 4]
By the same method as in Experimental Example 3, the adhesion between the Cu—Ge—Zn alloy film and the glass substrate was evaluated by a tape peeling test. FIG. 18 and FIG. 19 show the adhesion rate of the Cu alloy film subjected to the heat treatment (350 ° C. × 30 minutes) after the film formation in the As-deposited state. In this experimental example, the Ge addition amount and the Zn addition amount were changed in the range of 0 to 1.0 atomic%, respectively. From FIG. 18 and FIG. 19, the Cu—Ge—Zn alloy film satisfying the requirements of the present invention exhibits a significantly superior adhesion of 20% or more than that of the As-deposited state by heat treatment. I understand that.

[Experimental Example 5]
The electrical resistivity of the Cu—Ge—Ni alloy film was measured by the same method as in Experimental Example 1. For comparison, the electrical resistivity of pure Cu film, Cu—Ge alloy film and Cu—Ni alloy film was also measured. The electrical resistivity of the Cu alloy film subjected to the heat treatment (350 ° C. × 30 minutes) after the deposition and the As-deposited state is shown in FIGS. 20 and 21, respectively. It is recognized that the electrical resistivity tends to increase in proportion to the total amount of alloy elements added. Further, the electrical resistivity is reduced in the state after the heat treatment as compared with the As-deposited state, and the Cu—Ge—Ni alloy film satisfying the requirements of the present invention has a low electrical resistance of 4.5 μΩcm or less after the heat treatment. It can be seen that the rate is shown (FIG. 21).

[Experimental Example 6]
The electrical resistivity of the Cu—Ge—Zn alloy film was measured by the same method as in Experimental Example 1. The electrical resistivity of the Cu alloy film subjected to the heat treatment (350 ° C. × 30 minutes) after the deposition and the As-deposited state is shown in FIGS. 22 and 23, respectively. It is recognized that the electrical resistivity tends to increase in proportion to the total amount of alloy elements added. In addition, the electrical resistivity is reduced in the state after the heat treatment compared to the As-deposited state, and the Cu—Ge—Zn alloy film satisfying the requirements of the present invention has a low electrical resistance of 4.5 μΩcm or less after the heat treatment. It can be seen that the rate is shown (FIG. 23).

FIG. 1 is an enlarged schematic cross-sectional explanatory view showing a configuration of a typical liquid crystal display to which an amorphous silicon TFT substrate is applied. FIG. 2 is a schematic cross-sectional explanatory view showing the configuration of the TFT substrate according to the embodiment of the present invention, and is an enlarged view of a main part A in FIG. FIG. 3 is an explanatory view showing an example of a manufacturing process of the TFT substrate shown in FIG. 2 in order. FIG. 4 is an explanatory view showing an example of a manufacturing process of the TFT substrate shown in FIG. 2 in order. FIG. 5 is an explanatory diagram showing an example of a manufacturing process of the TFT substrate shown in FIG. 2 in order. FIG. 6 is an explanatory view showing an example of the manufacturing process of the TFT substrate shown in FIG. 2 in order. FIG. 7 is an explanatory diagram showing an example of a manufacturing process of the TFT substrate shown in FIG. 2 in order. FIG. 8 is a diagram showing the relationship between the electrical resistivity of the Cu—Ge alloy film and the Ge content for the As-deposited state and after the 400 ° C. vacuum heat treatment. FIG. 9 is a diagram showing the relationship between the electrical resistivity and the X content of the Cu-0.1 atomic% Ge—X alloy film for the As-deposited state and after the 400 ° C. vacuum heat treatment. FIG. 10 is a diagram showing the relationship between the electrical resistivity and the X content of the Cu-0.3 atomic% Ge—X alloy film for the As-deposited state and after the 400 ° C. vacuum heat treatment. FIG. 11 is a diagram showing the relationship between the electrical resistivity and the X content of the Cu-0.5 atomic% Ge—X alloy film for the As-deposited state and after the 400 ° C. vacuum heat treatment. FIG. 12 shows the relationship between the electrical resistivity of the Cu-0.5 atomic% Ge— (third element other than X) alloy film and the content of the third element other than X, the As-deposited state and the 400 ° C. vacuum. It is the figure shown about each after heat processing. FIG. 13 is a diagram illustrating a Kelvin pattern used for measurement of contact resistance between a Cu—Ge alloy film or a Cu—Ge—X alloy film and a transparent conductive film. FIG. 14 is a diagram showing the relationship between the contact resistance at the interface between the Cu—Ge alloy film and the ITO film and the Ge content, with or without atmospheric heat treatment. FIG. 15 is a diagram showing the relationship between the contact resistance at the interface between the Cu—Ge—X alloy film and the ITO film and the Ge content for each type and content of X. FIG. 16 is a diagram showing the relationship between the composition and the adhesion rate of the Cu—Ge—Ni alloy film in the As-deposited state. FIG. 17 is a diagram showing the relationship between the composition and the adhesion rate of the Cu—Ge—Ni alloy film after 350 ° C. vacuum heat treatment. FIG. 18 is a diagram showing the relationship between the composition and the adhesion rate of the Cu—Ge—Zn alloy film in the As-deposited state. FIG. 19 is a graph showing the relationship between the composition and the adhesion rate of the Cu—Ge—Zn alloy film after the 350 ° C. vacuum heat treatment. FIG. 20 is a diagram showing the relationship between the composition and the electrical resistivity of the Cu—Ge—Ni alloy film in the As-deposited state. FIG. 21 is a diagram showing the relationship between composition and electrical resistivity for a Cu—Ge—Ni alloy film after 350 ° C. vacuum heat treatment. FIG. 22 is a diagram showing the relationship between the composition and the electrical resistivity of the Cu—Ge—Zn alloy film in the As-deposited state. FIG. 23 is a diagram showing the relationship between the composition and electrical resistivity of the Cu—Ge—Zn alloy film after 350 ° C. vacuum heat treatment.

Explanation of symbols

1 TFT substrate 1a Glass substrate 2 Counter substrate (counter electrode)
3 Liquid crystal layer 4 Thin film transistor (TFT)
5 Pixel electrode (transparent conductive film)
6 Wiring part 7 Common electrode 8 Color filter 9 Light shielding film 10a, 10b Polarizing plate 11 Alignment film 12 TAB tape 13 Driver circuit 14 Control circuit 15 Spacer 16 Sealing material 17 Protective film 18 Diffusion plate 19 Prism sheet 20 Light guide plate 21 Reflecting plate 22 Backlight 23 Holding frame 24 Printed circuit board 25 Scan line (gate wiring)
26 Gate electrode 27 Gate insulating film 28 Drain electrode 29 Source electrode 30 Interlayer insulating film 33 Amorphous silicon channel film (active semiconductor film)
34 Signal line (source-drain wiring)
41 ITO film for connection

Claims (9)

  A Cu alloy film for a display device that is directly connected to a transparent conductive film on a substrate, the Cu alloy film containing 0.1 to 0.5 atomic% of Ge, and comprising Ni, Fe, and Co A Cu alloy film for a display device, comprising a total of 0.1 to 0.5 atomic% of one or more selected from the group consisting of the remaining Cu and inevitable impurities.   A Cu alloy film for a display device, which is directly connected to a glass substrate, and the Cu alloy film contains 0.2 to 1 atomic% of Ge and Ni in total.   3. A display device, wherein the Cu alloy film for a display device according to claim 1 is used for a thin film transistor.   The display device according to claim 3, wherein the Cu alloy film for a display device according to claim 1 is used for a gate electrode and a scanning line of a thin film transistor and is directly connected to a transparent conductive film.   The display device according to claim 3, wherein the Cu alloy film for a display device according to claim 1 is used for a source electrode and / or a drain electrode of a thin film transistor and a signal line, and is directly connected to the transparent conductive film. The display device according to claim 4 , wherein the transparent conductive film is indium tin oxide (ITO) or indium zinc oxide (IZO). The thin film transistor according to claim 3 has a bottom gate type structure,
The display device according to claim 3, wherein the Cu alloy film for a display device according to claim 2 is used for a gate electrode and a scanning line of a thin film transistor and is directly connected to a glass substrate.   A sputtering target used for forming a Cu alloy film according to claim 1, comprising 0.1 to 0.5 atomic% of Ge and at least one selected from the group consisting of Ni, Fe, and Co. A sputtering target comprising a total of 0.1 to 0.5 atomic% and comprising a remaining Cu and an inevitable impurity Cu alloy.   A sputtering target used for forming the Cu alloy film according to claim 2, wherein the sputtering target is made of a Cu alloy containing 0.2 to 1 atomic% of Ge and Ni in total.