JP5233072B2 - Plasma display panel driving method and plasma display device - Google Patents

Description

  The present invention relates to a driving method of a plasma display panel and a plasma display device used for a wall-mounted television or a large monitor.

  A typical AC surface discharge type panel as a plasma display panel (hereinafter abbreviated as “panel”) has a large number of discharge cells formed between a front plate and a back plate arranged to face each other.

  In the front plate, a plurality of display electrode pairs each consisting of a pair of scan electrodes and sustain electrodes are formed in parallel with each other on the front glass substrate, and a dielectric layer and a protective layer are formed so as to cover the display electrode pairs. Yes. The back plate has a plurality of parallel data electrodes on the back glass substrate, a dielectric layer so as to cover them, and a plurality of barrier ribs in parallel with the data electrodes formed on the back glass substrate. A phosphor layer is formed on the side walls of the barrier ribs.

  Then, the front plate and the back plate are arranged opposite to each other so that the display electrode pair and the data electrode are three-dimensionally crossed and sealed, and a discharge gas containing, for example, 5% xenon is enclosed in the internal discharge space. Has been. Here, a discharge cell is formed in a portion where the display electrode pair and the data electrode face each other. In the panel having such a configuration, ultraviolet rays are generated by gas discharge in each discharge cell, and the phosphors of red (R), green (G) and blue (B) colors are excited and emitted by the ultraviolet rays, thereby performing color display. It is carried out.

  As a method of driving the panel, a subfield method, that is, a method of performing gradation display by combining subfields to emit light after dividing one field period into a plurality of subfields.

  Each subfield has an initialization period, an address period, and a sustain period. In the initialization period, an initialization discharge is generated, and wall charges necessary for the subsequent address operation are formed on each electrode. The initialization operation includes an initialization operation for generating an initialization discharge in all discharge cells (hereinafter abbreviated as “all-cell initialization operation”) and an initialization discharge in a discharge cell that has undergone a sustain discharge. There is an initialization operation (hereinafter abbreviated as “selective initialization operation”).

  In the address period, address discharge is selectively generated in the discharge cells to be displayed to form wall charges. In the sustain period, a sustain pulse is alternately applied to the display electrode pair composed of the scan electrode and the sustain electrode, and a sustain discharge is generated in the discharge cell in which the address discharge is generated, and the phosphor layer of the corresponding discharge cell is caused to emit light. The image is displayed.

  In addition, among the subfield methods, initializing discharge is performed using a slowly changing voltage waveform, and further, initializing discharge is selectively performed on discharge cells that have undergone sustain discharge. A novel driving method is disclosed in which the light emission that is not generated is reduced as much as possible to improve the contrast ratio.

  Specifically, for example, among all the subfields, an all-cell initializing operation is performed in which all discharge cells are discharged in the initializing period of one subfield, and a sustain discharge is performed in the initializing period of the other subfield. A selective initialization operation for initializing only the performed discharge cells is performed. As a result, light emission unrelated to display is only light emission accompanying discharge in the all-cell initialization operation, and high-contrast image display is possible (for example, see Patent Document 1).

  By driving in this way, light emission that is not related to image display, that is, the luminance of the black display area (hereinafter abbreviated as “black luminance”) is only weak light emission in the all-cell initialization operation, and an image with high contrast. Display is possible.

  On the other hand, the number of discharge cells will increase as the panel becomes higher in definition and larger screen, and the number of subfields will increase in order to improve the image display quality, such as the improvement of moving image pseudo contour. There is a demand for faster write operations.

  By the way, the all-cell initializing operation for initializing all the discharge cells forms the wall charge necessary for the address operation as described above, reduces the discharge delay, and stably generates the address discharge. It also has the function of generating. Therefore, a method of increasing priming is effective for high-speed write operation. However, if the number of all-cell initialization operations is simply increased, the black luminance increases, the contrast decreases, and the image display quality decreases.

Therefore, based on the average image level (APL: Average Picture Level) of the image signal to be displayed, the initialization operation in the initialization period of each subfield is determined as either all-cell initialization or selective initialization. There has been proposed a panel driving method that can increase and decrease the number of all-cell initializations and can stably perform high-speed writing while suppressing an increase in black luminance (see, for example, Patent Document 2).
JP 2000-242224 A JP-A-2005-215132

  However, if the initialization operation in the initialization period is determined as either the all-cell initialization operation or the selective initialization operation and the number of all-cell initializations is increased / decreased, the black luminance that should be constant is discontinuous. It may fluctuate and reduce the image display quality. Here, the number of subfields for performing the all-cell initialization operation within one field period is referred to as “all-cell initialization count” below.

  The present invention has been made to solve these problems, and by stabilizing the address discharge by increasing / decreasing the number of all-cell initializations in the panel, at the same time, by making the fluctuation of black luminance inconspicuous, image display An object of the present invention is to provide a panel driving method and a plasma display device capable of improving quality.

  In order to solve the above-described problems, the present invention is a method for driving a panel having a plurality of discharge cells each having a display electrode pair composed of a scan electrode and a sustain electrode. An initialization period to be generated, an address period in which an address discharge is generated in a discharge cell, and a plurality of subfields having a sustain period in which a sustain discharge is generated in a discharge cell in which an address discharge is generated. Initially selectively in all cell initialization subfields that generate initialization discharge for all discharge cells that display images during the initialization period, and discharge cells that have generated sustain discharges in the immediately preceding subfield during the initialization period Selective initialization subfield that generates igniting discharge, switchable between all-cell initialization subfield and selective initialization subfield The number of all-cell initialization subfields can be increased or decreased, and when the number of all-cell initialization subfields is increased, the initial selection placed immediately before or after the all-cell initialization subfield Switching the sub-field to the all-cell initializing subfield to reduce the number of all-cell initializing subfields, select one of the consecutively arranged all-cell initializing subfields as the selective initializing subfield. It is characterized by switching. By this method, the address discharge is stabilized by increasing / decreasing the number of all-cell initializations in the panel, and at the same time, the fluctuation in black luminance is made inconspicuous, thereby improving the image display quality and A plasma display device can be provided.

  In the panel driving method of the present invention, when switching between the all-cell initializing subfield and the selective initializing subfield without increasing or decreasing the number of all-cell initializing subfields, immediately before or after the selective initializing subfield. The all-cell initializing subfield arranged in (1) may be switched to selective initialization, and the selective initializing subfield arranged immediately before or after the all-cell initializing subfield may be switched to all-cell initializing subfield.

  Further, the panel driving method of the present invention is configured to be able to vary the initialization voltage for generating the initialization discharge in the all-cell initialization subfield, and when increasing or decreasing the number of all-cell initialization subfields, The initialization voltage may be controlled so as to mitigate a change in emission luminance of the initialization discharge.

  In addition, the plasma display device of the present invention includes a panel having a plurality of discharge cells each having a display electrode pair composed of a scan electrode and a sustain electrode, and a scan electrode driving circuit that applies a ramp waveform voltage that gently rises or falls to the scan electrode. An initializing period for generating an initializing discharge in the discharge cell, an addressing period for generating the addressing discharge in the discharge cell, and a sustaining period for generating the sustaining discharge in the discharge cell in which the addressing discharge has occurred The subfield includes an all-cell initializing subfield that generates an initializing discharge for all discharge cells that perform image display in the initializing period, and an immediately preceding subfield in the initializing period. Any of selective initialization subfields that selectively generate initialization discharges in discharge cells that have generated sustain discharges in the subfields The scan electrode driving circuit is configured so that the number of all-cell initializing subfields can be increased or decreased by switching between the all-cell initializing subfield and the selective initializing subfield. When increasing the number of fields, the selective initialization subfield arranged immediately before or after the all-cell initialization subfield is switched to the all-cell initialization subfield to reduce the number of all-cell initialization subfields. In some cases, one of the all-cell initializing subfields arranged continuously is switched to the selective initializing subfield.

  According to the present invention, it is possible to improve the image display quality by stabilizing the address discharge by increasing / decreasing the number of all-cell initializations in the panel and at the same time making the fluctuation of black luminance inconspicuous.

  Hereinafter, a plasma display device according to an embodiment of the present invention will be described with reference to the drawings.

(Embodiment 1)
FIG. 1 is an exploded perspective view showing a structure of panel 10 according to the embodiment of the present invention. On the glass front plate 21, a plurality of display electrode pairs 28 made up of the scan electrodes 22 and the sustain electrodes 23 are formed. A dielectric layer 24 is formed so as to cover the scan electrode 22 and the sustain electrode 23, and a protective layer 25 is formed on the dielectric layer 24. A plurality of data electrodes 32 are formed on the back plate 31, a dielectric layer 33 is formed so as to cover the data electrodes 32, and a grid-like partition wall 34 is formed thereon. A phosphor layer 35 that emits light of each color of red (R), green (G), and blue (B) is provided on the side surface of the partition wall 34 and on the dielectric layer 33.

  The front plate 21 and the back plate 31 are arranged to face each other so that the display electrode pair 28 and the data electrode 32 intersect each other with a minute discharge space interposed therebetween, and the outer periphery thereof is sealed with a sealing material such as glass frit. Has been. In the discharge space, for example, a mixed gas of neon and xenon is enclosed as a discharge gas. In the present embodiment, a discharge gas with a xenon partial pressure of 10% is used to improve luminance. The discharge space is partitioned into a plurality of sections by partition walls 34, and discharge cells are formed at the intersections between the display electrode pairs 28 and the data electrodes 32. These discharge cells discharge and emit light to display an image.

  Note that the structure of the panel is not limited to the above-described structure, and for example, a structure having a stripe-shaped partition may be used.

  FIG. 2 is a diagram showing an electrode arrangement of panel 10 in accordance with the exemplary embodiment of the present invention. In panel 10, n scanning electrodes SC1 to SCn (scanning electrode 22 in FIG. 1) and n sustaining electrodes SU1 to SUn (sustaining electrode 23 in FIG. 1) long in the row direction are arranged and long in the column direction. M data electrodes D1 to Dm (data electrode 32 in FIG. 1) are arranged. A discharge cell is formed at a portion where one pair of scan electrode SCi (i = 1 to n) and sustain electrode SUi intersects one data electrode Dj (j = 1 to m), and the discharge cell is in the discharge space. M × n are formed.

  FIG. 3 is a circuit block diagram of plasma display device 1 in accordance with the exemplary embodiment of the present invention. The plasma display apparatus 1 includes a panel 10, an image signal processing circuit 51, a data electrode drive circuit 52, a scan electrode drive circuit 53, a sustain electrode drive circuit 54, a timing generation circuit 55, an APL detection circuit 57, and power supplies necessary for each circuit block. A power supply circuit (not shown) is provided.

  The image signal processing circuit 51 converts the input image signal sig into image data indicating light emission / non-light emission for each subfield. The data electrode driving circuit 52 converts the image data for each subfield into signals corresponding to the data electrodes D1 to Dm, and drives the data electrodes D1 to Dm. The APL detection circuit 57 detects the average luminance level (hereinafter abbreviated as “APL”) of the image signal sig. Specifically, the APL is detected by using a generally known method such as accumulating the luminance value of the image signal over one field period or one frame period.

  The timing generation circuit 55 generates various timing signals for controlling the operation of each circuit block based on the horizontal synchronization signal H, the vertical synchronization signal V, and the APL detected by the APL detection circuit 57, and supplies them to the respective circuit blocks. To do. Scan electrode drive circuit 53 has an initialization waveform generation circuit 300 for generating an initialization voltage waveform to be applied to scan electrodes SC1 to SCn in the initialization period, and scan electrode SC1 to SCn is supplied based on a timing signal. Drive each one. Sustain electrode drive circuit 54 drives sustain electrodes SU1 to SUn based on the timing signal.

  Next, a driving voltage waveform for driving panel 10 and its operation will be described. The plasma display device 1 performs gradation display by subfield method, that is, dividing one field period into a plurality of subfields and controlling light emission / non-light emission of each discharge cell for each subfield. Each subfield has an initialization period, an address period, and a sustain period.

  In the initializing period, initializing discharge is generated, and wall charges necessary for the subsequent address discharge are formed on each electrode. The initializing operation at this time includes an initializing operation for generating initializing discharge in all discharge cells (all-cell initializing operation) and an initializing operation for generating initializing discharge in discharge cells that have undergone sustain discharge ( Selection initialization operation).

  In the address period, address discharge is selectively generated in the discharge cells to emit light to form wall charges. In the sustain period, a number of sustain pulses proportional to the luminance weight are alternately applied to the display electrode pairs, and a sustain discharge is generated in the discharge cells that have generated the address discharge to emit light. The proportional constant at this time is called luminance magnification. The details of the subfield configuration will be described later, and here, the driving voltage waveform and its operation in the subfield will be described.

  FIG. 4 is a drive voltage waveform diagram applied to each electrode of panel 10 in accordance with the exemplary embodiment of the present invention. FIG. 4 shows a subfield for performing the all-cell initializing operation and a subfield for performing the selective initializing operation.

  First, subfields for performing the all-cell initialization operation will be described.

  In the first half of the initialization period, 0 (V) is applied to the data electrodes D1 to Dm and the sustain electrodes SU1 to SUn, respectively, and the scan electrodes SC1 to SCn have a voltage lower than the discharge start voltage with respect to the sustain electrodes SU1 to SUn. A ramp waveform voltage that gradually increases from Vi1 toward a voltage exceeding the discharge start voltage is applied (hereinafter, the maximum value of the slowly increasing voltage applied to scan electrodes SC1 to SCn in the first half of the initialization period). (Quoted as “initialization voltage Vr”).

  While this ramp waveform voltage rises, a weak initializing discharge occurs between scan electrodes SC1 to SCn, sustain electrodes SU1 to SUn, and data electrodes D1 to Dm. Negative wall voltage is accumulated on scan electrodes SC1 to SCn, and positive wall voltage is accumulated on data electrodes D1 to Dm and sustain electrodes SU1 to SUn. Here, the wall voltage above the electrode represents a voltage generated by wall charges accumulated on the dielectric layer covering the electrode, the protective layer, the phosphor layer, and the like.

  In the initialization discharge at this time, the wall voltage is excessively stored in anticipation of optimizing the wall voltage in the second half of the subsequent initialization period. The excessive wall voltage stored in this way can be controlled by the initialization voltage Vr. As will be described in detail later, the value of the initialization voltage Vr is not always a constant voltage, but is changed as necessary.

  In the latter half of the initialization period, positive voltage Ve1 is applied to sustain electrodes SU1 to SUn, and scan electrodes SC1 to SCn receive a discharge start voltage from voltage Vi3 that is equal to or lower than the discharge start voltage with respect to sustain electrodes SU1 to SUn. A ramp waveform voltage (hereinafter referred to as a “ramp voltage”) that gradually falls toward the exceeding voltage Vi4 is applied. During this time, weak initializing discharges occur between scan electrodes SC1 to SCn, sustain electrodes SU1 to SUn, and data electrodes D1 to Dm, respectively. Then, the negative wall voltage above scan electrodes SC1 to SCn and the positive wall voltage above sustain electrodes SU1 to SUn are weakened, and the positive wall voltage above data electrodes D1 to Dm is adjusted to a value suitable for the write operation. The Thus, the all-cell initializing operation for performing the initializing discharge on all the discharge cells is completed.

  Since the discharge at this time depends on the excessive wall voltage stored in the first half of the initialization period, if the initialization voltage Vr is low and the initialization discharge in the first half of the initialization is weak, the initial stage of the second half of the initialization The discharge is weakened. Conversely, when the initialization voltage Vr is high, both initialization discharges become strong.

  In the subsequent address period, voltage Ve2 is applied to sustain electrodes SU1 to SUn, and voltage Vc is applied to scan electrodes SC1 to SCn.

  Next, the negative scan pulse voltage Va is applied to the scan electrode SC1 in the first row, and the data electrode Dk (k = 1 to m) of the discharge cell that should emit light in the first row among the data electrodes D1 to Dm. A positive address pulse voltage Vd is applied. At this time, the voltage difference at the intersection between the data electrode Dk and the scan electrode SC1 is the difference between the wall voltage on the data electrode Dk and the wall voltage on the scan electrode SC1 due to the difference between the externally applied voltages (Vd−Va). It becomes the sum and exceeds the discharge start voltage. Then, address discharge occurs between data electrode Dk and scan electrode SC1, and between sustain electrode SU1 and scan electrode SC1, positive wall voltage is accumulated on scan electrode SC1, and negative wall is applied on sustain electrode SU1. A voltage is accumulated, and a negative wall voltage is also accumulated on the data electrode Dk.

  In this manner, an address operation is performed in which an address discharge is caused in the discharge cells to be lit in the first row and wall voltage is accumulated on each electrode. On the other hand, the voltage at the intersection of the data electrodes D1 to Dm to which the address pulse voltage Vd is not applied and the scan electrode SC1 does not exceed the discharge start voltage, so that address discharge does not occur. The above address operation is performed until the discharge cell in the nth row, and the address period ends.

  In the subsequent sustain period, driving is performed using a power recovery circuit in order to reduce power consumption. The details of the drive voltage waveform will be described later, and here, an overview of the sustain operation in the sustain period will be described.

  First, positive sustain pulse voltage Vs is applied to scan electrodes SC1 to SCn, and 0 (V) is applied to sustain electrodes SU1 to SUn. Then, in the discharge cell in which the address discharge has occurred, the voltage difference between scan electrode SCi and sustain electrode SUi is the difference between the wall voltage on scan electrode SCi and the wall voltage on sustain electrode SUi. Exceeds the discharge start voltage.

  Then, a sustain discharge occurs between scan electrode SCi and sustain electrode SUi, and phosphor layer 35 emits light by the ultraviolet rays generated at this time. Then, a negative wall voltage is accumulated on scan electrode SCi, and a positive wall voltage is accumulated on sustain electrode SUi. Further, a positive wall voltage is accumulated on the data electrode Dk. In the discharge cells in which no address discharge has occurred during the address period, no sustain discharge occurs, and the wall voltage at the end of the initialization period is maintained.

  Subsequently, 0 (V) is applied to scan electrodes SC1 to SCn, and sustain pulse voltage Vs is applied to sustain electrodes SU1 to SUn. Then, in the discharge cell in which the sustain discharge has occurred, the voltage difference between the sustain electrode SUi and the scan electrode SCi exceeds the discharge start voltage, so that the sustain discharge occurs again between the sustain electrode SUi and the scan electrode SCi. A negative wall voltage is accumulated on SUi, and a positive wall voltage is accumulated on scan electrode SCi. Thereafter, similarly, the sustain period is applied to the scan electrodes SC1 to SCn and the sustain electrodes SU1 to SUn by alternately multiplying the luminance weight by the luminance magnification, and a potential difference is applied between the electrodes of the display electrode pair, thereby writing the address period. The sustain discharge is continuously performed in the discharge cell in which the address discharge has occurred in FIG.

  Then, at the end of the sustain period, a so-called narrow pulse voltage difference is applied between scan electrodes SC1 to SCn and sustain electrodes SU1 to SUn, and the positive wall voltage on data electrode Dk is left while scanning. The wall voltage on the electrode SCi and the sustain electrode SUi is erased.

  Next, the operation of the subfield that performs the selective initialization operation will be described.

  In the initializing period in which selective initialization is performed, voltage Ve1 is applied to sustain electrodes SU1 to SUn, 0 (V) is applied to data electrodes D1 to Dm, and voltage Vi3 ′ toward voltage Vi4 is applied to scan electrodes SC1 to SCn. Apply a slowly decreasing ramp voltage.

  Then, a weak initializing discharge is generated in the discharge cell that has caused the sustain discharge in the sustain period of the previous subfield, and the wall voltage on scan electrode SCi and sustain electrode SUi is weakened. For data electrode Dk, a sufficient positive wall voltage is accumulated on data electrode Dk by the last sustain discharge, so that an excessive portion of this wall voltage is discharged, and the wall voltage suitable for the write operation is obtained. Adjusted to

  On the other hand, the discharge cells that did not cause the sustain discharge in the previous subfield are not discharged, and the wall charges at the end of the initialization period of the previous subfield are maintained as they are. As described above, the selective initializing operation is an operation for selectively performing initializing discharge on the discharge cells that have undergone the sustain operation in the sustain period of the immediately preceding subfield.

  The operation in the subsequent address period is the same as the operation in the address period of the subfield that performs all-cell initialization, and thus description thereof is omitted. The operation in the subsequent sustain period is the same except for the number of sustain pulses.

  Next, the subfield configuration of the panel driving method in this embodiment will be described. In this embodiment, one field is divided into 10 subfields (first subfield, second subfield,..., Tenth subfield), and each subfield is (1, 2, 3, 6, 11, 18, 30, 44, 60, 80). However, the number of subfields and the luminance weight of each subfield are not limited to the above values.

  FIG. 5 is a diagram showing a subfield configuration according to the embodiment of the present invention. Each of the subfields is a subfield that performs an all-cell initializing operation in an initializing period (hereinafter referred to as “all-cell initializing subfield”). Or a subfield that performs selective initialization during the initialization period (hereinafter abbreviated as “selective initialization subfield”). 5, FIG. 6, FIG. 7, FIG. 13 and FIG. 14 show an outline of one field of the driving waveform of the panel. For details, the waveform in each period of each subfield is shown in FIG. It is as follows.

  In the present embodiment, the subfield configuration is switched based on the APL of the image signal to be displayed. FIG. 5A shows a configuration used when an APL is less than 6% for an image signal. Only the first subfield is an all-cell initialization subfield, and the second to tenth subfields are selective initialization subfields. It is a field. FIG. 5B shows a configuration used when an image signal having an APL of 6% or more is used. The first subfield and the fourth subfield are the all-cell initializing subfield, the second subfield, the third subfield, and the first subfield. The 5th subfield to the 10th subfield are selective initialization subfields. That is, when the APL is less than the threshold value of 6%, the number of subfields for performing the all-cell initialization operation within one field period (hereinafter abbreviated as “all-cell initialization count”) is one time. In the case of 6% or more, the sub-field configuration has a total cell initialization count of 2 times. Table 1 below shows the relationship between the above-described subfield configuration and APL.

  However, if the number of all-cell initializations is simply increased or decreased, the luminance of the black display area that should be constant, that is, the black luminance changes discontinuously, and the image display quality is degraded. Therefore, in the present embodiment, when the number of all cell initializations is increased or decreased depending on the APL, the value of the initialization voltage Vr applied to the scan electrode 22 is not simply increased or decreased but only the number of all cell initializations. The number of all-cell initializations is increased or decreased while gradually increasing or decreasing to alleviate a sudden change in black luminance. By controlling the initialization voltage Vr in this way, it is possible to reduce the change in black luminance when increasing or decreasing the number of all-cell initializations.

  FIG. 6 is a schematic diagram showing a change in the initialization voltage Vr applied to the scan electrode 22 in the initialization period in the embodiment of the present invention. Of the ten subfields included in one field period, This shows a temporal change in the driving waveform when the number of subfields including the number of times is increased from once to twice. In the example of FIG. 6, it is a figure which shows typically the change of the initialization voltage Vr in a 1st subfield and a 4th subfield. Here, the voltage value VrC indicates the set value of the initialization voltage Vr when the number of times of initialization of all cells is not changed, and the voltage value VrL and the voltage value VrH are the values of the initialization voltage Vr when the number of times of initialization of all cells is changed. The minimum value and the maximum value are shown.

  When the number of subfields having an initialization period for performing the all-cell initialization operation in one field period is increased from once to twice, as shown in FIGS. 6 (a) and 6 (b), The value of the initialization voltage Vr in one subfield is increased stepwise from the voltage value VrC before the increase, and after a certain time, the voltage value VrH is reached as shown in FIG.

  Next, as shown in FIG. 6D, the all-cell initialization operation is performed in the fourth subfield as well as the first subfield, and the values of the initialization voltage Vr in the first subfield and the fourth subfield are set to voltage values. The voltage value VrL, which is a voltage lower than VrC, is set. Here, the voltage value VrH and the voltage value VrL are one field period when the number of subfields for performing the all-cell initialization operation is one in one field and the initialization voltage Vr is the voltage value VrH. It is desirable that the black luminance and the black luminance in one field period when the number of all-cell initializations is two and the initialization voltage Vr is the voltage value VrL are set to be substantially equal.

  Then, as shown in FIG. 6 (e), the value of the initialization voltage Vr in the first subfield and the fourth subfield is gradually increased from the voltage value VrL, and the steady state is obtained over a certain period of time. The voltage value VrC is reached.

  Conversely, when the number of all cell initializations is decreased from two to one, the value of the initialization voltage Vr in the first subfield and the fourth subfield is decreased stepwise from the voltage value VrC to a certain level. The voltage value VrL is reached over time.

  Next, the initialization operation in the fourth subfield is switched to the selective initialization operation, and the value of the initialization voltage Vr in the first subfield is set to a voltage value VrH that is a voltage higher than the voltage value VrC. After that, the value of the initialization voltage Vr in the first subfield is decreased stepwise from the voltage value VrH, and reaches the voltage value VrC over a certain period of time.

  In this way, by controlling the initialization voltage Vr applied to the scan electrode 22 in the all-cell initialization period when changing the number of subfields having an initialization period in which all-cell initialization in one field is executed. The black luminance in the field immediately before the increase / decrease in the number of all cell initializations and the black luminance in the field immediately after the increase / decrease in the number of all cell initializations can be made substantially equal. Image display quality is improved by reducing the change in brightness and making the change in black brightness less noticeable.

  In the present embodiment, it is assumed that a threshold value of 6% is set for APL, and the number of times of executing all-cell initialization for one field is changed between once or twice based on APL. However, the present invention is not limited to the threshold value and the number of all-cell initializations described above, and may be set according to the panel characteristics, display image, and the like.

  Next, such an example will be described.

  FIG. 7 is a schematic diagram showing an example of a change in the initialization voltage Vr when the number of times of executing all-cell initialization in one field is increased from 2 times to 3 times.

  In FIG. 7, it is assumed that the sixth subfield is switched to the all-cell initialization subfield in addition to the all-cell initialization subfield of the first subfield and the fourth subfield.

  When the number of times of executing all-cell initialization in one field is increased from 2 times to 3 times, as shown in FIGS. 7A and 7B, the initialization voltage Vr in the first subfield is a voltage. While maintaining the value VrC, the value of the initialization voltage Vr in the fourth subfield is increased stepwise from the voltage value VrC (V) before the increase, and after a certain time, as shown in FIG. To reach the voltage value VrH.

  Next, as shown in FIG. 7D, the all-cell initialization operation is performed in the sixth subfield as well as the first subfield and the fourth subfield, and the initialization voltage Vr in the first subfield is set to the voltage value VrC. While maintaining, the value of the initialization voltage Vr in the fourth subfield and the sixth subfield is set to the voltage value VrL which is a voltage lower than the voltage value VrC. Here, the voltage value VrH and the voltage value VrL are the number of times that the initialization of all the cells in one field is executed twice, the initialization voltage Vr in the first subfield is the voltage value VrC, and the initialization in the fourth subfield. When the voltage Vr is the voltage value VrH, the black luminance is that the number of all cell initializations is 3, the initialization voltage Vr of the first subfield is the voltage value VrC, and the fourth subfield and the sixth subfield. The initialization voltage Vr in the field is set to be equal to the black luminance when the voltage value is VrL.

  Then, as shown in FIG. 7E, the value of the initialization voltage Vr in the fourth subfield and the sixth subfield is increased stepwise from the voltage value VrL, and the voltage value VrC is taken over a certain period of time. To reach.

  Conversely, when the number of times of performing all-cell initialization in one field is decreased from three to two, the initialization voltage Vr in the first subfield is kept at the voltage value VrC, and the fourth subfield and the second subfield are maintained. The value of the initialization voltage Vr in the 6 subfields is lowered stepwise from the voltage value VrC, and reaches a voltage value VrL over a certain period of time.

  Next, the sixth subfield is switched to the selective initialization subfield, and the initialization voltage Vr in the fourth subfield is changed to the voltage value while the initialization voltage Vr in the first subfield is kept at the voltage value VrC. The voltage value VrH, which is a voltage higher than VrC, is set. Thereafter, the value of the initialization voltage Vr in the fourth subfield is decreased stepwise from the voltage value VrH, and reaches a voltage value VrC over a certain period of time.

  In this way, even if the number of times of initializing all cells in one field is three times or more, the same control can be performed.

  In the above description, the initialization voltage Vr of the first subfield is assumed to be a constant value. However, the black luminance between the time immediately before and after the number of all-cell initializations is increased or decreased is not significantly changed. It is only necessary that the initialization voltage Vr of each all-cell initialization subfield is set.

  That is, increase the number of all-cell initializing subfields by increasing the initializing voltage of at least one subfield of all-cell initializing subfields in the field immediately before increasing the number of all-cell initializing subfields of one field. What is necessary is just to set higher than the initialization voltage of the at least 2 subfield of all the cell initialization subfields in the field immediately after making it carry out.

  In addition, the initialization voltage of at least two of the all-cell initialization subfields in the field immediately before reducing the number of all-cell initialization subfields in one field is reduced, and the number of all-cell initialization subfields is reduced. What is necessary is just to set lower than the initialization voltage of the at least 1 subfield of all the cell initialization subfields in the field immediately after carrying out.

  Further, when the APL of the image signal further changes during the operation of changing the number of times of initialization of all cells in one field, it is desirable that the black luminance may change discontinuously if the operation is interrupted during the operation. Absent. Therefore, once the operation for changing the number of times of executing the initialization of all cells in one field is started, it is desirable to prohibit entry to the next change operation until the operation is completed.

  For example, when it becomes necessary to change the number of all-cell initializations from 1 to 3 times, the number of executions of 1-cell all-cell initialization is changed from 1 to 2 and then all-cell initialization for 1 field is performed. What is necessary is just to change the frequency | count of performing 2 from 3 times.

Next, a method of setting the voltage value VrL and the voltage value VrH when changing the number of times of executing the initialization of all cells in one field in this way will be described. FIG. 8 is a diagram showing an example in which the relationship between the value of the initialization voltage Vr per number of times of executing all-cell initialization in one field and the black luminance at that time is measured. In the measurement example of this panel, when the initialization voltage Vr is 330 (V) or less, no discharge occurs, and thus the black luminance is 0 (cd / cm ² ). The initialization operation at this time is substantially the same as the selective initialization operation.

When the initialization voltage Vr is 330 (V) or higher, the black luminance increases at a rate of approximately 0.05 (cd / cm ² ) every time the initialization voltage Vr increases by 20 (V), and the initialization voltage Vr is 370. When (V), the black luminance is 0.1 (cd / cm ² ), when the initialization voltage Vr is 390 (V), the black luminance is 0.15 (cd / cm ² ), and the initialization voltage Vr is 410 (V ), The black luminance is 0.2 (cd / cm ² ), and when the initialization voltage Vr is 450 (V), the black luminance is 0.3 (cd / cm ² ).

  As described above, the initialization voltage Vr increases and the black luminance also increases. However, when the initialization voltage Vr is between 330 (V) and 370 (V), abnormal discharge occurs during the all-cell initialization operation. It became clear that there was a possibility of doing. When an abnormal discharge occurs in a discharge cell, abnormal wall charges accumulate in the discharge cell, and a sustain discharge occurs in the sustain period regardless of the subsequent address discharge (hereinafter referred to as “initial stage”). Abbreviated as “abnormalization”), and the image display quality is significantly deteriorated. Therefore, it is not desirable to set initialization voltage Vr to a voltage that may cause initialization abnormality.

Then, the voltage value VrL and the voltage value VrH are set so as to avoid a voltage that may cause initialization abnormality and to suppress discontinuous fluctuations in black luminance. In this embodiment, the black luminance is 0.15 (cd / cm ² ) when the initialization voltage Vr = 390 (V) in the voltage range in which the initialization abnormality does not occur, and the initialization voltage Vr is 450. Focusing on the fact that the black luminance at (V) is 0.3 (cd / cm ² ), which is twice that, the voltage value VrH was set to 450 (V) and the voltage value VrL was set to 390 (V). Further, the voltage value VrC of the all-cell initializing operation in the steady state was set to 410 (V) therebetween.

With this setting, when the number of times of executing all-cell initialization in one field is changed from once to twice, the black luminance when the initialization voltage Vr in the first subfield is the voltage value VrH is set. A value of 0.3 (cd / cm ² ) and a black luminance value of 0.15 + 0.15 = 0.3 (cd / cm) when the initialization voltage Vr in the first subfield and the fourth subfield is the voltage value VrL ² ) is equal, and the black luminance at the time of changing the number of times of executing all-cell initialization in one field can be continuously changed, so that the fluctuation of the black luminance is hardly noticeable and the image display quality is improved. Can be made.

  In the present embodiment, since the voltage value VrC in the steady state is set to a value between the voltage value VrL and the voltage value VrH, the number of times of executing all-cell initialization in one field is changed from once to twice. When increasing the initialization voltage Vr of the first subfield from VrC to VrH, the number of initializations is increased to 2, and then the initialization voltage Vr of the first subfield and the fourth subfield is increased from VrL to VrC. Was raised.

  However, the present invention is not limited to the driving method described above, and it is only necessary to control the initialization voltage Vr so as to alleviate a sudden change in black luminance when changing the number of times of performing one-cell all-cell initialization. . For example, when the initialization voltage Vr in the steady state is set to the voltage value VrL = 390 (V), when the number of times of initializing all cells in one field is increased from once to twice, the first sub If the initialization voltage Vr of the field is increased stepwise from the voltage value VrL to the voltage value VrH, then the initialization voltage Vr of the first subfield and the fourth subfield is set to the voltage value VrL and the number of initializations is increased to twice. Good.

  Further, when the voltage value VrC in the steady state is set to the voltage value VrH = 450 (V), when the number of times of executing all-cell initialization in one field is increased from once to twice, the first subfield If the initialization voltage Vr remains at the voltage value VrL, the number of initializations is increased to 2 and then the initialization voltage Vr of the first subfield and the fourth subfield is increased stepwise from the voltage value VrL to the voltage value VrH. Good. The same applies to a case where the number of times of executing all-cell initialization in one field is reduced.

  Also, when changing the number of times of initializing all cells in one field from 2 times to 3 times, or when changing the number of times to more than that, the black voltage is continuously controlled by similarly controlling the initialization voltage Vr. Can be changed.

  In this way, in a plurality of consecutive fields until the number of all-cell initialization subfields in one field is increased, the initialization voltage in at least one subfield among all-cell initialization subfields is increased stepwise. The initializing voltage in at least one of the all-cell initializing subfields may be decreased stepwise in a plurality of consecutive fields after the number of all-cell initializing subfields is decreased. .

  Alternatively, in a plurality of consecutive fields after increasing the number of all-cell initialization subfields in one field, the initialization voltage in at least two subfields of all-cell initialization subfields is increased stepwise. In the plurality of continuous fields until the number of all-cell initialization subfields is decreased, the initialization voltage in at least two of the all-cell initialization subfields may be decreased stepwise.

  Note that the voltage value VrL, the voltage value VrH, and the voltage value VrC applied to the scan electrode 22 in the all-cell initializing period are not limited to the above-described embodiment, and are optimally set according to the panel characteristics. Is desirable.

  Here, in the present embodiment, the speed of change of the initialization voltage Vr is set to 2.5 (V / field), and the above-described operation for changing the number of times of executing all-cell initialization of one field is performed. The time required, that is, the time from when the initializing voltage starts to rise or fall when the number of all-cell initializing subfields is increased or decreased to the preset voltage (hereinafter referred to as “change time”). (Abbreviated) is approximately 0.4 seconds.

  Specifically, when the number of times of executing all-cell initialization in one field is changed from once to twice, the initialization voltage Vr in the first subfield is changed from the voltage value VrC = 410 (V) to the voltage value VrH = It takes 16 fields and approximately 0.27 seconds to increase to 450 (V), and the initialization voltage Vr of the first subfield and the fourth subfield is changed from the voltage value VrL = 390 (V) to the voltage value VrC = 410. It takes 8 fields, approximately 0.13 seconds to increase to (V), and the total change time is 0.40 seconds.

  As described above, if the change time is too short, the change in black luminance is conspicuous and the image display quality is deteriorated. However, if the change time is too long, it has been found that the change time is visually uncomfortable and not so preferable. This visual discomfort is considered to occur because the light emission period accompanying the all-cell initialization operation changes discontinuously when the number of initializations is changed.

FIG. 9 is a diagram for explaining the reason why the change in the number of initializations gives a sense of incongruity to vision. For example, when the number of times of executing the initialization of all cells in one field is changed from two to one, the initialization voltage Vr in the first subfield and the fourth subfield immediately before the change is the voltage value VrL = 390 (V). The light is emitted at a cycle of 2 times per field. However, since the periodic light emission is integrated and recognized by the human eye, the black luminance is felt as a constant constant brightness, 0.15 cd / cm ² .

  However, immediately after changing the number of times of initializing all cells in one field from two times to one, the initializing voltage Vr in the first subfield is 450 (V), and the instantaneous light emission luminance is doubled. . The human eye recognizes this momentary difference in light emission luminance, and the black luminance appears to increase for a moment.

Since the subsequent light emission becomes light emission for each field, it returns to 0.15 cd / cm ² on average. However, it was found that an instantaneous luminance increase immediately after the change is recognized as flicker and the image display quality is lowered.

  The inventors investigated the relationship between the change time and the visual discomfort. FIG. 10 is a diagram showing the results, and is the result of evaluating the tolerance of changes in flicker and black luminance with respect to the change time.

  In this way, the change in flicker and black luminance is in a trade-off relationship.If the change time is too long, the change in black luminance is alleviated, but flicker is noticeable. Conversely, if the change time is too short, flicker is visible. Although it becomes difficult, a change in black luminance is easily noticeable. Although depending on the image to be displayed, as shown in FIG. 10, in order to prevent flicker from being noticeable and to suppress the change in black luminance to some extent, the value of the change time is 0.2 seconds or more. It was found that setting it to 6 seconds or less is desirable.

  It has also been found that it is more desirable to set the value of the change time between 0.2 seconds and 0.8 seconds. In the present embodiment, the change time is set to 0.4 seconds based on this result.

  Next, a method for controlling the initialization voltage Vr in the all-cell initialization operation will be described. FIG. 11 is a circuit diagram of scan electrode driving circuit 53 in the present embodiment.

  Scan electrode driving circuit 53 includes sustain pulse generation circuit 100 that generates a sustain pulse, initialization waveform generation circuit 300 that generates an initialization waveform, and scan pulse generation circuit 400 that generates a scan pulse.

  Sustain pulse generation circuit 100 includes a power recovery circuit 110 for recovering and reusing power when driving scan electrode 22, switching element S <b> 1 for clamping scan electrode 22 to voltage Vs, and scan electrode 22. And a switching element S2 for clamping the voltage to 0 (V). The scan pulse generation circuit 400 sequentially applies scan pulses to the scan electrodes 22 in the address period. Scan pulse generation circuit 400 outputs the voltage waveform of sustain pulse generation circuit 100 or initialization waveform generation circuit 300 as it is during the initialization period and the sustain period.

  The initialization waveform generation circuit 300 includes Miller integration circuits 310 and 320, generates the above-described initialization waveform, and controls the initialization voltage Vr in the all-cell initialization operation. Miller integrating circuit 310 includes FET1, capacitor C1, and resistor R1, and generates a ramp voltage that gradually increases in a ramp shape to a predetermined initialization voltage Vr. Miller integrating circuit 320 includes FET2, capacitor C2, and resistor R1. R2 is generated, and a ramp voltage that gradually decreases in a ramp shape up to voltage Vi4 is generated. In FIG. 11, the input terminals of Miller integrating circuits 310 and 320 are shown as terminal IN1 and terminal IN2, respectively.

  In this embodiment, a Miller integrating circuit using a FET that is practical and has a relatively simple configuration is employed as the initialization waveform generating circuit 300. However, the present invention is not limited to this configuration. Any circuit may be used as long as it can generate the ramp voltage while controlling the activation voltage Vr.

  Next, the operation of the initialization waveform generation circuit 300 will be described. FIG. 12 is a timing chart for explaining the operation of the scan electrode driving circuit 53 in the all-cell initializing period, and is a detailed timing chart of a portion surrounded by a broken line in FIG. Here, the drive voltage waveform for performing the all-cell initialization operation is divided into four periods indicated by T1 to T4, and each period will be described. In the following description, it is assumed that the voltage Vi1, the voltage Vi3, and the voltage Vi3 'are all equal to the voltage Vs. In the following description, the operation of turning on the switching element is turned on and the operation of turning off the switching element is expressed as off.

(Period T1)
First, switching element S1 of sustain pulse generating circuit 100 is turned on. Then, the voltage Vs is applied to the scanning electrode 22 via the switching element S1. Thereafter, the switching element S1 is turned off.

(Period T2)
Next, the input terminal IN1 of the Miller integrating circuit 310 is set to “high level”. Specifically, for example, a voltage of 15 (V) is applied to the input terminal IN1. Then, a constant current flows from the resistor R1 toward the capacitor C1, the source voltage of the FET 1 rises in a ramp shape, and the output voltage of the scan electrode driving circuit 53 starts to rise in a ramp shape.

  This voltage increase continues while the input terminal IN1 is at “high level”. When the output voltage rises to the necessary initialization voltage Vr, the input terminal IN1 is then set to “low level”.

  In this manner, a ramp voltage that gradually increases from the voltage Vs that is equal to or lower than the discharge start voltage toward the initialization voltage Vr that exceeds the discharge start voltage is applied to the scan electrode 22. At this time, if the time tr during which the input terminal IN1 is set to “high level” is lengthened, the initialization voltage Vr can be increased, and if the time tr is shortened, the initialization voltage Vr can be decreased.

(Period T3)
Next, switching element S1 of sustain pulse generating circuit 100 is turned on. Then, the voltage of the scan electrode 22 is lowered to the voltage Vs. Thereafter, the switching element S1 is turned off.

(Period T4)
Next, the input terminal IN2 of the Miller integrating circuit 320 is set to “high level”. Specifically, for example, a voltage of 15 (V) is applied to the input terminal IN2. Then, a constant current flows from the resistor R2 toward the capacitor C2, the drain voltage of the FET 2 decreases in a ramp shape, and the output voltage of the scan electrode driving circuit 53 starts to decrease in a ramp shape. Then, after the output voltage reaches the negative voltage Vi4, the input terminal IN2 is set to “low level”. In this way, a ramp voltage that gently falls from the voltage Vs toward the voltage Vi4 is applied to the scan electrode 22.

  As described above, the ramp voltage that gradually increases from the voltage Vi1 that is equal to or lower than the discharge start voltage to the initialization voltage Vr that exceeds the discharge start voltage is applied to the scan electrode 22, and then the voltage Vi3 to the voltage Vi4. A ramp voltage that gradually falls toward is applied.

  As described above, the flicker associated with the change in the number of initializations is the moment when the light emission twice per field is changed to light emission twice per luminance once per field. It is considered that this occurs due to the recognition of the luminance change. In this embodiment, the two-time all-cell initialization operation is performed in the first subfield and the fourth subfield, and the timing of light emission in one field is separated in time. It is considered that the difference from light emission is conspicuous.

  Therefore, when the number of times of performing all-cell initialization in one field is decreased from two times to one, first, the two-time all-cell initialization subfield is set as, for example, a first subfield and a second subfield. It is also possible to reduce the number of times that the initialization of all cells in one field is performed after the timing of light emission within the time is approached.

  (Embodiment 2) described below is a method of changing the number of times of executing all-cell initialization of one field based on such an idea.

(Embodiment 2)
The subfield configuration in the present embodiment will be described as being the same as in (Embodiment 1). That is, when the APL is less than 6%, only the first subfield is an all-cell initialization subfield, and when the APL is 6% or more, the first and fourth subfields are all-cell initialization subfields.

  FIG. 13 is a schematic diagram showing a change in the initialization voltage Vr applied to the scan electrode 22 in the initialization period in the present embodiment. The number of times of executing all-cell initialization in one field (hereinafter referred to as all-cell initialization). It is a figure which shows typically the change of the initialization waveform of each subfield when increasing from 1 time to 2 times. Also in the present embodiment, the voltage value VrC indicates a set value of the initialization voltage Vr when the number of all-cell initializations is not changed, and the voltage value VrL and the voltage value VrH are initializations when the number of all-cell initializations is changed. The minimum value and the maximum value of the voltage Vr are shown, respectively.

  When the number of times of initialization of all cells in one field is increased from 1 to 2, as shown in FIGS. 13A and 13B, the value of the initialization voltage Vr in the first subfield is increased before the increase. The voltage value is gradually increased from the voltage value VrC, and reaches a voltage value VrH after a certain time.

  Next, as shown in FIG. 13 (c), all cells are initialized in the second subfield together with the first subfield, and the initialization voltage Vr in the first and second subfields is set. The voltage value VrL, which is a voltage lower than the voltage value VrC, is set. Similarly to (Embodiment 1), voltage value VrH and voltage value VrL are all cell initialization times when the number of all cell initializations is one and initialization voltage Vr is voltage value VrH. It is set to be equal to the black luminance when the number of times is two and the initialization voltage Vr is the voltage value VrL.

  Thereafter, as shown in FIG. 13 (d), the second subfield is switched to the selective initialization subfield, the third subfield is switched to the all-cell initialization subfield, and thereafter, as shown in FIG. 13 (e). In addition, the third subfield is switched to the selective initialization subfield and the fourth subfield is switched to the all-cell initialization subfield.

  Then, as shown in FIG. 13 (f), the value of the initialization voltage Vr in the first subfield and the fourth subfield is gradually increased from the voltage value VrL, and the steady state is obtained over a certain period of time. The voltage value VrC is reached.

  Conversely, when the number of initializations is decreased from two to one, the value of the initialization voltage Vr in the first subfield and the fourth subfield is gradually decreased from the voltage value VrC to reach the voltage value VrL. Make it. Next, the fourth subfield is switched to the selective initialization subfield and the third subfield is switched to the all-cell initialization subfield. Thereafter, the third subfield is switched to the selective initialization subfield and the second subfield is switched to Switch to the all cell initialization subfield. Thereafter, the initialization operation of the second subfield is switched to selective initialization, and the value of the initialization voltage Vr of the first subfield is set to the voltage value VrH. After that, the value of the initialization voltage Vr in the first subfield is gradually decreased from the voltage value VrH to reach the voltage value VrC.

  In this manner, first, the number of all cell initializations is increased / decreased in subfields arranged before and after the all cell initialization subfield, and then the subfield for performing the all cell initialization operation is moved to a predetermined subfield. In addition, by sequentially switching the initialization operation of each subfield, the number of all-cell initializations can be changed without causing flicker or the like.

  That is, when the number of all-cell initialization subfields in one field is increased, all-cell initialization is performed on the subfield that executes selective initialization immediately before or after the subfield that executes all-cell initialization. When switching to the subfield to be executed and reducing the number of all-cell initializing subfields, one of the continuously arranged all-cell initializing subfields is switched to the selective initializing subfield, When switching the all-cell initialization subfield and the selection initialization subfield without increasing or decreasing the number of initialization subfields and moving the subfield for performing the all-cell initialization operation to a predetermined subfield, All cell initialization subfields placed immediately before or after the activation subfield are switched to selective initialization and all cells Last or selective initializing subfield that is located immediately after the initializing subfield may be switched to the all-cell initializing subfield.

  In the above description, when the number of all-cell initialization is increased, the operation after switching the second subfield arranged immediately after the first subfield to the all-cell initialization subfield is performed as the all-cell initialization. The method of bringing the initialization voltage Vr to a predetermined value after moving the subfield for performing the initialization operation from the second subfield to the fourth subfield has been described.

  However, after the initialization voltage Vr is first reached to a predetermined value, the all-cell initialization subfield may be moved to the predetermined subfield, or the all-cell initialization subfield may be moved to the predetermined subfield. However, even if the initialization voltage Vr reaches a predetermined value, the same effect can be obtained. The same applies when reducing the number of all-cell initializations.

  In addition, even if the number of all cell initializations is 2 or more and the number of all cell initializations is increased or decreased, all cell initialization is performed in the subfield arranged immediately before or after the all cell initialization subfield. By changing the initialization operation of each subfield sequentially so that the subfield to be initialized to all cells is moved to a predetermined subfield, all cell initialization is performed without causing flicker or the like. The number of times can be changed.

(Embodiment 3)
The panel driving method in this embodiment is another driving method that suppresses flicker associated with a change in the number of initializations, and is a method that suppresses flicker by suppressing the emission luminance of all cell initialization subfields to be increased or decreased. is there.

  The subfield configuration in the present embodiment is also described as being the same as in (Embodiment 1). That is, when the APL is less than 6%, only the first subfield is an all-cell initialization subfield, and when the APL is 6% or more, the first and fourth subfields are all-cell initialization subfields.

  FIG. 14 is a schematic diagram showing a change in the initialization voltage Vr applied to the scan electrode 22 during the initialization period in the present embodiment. Each subcell when the number of all-cell initializations is increased from 1 to 2 is shown. It is a figure which shows typically the change of the initialization waveform of a field. Also in this embodiment, the description will be made assuming that the relationship between the black luminance of the panel and the initialization voltage Vr is the relationship shown in FIG.

  When the number of all-cell initializations is increased from 1 to 2, as shown in FIGS. 14A and 14B, the value of the initialization voltage Vr in the first subfield is increased to 410 (V ) In steps, and after a certain period of time, it reaches 470 (V). Next, as shown in FIG. 14C, the all-cell initialization operation is performed in the fourth subfield together with the first subfield. The initialization voltage Vr at this time is, for example, 430 (V) for the first subfield and 370 (V) for the fourth subfield.

  The initialization voltage Vr of each subfield has the same black luminance before and after the increase in the number of initializations, and the newly increased all-cell initialization subfield, in this embodiment, the black luminance by the fourth subfield. The original all-cell initialization subfield is set to be smaller than the black luminance of the first subfield in this embodiment.

Actually, as shown in FIG. 8, when the initialization voltage Vr is 470 (V), the black luminance by the first subfield is 0.35 (cd / cm ² ), and the initialization voltage Vr is 430 (V ) (Black luminance 0.25 (cd / cm ² ) due to the first subfield and black luminance 0.10 (cd / cm ² ) due to the fourth subfield when the initialization voltage Vr is 370 (V). ) And the sum. Further, the black luminance 0.10 (cd / cm ² ) due to the fourth subfield is less than half the black luminance 0.25 (cd / cm ² ) due to the first subfield.

  Thereafter, as shown in FIG. 14D, the initialization voltage Vr in the first subfield is gradually decreased from 430 (V) to 410 (V), and the initialization voltage Vr in the fourth subfield is obtained. Is gradually increased from 370 (V) to 410 (V).

  Conversely, when the number of initializations is decreased from two to one, the initialization voltage Vr in the first subfield is increased stepwise from 410 (V) to 430 (V), and the fourth sub The initializing voltage Vr in the field is gradually decreased from 410 (V) to 370 (V). Next, the fourth subfield is switched to the selective initialization subfield, and the initialization voltage Vr of the first subfield is set to 470 (V).

  The initialization voltage Vr at this time also has the same black luminance before and after the decrease in the number of initializations, and all cells in which the black luminance by the all-cell initialization subfield immediately before switching to the selection initialization is not switched to the selection initialization. It is set to be smaller than the black luminance by the initialization subfield. After that, the initialization voltage Vr of the first subfield is gradually decreased from 470 (V) to 410 (V).

  Thus, in the field immediately after increasing the number of all-cell initialization subfields, the increased initialization voltage of all-cell initialization subfields is lower than the initialization voltage of other all-cell initialization subfields. In the field immediately before reducing the number of all-cell initialization subfields, the initialization voltage of the all-cell initialization subfield to be decreased is set lower than the initialization voltage of the other all-cell initialization subfields. The black luminance is the same before and after the change in the number of cell initializations, and the black luminance by the subfield for switching between the all-cell initialization operation and the selective initialization scan does not switch between the all-cell initialization operation and the selective initialization scan. Since it is smaller than the black luminance due to the subfield, the flicker becomes inconspicuous.

  At this time, in the field immediately after increasing the number of all-cell initializing subfields, the emission luminance due to the initializing discharge of the increased all-cell initializing subfield is due to the initializing discharge of the other all-cell initializing subfields. In the field immediately before decreasing the number of all-cell initialization subfields, which is lower than 1/2 of the emission luminance, the emission luminance due to the initialization discharge of the all-cell initialization subfield to be decreased is the other all-cell initialization subfield. It is further desirable to control the initialization voltage so as to be lower than 1/2 of the light emission luminance due to the initialization discharge.

  In (Embodiment 1) to (Embodiment 3), if a hysteresis characteristic is provided when increasing / decreasing the number of all-cell initializations, frequent fluctuations in black luminance can be suppressed, further improving image display quality. Can be made. A method for providing hysteresis characteristics when increasing / decreasing the number of all-cell initializations will be described below.

  Table 2 shows the relationship between APL and the number of all-cell initializations. In (Embodiment 2), as in (Embodiment 1), the number of times of all-cell initialization is increased or decreased based on APL. This is an example having a hysteresis characteristic.

  The second difference from Table 1 above is that the APL value and the number of all-cell initializations do not necessarily correspond one-to-one, but an APL range in which the number of all-cell initializations is not uniquely determined is provided. However, if the APL is 5% or more and less than 7%, the number of times of initialization of all cells is either once or twice. Thereby, a hysteresis characteristic can be provided when increasing or decreasing the number of all-cell initializations based on APL.

  Specifically, when APL decreases and the number of times of all cell initialization is reduced from 2 times to 1, when APL becomes less than 7%, the number of times of all cell initialization is not reduced, but APL is 5%. Decrease from 2 to 1 when less. Conversely, when APL increases and the number of all-cell initializations is increased from 1 to 2, it does not increase when APL becomes 5% or more, but increases when APL becomes 7% or more. Increase from 2 times to 2 times.

  By controlling in this way, for example, when the APL changes with time as “8, 6, 4, 6, 5, 3,... (%)”, As shown in Table 1, the hysteresis characteristics If the number of times of initializing all cells is frequently changed to “2, 2, 1, 2, 1, 1,... As a result, the desired black luminance frequently fluctuates, and the image display quality deteriorates. However, in the present embodiment, as shown in Table 2, since the hysteresis characteristic is provided when the number of all-cell initialization subfields is changed, the number of all-cell initializations is “2, 2, 1, 1, 1, 1,... (Times) ”, and the frequency of black luminance change can be reduced.

  In this way, by providing hysteresis characteristics when changing the number of all-cell initializations, the number of initializations does not change frequently even if the image is as described above, and the black luminance changes frequently. Can be prevented.

  Although the present embodiment has been described on the assumption that the number of all-cell initializations is changed based on APL, the panel driving method of the present invention is also used when the number of all-cell initializations is changed based on other parameters. Can be applied. Other parameters for changing the number of all-cell initializations may be, for example, panel temperature, panel usage time, or the like.

  In this embodiment, the xenon partial pressure of the discharge gas is set to 10%. However, even if the xenon partial pressure is other than that, the driving voltage corresponding to the panel may be set.

  Furthermore, the specific numerical values used in the present embodiment are merely examples, and it is desirable to appropriately set the optimal values appropriately according to the panel characteristics, the specifications of the plasma display device, and the like.

  The present invention stabilizes the address discharge by increasing / decreasing the number of all-cell initializations, and at the same time makes the fluctuation of black luminance less noticeable, thereby improving the image display quality. It is useful as a panel driving method and a plasma display device to be used.

The disassembled perspective view which shows the structure of the panel in embodiment of this invention The figure which shows the electrode arrangement of the panel Circuit block diagram of plasma display device in accordance with exemplary embodiment of the present invention Drive voltage waveform diagram applied to each electrode of the panel in the embodiment of the present invention The schematic diagram which shows the subfield structure in this Embodiment of this invention The schematic diagram which shows the change of the initialization voltage in (Embodiment 1) of this invention The schematic diagram which shows the change of the initialization voltage in (Embodiment 1) of this invention The figure which shows the relationship between the value of the initialization voltage per 1 time of all-cell initialization, and the black luminance at that time Illustration for explaining why changing the number of initializations gives a sense of incongruity to vision The figure which shows the evaluation result of the tolerance of the change of flicker and black luminance with respect to change time Circuit diagram of scan electrode driving circuit in an embodiment of the present invention Timing chart for explaining the operation of the scan electrode driving circuit The schematic diagram which shows the change of the initialization voltage in (Embodiment 2) of this invention The schematic diagram which shows the change of the initialization voltage in (Embodiment 3) of this invention

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 Panel 21 Front substrate 22 Scan electrode 23 Sustain electrode 24, 33 Dielectric layer 25 Protective layer 31 Back substrate 32 Data electrode 34 Partition 35 Phosphor layer 51 Image signal processing circuit 52 Data electrode drive circuit 53 Scan electrode drive circuit 54 Sustain electrode Drive circuit 55 Timing generation circuit 57 APL detection circuit 100 Sustain pulse generation circuit 300 Initialization waveform generation circuit 310, 320 Miller integration circuit 400 Scan pulse generation circuit

Claims (2)

A method of driving a plasma display panel comprising a plurality of discharge cells having a display electrode pair consisting of a scan electrode and a sustain electrode,
One field of the input image signal is generated by an initialization period for applying an initialization voltage for generating an initialization discharge in the discharge cell, an address period for generating an address discharge in the discharge cell, and the address discharge. A plurality of subfields having a sustain period for generating a sustain discharge in the discharge cells, wherein the subfield generates all the initializing discharges for all the discharge cells performing image display in the initializing period. A cell initializing subfield, and a selective initializing subfield for selectively generating an initializing discharge in a discharge cell in which a sustaining discharge has occurred in an immediately preceding subfield in the initializing period, and detecting an average luminance level, when the average luminance level is changed when the case is less than a predetermined threshold value equal to or greater than the predetermined threshold Configured to the selective initializing subfields can increase the number of all-cell initializing subfield by switching to the all-cell initializing subfield,
When the number of all-cell initialization subfields is increased, the initialization of at least one of the all-cell initialization subfields in the field immediately before the field in which the number of all-cell initialization subfields is increased is performed. A plasma display panel, wherein the voltage is higher than the initialization voltage of at least two of the all-cell initialization subfields in the field immediately after the number of all-cell initialization subfields is increased. Driving method. A method of driving a plasma display panel comprising a plurality of discharge cells having a display electrode pair consisting of a scan electrode and a sustain electrode,
One field of the input image signal is generated by an initialization period for applying an initialization voltage for generating an initialization discharge in the discharge cell, an address period for generating an address discharge in the discharge cell, and the address discharge. A plurality of subfields having a sustain period for generating a sustain discharge in the discharge cells, wherein the subfield generates all the initializing discharges for all the discharge cells performing image display in the initializing period. A cell initializing subfield, and a selective initializing subfield for selectively generating an initializing discharge in a discharge cell in which a sustaining discharge has occurred in an immediately preceding subfield in the initializing period, and detecting an average luminance level, when the average luminance level is changed when the case of more than a predetermined threshold below the predetermined threshold Wherein configured to the all-cell initializing subfield can reduce the number of all-cell initializing subfield by switching the selective initializing subfield,
When the number of all-cell initialization subfields is decreased, the initialization of at least two subfields among all-cell initialization subfields in the field immediately before the field in which the number of all-cell initialization subfields is decreased is performed. A plasma display panel, wherein the voltage is lower than the initialization voltage of at least one subfield of all cell initialization subfields in a field immediately after the number of all cell initialization subfields is decreased. Driving method.

Images