JP5277068B2 - 基板間の接続方法、フリップチップ実装体及び基板間接続構造 - Google Patents
基板間の接続方法、フリップチップ実装体及び基板間接続構造 Download PDFInfo
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- JP5277068B2 JP5277068B2 JP2009114842A JP2009114842A JP5277068B2 JP 5277068 B2 JP5277068 B2 JP 5277068B2 JP 2009114842 A JP2009114842 A JP 2009114842A JP 2009114842 A JP2009114842 A JP 2009114842A JP 5277068 B2 JP5277068 B2 JP 5277068B2
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Description
図1(a)〜(d)は、発明の実施の形態1における基板間の接続方法の工程を示した断面図である。
図5は、本発明の実施の形態2における基板間の接続方法を示した図で、(a)はその斜視図、(b)は(a)のIVb−IVbに沿った断面図、(c)は(a)のIVc−IVcに沿った断面図である。なお、本実施形態において、実施の形態1と同様の構成については同じ符号を記している。また、特に記述がない限り、実施の形態1と同様であり、その詳細な説明は省略する。
図9は、本発明の実施の形態3における基板間の接続方法を示した図で、(a)はその平面図、(b)は(a)のIXb−IXbに沿った断面図である。なお、本実施形態において、実施の形態1と同様の構成については同じ符号を記している。また、特に記述がない限り、実施の形態1と同様であり、その詳細な説明は省略する。
第1の基板10として回路基板を用い、第2の基板12として半導体チップを用いて、図1(a)〜(d)に示した基板間の接続方法により、回路基板と半導体チップとのフリップチップ実装体を作製した。
実施例1と同様の部材及び方法により、回路基板と半導体チップとのフリップチップ実装体を作製した。
第1の基板10及び第2の基板12として回路基板を用いて、図1(a)〜(d)に示した基板間の接続方法により、回路基板同士を接続した基板間接続構造を作製した。
第1及び第2の回路基板の段差厚みを15μm、電極が形成されていない部位における基板間距離L1を50μm、段差部における基板間距離L2を20μm、はんだ粉の粒径を25μmとした以外は、実施例3と同様の部材、及び方法により、回路基板同士を接続した基板間接続構造を作製した。
第1の基板10及び第2の基板12として回路基板を用いて、図1(a)〜(d)に示した基板間の接続方法により、回路基板同士を接続した基板間接続構造を作製した。
図2(a)に示したパターンの段差部16に代わりに、図10に示したパターンの段差部を用いた以外は、実施例1と同様の部材、及び方法により、回路基板と半導体チップとのフリップチップ実装体を作製した。
第1の基板10及び第2の基板12に段差部16、17を設けなかった以外は、実施例1と同様の部材及び方法により、回路基板と半導体チップとのフリップチップ実装体を作製した。なお、電極が形成されていない部位における基板間距離L1は60μmとした。
第1の基板10及び第2の基板12に段差部16、17を設けなかった以外は、実施例3と同様の部材及び方法により、回路基板同士を接続した基板間接続構造を作製した。なお、電極が形成されていない部位における基板間距離L1は60μmとした。
まず、実施例1〜6及び比較例1、2で作製した実装体の電極間に形成された接合体を、X線および断面観察を行った。
実施例1〜6及び比較例1、2で作製した実装体について、吸湿リフロー試験、絶縁信頼性試験を行った。なお、吸湿リフロー試験では接続抵抗を、絶縁信頼性試験では絶縁抵抗を見るために、接合体からの配線引き回しは異なるものにした。
比較例1、2の実装体においては、接合体以外の基板間に樹脂が残存していたためと考えられる。これに対して、実施例1〜6の実装体においては、試験後も1010Ω以上の抵抗値を示し、イオンマイグレーションによる絶縁不良は確認されなかった。
11 第1の電極
12 第2の基板
13 第2の電極
14 樹脂
15 導電性粒子
16、17 段差部
20 気泡
20a、20b 空洞部
21 接合体
Claims (13)
- 複数の第1の電極を有する第1の基板に対向させて、複数の第2の電極を有する第2の基板を配置し、前記第1の電極と前記第2の電極とを接合体を介して電気的に接続する基板間の接続方法であって、
前記第1の基板と前記第2の基板との間に、導電性粒子及び気泡発生剤が含有された樹脂を供給する工程(a)と、
前記樹脂を加熱して、該樹脂中に含有する前記導電性粒子を溶融させるとともに、前記樹脂中に含有する気泡発生剤から気泡を発生させる工程(b)と、
前記樹脂を硬化させる工程(c)と
を有し、
前記第1の基板及び前記第2の基板の少なくとも一方の基板には、段差部が形成されており、
前記工程(b)において、前記気泡が成長することで、前記樹脂が該気泡外に押し出されることによって、前記樹脂中の溶融した導電性粒子が、前記第1の電極と前記第2の電極との間に誘導されて、該電極間に前記溶融された導電性粒子からなる前記接合体が形成されるとともに、前記樹脂が、前記段差部における前記第1の基板と前記第2の基板との間に誘導され、
前記工程(c)において、前記樹脂が硬化されることによって、前記第1の基板と前記第2の基板とが固定される、基板間の接続方法。 - 前記工程(b)において、少なくとも前記電極間以外の前記第1の基板と前記第2の基板との間の領域は、前記樹脂が前記気泡によって押し出された第1の空洞部をなしている、請求項1に記載の基板間の接続方法。
- 前記複数の第1の電極及び前記複数の第2の電極は、前記第1の基板及び前記第2の基板上にアレイ状に形成されており、
前記段差部は、前記アレイ状の電極領域を取り囲むようにリング状に形成されている、請求項1または2に記載の基板間の接続方法。 - 前記リング状に形成された段差部の一部に隙間が設けられており、該隙間が形成された部位における前記第1の基板と前記第2の基板との間の領域は、前記樹脂が前記気泡によって押し出された第2の空洞部をなしており、
前記第1の空洞部は、前記第2の空洞部を介して外部と連通している、請求項3に記載の基板間の接続方法。 - 前記複数の第1の電極及び前記複数の第2の電極は、互いに平行にライン状に形成されており、
前記段差部は、前記ライン状の電極領域の外方に、該電極に平行に形成されている、請求項1に記載の基板間の接続方法。 - 前記複数の第1の電極及び前記複数の第2の電極は、互いに平行にライン状に形成されており、
前記段差部は、前記ライン状の電極に直交して形成されている、請求項1に記載の基板間の接続方法。 - 前記段差部は、前記第1の電極及び第2の電極の材料よりも、前記溶融した導電性粒子に対して濡れ性の低い材料からなる、請求項1に記載の基板間の接続方法。
- 前記段差部における前記第1の基板と前記第2の基板との間の距離は、前記導電性粒子の平均粒径よりも小さい、請求項1に記載の基板間の接続方法。
- 前記段差部における前記第1の基板と前記第2の基板との間の距離は、前記段差部が形成されていない部位における前記第1の基板と前記第2の基板との間の距離の1/2以下である、請求項1に記載の基板間の接続方法。
- 前記樹脂に前記気泡発生剤を含有させる代わりに、前記第1の基板及び前記第2の基板の少なくとも一方の基板に、気泡を発生させる気泡発生源が備えられ、
前記工程(b)において、前記気泡は、前記気泡発生源から発生される、請求項1に記載の基板間の接続方法。 - 前記第1の基板及び前記第2の基板は、回路基板または半導体チップからなる、請求項1に記載の基板間の接続方法。
- 回路基板上に半導体チップが実装されたフリップチップ実装体であって、
前記回路基板及び前記半導体チップは、請求項1に記載された基板間の接続方法によって、前記回路基板及び前記半導体チップに形成された電極同士が接合体を介して電気的に接続されている、フリップチップ実装体。 - 複数の電極を有する回路基板同士が電気的に接続された基板間接続構造であって、
前記回路基板間は、請求項1に記載された基板間の接続方法によって、前記電極間に形成された接合体を介して電気的に接続されている、基板間接続構造。
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CN100409423C (zh) * | 2003-02-05 | 2008-08-06 | 千住金属工业株式会社 | 端子间的连接方法及半导体装置的安装方法 |
US7088005B2 (en) * | 2003-12-31 | 2006-08-08 | Intel Corporation | Wafer stacking with anisotropic conductive adhesive |
JP2006245189A (ja) * | 2005-03-02 | 2006-09-14 | Matsushita Electric Ind Co Ltd | 半導体素子のフリップチップ実装方法及び実装構造体 |
WO2006103948A1 (ja) | 2005-03-29 | 2006-10-05 | Matsushita Electric Industrial Co., Ltd. | フリップチップ実装方法およびバンプ形成方法 |
WO2006109407A1 (ja) * | 2005-04-06 | 2006-10-19 | Matsushita Electric Industrial Co., Ltd. | フリップチップ実装方法及びバンプ形成方法 |
EP1732116B1 (en) * | 2005-06-08 | 2017-02-01 | Imec | Methods for bonding and micro-electronic devices produced according to such methods |
US7537961B2 (en) * | 2006-03-17 | 2009-05-26 | Panasonic Corporation | Conductive resin composition, connection method between electrodes using the same, and electric connection method between electronic component and circuit substrate using the same |
-
2009
- 2009-05-11 JP JP2009114842A patent/JP5277068B2/ja not_active Expired - Fee Related
- 2009-07-03 CN CN200910142581.1A patent/CN101630646B/zh not_active Expired - Fee Related
- 2009-07-06 US US12/497,996 patent/US8501583B2/en not_active Expired - Fee Related
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CN101630646A (zh) | 2010-01-20 |
CN101630646B (zh) | 2014-02-05 |
US20100007033A1 (en) | 2010-01-14 |
US8501583B2 (en) | 2013-08-06 |
JP2010045330A (ja) | 2010-02-25 |
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