JP5103038B2 - Photoelectric conversion element, solar cell module, solar power generation system - Google Patents

Description

  The present invention relates to a photoelectric conversion element typified by a solar battery element, a solar battery module including this element, and a solar power generation system, which are irradiated with light such as sunlight and change its energy directly into electric energy.

Usually, a p-type semiconductor substrate is used as a base material of a crystalline silicon solar cell. As a technique for improving the characteristics of a solar cell using this p-type semiconductor substrate, a p ⁺ layer having p-type impurities at a higher concentration than the substrate is formed on the back surface of the substrate, and the back surface is generated by an internal electric field of the p layer-p ⁺ layer. It is common practice to form an electric field layer. However, in order to form the p ⁺ layer, it is necessary to add a high-concentration p-type impurity. However, this addition has a problem that the quality of the back surface of the substrate is deteriorated. Usually, the formation of the p ⁺ layer is realized by printing and baking an aluminum paste. However, since this formation process goes through a baking process at around 700 ° C., the thermal stress due to the difference in thermal expansion coefficient between silicon and aluminum. Is known to cause warping and cracking of the substrate.

So far, methods for thermally diffusing p-type impurities such as B and methods for depositing a p-type semiconductor film on a substrate surface have been studied as methods for forming a p ⁺ layer in place of printing and baking aluminum. However, none has been put into practical use. The former requires high-temperature and long-time heat treatment, resulting in high manufacturing costs. The latter has high quality because the device performance depends on the Si / semiconductor film interface characteristics and the majority of carriers must flow through the semiconductor film. This is because a semiconductor film is required and a sufficiently low-cost manufacturing technique has not been established.

The p ⁺ layer is provided for the purpose of suppressing recombination loss in the vicinity of the back surface. A technique that can suppress recombination loss without requiring high-temperature and long-time heat treatment and without forming a high-quality semiconductor film is desired.

  The present invention has been made in view of such circumstances, and does not require a high-temperature and long-time heat treatment, and can also suppress recombination loss without forming a high-quality semiconductor film. An element is provided.

Means for Solving the Problems and Effects of the Invention

  The photoelectric conversion element of the present invention is provided on a first conductive type first semiconductor layer, a second conductive type second semiconductor layer provided in contact with the first semiconductor layer, and a back surface of the first semiconductor layer. An insulating layer and a conductive layer provided on the insulating layer, the conductive layer being electrically isolated from the first semiconductor layer and electrically connected to the second semiconductor layer.

In the photoelectric conversion element, a diffusion potential corresponding to the material used is formed between the first semiconductor layer and the second semiconductor layer, and a photovoltaic voltage (also referred to as an operating voltage) corresponding to the diffusion potential is generated during power generation. The photovoltaic voltage is about 0.5 V in the case of crystalline silicon.
According to the present invention, since the conductive layer is electrically connected to the second semiconductor layer, a voltage generated between the first semiconductor layer and the second semiconductor layer is applied between the first semiconductor layer and the conductive layer. Is done. By this applied voltage, an accumulation layer (a p ⁺ layer when the first conductivity type is a p-type layer) in which the first conductivity type carriers are accumulated at a high concentration is formed near the back surface of the first semiconductor layer.
Since the insulating layer on the back surface of the first semiconductor layer can be formed using, for example, a low-temperature plasma CVD method, heat treatment for a long time at a high temperature is not necessary. In addition, since the interface between the first conductivity type layer and the accumulation layer is formed inside the first semiconductor layer, the influence of the interface characteristics of the insulating layer / first conductivity type layer can be reduced.
Therefore, in the photoelectric conversion element of the present invention, recombination loss can be suppressed without requiring high-temperature and long-time heat treatment and without forming a high-quality semiconductor film.

  Hereinafter, various embodiments of the present invention will be exemplified.

  The second semiconductor layer is at least partially provided on the light receiving surface side of the first semiconductor layer, and is provided on the light receiving surface of the second semiconductor layer so as to be electrically connected to the second semiconductor layer. You may further provide the connection part which electrically connects an electrode and the said light-receiving surface electrode, and the said conductive layer. In this case, the voltage generated between the first semiconductor layer and the second semiconductor layer can be reliably applied between the first semiconductor layer and the conductive layer.

  The first semiconductor layer may have a through hole, and the connection portion may electrically connect the light receiving surface electrode and the conductive layer through the through hole. In this case, when the connection portion is disposed outside the peripheral portion of the first semiconductor layer, the connection portion may be short-circuited with other photoelectric conversion elements or wirings. In this embodiment, the connection portion is the first semiconductor layer. There is no such fear because it passes through the through hole.

  The second semiconductor layer is provided so as to extend from the light receiving surface side of the first semiconductor layer to the back surface side of the first semiconductor layer through the side surface of the through hole. When the second semiconductor layer extends partway through the through hole, the connection portion and the first semiconductor layer may be short-circuited on the side wall of the through hole. However, in the present embodiment, the second semiconductor layer is the first semiconductor layer. Since it extends to the back surface of one semiconductor layer, there is no such fear.

  The second semiconductor layer may be provided only on the light receiving surface side of the first semiconductor layer, or only on the light receiving surface side of the first semiconductor layer and on the side wall of the through hole. If the second semiconductor layer extends to the back surface of the first semiconductor layer, the area of the storage layer that can be formed on the back surface of the first semiconductor layer is reduced by that amount. Since it is not formed on the back side of one semiconductor layer, the area of the storage layer can be made relatively wide.

  The second semiconductor layer includes a light receiving surface portion provided on the light receiving surface side of the first semiconductor layer and a back surface portion provided on the back surface side of the first semiconductor layer, and the conductive layer is electrically connected to the back surface portion. It may be connected to. In this case, a voltage can be applied between the first semiconductor layer and the conductive layer without providing a through hole in the first semiconductor layer.

  A back electrode provided on the back surface of the first semiconductor layer is further provided, and the back electrode is electrically connected to the first semiconductor layer and electrically separated from the conductive layer. In this case, a current can be extracted from the first semiconductor layer through the back electrode.

  Moreover, a solar cell module and a solar power generation system provided with the said photoelectric conversion element may be sufficient as this invention.

  The various embodiments shown here can be combined with each other.

  Hereinafter, various embodiments of the present invention will be described with reference to the drawings. The contents shown in the drawings and the following description are examples, and the scope of the present invention is not limited to those shown in the drawings and the following description. Hereinafter, description will be given by taking as an example the case where the first conductivity type is p-type. In addition, the following explanation can be made by replacing the “p-type” and “n-type”, “hole” and “electron”, “positive” and “negative” in the following explanation, etc. Basically, the present invention can be applied to the case where one conductivity type is n-type.

1. First embodiment 1-1. First, the structure of the photoelectric conversion element according to the first embodiment of the present invention will be described with reference to FIGS. 1A and 1B show the structure of the photoelectric conversion element of this embodiment. 1B is a rear view, and FIG. 1A is a cross-sectional view taken along the line II in FIG. 1B.

  The photoelectric conversion element of this embodiment includes a p-type first semiconductor layer (hereinafter referred to as “p-type layer”) 1 and an n-type second semiconductor layer (hereinafter referred to as “p-type layer”) provided in contact with the first semiconductor layer 1. 3), an insulating layer 5 provided on the back surface of the p-type layer 1, and a conductive layer 7 provided on the insulating layer 5. The conductive layer 7 is a p-type layer. 1 and electrically connected to the n-type layer 3. The n-type layer 3 is provided so as to extend from the light-receiving surface side of the p-type layer 1 to the back surface side of the p-type layer 1 through the side surface of the through hole provided in the p-type layer 1.

  A light receiving surface electrode 9 is provided on the light receiving surface of the n-type layer 3 so as to be electrically connected to the n-type layer 3. A connection portion 11 for electrically connecting the conductive layer 7 and the light receiving surface electrode 9 is provided in the through hole of the p-type layer 1. An antireflection film 15 is provided on the light receiving surface of the n-type layer 3. The light receiving surfaces of the p-type layer 1 and the n-type layer 3 may be arbitrarily provided with an uneven structure.

  A back electrode 13 is provided on the back surface of the p-type layer 1. The back electrode 13 is electrically connected to the p-type layer 1 and electrically separated from the conductive layer 7. The back electrode 13 is composed of a plurality of island-shaped electrodes separated from each other as shown in FIG.

1-2. Next, the operation of suppressing the recombination loss by the above configuration will be described with reference to FIG. FIG. 2 is an energy band diagram along a straight line II-II in FIG. 1A when the photoelectric conversion element is irradiated with light.

As shown in FIG. 2, when the photoelectric conversion element having the above structure is irradiated with light 16, a photovoltaic voltage is generated between the p-type layer 1 and the n-type layer 3 in the vicinity of the light receiving surface. A negative voltage (about −0.5 V in the case of crystalline silicon) is generated in the n-type layer 3 relative to the p-type layer 1. Since the n-type layer 3 and the conductive layer 7 are electrically connected through the light-receiving surface electrode 9 and the connecting portion 11, a negative voltage is applied to the conductive layer 7 with respect to the p-type layer 1. Due to this negative voltage, holes in the p-type layer 1 are attracted to the insulating layer 5, and electrons in the p-type layer 1 are moved away from the insulating layer 5, so that holes are increased in the p-type layer 1 immediately below the insulating layer 5. The accumulation layer 17 accumulated in the concentration is formed. In the accumulation layer 17, the energy band is bent upward. The storage layer 17 has a charge corresponding to the voltage applied between the p-type layer 1 and the conductive layer 7 and the capacitance of the insulating layer 5.
In the accumulation layer 17, the concentration of holes is much higher than the concentration of electrons, so that the rate of recombination of holes and electrons is small. Therefore, according to this embodiment, recombination loss can be suppressed. In addition, in the p ⁺ layer described in the section of the prior art, a defect that becomes a recombination center may be introduced by the addition of a high concentration of impurities. Since the layer 17 is formed, it is possible to prevent such a defect from being introduced.

1-3. Method for Manufacturing Photoelectric Conversion Element Next, an example of a method for manufacturing the photoelectric conversion element will be described with reference to FIGS.

(1) Through-hole formation and surface irregularity processing step First, as shown in FIG. Although the kind of semiconductor substrate 1 is not specifically limited, For example, it is a crystalline silicon substrate. The thickness of the semiconductor substrate 1 is preferably 10 to 300 μm, and more preferably 50 to 100 μm. The method for forming the through hole 21 is not particularly limited. The through hole 21 can be formed by, for example, laser processing. The shape and dimensions of the through hole 21 are not particularly limited. In one example, the through hole 21 has a circular cross section and a diameter of about 0.3 mm.
Next, a concavo-convex structure (texture structure) is formed on the surface of the substrate 19 by etching the surface of the substrate 19 using an acid or ant potassium solution or reactive plasma.

(2) n-type layer forming step Next, as shown in FIG. 3B, the region on the back surface of the substrate 19 where the insulating layer 5 or the back electrode 13 is to be formed (in other words, other than the periphery of the through hole 21). The diffusion prevention mask 23 is formed in this region. For example, the diffusion preventing mask 23 is made of SiO ₂ and can be formed by the APCVD method.

Next, an n-type layer 3 is formed by introducing an n-type impurity into a region of the substrate 19 that is not covered with the diffusion prevention mask 23 to obtain the structure shown in FIG. The introduction of the n-type impurity can be performed, for example, by placing the substrate 19 in a high-temperature gas containing a material containing the n-type impurity (for example, POCl ₃ ). By this step, the n-type layer 3 is formed on the front surface side of the substrate 19, the side wall of the through hole 21, and the portion not covered with the mask 23 on the back surface side of the substrate 19. The remaining part of the substrate 19 that is not the n-type layer 3 becomes the p-type layer 1. After forming the n-type layer 3, the diffusion prevention mask 23 is removed by etching or the like.

  The formation method of the n-type layer 3 is not limited to the method shown here. The n-type layer 3 may be formed, for example, by ion-implanting ions made of n-type impurities into the substrate 1. Further, instead of forming the n-type layer 3 by introducing an n-type impurity into the substrate 19, the n-type layer 3 may be formed by separately forming an n-type semiconductor layer on the substrate 19 by a CVD method or the like. Good. In this case, the substrate 19 becomes the p-type layer 1 as it is.

(3) Antireflection Film and Insulating Layer Formation Step Next, as shown in FIG. 3C, an antireflection film 15 is formed on the light receiving surface of the n-type layer 3 and insulated on the back surface of the p-type layer 1. Layer 5 is formed.

  The antireflection film 15 can be formed on the light receiving surface of the n-type layer 3 so as to have an opening in a region where the surface electrode 9 is formed. The antireflection film 15 may be formed on the entire light receiving surface of the n-type layer 3. In this case, the surface electrode 9 can be formed on the antireflection film 15, and the surface electrode 9 and the n-type layer 3 can be conducted by fire-through. In particular, the material, thickness, manufacturing method and the like of the antireflection film 15 are not particularly limited as long as they have a function of suppressing surface reflection. The antireflection film 15 is made of a SiN film having a thickness of 70 nm, for example. The antireflection film 15 can be formed by, for example, a plasma CVD method.

  The insulating layer 5 can be formed on the back surface of the p-type layer 1 so as to have an opening in a region where the back electrode 13 is formed. The insulating layer 5 may be formed on the entire back surface of the p-type layer 1. In this case, the back electrode 13 can be formed on the insulating layer 5, and the back electrode 13 and the p-type layer 1 can be conducted by fire-through.

If the insulating layer 5 can insulate between the p-type layer 1 and the conductive layer 7, the material, thickness, manufacturing method, etc. will not be specifically limited. The insulating layer 5 can be formed of, for example, silicon oxide, silicon nitride, tantalum oxide, aluminum oxide, or the like. The thickness of the insulating layer 5 can be about 50 to 100 nm, for example. The insulating layer 5 can be formed by a CVD method or a sputtering method. Tantalum oxide is a method described in, for example, “Preparation of Ta ₂ O ₅ High Dielectric Constant Insulating Film”, Fujikawa et al., “Toyota Central R & D Review, Vol. Can be produced.

The insulating layer 5 is preferably formed so as to have a large capacitance (for example, 1 × 10 ⁻⁴ F or more). This is because the positive charge induced in the storage layer 17 increases as the capacitance of the insulating layer 5 increases. This is because more holes are attracted to the storage layer 17 and more electrons are stored in the storage layer 17. This is because the rate of recombination of holes and electrons becomes smaller in this case. Since the capacitance of the insulating layer 5 is proportional to the relative dielectric constant and inversely proportional to the thickness, the insulating layer 5 is preferably formed to be thin using a material having a high relative dielectric constant.

(4) Light-receiving surface electrode, connecting portion, conductive layer, back surface electrode forming step Next, as shown in FIG. 3 (d), the light-receiving surface electrode 9 is formed on the light-receiving surface of the n-type layer 3, and the through hole 21 is formed. The connecting portion 11 is formed therein, the conductive layer 7 is formed on the insulating layer 5, the back electrode 13 is formed on the back surface of the p-type layer 1, and the manufacture of the photoelectric conversion element is completed.

  The material, thickness, manufacturing method, etc. of the light-receiving surface electrode 9, the connection part 11, the conductive layer 7, and the back surface electrode 13 are not specifically limited. These materials may be the same or different from each other.

  Since the light receiving surface electrode 9 and the back surface electrode 13 are used for extracting current, it is preferable to form the light receiving surface electrode 9 and the back surface electrode 13 with a material having as low an electrical resistance as possible. The light-receiving surface electrode 9 and the back surface electrode 13 can be formed with metal materials, such as silver, aluminum, copper, nickel, palladium, for example.

  The back electrode 13 can be formed to include a plurality of island electrodes separated from each other as shown in FIG. Each island-like electrode has a size of about 0.1 to 1 mm square, for example, and is arranged at an interval of about 1 to 5 mm. As shown in FIG. 4, the back electrode 13 may be formed of a plurality of skewed electrodes separated from each other. For example, each skewer electrode has a structure in which thin wires having a width of about 0.01 to 2 mm are formed at intervals of about 0.5 to 5 mm, and these thin wires are connected by a thick line.

In the case of the configuration as shown in FIG. 1B, there is an advantage that the area occupied by the back electrode 13 can be made relatively small, and therefore the region where the storage layer 17 is formed can be made relatively wide.
In the case of the configuration shown in FIG. 1B, it is necessary to connect the plurality of island-shaped electrodes to each other by means such as contacting each island-shaped electrode with a separately prepared external conductor. If the back electrode 13 is constituted by a plurality of skewed electrodes separated from each other as described above, the configuration is simplified because the skewed electrodes need only be connected to each other. The skewer electrode portions may be electrically connected to each other on the back surface of the p-type layer 1. In this case, the external conductor can be omitted, and it is not necessary to insulate the conductive layer 7 from the external conductor, so that the configuration is further simplified.

The connection portion 11 and the conductive layer 7 can be formed of a metal material such as silver, aluminum, copper, nickel, or palladium. However, since it is not necessary to pass a current through the connection portion 11 and the conductive layer 7, the material of the connection portion 11 and the conductive layer 7 only needs to have conductivity that can transmit a voltage. The conductive layer 7 may be formed of a material that is made conductive by doping a conductive impurity in ITO, SnO ₂ , ZnO, Si, SiC, SiGe, or the like. However, it is also possible to extract a current from the conductive layer 7 instead of extracting a current from the light receiving surface side. In that case, it is preferable to use a material having a low electrical resistance for the connection portion 11 and the conductive layer 7.

Further, if the light that has passed through the p-type layer 1 is absorbed by the conductive layer 7, the light utilization efficiency is reduced. Therefore, the conductive layer 7 has a property of transmitting the light that has passed through the p-type layer 1. It is preferable. In this case, the light transmitted through the conductive layer 7 can be reflected by the member behind the conductive layer 7 and returned to the pn junction between the p-type layer 1 and the n-type layer 3. From this viewpoint, the material of the conductive layer 7 preferably has a larger band gap than the material of the p-type layer 1. In one example, ITO, SnO ₂ , ZnO, amorphous-Si, or SiC is preferable.

The light-receiving surface electrode 9, the connection part 11, the conductive layer 7, and the back electrode 13 can be formed by vapor deposition, paste electrode printing and baking, plating, or the like. The back electrode 13 can be formed by printing and baking a paste material containing a p-type impurity such as aluminum. In this case, a layer (p ⁺ layer) doped with a high concentration of p-type impurities is formed immediately below the back electrode 13 (see the section of the prior art). The connection part 11 and the conductive layer 7 can be simultaneously formed by, for example, a method of printing and baking a conductive paste from the back side. The connection part 11 and the conductive layer 7 can be formed simultaneously by vapor deposition or plating.

  After forming the light-receiving surface electrode 9, the connection part 11, the conductive layer 7, and the back surface electrode 13, you may perform heat processing and forming gas annealing as needed.

  The order of the steps shown here is an example, and each step may be performed in a different order. For example, the connection part 11, the conductive layer 7, and the back electrode 13 may be formed after the antireflection film 15 and the light receiving surface electrode 9 are formed.

2. Second embodiment 2-1. Structure of Photoelectric Conversion Element The structure of the photoelectric conversion element according to the second embodiment of the present invention will be described with reference to FIG. FIG. 5 is a cross-sectional view corresponding to FIG.

  The photoelectric conversion element according to the present embodiment is similar to the photoelectric conversion element according to the first embodiment, but there are several differences. Therefore, the differences will be mainly described below. The contents described in the first embodiment are basically applicable to the second embodiment.

  In the present embodiment, the n-type layer 3 is provided only on the light-receiving surface side of the p-type layer 1 and the side wall of the through hole 21. The n-type layer 3 is not provided on the back side of the p-type layer 1. In the first embodiment, the n-type layer 3 extends to the back side of the p-type layer 1, and the storage layer 17 is not formed in the portion where the n-type layer 3 is formed on the back side of the p-type layer 1. However, in this embodiment, since the n-type layer 3 is not provided on the back side of the p-type layer 1, the insulating layer 5 and the conductive layer are formed so that the storage layer 17 is formed in a wider area than in the first embodiment. 7 can be arranged.

  In the present embodiment, the insulating layer 5 is also provided on the side wall of the through hole 21, thereby ensuring insulation between the connection portion 11 and the p-type layer 1. In the first embodiment, the insulating layer 5 may also be provided on the side wall of the through hole 21.

2-2. Action in which recombination loss is suppressed The action in which recombination loss is suppressed according to the present embodiment is the same as that in the first embodiment, and therefore description thereof will not be repeated here.

2-3. Method for Manufacturing Photoelectric Conversion Element Next, an example of a method for manufacturing the photoelectric conversion element will be described with reference to FIGS.

(1) Through-hole formation and surface unevenness processing step First, as shown in FIG. 6A, the through-hole 21 and the surface unevenness structure are formed in the p-type semiconductor substrate 19 by the same method as in the first embodiment. .

(2) N-type Layer Formation Step Next, the diffusion prevention mask 23 is formed on the entire back surface of the substrate 19 by the same method as in the first embodiment.

Next, the n-type layer 3 is formed by the same method as in the first embodiment, and the structure shown in FIG. 6B is obtained. However, conditions for forming the n-type layer 3 (for example, the temperature and time of thermal diffusion of n-type impurities) are changed as appropriate. FIG. 6B shows the case where the n-type layer 3 is formed on a part of the side wall of the through-hole 21, but by changing the temperature and time of thermal diffusion when introducing the n-type impurity, etc. The n-type layer 3 may be formed on the entire side wall of the through hole 21.
Next, the diffusion prevention mask 23 is removed by the same method as in the first embodiment.

(3) Antireflection Film and Insulating Layer Formation Step Next, as shown in FIG. 6C, the antireflection film 15 and the insulating layer 5 are formed. The antireflection film 15 can be formed by the same method as in the first embodiment. The insulating layer 5 can also be basically formed by the same method as in the first embodiment, but in this embodiment, the through hole 21 is formed by a method such as making the through hole 21 tapered toward the back surface. It is also formed on the side wall.

(4) Light-receiving surface electrode, connection part, conductive layer, back surface electrode forming step Next, as shown in FIG. 6D, the light-receiving surface electrode 9, the connection part 11, and the conductive material are formed by the same method as in the first embodiment. The layer 7 and the back electrode 13 are formed to complete the manufacture of the photoelectric conversion element.

3. Third embodiment 3-1. Structure of Photoelectric Conversion Element The structure of the photoelectric conversion element according to the third embodiment of the present invention will be described with reference to FIG. FIG. 7 is a cross-sectional view corresponding to FIG. The photoelectric conversion element according to the present embodiment is similar to the photoelectric conversion element according to the first embodiment, but there are several differences. Therefore, the differences will be mainly described below. The contents described in the first embodiment are basically applicable to the third embodiment.

  In the present embodiment, the n-type layer 3 includes a light-receiving surface portion 3 a provided on the light-receiving surface side of the p-type layer 1 and a back surface portion 3 b provided on the back surface side of the p-type layer 1. , And electrically connected to the back surface portion 3b. The light receiving surface portion 3a and the back surface portion 3b may or may not be electrically connected.

  In the present embodiment, a photovoltage generated between the p-type layer 1 and the back surface portion 3 b is applied between the p-type layer 1 and the conductive layer 7. Due to such a configuration, the connection portion 11 penetrating the p-type layer 1 is not necessary, and the configuration is simplified. In addition, since no current is normally taken out from the back surface portion 3 b, there is no voltage drop due to the current taking out, and a stable voltage can be applied between the p-type layer 1 and the conductive layer 7.

  In addition, when the size of the through hole 21 for forming the connection portion 11 is very small, it is considered that the rate of occurrence of poor conduction or the like is increased. It is easy to reduce the occupied area, and it is easy to increase the area of the storage layer 17 accordingly.

3-2. Action in which recombination loss is suppressed Next, the action in which the recombination loss is suppressed by the above-described configuration will be described with reference to FIGS. FIGS. 8A and 8B show energy band diagrams along straight lines II and II-II in FIG. 7 when the photoelectric conversion element is irradiated with light, respectively.

  As shown in FIGS. 8A and 8B, when light is irradiated to the photoelectric conversion element of this embodiment, the n-type layer 3 is disposed between the light-receiving surface portion 3a and the p-type layer 1, and the n-type layer. A photovoltaic voltage is generated between the back surface portion 3 b of the layer 3 and the p-type layer 1. Since the back surface portion 3 b is electrically connected to the conductive layer 7, a voltage generated between the back surface portion 3 b of the n-type layer 3 and the p-type layer 1 is generated between the conductive layer 7 and the p-type layer 1. Applied. With this applied voltage, the accumulation layer 17 is formed by the same action as in the first embodiment. The accumulation layer 17 suppresses recombination loss by the same action as in the first embodiment.

3-3. Method for Manufacturing Photoelectric Conversion Element Next, an example of a method for manufacturing the photoelectric conversion element will be described with reference to FIGS.

(1) Surface Irregularity Processing Step First, as shown in FIG. 9A, a surface unevenness structure is formed on the p-type semiconductor substrate 19 by the same method as in the first embodiment.

(2) n-type Layer Formation Step Next, a diffusion prevention mask 23 having an opening in a region for forming the back surface portion 3b of the n-type layer 3 is formed on the back surface of the substrate 19 by the same method as in the first embodiment.

Next, an n-type layer 3 is formed by introducing an n-type impurity into a region of the substrate 19 that is not covered with the diffusion prevention mask 23, and a structure shown in FIG. 9B is obtained. By this step, the light receiving surface portion 3a and the back surface portion 3b of the n-type layer 3 are formed.
Next, the diffusion prevention mask 23 is removed by the same method as in the first embodiment.

(3) Antireflection Film and Insulating Layer Formation Step Next, as shown in FIG. 9C, the antireflection film 15 and the insulating layer 5 are formed by the same method as in the first embodiment.

(4) Light-receiving surface electrode, conductive layer, and back electrode forming step Next, as shown in FIG. 9D, the light-receiving surface electrode 9, the conductive layer 7, and the back electrode 13 are formed by the same method as in the first embodiment. To complete the manufacture of the photoelectric conversion element. The conductive layer 7 is formed so as to be electrically connected to the back surface portion 3 b of the n-type layer 3.

  Various features shown in the above embodiments can be combined with each other. When a plurality of features are included in one embodiment, one or a plurality of features can be appropriately extracted and used in the present invention alone or in combination.

(A), (b) shows the structure of the photoelectric conversion element of 1st Embodiment of this invention, (b) is a back view, (a) is II sectional drawing in (b). It is. The energy band figure along the straight line II-II in Fig.1 (a) at the time of light irradiation of the photoelectric conversion element of 1st Embodiment of this invention is shown. (A)-(d) is sectional drawing corresponding to Fig.1 (a) which shows the manufacturing process of the photoelectric conversion element of 1st Embodiment of this invention. It is a reverse view corresponding to FIG.1 (b) which shows another embodiment of the photoelectric conversion element of 1st Embodiment of this invention. It is sectional drawing corresponding to Fig.1 (a) which shows the structure of the photoelectric conversion element of 2nd Embodiment of this invention. (A)-(d) is sectional drawing corresponding to FIG. 5 which shows the manufacturing process of the photoelectric conversion element of 2nd Embodiment of this invention. It is sectional drawing corresponding to Fig.1 (a) which shows the structure of the photoelectric conversion element of 3rd Embodiment of this invention. (A), (b) shows the energy band figure along the straight line II and II-II in FIG. 7, respectively at the time of light irradiation of the photoelectric conversion element of 3rd Embodiment of this invention. (A)-(d) is sectional drawing corresponding to FIG. 7 which shows the manufacturing process of the photoelectric conversion element of 3rd Embodiment of this invention.

Explanation of symbols

1: p-type layer 3: n-type layer 3a: light-receiving surface portion of n-type layer 3b: back surface portion of n-type layer 5: insulating layer 7: conductive layer 9: light-receiving surface electrode 11: connection portion 13: back surface electrode 15: reflection Prevention film 16: Light 17: Storage layer 19: Semiconductor substrate 21: Through hole 23: Diffusion prevention mask

Claims (8)

A first conductive type first semiconductor layer; a second conductive type second semiconductor layer provided in contact with the first semiconductor layer; an insulating layer provided on a back surface of the first semiconductor layer; and the insulating layer Comprising a conductive layer provided on top;
The conductive layer is electrically separated from the first semiconductor layer and electrically connected to the second semiconductor layer ;
A back electrode provided on the back surface of the first semiconductor layer, wherein the back electrode is electrically connected to the first semiconductor layer and electrically separated from the conductive layer;
The back electrode is an island electrode or a skewer electrode,
The photoelectric conversion element , wherein the conductive layer is provided along an outer edge of the back electrode and covers most of the insulating layer . At least a part of the second semiconductor layer is provided on the light receiving surface side of the first semiconductor layer,
A light receiving surface electrode provided on the light receiving surface of the second semiconductor layer so as to be electrically connected to the second semiconductor layer, and a connection portion for electrically connecting the light receiving surface electrode and the conductive layer. Item 2. The device according to Item 1. The first semiconductor layer has a through hole,
The element according to claim 2, wherein the connection portion electrically connects the light-receiving surface electrode and the conductive layer through the through hole. The element according to claim 3, wherein the second semiconductor layer is provided so as to extend from the light receiving surface side of the first semiconductor layer to the back surface side of the first semiconductor layer through the side surface of the through hole. The element according to claim 3, wherein the second semiconductor layer is provided only on the light receiving surface side of the first semiconductor layer, or only on the light receiving surface side of the first semiconductor layer and the side wall of the through hole. The second semiconductor layer includes a light receiving surface portion provided on the light receiving surface side of the first semiconductor layer and a back surface portion provided on the back surface side of the first semiconductor layer,
The element according to claim 1, wherein the conductive layer is electrically connected to the back surface portion. A solar cell module provided with the element as described in any one of Claims 1-6 . A solar power generation system provided with the element as described in any one of Claims 1-6 .

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