JP5007739B2 - Back-illuminated solid-state imaging device, electronic device module, and camera module - Google Patents

Description

  The present invention relates to a back-illuminated solid-state imaging device in which a charge storage region in a photoelectric conversion unit and an element for reading out signal charges are formed on a substrate surface side, and light is incident from the back surface side of the substrate, and the back-illuminated type The present invention relates to an electronic device module and a camera module provided with a solid-state imaging device.

  As the solid-state imaging device, a CMOS solid-state imaging device and a CCD solid-state imaging device are known. For example, a CMOS solid-state imaging device is configured by forming one pixel by a photodiode and a plurality of MOS transistors and arranging the plurality of pixels in a required pattern. The photodiode is a photoelectric conversion element that generates and accumulates signal charges according to the amount of received light, and the plurality of MOS transistors are elements for performing a signal charge read operation from the photodiodes.

  FIG. 7 shows an example of a conventional CMOS type solid-state imaging device applied to an image sensor and irradiated with light from the back side. FIG. 7 shows the main part of the pixel. In the unit pixel, when the signal charge from the photodiode 53 and the photodiode 53 is read, the other components of the MOS transistor 55 are represented. This back-illuminated CMOS solid-state imaging device 51 is formed with a pixel isolation region 62 for partitioning each pixel in a first conductivity type, for example, n-type silicon semiconductor substrate 61, and a photodiode in each partitioned pixel region. 53 and a plurality of MOS transistors, that is, the read transistor 54 and the other MOS transistors 55 are formed to constitute the unit pixel 60. A large number of the pixels 60 are arranged in a two-dimensional matrix.

  The pixel isolation region 62 is formed of a p-type semiconductor region that is a second conductivity type having a relatively low impurity concentration from the substrate surface to the substrate back surface. The photodiode 53 is formed of an n-type semiconductor substrate 61 surrounded by a p-type pixel isolation region 62 and a relatively deep p-type semiconductor well region 63 in which the MOS transistors 54 and 55 are formed. That is, the photodiode 53 is formed of an n semiconductor region (region) 61A and a high impurity concentration n + semiconductor region (n + region) 61B on the surface side thereof. The n + region 61B serves as a charge accumulation region for accumulating charges that are signals of electrons and holes generated by photoelectric conversion in the photodiode 3, in this example, electrons. Furthermore, a p + accumulation layer (charge storage layer) 64 made of a high impurity concentration p-type semiconductor region for suppressing dark current generation is formed at the interface of the n + semiconductor region 61B.

Each MOS transistor 54, 55 is configured as follows. On the surface of the p-type semiconductor well region 63, n-type source / drain regions (n + regions) 57, 58, 59 with high impurity concentration are formed by ion implantation so as to be adjacent to the photodiode 53.
The read transistor 54 includes an n-type source / drain region 57, an n + region 61B serving as a source / drain region on the surface side of the photodiode 53, and a gate insulating film on the p-channel region 65 between the regions 57 and 61B. And a gate electrode formed therethrough. The transistors 55 other than the read transistor 54 are also formed by a gate electrode 67 formed on the n-type source / drain regions 58 and 59 and the p-type semiconductor well region 63 between the regions 58 and 59 via a gate insulating film. And formed.
Further, a p + accumulation layer 68 made of a high impurity concentration p-type semiconductor region for suppressing the generation of dark current is formed on the back surface as the light irradiation surface of the n + semiconductor substrate 61.

  In this backside illumination type solid-state imaging device 51, light is incident on the photodiode 53 from the backside of the semiconductor substrate 61, and photoelectric conversion is performed in the photodiode 53 to accumulate signal charges corresponding to the amount of received light in the n + region 61B. ing. The signal charges in the n + region 61B are read out by the read operation of the MOS transistors 54 and 55.

  In particular, Patent Document 1 proposes the back-illuminated solid-state imaging device described above (see Patent Document 1 and FIG. 4).

JP 2003-31785 A

  In the back-illuminated solid-state imaging device 51 as described above, a p + accumulation layer 68 is formed on the silicon interface on the back side of the substrate of the photodiode 53 in order to suppress the generation of dark current from the silicon interface on the back side of the substrate. A so-called HAD (Hole Accumulation Diode) is formed. For this reason, when a large amount of holes (holes) are generated in the photodiode 53 by photoelectric conversion, holes accumulate near the back surface interface, and the potential gradient from the back surface side to the front surface side changes compared to the depleted state, There is a possibility that the sensitivity is lowered or the linearity between the irradiation light quantity and the pixel output is shifted. This situation will be described with reference to FIGS. 8A and 8B and FIG.

  FIG. 8A is a cross-sectional view schematically showing the unit pixel region of FIG. 7, and FIG. 8B is a potential distribution diagram in the substrate depth direction when light is irradiated from the back side of the substrate. 8B, a potential distribution 71 indicates a potential distribution in the depth direction of the photodiode region 53 along the A1-A1 line in FIG. 8A, and a potential distribution 72 indicates a pixel isolation region along the B1-B1 line in FIG. 8A. 62 shows the potential distribution in the depth direction.

  The potential in the photodiode region 53 is shallow at the interface of the p + accumulation layer 68 on the back surface side, gradually deepens toward the front surface side, and deepest in the n + region 61B on the front surface side. Furthermore, it becomes shallow rapidly toward the interface of the p + accumulation layer 64 on the surface side. The potential of the pixel isolation region 62 is shallow at the interface of the p + accumulation layer 68 on the back surface side and becomes deep in the vicinity of the back surface of the p− pixel isolation region 62 having a low impurity concentration, and then the p + accumulation layer 64 on the front surface side. Shallow toward the interface.

When light L is irradiated from the back side as shown in FIG. 7B, electron (e) / hole (h) pairs are generated by photoelectric conversion in the n region 61A of the photodiode 53. Of the electron (e) / hole (h) pair generated near the back surface, the electron (e) is stored in the n + region 61B, and the hole (h) is stored in the p + accumulation layer 68 on the back surface side. . Holes (h) accumulated in the p + accumulation layer 68 on the back side are accumulated in the p + accumulation layer 68 as is apparent from the potential distribution 72. The potential of the photodiode region 53 is modulated by the holes (h), that is, the potential on the back surface side interface of the photodiode region 53 becomes deep, and the potential gradient becomes shallow as indicated by a broken line 71a. For this reason, the electric field for drifting the electrons (e) photoelectrically converted in the vicinity of the back surface side interface to the n + region 61B on the front surface side is weakened, and the sensitivity may decrease due to the decrease in the drift capability, and the color balance may be lost.
FIG. 9A schematically shows the potential distribution immediately after the pixel reset operation, and FIG. 9B schematically shows the potential distribution immediately after the light irradiation.

  Further, as shown in FIG. 8B, when the amount of light is small at first, holes (h) are accumulated in the p + accumulation layer 68 and become a potential gradient 71 a of the photodiode region 53. When the amount of light increases and many holes (h) are accumulated in the p + accumulation layer 68, it overflows and some holes (h) escape to the surface side through the p-pixel separation region 62. At this time, as indicated by the chain line, the potential gradient 71b is intermediate between the solid potential gradient 71 and the broken potential gradient 71a. Thus, the potential gradient varies depending on the light amount, and as a result, the linearity between the irradiation light amount and the pixel output may change.

  Even when a back-illuminated CCD solid-state imaging device is developed, the same problem as described above may occur.

  In recent years, back-illuminated solid-state image sensors tend to have peripheral parts such as camera signal processing circuits, DSPs (Digital Signal Processors), lenses, and input / output units mounted on the same chip. Due to the downsizing of electronic devices equipped with solid-state image sensors and the variety of applications, module elements that incorporate peripheral functions beyond the requirements of electronic devices, especially in solid-state image sensors such as those mounted on mobile phones. Is required. Furthermore, when the solid-state imaging device is modularized, it can be easily mounted on a digital still camera, a digital camcorder, a PDA, a personal computer, a surveillance camera, etc. other than a cellular phone, and can be used for various applications. In the electronic equipment module or camera module in which the back-illuminated solid-state image sensor that generates the dark current is modularized, the image quality deteriorates when the module is formed due to the dark current of the back-illuminated solid-state image sensor (the sensitivity decreases with time). Furthermore, there is a risk of inviting a phenomenon that the color balance changes).

  In view of the above-mentioned points, the present invention suppresses a change in potential gradient due to charges not used as signal charges accumulated in a backside accumulation layer, and guarantees a constant image quality, and a backside illuminated solid-state imaging device. The present invention provides an electronic device module and a camera module provided with a back-illuminated solid-state imaging device.

  In the backside illumination type solid-state imaging device according to the present invention, a charge accumulation region in the photoelectric conversion unit of each pixel and an element for reading out signal charges are formed on the front side of the semiconductor substrate, and the light irradiation surface on the back side of the semiconductor substrate And an accumulation layer of a conductivity type different from that of the photoelectric conversion part is formed on the front side, and among the electron-hole pairs generated in the photoelectric conversion part, charges not used as signal charges are passed through the accumulation layer on the back side. To the surface side, and has a charge extraction region that is extracted from a region other than the photoelectric conversion portion of the pixel. The charge extraction region is formed in a pixel separation region having a conductivity type different from that of the photoelectric conversion unit, and an impurity region having the same conductivity type as the pixel separation region and having a higher concentration than the pixel separation region. The portion is surrounded by an accumulation layer and a pixel isolation region formed on the back side and the front side of the semiconductor substrate.

An electronic device module according to the present invention includes the above-described back-illuminated solid-state imaging device, an optical lens system, and signal processing means.
The camera module of the present invention includes the above-described back-illuminated solid-state imaging device and an optical lens system.

  In the backside illumination type solid-state imaging device of the present invention, by having the charge extraction region, among the electron-hole pairs generated by photoelectric conversion, the charges gathered in the accumulation layer on the light irradiation surface pass through the charge extraction region. It is pulled out from the surface side. As a result, the fluctuation of the potential gradient from the back surface side to the front surface side charge accumulation region is suppressed compared to the depleted state, and the potential gradient is stabilized. Therefore, the drift electric field to the surface side charge accumulation region of the signal charge is reduced. Retained.

In the electronic device module of the present invention, by providing the back-illuminated solid-state image sensor, it is possible to prevent a decrease in sensitivity in the back-illuminated solid-state image sensor. The image quality is improved.
Further, in the camera module of the present invention, by providing the backside illumination type solid-state imaging device, it is possible to prevent a decrease in sensitivity in the backside illumination type solid-state imaging device, and even when the irradiation light quantity is large, the linearity of the light quantity and the output becomes good The image quality of the captured image is improved. In addition, since it is small and does not need to be mounted for each component, it is not necessary to improve mounting efficiency and adjust optical characteristics. The camera module can be easily mounted and the product design can be shortened.

  According to the backside illumination type solid-state imaging device of the present invention, even if a large amount of charges that are not used as signal charges are generated by photoelectric conversion by providing a charge extraction region, the charges are collected even in the accumulation layer on the backside. Since the charge is extracted through the charge extraction region, the potential gradient from the back surface side to the front surface side can be suppressed from changing compared to the depleted state. Accordingly, it is possible to prevent a decrease in sensitivity of the backside illumination type solid-state imaging device. Furthermore, even when the irradiation light quantity is large, it is possible to keep the light quantity of the pixel and the linearity of the output satisfactorily by suppressing the sensitivity from being temporarily lowered.

  According to the electronic device module of the present invention, the sensitivity of the back-illuminated solid-state imaging device is improved, so that when assembled in the electronic device module, the sensitivity is prevented from decreasing with time, and the color balance is not changed. Improved image quality characteristics.

  According to the camera module of the present invention, since the sensitivity of the back-illuminated solid-state imaging device is improved, when assembled in the camera module, the sensitivity is prevented from decreasing with time, and the color balance is not changed. Improved characteristics.

It is a schematic block diagram which shows one Embodiment of the back irradiation type solid-state image sensor which concerns on this invention. A is a top view of a unit pixel of an embodiment of a backside illumination type solid-state imaging device according to the present invention. B is a cross-sectional view taken along line AA in FIG. 3A. It is an equivalent circuit diagram of an example of 1 pixel of the CMOS solid-state image sensor applied to the backside illumination type solid-state image sensor of the present invention. It is typical sectional drawing of the principal part of the back irradiation type solid-state image sensor concerning A of this invention. B is a potential diagram on the line A2-A2, line B2-B2, and line C2-C2 in FIG. 4A. It is a figure which shows the reference example of the backside illumination type solid-state image sensor which concerns on this invention. It is a block diagram which shows embodiment of the electronic device module and camera module which concern on this invention. It is sectional drawing of the pixel area | region of the conventional backside illumination type solid-state image sensor. It is typical sectional drawing of the principal part of the conventional back irradiation type solid-state image sensor. B is a potential diagram on the line A1-A1 and the line B1-B1 in FIG. 5A. A A potential distribution at the time of resetting a conventional unit pixel. B is a potential distribution when a conventional unit pixel is irradiated with light.

Embodiments of the present invention will be described below with reference to the drawings.
FIG. 1 is a schematic configuration diagram of a pixel portion showing an embodiment in which a back-illuminated solid-state image sensor according to the present invention is applied to a back-illuminated CMOS solid-state image sensor. FIG. 2 is a detailed cross section of the pixel.
The back-illuminated solid-state imaging device 1 according to the present embodiment forms a pixel isolation region 13 composed of a semiconductor region of the second conductivity type on the first conductivity type and silicon semiconductor substrate 2, and is partitioned by the pixel isolation region 13. In each pixel region, a photodiode 3 and an element for performing a reading operation of signal charges accumulated in the photodiode 3, that is, a required number of MOS transistors, Tr (see FIG. 2) are formed. Reference numeral 20 denotes a unit pixel. The pixel isolation region 13 is formed in the depth direction so as to extend from the front surface to the back surface of the substrate 2. The MOS transistor Tr is formed on the front surface side of the substrate 2, and the photodiode 3 is formed so as to extend partially on the back surface side of the substrate 2 so as to extend below the MOS transistor Tr.
In the pixel separation region 13 that divides the pixel, the charge extraction according to the present invention for extracting from the back side to the front side the charge that is generated by photoelectric conversion described later and does not become the signal charge of the electron / hole pair. Region 30 (see FIG. 2) is formed.

A gate electrode 8 of the MOS transistor Tr is formed on the surface of the substrate 2, and a wiring region 24 is formed on which a multilayer wiring layer 24 a is disposed via an interlayer insulating film 26. Further, a support substrate 25 is formed on the wiring region 24. As the support substrate 25, any material substrate can be used as long as it can support a thin semiconductor substrate. For example, a silicon substrate is preferably used.
On the other hand, an accumulation layer (charge storage layer) 15 for suppressing dark current generation is formed at the interface of the photodiode 3 on the back side of the semiconductor substrate 2. Further, an on-chip color filter 22 is formed on the back surface of the semiconductor substrate 2, and an on-chip lens 21 is formed on the color filter 22 so as to correspond to each pixel 20. In the CMOS solid-state imaging device 1, the light L is applied to the photodiode 3 from the back surface of the substrate through the on-chip lens 21.

An example of a specific configuration of the unit pixel 20 of the backside illumination type solid-state imaging device 1 is shown in FIG. FIG. 2A shows a top view of the unit pixel 20 with the upper support substrate 25 and the wiring region 24 removed. FIG. 2B shows a cross-sectional structure along the line AA in FIG.
In this example, a pixel isolation region 13 made of a p-type semiconductor region of the second conductivity type is formed so as to partition each pixel region of the n-type silicon semiconductor substrate 2 of the first conductivity type. The pixel isolation region 13 is formed of a semiconductor region of a p-type having a relatively low impurity concentration. The n-type semiconductor substrate 2 in the pixel region is formed with a relatively deep p-type semiconductor well region 16 connected to the p-type pixel isolation region 13 and extending partially in the pixel region on the surface thereof.

  The photodiode 3 serving as a photoelectric conversion part is formed of an n-type semiconductor substrate 2 surrounded by a p-type pixel isolation region 13 and a p-type semiconductor well region 16. That is, the photodiode 3 is formed by the n semiconductor region 2A and the n + semiconductor region 2B having a high impurity concentration on the surface side. A p + accumulation layer 12 made of a high impurity concentration p-type semiconductor region for suppressing dark current generation is formed on the interface on the surface side of the n + semiconductor region 3B. Further, in common to each pixel region, p + accumulation composed of a high impurity concentration p-type semiconductor region for suppressing dark current generation on the back surface of the n-type semiconductor substrate 2, that is, the interface on the back surface side of the n semiconductor region 2A. Layer 15 is formed. The photodiode 3 is configured as a so-called HAD sensor because it has p + accumulation layers 12 and 15 on the front surface of the n + semiconductor region 2B and the back surface of the n semiconductor region 2A. The photodiode 3 is formed in a large area so as to cover the entire pixel region because the n semiconductor region 2A extends below the p-type semiconductor well region 16.

  On the other hand, the MOS transistor Tr that performs the charge reading operation is formed in the p-type semiconductor well region 16. That is, for example, when one pixel is composed of one photodiode 3 and four MOS transistors, the MOS transistor Tr has a read transistor, a reset transistor, an amplifier transistor, and a vertical selection transistor. An equivalent circuit of this pixel will be described later. (See FIG. 3). In FIG. 2, one n + source / drain region 14 is formed in the p-type semiconductor well region 16 adjacent to the photodiode 3, and the photodiode 3 serving as both the n + source / drain region 14 and the other source / drain region. A gate electrode 8 is formed on the p-type semiconductor well region 16 between the n + semiconductor regions 2B via a gate insulating film, and the read transistor 4 is formed. This one source / drain region 14 acts as a floating diffusion (FD). Although omitted in FIG. 2, other reset transistors, amplifier transistors, vertical selection transistors, and the like are formed in other portions of the p-type semiconductor well region 16.

  A multilayer wiring layer 24a is formed on the surface of the semiconductor substrate via an interlayer insulating film 26 made of, for example, a silicon oxide film. A support substrate 25 is bonded onto the wiring region 24 on the front side. Although omitted in FIG. 2, as shown in FIG. 1, the color filter 22 is formed on the back surface of the substrate, and the on-chip lens 21 is formed thereon.

  In this embodiment, as shown particularly in FIG. 2, a region other than the photoelectric conversion portion of the pixel, that is, a part of the pixel separation region 13 or the photodiode 3 is surrounded, and in this example, a part of the charge is charged. A drawing region 30 is formed. The charge extraction region 30 is for extracting charges generated by photoelectric conversion that are not signals from the electron / hole pairs from the back surface side to the front surface side. The charge extraction region 30 is formed of a semiconductor region having the same conductivity type as the pixel isolation region 13 and having a higher impurity concentration than the pixel isolation region 13. The charge extraction region 30 of the present embodiment is formed of a p + semiconductor region having a high impurity concentration, and is formed up to the substrate surface in contact with the p + accumulation layer 15 on the back surface of the substrate so as to extract holes. The p + charge extraction region (so-called hole plug region) 30 is formed so that its impurity concentration is higher than that of the p + accumulation layer 15 on the back surface side and the concentration increases from the back surface side to the front surface side. Is done.

  FIG. 3 shows an equivalent circuit of a unit pixel composed of one photodiode and four MOS transistors. The equivalent circuit of the unit pixel 20 includes a photodiode 3 and four MOS transistors including a read transistor 4, a reset transistor 5, an amplifier transistor 6, and a vertical selection transistor 7. The photodiode 3 is connected to one main electrode of the charge reading transistor 4, and the other main electrode of the reading transistor 4 is connected to one main power supply of the reset transistor 5. The other main power supply of the reset transistor 5 is connected to the other main electrode of the amplifier transistor 6 to one main electrode of the vertical selection transistor 7.

Further, an FD (floating diffusion) corresponding to the midpoint of connection between the read transistor 4 and the reset transistor 5 is connected to the gate electrode of the amplifier transistor 6. The midpoint of connection between the reset transistor 5 and the amplifier transistor 6 is connected to the power supply wiring 8 from the power supply Vdd. Further, the other main power supply of the vertical selection transistor 7 is connected to the vertical signal line 9. A horizontal selection transistor 17 is connected between the vertical signal line 9 and a horizontal signal line (not shown).
A vertical read pulse ΦTG is applied to the gate electrode of the read transistor 4, a reset pulse ΦR is applied to the gate electrode of the reset transistor 5, and a vertical selection pulse ΦSEL is applied to the gate electrode of the vertical select transistor 7.

  A large number of such unit pixels 20 are arranged in a two-dimensional matrix to constitute a CMOS solid-state imaging device.

  In the unit pixel 20, signal charges are accumulated in the photodiode 3 by photoelectric conversion. When the vertical read pulse ΦTG is applied to the gate electrode of the read transistor 4, the read transistor 4 becomes conductive, and the signal charge of the photodiode 3 is transferred to the FD, so that the potential of the FD changes. The signal voltage of the FD is applied to the gate electrode of the amplifier transistor 6 and converted into a signal current by the amplifier transistor 6. On the other hand, when the vertical selection pulse ΦSEL is applied to the gate electrode of the vertical selection transistor 7, the vertical selection transistor 7 becomes conductive, and a signal current appears on the vertical signal line 9. This signal current flows to the horizontal signal line through the horizontal selection transistor 17 by the horizontal selection pulse, and is output from the output unit.

Next, the operation of the back-illuminated solid-state imaging device according to the above-described embodiment, that is, the CMOS solid-state imaging device 1 provided with the charge extraction region 30 will be described with reference to FIG.
4A is a cross-sectional view schematically showing the region of the unit pixel in FIG. 2, and FIG. 4B is a potential distribution diagram in the substrate depth direction when light is irradiated from the back surface of the substrate. 4B, a potential distribution 31 indicates the potential distribution in the depth direction of the photodiode region 3 along the line A2-A2 in FIG. 4A, and a potential distribution 32 indicates the pixel isolation region 13 along the line B2-B2 in FIG. 4A. The potential distribution in the depth direction is shown, and the potential distribution in the depth direction of the charge extraction region 30 along the line C2-C2 in FIG. 4A is shown. The potential distribution 31 in the photodiode region 3 is the same as the potential distribution 71 in FIG. 8B. The potential distribution 32 in the pixel isolation region 13 is the same as the potential distribution 72 in FIG. 8B. In the potential distribution 33 of the charge extraction region 30, the potential gradually becomes shallower from the back side toward the front side.

Light L is incident from the back surface of the CMOS solid-state imaging device 1 and photoelectrically converted in the photodiode 3 to generate electron / hole pairs. Of these electron / hole pairs, a signal electron (e) drifts to the substrate surface side by a drift electric field and is accumulated in the n + semiconductor region 2B. Electrons (e) of the electron / hole pairs generated on the back side of the substrate also drift and accumulate in the n + semiconductor region 2B, and the holes (h) enter the p + accumulation layer 15 on the back side (potential distribution). 31 and 32). However, the holes (h) collected in the p + accumulation layer 15 are not accumulated in the p + accumulation layer 15, and flow from the back side to the front side through the p + charge extraction region 30. It is pulled out through a contact portion formed on the surface side (see potential distribution 33).
Therefore, the potential distribution in the photodiode 3 is not affected by holes in the p + accumulation layer 15, and the potential gradient 31a from the p + accumulation layer 15 to the n + semiconductor region 2B serving as the charge accumulation region is Variation is suppressed. That is, when a large number of holes are generated by photoelectric conversion, the potential suburbs 31a from the back side to the front side are prevented from changing due to holes accumulated near the back side interface compared to the depletion state. And the potential gradient 31a is stabilized.

According to the backside illumination type CMOS solid-state imaging device 1 according to the present embodiment, the p + charge extraction region 30 is formed in contact with the p + accumulation layer 15 on the back surface side in the p− pixel separation region 13 from the back surface side to the front surface side. By providing, when a large number of holes are generated by photoelectric conversion, a change in the potential gradient 31a from the back surface side to the front surface side in the photodiode region 3 is suppressed, and a decrease in sensitivity can be prevented.
Further, even when the amount of irradiation light is large, it is possible to suppress a temporary decrease in sensitivity, and to maintain good linearity of the light amount and pixel output.

FIG. 5 shows a reference example of a back-illuminated solid-state image sensor according to the present invention, that is, a CMOS solid-state image sensor.
FIG. 5 is a top view of an imaging region (so-called image region) 36 in which a large number of unit pixels 20 of the back-illuminated solid-state imaging device are integrated (the wiring layer region 24 on the front side is removed).
This back-illuminated solid-state imaging device 35 has a p-field region 37 made of a low impurity concentration p-type semiconductor region reaching from the substrate surface to the substrate back surface so as to surround the periphery of the imaging region 36. The common p + accumulation layer 15 on the back side is provided extending to the periphery of the imaging region 36, that is, the p-field region 37, and is slightly separated from the imaging region 36 in the p-field region 37. A charge extraction region 30 in the p + region similar to that described above is provided in contact with the p + accumulation layer 15 on the back surface side and extending from the back surface side to the front surface side.

  According to the backside illumination type solid-state imaging device 35 according to the present embodiment, by providing the charge extraction region 30 in the field region 37 around the imaging region 36, when light is irradiated from the backside, it is generated by photoelectric conversion. Of the electron / hole pairs, even if the holes are collected in the p + accumulation layer 15 on the back surface side, the holes can be extracted through the p + charge extraction region 30 and through the contact portion on the substrate surface side. Therefore, similarly to the above, it is possible to prevent a decrease in sensitivity and still maintain a good amount of pixel light and linearity of output. Furthermore, a certain image quality can be guaranteed.

In still another embodiment of the backside illumination type solid-state imaging device according to the present invention, a structure in which FIG. 2 and FIG. 5 are combined, that is, a charge extraction region 30 is provided for each pixel region 20, and an imaging region 36 is further provided. The charge extraction region 30 may be provided around the periphery of the substrate.
According to the backside illumination type solid-state imaging device of the present embodiment, the synergistic action of the charge extraction region 30 in the pixel region 20 and the charge extraction region 30 around the imaging region 36 prevents further reduction in sensitivity, and the pixel The linearity between the amount of light and the output can be satisfactorily maintained.

  In the above example, the present invention is applied to a CMOS solid-state imaging device. In addition, a photodiode charge storage region and a vertical transfer register serving as a photoelectric conversion unit are formed on the substrate surface side, and a support substrate is bonded to the outermost surface side. The present invention can also be applied to a back-illuminated CCD solid-state imaging device having an accumulation layer at the back side interface of the photodiode facing the back side of the substrate. In this case, the pixel separation region and the feel region outside the imaging region are formed so as to reach the substrate rear surface from the substrate surface in a semiconductor region having a different conductivity type from the photodiode serving as the photoelectric conversion unit, as described above. / And a charge extraction region is formed in the field region.

  In the above example, a structure using electrons as signal charges has been described. However, a pixel structure in which the p region and the n region are inverted may be used, and holes are used as signal charges, and electrons are extracted in the extraction region. It may be formed.

  In the above-described back-illuminated solid-state imaging device, the configuration of one photodiode and four transistors has been described. However, any number of transistors may be used for reading signal from the photodiode and transferring signal charges.

The present invention can constitute an electronic device module and a camera module by incorporating the above-described back-illuminated semiconductor elements 1 and 35 and the like.
FIG. 6 is a configuration diagram of an embodiment of an electronic device module and a camera module according to the present invention.
The electronic device module or camera module 40 of the present embodiment includes a back-illuminated solid-state imaging device 1 (or 35 or a combination thereof), an optical lens system 41, an input / output unit 42, a signal processing device (Digital Signal Processors) 43, an optical device. A central processing unit (CPU) 44 for controlling the lens system is incorporated into one to form a module. In addition, as the electronic device module or the camera module 45, a module can be formed only by the back-illuminated solid-state imaging device 1 (or 35 or a combination thereof), the optical lens system 41, and the input / output unit 42. An electronic device module or a camera module 46 including the back-illuminated solid-state imaging device 1, the optical lens system 41, the input / output unit 42, and a signal processing device (Digital Signal Processors) 43 can be configured.

  According to the electronic device module and the camera module according to the present embodiment, since the sensitivity of the back-illuminated solid-state imaging device is improved, when assembled in the electronic device module and the camera module, the sensitivity is prevented from decreasing with time. Since the balance is not changed, the image quality characteristic of the module is further improved.

  1, 35... Back-illuminated solid-state imaging device, 2... Silicon semiconductor substrate, 2 A... N semiconductor region, 3... Photodiode, 3 B. 6... Amplifier transistor 7.. Vertical selection transistor 8.. Gate electrode 9 9 Vertical signal line 12 p Accumulation layer 13 Pixel separation region 14 n Source and drain Area, 15 ·· p + accumulation layer, 16 ·· p-type semiconductor well region, 17 ·· horizontal selection transistor, 20 ·· unit pixel, 21 ·· on-chip lens, 22 ·· on-chip color filter, 24 ·· · Wiring region, 24a · · Wiring layer, 25 · · Support substrate, 26 · · Interlayer insulation film, 30 · · Charge extraction region, 31, 32, 33 · · ..., Potential gradient, 36 .. imaging area, 37 .. p-field area, 40, 46 .. electronic equipment module (or camera module), 41 .. optical lens system, 42. , 43... Signal processing devices (Digital Signal Processors), 44... Central processing unit, 51... Back-illuminated CMOS solid-state image sensor, 53. 57, 58, 59... Drain region (n + region), 60, unit pixel, 61... N-type silicon semiconductor substrate, 61A... N semiconductor region (region), 61B... N + semiconductor region (n + region) 62..Pixel isolation region, 64..p + accumulation layer (charge storage layer), 65..p-channel region, 67..gate electrode 68 ... p + accumulation layer, 71 ... potential distribution (solid line), 71a ... potential gradient (dashed line), 71b ... potential gradient

Claims (6)

On the surface side of the semiconductor substrate, a charge storage region in the photoelectric conversion unit of each pixel and an element for performing a signal charge reading operation are formed,
An accumulation layer of a different conductivity type from the photoelectric conversion part is formed on the light irradiation surface on the back surface side of the semiconductor substrate and the front surface side,
Among the electron-hole pairs generated in the photoelectric conversion unit, charges not used as signal charges are guided from the back side to the front side through the accumulation layer on the back side, and other than the photoelectric conversion unit of the pixel A charge extraction region that is extracted from the region;
The charge extraction region is formed in an impurity region having the same conductivity type as the pixel isolation region and having a higher concentration than the pixel isolation region, in a pixel isolation region having a conductivity type different from that of the photoelectric conversion unit,
The photoelectric conversion unit is surrounded by an accumulation layer and a pixel separation region formed on the back side and the front side of the semiconductor substrate. The backside illumination type solid-state imaging device according to claim 1, wherein the charge extraction region is formed in contact with an accumulation layer formed on the backside and the frontside. An electronic device module including a back-illuminated solid-state imaging device, an optical lens system, and signal processing means,
The back-illuminated solid-state image sensor is
On the surface side of the semiconductor substrate, a charge storage region in the photoelectric conversion unit of each pixel and an element for performing a signal charge reading operation are formed,
An accumulation layer of a different conductivity type from the photoelectric conversion part is formed on the light irradiation surface on the back surface side of the semiconductor substrate and the front surface side,
Among the electron-hole pairs generated in the photoelectric conversion unit, charges not used as signal charges are guided from the back side to the front side through the accumulation layer on the back side, and other than the photoelectric conversion unit of the pixel Has a charge extraction region from the region,
The charge extraction region is formed in an impurity region having the same conductivity type as the pixel isolation region and having a higher concentration than the pixel isolation region, in a pixel isolation region having a conductivity type different from that of the photoelectric conversion unit,
The photoelectric conversion unit is an electronic device module surrounded by an accumulation layer and a pixel separation region formed on a back surface side and a front surface side of the semiconductor substrate. The electronic device module according to claim 3 , wherein the charge extraction region of the back-illuminated solid-state imaging element is formed in contact with an accumulation layer formed on the back surface side and the front surface side . A back-illuminated solid-state imaging device, a camera module including an optical lens system,
The back-illuminated solid-state image sensor is
On the surface side of the semiconductor substrate, a charge storage region in the photoelectric conversion unit of each pixel and an element for performing a signal charge reading operation are formed,
An accumulation layer of a different conductivity type from the photoelectric conversion part is formed on the light irradiation surface on the back surface side of the semiconductor substrate and the front surface side,
Among the electron-hole pairs generated in the photoelectric conversion unit, charges not used as signal charges are guided from the back side to the front side through the accumulation layer on the back side, and other than the photoelectric conversion unit of the pixel A charge extraction region that is extracted from the region;
The charge extraction region is formed in an impurity region having the same conductivity type as the pixel isolation region and having a higher concentration than the pixel isolation region, in a pixel isolation region having a conductivity type different from that of the photoelectric conversion unit,
The photoelectric conversion unit is a camera module surrounded by an accumulation layer and a pixel separation region formed on a back surface side and a front surface side of the semiconductor substrate. The camera module according to claim 5 , wherein the charge extraction region of the back-illuminated solid-state imaging device is formed in contact with an accumulation layer formed on the back side and the front side .

Images