JP5005227B2 - Photodetection element and method for manufacturing photodetection element - Google Patents

Description

  The present invention relates to a light detection element and a method for manufacturing the light detection element.

In recent years, among photodetecting elements such as photodiodes, a photodetecting element in which both electrodes of an anode electrode and a cathode electrode are provided on the same surface has been disclosed in, for example, Patent Document 1. An example (cross-sectional view) of such a light detection element is shown in FIG. In the photodetector 100 shown in FIG. 6, an insulating layer 91, an n ⁺ type buried layer 92, and an n ⁻ type layer 93 are sequentially stacked on a support substrate 90. A p ⁺ type layer 94 is provided on the surface layer of the n ⁻ type layer 93, and the p ⁺ type layer 94 is connected to the anode electrode 96 through an opening of the insulating film 95 provided on the n ⁻ type layer 93. Yes. Further, in order to electrically connect the cathode electrode 97 and the n ⁺ type buried layer 92, an n ⁺ type connection layer 98 extending from the surface of the n ⁻ type layer 93 to the n ⁺ type buried layer 92 is formed. The n ⁺ type connection layer 98 is formed from the surface of the n ⁻ type layer 93 by ion implantation (that is, by implanting an impurity indicating n type).
JP 2002-176190 A

The photodetection element 100 having the above-described configuration is made of silicon (Si), and thus can be manufactured at a lower cost than an element using a compound semiconductor. Must be capable of forming a thick depletion layer. In order to form a thick depletion layer, the n ⁻ type layer 93 needs to be thickened. That is, the n ⁺ type buried layer 92 needs to be provided at a position sufficiently separated from the surface of the n ⁻ type layer 93 (p ⁺ type layer 94). Along with this, the n ⁺ type connection layer 98 must be provided deeply from the surface of the n ⁻ type layer 93 to the n ⁺ type buried layer 92. However, it is difficult to provide such a deep n ⁺ -type connection layer 98 by ion implantation. For this reason, it is difficult to provide a thick depletion layer in the photodetecting element 100 made of silicon as described above, and it is therefore difficult to improve the response speed.

  Accordingly, an object of the present invention is to improve the response speed with respect to a photodetecting element in which both an anode electrode and a cathode electrode are provided on the same surface.

  The photodetecting element of the present invention includes 1) a semiconductor substrate, 2) an insulating layer provided on the semiconductor substrate, and 3) an insulating layer provided on the insulating layer on the opposite side of the bonding surface with the insulating layer. A semiconductor mesa portion having a formed main surface; and 4) first and second electrodes provided on the main surface of the semiconductor mesa portion, wherein the semiconductor mesa portion is bonded to the insulating layer. A first impurity region having a first conductivity type provided on the surface and an impurity having a first conductivity type provided on the first impurity region and having a lower concentration than the first impurity region. A light detection region including a low concentration impurity region; an impurity region provided in the low concentration impurity region and having a second conductivity type; and the main surface so as to surround the light detection region in the low concentration impurity region. The low-concentration impurity is provided as an impurity having the first conductivity type. A second impurity region having a concentration higher than that of the region, and a side surface of the semiconductor mesa portion so as to surround the photodetection region in the low concentration impurity region, and the impurity indicating the first conductivity type is reduced to the low concentration region. A third impurity region having a higher concentration than the concentration impurity region, and the semiconductor substrate is provided with a through hole penetrating the semiconductor substrate and reaching the insulating layer at a position corresponding to the light detection region. The third impurity region is electrically connected to the first impurity region and the second impurity region, and the first electrode is the impurity region indicating the second conductivity type of the photodetection region. The second electrode is electrically connected to the second impurity region.

  According to the photodetecting element of the present invention, the first and second electrodes are provided on the same surface (main surface) of the semiconductor mesa portion. The second electrode is electrically connected to the first impurity region via the second and third impurity regions. Since the third impurity region is provided on the side surface of the semiconductor mesa portion, the third impurity region can be easily formed on the side surface of the semiconductor mesa portion even if the semiconductor mesa portion is thick. Therefore, a thick semiconductor mesa portion, that is, a semiconductor mesa portion having a large distance from the surface of the semiconductor mesa portion to the first impurity region (thickness of the light detection region) can be formed. Therefore, since a thick depletion layer can be formed in the semiconductor mesa portion, the response speed can be improved. In addition, a through hole is provided in the semiconductor substrate at a position corresponding to the light detection region. For this reason, the light incident from the through hole passes through the insulating layer and the first impurity region without passing through the semiconductor substrate, and reaches the low concentration impurity region (in the light detection region). Therefore, since the intensity of the incident light is larger than that when passing through the semiconductor substrate, the photosensitivity can be improved.

  In the photodetecting element of the present invention, the second electrode covers a side surface of the semiconductor mesa portion. Since the second electrode covers the side surface of the semiconductor mesa portion, it can block the incidence of light from the side surface of the semiconductor mesa portion. For this reason, noise is reduced.

  The method for manufacturing a photodetecting element of the present invention includes: 1) a semiconductor substrate, an insulating layer provided on the semiconductor substrate, a first impurity region having a first conductivity type provided on the insulating layer, Providing a substrate having a low-concentration impurity region provided on the first impurity region and including an impurity having a first conductivity type at a lower concentration than the first impurity region; Forming a photodetection region including an impurity region exhibiting a second conductivity type in the concentration impurity region; and 3) shaping the first impurity region and the low concentration impurity region into a mesa shape to form the photodetection region. A step of forming a semiconductor mesa part containing 4), or 4) diffusing an impurity indicating the first conductivity type at a higher concentration than the low-concentration impurity region so as to surround the photodetection region on the surface of the semiconductor mesa part, or Ion implantation As a result, a second impurity region is formed and an impurity indicating the first conductivity type is diffused or ion-implanted in a higher concentration than the low-concentration impurity region so as to surround the photodetection region on the side surface of the semiconductor mesa portion Forming a third impurity region and electrically connecting the first impurity region, the second impurity region, and the third impurity region; and 5) second conductivity of the photodetection region. A first electrode is formed on the semiconductor mesa portion so as to be electrically connected to the impurity region having a type, and a second electrode is formed on the semiconductor mesa portion so as to be electrically connected to the second impurity region. And 6) forming a through hole that penetrates the semiconductor substrate and reaches the insulating layer at a position corresponding to the light detection region.

  According to the method for manufacturing a photodetector element of the present invention, when the semiconductor mesa portion is formed by etching the first impurity region and the low-concentration impurity region, the insulating layer functions as an etching stopper. Become. This facilitates the formation of the semiconductor mesa portion. Furthermore, the third impurity region is provided on the side surface of the semiconductor mesa portion. For this reason, even if the semiconductor mesa portion is thick, the third impurity region can be easily formed on the side surface of the semiconductor mesa portion. Accordingly, a thick semiconductor mesa portion, that is, a semiconductor mesa portion having a large distance from the surface of the semiconductor mesa portion to the first impurity region (thickness of the light detection region) can be formed. Thus, since a thick depletion layer can be formed in the semiconductor mesa portion, the response speed is improved. In addition, when the through hole is formed at a position corresponding to the light detection region by etching the semiconductor substrate, the insulating layer serves as an etching stopper. For this reason, formation of a through-hole becomes easy.

  According to the present invention, the response speed can be improved with respect to the photodetecting element in which both the anode electrode and the cathode electrode are provided on the same surface.

  Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the drawings. In the description of the drawings, the same reference numerals are assigned to the same elements, and duplicate descriptions may be omitted.

With reference to FIG.1 and FIG.2, the structure of the photodiode 1 (photodetection element) which concerns on embodiment is demonstrated. The photodiode 1 generates a carrier by incidence of light to be detected, and outputs the generated carrier in the form of a detection signal. FIG. 1A is a plan view of the photodiode 1 according to the embodiment, and FIG. 1B is a bottom view of the photodiode 1 in FIG. 1A and 1B show a photodiode array in which a plurality of photodiodes 1 are provided in parallel. As shown in FIG. 1A, the photodiode 1 includes a semiconductor substrate 2 and a semiconductor mesa portion 5 provided on the semiconductor substrate 2. The semiconductor substrate 2 is, for example, a silicon substrate or the like that supports the semiconductor mesa unit 5 provided on the semiconductor substrate 2, and the semiconductor mesa unit 5 includes a mesa-like n ⁻ type layer 8 (low concentration impurity region). It is a semiconductor layer.

The n ⁻ type layer 8 is a semiconductor layer containing an n-type (first conductivity type) impurity (for example, arsenic or phosphorus). The photodiode 1 further includes an n ⁺ type region 14 (second impurity region) and a p ⁺ type region 16 (impurity region showing the second conductivity type), and a light detection region S1 that detects incident light. . The n ⁺ -type region 14 and the p ⁺ -type region 16 are provided on the main surface (surface M5 shown in FIG. 2A, etc.) of the semiconductor mesa portion 5 in the n ⁻ -type layer 8. The n ⁺ type region 14 is provided so as to surround the p ⁺ type region 16 on the surface M5 (so as to surround a photodetection region S1 described later). The n ⁺ -type region 14 is a semiconductor region containing an n-type impurity at a higher concentration than the n ⁻ -type layer 8, and the p ⁺ -type region 16 is relatively high in concentration (for example, higher than the n ⁻ -type layer 8). This is a semiconductor region containing an impurity (for example, boron) having a p-type (second conductivity type) concentration. Photodetection region S1 is, n ^- is provided in the mold layer 8, p ⁺ -type region 16, p ⁺ -type region 16 and the n ^- in the region including the pn formed in the boundary of the mold layer 8 junction is there.

The photodiode 1 further includes a cathode electrode 12 (second electrode) and an anode electrode 20 (first electrode) provided on the main surface (surface M5) of the semiconductor mesa unit 5. That is, the cathode electrode 12 and the anode electrode 20 are provided on the same surface (surface M5). The cathode electrode 12 and the anode electrode 20 are made of a conductive metal such as aluminum. The cathode electrode 12 is provided so as to cover the n ⁺ type region 14. The cathode electrode 12 and the n ⁺ type region 14 are electrically connected. The anode electrode 20 is provided near the end in the longitudinal direction on the surface M5. The p ⁺ type region 16 is provided near the center of the surface M5 and extends to the lower part of the anode electrode 20. The p ⁺ type region 16 (a part of the light detection region S1) and the anode electrode 20 are electrically connected. Further, as shown in FIG. 1B, the surface M1 opposite to the surface M5 is provided with an opening of a light incident hole H1 (through hole) through which the detected light enters. The light incident hole H1 is provided at a position corresponding to the p ⁺ type region 16 (a part of the light detection region S1), and is a hole that penetrates the semiconductor substrate 2 and reaches the insulating layer 4 (FIG. 1A )reference). The light incident hole H1 has a substantially cylindrical shape having a circular cross section with a diameter (diameter) of about 100 μm.

2A is a diagram showing the photodiode 1 viewed from a cross section taken along the line II shown in FIG. 1A, and FIG. 2B is a diagram shown in FIG. It is a figure which shows the photodiode 1 seen from the cross section taken along the II-II line. As shown in FIG. 2A, the light incident hole H1 provided at a position corresponding to the light detection region S1 extends from the surface M1 of the semiconductor substrate 2 to the other surface M2 of the semiconductor substrate 2. The photodiode 1 further includes an insulating layer 4, an n ⁺ -type buried layer 6 (first impurity region), and an insulating film 18. A semiconductor mesa portion 5 is provided on the insulating layer 4, and the semiconductor mesa portion 5 has an n ⁺ type buried layer 6 and an n ⁻ type layer 8. The main surface (surface M <b> 5) of the semiconductor mesa unit 5 is formed on the side opposite to the bonding surface with the insulating layer 4. The insulating layer 4 is provided on the surface M2 of the semiconductor substrate 2, and the n ⁺ type buried layer 6 is provided on the surface M3 of the insulating layer 4 (in other words, the n ⁺ type buried layer 6 is The semiconductor mesa portion 5 is provided on the joint surface with the insulating layer 4). The insulating layer 4 is made of, for example, silicon oxide or the like, and prevents carriers generated when light to be detected is incident on the semiconductor substrate 2 from flowing into the n ⁺ -type buried layer 6 and the n ⁻ -type layer 8. An n ⁻ type layer 8 is provided on the surface M 4 of the n ⁺ type buried layer 6. The n ⁺ -type buried layer 6 is a semiconductor layer that contains an n-type impurity at a higher concentration than the n ⁻ -type layer 8.

Photodiode 1, ^{n +} -type connection region 10 has further a (third impurity region), ^{n +} -type connection region 10, n ^- n so as to surround the light detection regions S1 in the mold layer 8 ^- -type It is provided on the side surface M6 of the layer 8. Similar to the n ⁺ type buried layer 6 and the n ⁺ type region 14, the n ⁺ type connection region 10 is a semiconductor region containing an impurity indicating n type at a higher concentration than the n ⁻ type layer 8. The n ⁺ type connection region 10 is electrically connected to the n ⁺ type buried layer 6 and the n ⁺ type region 14.

The photodiode 1 further includes an insulating film 18, and the insulating film 18 is provided on the surface M <b> 5 and the side surface M <b> 6 of the semiconductor mesa unit 5. The insulating film 18 is made of, for example, silicon oxide. The insulating film 18 has a contact hole H 2, and the contact hole H 2 is provided on the n ⁺ -type region 14. The cathode electrode 12 extends along the insulating film 18 on the surface M5 and the side surface M6 from the region of the surface M3 of the insulating layer 4 excluding the semiconductor mesa portion 5 to the contact hole H2. The cathode electrode 12 is electrically connected to the n ⁺ type region 14 through the contact hole H2. As shown in FIG. 2B, the insulating film 18 has a contact hole H 3, and the contact hole H 3 is provided on the p ⁺ -type region 16. The anode electrode 20 is electrically connected to the p ⁺ type region 16 through the contact hole H3. The cathode electrode 12 and the anode electrode 20 are not provided on the light incident hole H1. That is, the cathode electrode 12 and the anode electrode 20 are provided on the semiconductor substrate 2. Accordingly, since the stress load applied to the photodiode 1 is supported by the semiconductor substrate 2 via the cathode electrode 12 and the anode electrode 20, the structural strength of the photodiode 1 can be improved. In the photodiode array in which a plurality of photodiodes 1 are provided in parallel, the photodiodes 1 are arranged in parallel at a pitch of about 0.25 mm. That is, the distance connecting the centers of the light incident holes H1 of two adjacent photodiodes 1 is about 0.25 mm.

In the photodiode 1 configured as described above, light to be detected is incident on the n ⁻ type layer 8 from the light incident hole H 1 through the insulating layer 4 and the n ⁺ type buried layer 6. Carriers are generated in the n ⁻ type layer 8 by the incidence of the light to be detected. Carriers of a predetermined charge (for example, negative charges) move to the light detection region S1 and are extracted in the form of an electric signal through the anode electrode 20.

Next, a manufacturing process of the photodiode 1 according to the embodiment will be described with reference to FIGS. First, an n ⁻ type semiconductor substrate 8a made of Si crystal is prepared. The n ⁻ type semiconductor substrate 8a has a thickness of about 300 μm and a specific resistance of about 1 kΩ · cm (FIG. 3A). Arsenic (As) ions are implanted into the n ⁻ type semiconductor substrate 8a from its surface. The energy of As ions to be implanted is about 80 keV, and the dose is about 2 × 10 ¹⁵ cm ⁻² . As a result, an n ⁺ type semiconductor layer 6a is formed on the surface layer of the n ⁻ type semiconductor substrate 8a (FIG. 3B). Moreover, by oxidizing the surface of the n ⁺ -type semiconductor layer 6a, an insulating layer 4a made of n ⁺ -type semiconductor layer 6a on the silicon oxide (SiO _2). The thickness of the insulating layer 4a is 0.5 μm (FIG. 3C).

Next, while heating the structure composed of the insulating layer 4a, the n ⁺ type semiconductor layer 6a, and the n ⁻ type semiconductor substrate 8a to the supporting substrate 2a made of Si crystal prepared separately and having a thickness of about 300 μm at about 1000 degrees Celsius. to paste together. At this time, the surface of the insulating layer 4a is used as a bonding surface with the support substrate 2a (FIG. 3D). Further, the surface of the n ⁻ type semiconductor substrate 8a is planarized by polishing. Further, by this polishing, the sum of the thicknesses of the n ⁻ type semiconductor substrate 8a and the n ⁺ type semiconductor layer 6a is adjusted to a desired thickness, for example, about 11 μm. Thus, the insulating layer 4 (corresponding to the insulating layer 4a) is provided on the surface M2 of the semiconductor substrate 2 (corresponding to the support substrate 2a), and the n ⁺ type buried layer 6 (n ⁺ type semiconductor layer 6a) indicating the first conductivity type is present. There corresponds) is on surface M3 of the insulating layer 4 on, n containing an impurity imparting n-type low concentration than n ⁺ -type buried layer 6 ^- -type layer 8 (n ^- corresponds to the type semiconductor substrate 8a) is n ⁺ A substrate having the structure shown in FIG. 4A on the surface M4 of the mold buried layer 6 is obtained.

Then, as shown in FIG. 4 (b), n ^- p ⁺ -type region 16 is formed by diffusing p-type impurities relatively high concentration on the surface M5 in type layer 8, a p ⁺ -type region 16 A light detection region S1 is formed. Next, as shown in FIG. 4C, until the insulating layer 4 is exposed, the n ⁺ type buried layer 6 and the n ⁻ type layer 8 are separated from the p ⁺ type region 16 and its surroundings (that is, the light detection region S1 and the electrode). It is shaped into a mesa shape by dry etching while leaving the region. Thereby, the semiconductor mesa portion 5 including the light detection region S1 is formed. In this case, the insulating layer 4 functions as an etching stopper. Next, as shown in FIG. 4D, n ⁺ -type impurity is diffused at a higher concentration than the n ⁻ -type layer 8 so as to surround the light detection region S 1 on the surface M 5 of the semiconductor mesa portion 5. A mold region 14 is formed. Further, the n ⁺ -type connection region 10 is formed by diffusing an n-type impurity at a higher concentration than the n ⁻ -type layer 8 on the side surface M6 of the semiconductor mesa portion 5 so as to surround the light detection region S1. As a result, the n ⁺ type buried layer 6, the n ⁺ type region 14 and the n ⁺ type connection region 10 are electrically connected.

Next, as shown in FIG. 5A, an insulating film 18 is formed on the surface M5 and the side surface M6. Then, a contact hole H 2 is formed in the insulating film 18 on the n ⁺ type region 14, and a contact hole H 3 is formed in the insulating film 18 on the p ⁺ type region 16. Next, as shown in FIG. 5B, the cathode electrode 12 is formed on the insulating film on the surface M5 and the side surface M6 from the region of the surface M3 of the insulating layer 4 excluding the semiconductor mesa portion 5 to the contact hole H2. 18 and is electrically connected to the n ⁺ -type region 14 through the contact hole H2. That is, the cathode electrode 12 is formed on the semiconductor mesa portion 5 so as to be electrically connected to the n ⁺ -type region 14. At the same time, the anode electrode 20 is provided on the p ⁺ type region 16 including the contact hole H3, and is electrically connected to the p ⁺ type region 16 through the contact hole H3. That is, the anode electrode 20 is formed on the semiconductor mesa portion 5 so as to be electrically connected to the light detection region S1. Next, as shown in FIG. 5C, the light incident hole H1 that penetrates the semiconductor substrate 2 and reaches the insulating layer 4 is formed in the light detection region by dry etching or the like until the insulating layer 4 is exposed. It is formed at a position corresponding to S1. In this case, the insulating layer 4 functions as an etching stopper.

As described above, in the photodiode 1, both the cathode electrode 12 and the anode electrode 20 are provided on the same surface M <b> 5 of the semiconductor mesa unit 5. The cathode electrode 12 is electrically connected to the n ⁺ type buried layer 6 via the n ⁺ type region 14 and the n ⁺ type connection region 10. Since the n ⁺ type connection region 10 is provided on the side surface M6 of the semiconductor mesa unit 5, the n ⁺ type connection region 10 is easily formed on the side surface M6 of the semiconductor mesa unit 5 even if the semiconductor mesa unit 5 is thick. it can. For this reason, it is possible to form a thick semiconductor mesa portion 5, that is, a semiconductor mesa portion 5 having a large distance from the surface M5 to the n ⁺ -type buried layer 6 (thickness of the light detection region S1). Therefore, since a thick depletion layer can be formed in the semiconductor mesa portion 5, the response speed can be improved. A light incident hole H1 is provided on the light detection region S1. For this reason, the light incident from the light incident hole H1 passes through the insulating layer 4 and the n ⁺ type buried layer 6 and does not pass through the semiconductor substrate 2 and enters the n ⁻ type layer 8 (in the light detection region S1). It reaches. Therefore, since the intensity of incident light is larger than that when passing through the semiconductor substrate 2, the photosensitivity can be improved. Further, since the cathode electrode 12 covers the side surface M6 of the semiconductor mesa unit 5, the incidence of light from the side surface M6 can be blocked. For this reason, noise is reduced. The cathode electrode 12 also extends on the surface M3 of the insulating layer 4. For this reason, the strength of the insulating layer 4 and the semiconductor substrate 2 is reinforced by the cathode electrode 12. Further, the cathode electrode 12 and the anode electrode 20 are not provided on the light incident hole H1. Therefore, since the semiconductor substrate 2 supports the stress load applied to the photodiode 1 via the cathode electrode 12 and the anode electrode 20, the structural strength of the photodiode 1 can be improved.

The present invention is not limited to the above-described embodiment. For example, the cathode electrode 12 is configured to cover the side surface M6 of the semiconductor mesa unit 5 and the surface M3 of the insulating layer 4. However, the present invention is not limited thereto, and the cathode electrode 12 covers the side surface M6 without covering the surface M3. Alternatively, a configuration in which neither the surface M3 nor the surface M6 is covered may be employed. Further, the p-type and n-type conductivity types of the photodiode 1 according to the embodiment may be interchanged so as to be opposite to those described above. That is, the n ⁺ -type buried layer 6 indicating the n-type is a p ⁺ -type buried layer indicating the p-type, the n ⁻ -type layer 8 indicating the n-type is the p ⁻ -type layer indicating the p ^- type, and the n-type is The n ⁺ type connection region 10 shown is a p ⁺ type connection region showing p type, the n ⁺ type region 14 showing n type is a p ⁺ type region showing p type, and a p ⁺ type region 16 showing p type. May be an n ⁺ -type region indicating n-type. In FIGS. 1 to 5 shown as the embodiment, the side surface M6 of the semiconductor mesa portion 5 is nearly perpendicular to the surface M3, but the side surface M6 is inclined to the surface M3. It may be provided. Further, the n ⁺ type region 14 and the n ⁺ type connection region 10 and the p ⁺ type region 16 may be formed by ion implantation regardless of diffusion. Further, since the semiconductor mesa portion 5 is thick, the sensitivity is improved even for light having a relatively small absorption in Si. Although not provided in the above embodiment, if a metal or the like of an electrode is provided at a position on the surface M5 corresponding to the light incident hole H1, and the light is reflected by this electrode, the sensitivity is further improved.

It is a figure which shows the surface of the photodiode which concerns on embodiment. It is the figure which looked at the photodiode which concerns on embodiment from the cross section. It is a figure for demonstrating the manufacturing process of the photodiode which concerns on embodiment. It is a figure for demonstrating the manufacturing process of the photodiode which concerns on embodiment. It is a figure for demonstrating the manufacturing process of the photodiode which concerns on embodiment. It is a figure which shows the cross-section of the conventional photodiode.

Explanation of symbols

1 ... photodiode, 2 ... semiconductor substrate, 2a ... supporting substrate, 4, 4a ... insulating layer, 5 ... semiconductor mesa portion, 6 ... ^{n +} -type buried layer, 6a ... n ⁺ -type semiconductor layer, 8 ... n ^- -type layer, 8a ... n ^- type semiconductor substrate, 10 ... n ⁺ type connection region, 12 ... cathode electrode, 14 ... n ⁺ type region, 16 ... p ⁺ type region, 18 ... insulating film, 20 ... anode electrode.

Claims (5)

A semiconductor substrate;
An insulating layer provided on the semiconductor substrate;
A semiconductor mesa portion provided on the insulating layer and having a main surface formed on the opposite side of the bonding surface with the insulating layer;
First and second electrodes provided on the main surface of the semiconductor mesa unit,
The semiconductor mesa unit is
A first impurity region having a first conductivity type provided on a joint surface with the insulating layer;
A low-concentration impurity region provided on the first impurity region and including an impurity exhibiting a first conductivity type at a lower concentration than the first impurity region;
A light detection region provided in the low-concentration impurity region and including an impurity region having a second conductivity type;
A second impurity region that is provided on the main surface so as to surround the photodetection region in the low concentration impurity region and includes an impurity having a first conductivity type at a higher concentration than the low concentration impurity region;
A third impurity region that is provided on a side surface of the semiconductor mesa portion so as to surround the photodetection region in the low concentration impurity region and contains an impurity having a first conductivity type at a higher concentration than the low concentration impurity region. And
In the semiconductor substrate, the first electrode and the second electrode viewed from a direction perpendicular to the main surface at a position where a through-hole penetrating the semiconductor substrate and reaching the insulating layer corresponds to the photodetection region. It is provided not to overlap with
The third impurity region is electrically connected to the first impurity region and the second impurity region;
The first electrode is electrically connected to the impurity region indicating the second conductivity type of the light detection region,
The light detection element, wherein the second electrode is electrically connected to the second impurity region.   The photodetecting element according to claim 1, wherein the second electrode covers a side surface of the semiconductor mesa unit. In the cross section orthogonal to the main surface, the thickness of the third impurity region in the direction of the intersection along the cross line of the main surface and the cross section is greater than the thickness of the second impurity region in the direction of the cross line. The light detection element according to claim 1, wherein the light detection element is thin. A semiconductor substrate; an insulating layer provided on the semiconductor substrate; a first impurity region having a first conductivity type provided on the insulating layer; and a first impurity region provided on the first impurity region. Providing a substrate having a low-concentration impurity region containing an impurity exhibiting one conductivity type at a lower concentration than the first impurity region;
Forming a light detection region including an impurity region having a second conductivity type in the low concentration impurity region;
Forming a semiconductor mesa portion including the photodetection region by shaping the first impurity region and the low-concentration impurity region into a mesa shape;
A second impurity region is formed by diffusing or ion-implanting an impurity having the first conductivity type at a higher concentration than the low-concentration impurity region so as to surround the photodetection region on the surface of the semiconductor mesa portion. At the same time, a third impurity region is formed by diffusing or ion-implanting an impurity indicating the first conductivity type at a higher concentration than the low concentration impurity region so as to surround the photodetection region on the side surface of the semiconductor mesa portion. Electrically connecting the first impurity region, the second impurity region, and the third impurity region;
A first electrode is formed on the semiconductor mesa portion so as to be electrically connected to the impurity region having the second conductivity type of the light detection region, and is electrically connected to the second impurity region. Forming a second electrode on the semiconductor mesa portion;
Look including a step of forming a through-hole extending in the insulating layer to penetrate the semiconductor substrate at a position corresponding to the light detection region,
The mesa portion is provided on the insulating layer and has a main surface formed on the opposite side of the bonding surface with the insulating layer,
The through hole is formed so as not to overlap the first electrode and the second electrode when viewed from a direction perpendicular to the main surface.
A method for manufacturing a photodetecting element. In a cross section orthogonal to the main surface, the thickness of the third impurity region in the direction of the intersection along the cross line of the main surface and the cross section is set to be greater than the thickness of the second impurity region in the direction of the cross line. The method for manufacturing a photodetecting element according to claim 4, wherein the photodetecting element is formed thin.

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