JP4935227B2 - Temperature detection circuit, operation method thereof, and semiconductor device - Google Patents

Description

The present invention relates to a temperature detection circuit, an operation method thereof, and a semiconductor device incorporating the temperature detection circuit.

  Some semiconductor devices have a built-in temperature detection circuit that detects a temperature change in an environment in which the device is placed. In the manufacturing stage of this type of semiconductor device, it is necessary to perform an operation test of the built-in temperature detection circuit. Conventionally, an operation test of a temperature detection circuit is performed by forming a heater using a region embedded in the vicinity of the temperature sensor portion in the semiconductor substrate forming the temperature detection circuit, and heating the heater using the heater. (For example, see Patent Document 1). In addition, the operation test of the temperature detection circuit is performed by observing a pseudo change in the output voltage by changing the resistance ratio depending on the operation of the switching element (see, for example, Patent Document 2).

Japanese Patent Laid-Open No. 10-325761 Japanese Patent No. 3322553

  However, the conventional technique described in Patent Document 1 has a problem that the efficiency of the operation test is lowered because it takes time until the temperature rises due to heating by the heater. In the prior art described in Patent Document 2, the ON resistance affects the detection result as an error by switching the switching element, and the switching element is used to increase the number of temperature detection voltage tests. There is a problem that it is necessary to add as many as that number, and the portion becomes more susceptible to parasitic resistance.

The present invention is a temperature detection circuit built in a power supply circuit , and can perform an operation test in a short time without changing the operating environment during an operation test of the power supply circuit. And its test method . Another object of the present invention is to provide a semiconductor device incorporating the temperature detection circuit.

In order to achieve the above object, the present invention provides a local voltage that is provided on a semiconductor substrate and generates a local voltage having a voltage value different from the power supply voltage based on a power supply voltage applied from the outside of the semiconductor substrate. In a temperature detection circuit that is provided in a power supply circuit that supplies a circuit unit, and the temperature varies depending on the environmental temperature using an element having a temperature dependency in order to give the local voltage value temperature dependency , A configuration is adopted in which a test circuit that changes the output by changing the current value of a constant current that flows in the temperature-dependent element is adopted.

  In the temperature detection circuit having the above-described configuration, the circuit operation of the power supply circuit can be confirmed without changing the environmental temperature (environmental condition) by incorporating the test circuit. Since this is an operation test by passing a constant current through a temperature-dependent element, the parasitic resistance and contact resistance of the switch element connected in series to the temperature-dependent element are used as elements for determining the current value. Not affected.

  According to the present invention, the operation test can be easily performed in a short time without changing the environmental temperature and without being affected by the parasitic resistance, and accordingly, the efficiency of the operation test can be increased. Cost reduction can be achieved.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

  Here, as a semiconductor device to which the present invention is applied, for example, a solid-state imaging device that detects the light intensity of incident light that has passed through a subject will be described as an example.

  FIG. 1 is a system configuration diagram showing an outline of a system configuration of a solid-state imaging device to which the present invention is applied. Here, a CMOS (Complementary Metal Oxide Semiconductor) image sensor will be described as an example of the solid-state imaging device.

  As shown in FIG. 1, a solid-state imaging device 10 according to this application example includes a pixel array unit 12, a vertical driving unit 13, a column circuit group 14, a horizontal driving unit 15, and a horizontal signal line on a semiconductor substrate (chip) 11. 16, an output unit 17, a control unit 18, a local voltage supply unit (power supply circuit) 19, and the like are mounted.

  The pixel array unit 12 has a configuration in which a large number of pixels 20 including photoelectric conversion elements that photoelectrically convert incident light into a charge amount corresponding to the light intensity are two-dimensionally arranged in a matrix (matrix shape). A specific circuit configuration of the pixel 20 will be described later. In the pixel array unit 12, pixel drive wirings 121 are wired for each pixel row and vertical signal lines 122 are wired for each pixel column in a matrix-like pixel arrangement.

  The vertical driving unit 13 sequentially selects and scans each pixel 20 of the pixel array unit 12 in units of rows, and supplies a necessary driving pulse (control pulse) to each pixel in the selected row through the pixel driving wiring 121. Here, although not shown, the vertical drive unit 13 sequentially selects the pixels 20 in units of rows and performs a read operation for reading a signal of each pixel 20 in the selected row, and the read scan. And a shutter scanning system for performing a shutter operation that discards (resets) the charges accumulated so far in the photoelectric conversion elements of the pixels 20 in the same row a time corresponding to the shutter speed before the readout scanning by the system. It has a configuration.

  The signal charge accumulation in the pixel 20 is from the timing when the unnecessary charge of the photoelectric conversion element is reset by shutter scanning by the shutter scanning system to the timing when the signal of the pixel 20 is read by readout scanning by the readout scanning system. Time (exposure time). That is, the electronic shutter operation is an operation that resets signal charges accumulated in the photoelectric conversion elements and newly starts accumulation of signal charges.

  A signal output from each pixel 20 in the selected row is supplied to the column circuit group 14 through each vertical signal line 122. In the column circuit group 14, each column circuit is arranged for each pixel column of the pixel array unit 12, that is, with a one-to-one correspondence with the pixel column, and a signal output from each pixel 20 for one row is output. A signal processing such as CDS (Correlated Double Sampling) or signal amplification for removing fixed pattern noise peculiar to the pixel is performed on the signal received for each pixel column. It is also possible to adopt a configuration in which each column circuit of the column circuit group 14 has an A / D (analog / digital) conversion function.

  The horizontal drive unit 15 includes a horizontal scanning circuit 151 and a horizontal selection switch group 152. The horizontal scanning circuit 151 is configured by a shift register or the like, and sequentially selects and scans each switch of the horizontal selection switch group 152, whereby a signal for one row after signal processing in each column circuit of the column circuit group 14 is a horizontal signal. The lines 16 are output in order.

  The output unit 17 performs various signal processing on signals sequentially supplied from each column circuit of the column circuit group 14 through the horizontal selection switch group 152 and the horizontal signal line 16 and outputs the processed signal as an output signal OUT. For example, the output unit 17 may perform only buffering processing, or may perform black level adjustment, correction of variation for each column, signal amplification, color-related processing, and the like before the buffering processing.

  The control unit 18 receives data for instructing the operation mode of the solid-state imaging device 10 from the outside of the substrate via an interface (not shown), outputs data including information on the solid-state imaging device 10 to the outside, and Based on the synchronization signal Vsync, the horizontal synchronization signal Hsync, and the master clock MCK, a clock signal, a control signal, and the like serving as a reference for the operation of the vertical drive unit 13, the column circuit group 14, the horizontal drive unit 15 and the like are generated. Give to the department.

  The local voltage supply unit 19 is configured by a charge pump circuit or the like, and is based on a power supply voltage Vdd-ground voltage GND given from the outside of the semiconductor substrate 11 which is a normal operating voltage of the solid-state imaging device 10. A voltage having a voltage value different from the operating voltage (hereinafter referred to as “local voltage”), for example, a negative voltage is generated, and the generated negative voltage is supplied to the vertical drive unit 13. The local voltage supply unit 19 is a feature of the present invention, and details thereof will be described later.

  In the CMOS image sensor, for example, for the purpose of reducing dark current, the gate voltage when the transfer transistor in the pixel 20 is turned off is set to a voltage on the off side of the voltage of the well in which the transfer transistor is formed. In order to obtain a negative voltage, a negative voltage generation circuit is provided (see, for example, JP-A-2002-217397). This negative voltage generation circuit corresponds to the local voltage supply unit 19.

(Pixel circuit)
FIG. 2 is a circuit diagram illustrating an example of a circuit configuration of the pixel 20. As shown in FIG. 2, the pixel 20 according to this circuit example includes four transistors of a transfer transistor 22, a reset transistor 23, an amplification transistor 24, and a selection transistor 25 in addition to the embedded photodiode 21 that is a photoelectric conversion element. It has a circuit configuration. Here, as the four transistors 22 to 25, for example, N-channel MOS transistors are used.

  For this pixel 20, a transfer wiring 121 </ b> A, a reset wiring 121 </ b> B, and a selection wiring 121 </ b> C are commonly wired as pixels driving wiring 121 to pixels in the same row.

  In FIG. 2, a photodiode 21 photoelectrically converts received light into photocharges (here, electrons) having a charge amount corresponding to the light intensity. The cathode of the photodiode 21 is electrically connected to the gate of the amplification transistor 24 through the transfer transistor 22. A node electrically connected to the gate of the amplification transistor 24 is referred to as an FD (floating diffusion) portion 26. The FD unit 26 has a function of holding the signal charge transferred from the photodiode 21 and converting the signal charge into a voltage.

  The transfer transistor 22 is connected between the cathode of the photodiode 21 and the FD unit 26, and is turned on when a transfer pulse TRF is applied to the gate via the transfer wiring 121A. The photocharge stored in the FD unit 26 is transferred to the FD unit 26.

  The reset transistor 23 is turned on when the drain is connected to the power supply wiring of the power supply voltage Vdd, the source is connected to the FD unit 26, and the gate is supplied with the reset pulse RST via the reset wiring 121B. Prior to the transfer of the signal charge to the unit 26, the FD unit 26 is reset by discarding the charge of the FD unit 26 to the power supply (Vdd) wiring.

  The amplification transistor 24 has a gate connected to the FD section 26 and a drain connected to the power supply wiring of the power supply wiring Vdd, and outputs the potential of the FD section 26 after being reset by the reset transistor 23 as a reset level. Thus, the potential of the FD portion 26 after the signal charge is transferred from the photodiode 21 is output as a signal level.

  For example, the selection transistor 25 has a drain connected to the source of the amplification transistor 24 and a source connected to the vertical signal line 122. That is, the amplifier transistor 24 and the vertical signal line 122 are connected in series with the amplifier transistor 24. The selection transistor 25 is turned on when a selection pulse SEL is applied to the gate via the selection wiring 121C, and the signal amplified by the amplification transistor 24 is output to the vertical signal line 122 with the pixel 20A selected.

  In this circuit example, the selection transistor 25 is connected between the amplification transistor 24 and the vertical signal line 122. However, the selection transistor 25 is connected between the amplification transistor 24 and the power supply Vdd. Is also possible.

  The pixel 20 is not limited to the above-described circuit configuration including the transfer transistor 22, the reset transistor 23, the amplification transistor 24, and the selection transistor 25. For example, the amplification transistor 24 is used as the selection transistor. A circuit configuration including three transistors that are also used may be used, and the configuration is not limited.

(Vertical drive unit)
FIG. 3 is a block diagram illustrating an example of the configuration of the vertical drive unit 13. As shown in FIG. 3, the vertical drive unit 13 includes a row selection circuit 131, a multiplexer 132, a level shifter 133, and an output buffer 134. Here, the ground and power supply input systems are not shown.

  The row selection circuit 131 includes a shift register or a decoder, and selectively scans the pixel rows of the pixel array unit 12 in accordance with a scanning signal or an address signal supplied from the control unit 18. The multiplexer 132 outputs the pixel driving pulse supplied from the control unit 18 as a transfer pulse TRF, a reset pulse RST, and a selection pulse SEL to the pixel row that is selectively scanned by the row selection circuit 131.

  The level shifter 133 performs level shift (level conversion) on the high level and low level of the pixel drive pulse supplied from the multiplexer 132 to predetermined levels, respectively. The pixel drive pulse level-shifted by the level shifter 133, that is, the transfer pulse TRF, the reset pulse RST, and the selection pulse SEL are passed through the low impedance output buffer 134 to the pixel drive wiring 121 (that is, the transfer wiring 121A, the reset wiring 121B, and the selection wiring). 121C).

  For example, a negative voltage is supplied as a local voltage from the local voltage supply unit 19 to the level shifter 133 and the output buffer 134. The level shifter 133 and the output buffer 134 are provided corresponding to each of the transfer pulse TRF, the reset pulse RST, and the selection pulse SEL.

(Output buffer)
Here, among the level shifter 133 and the output buffer 134 to which the negative voltage is supplied, for example, the output buffer 134 that handles the transfer pulse TRF will be described in detail.

  As shown in FIG. 4, the output buffer 134 is configured by a so-called CMOS inverter circuit formed by a PchMOS transistor Qp and an NchMOS transistor Qn cascaded between a positive power supply Vdd and a negative power supply Vss. Yes. And the negative voltage which is a local voltage is supplied from the local voltage supply part 19 as the negative side power supply Vss. Here, in order to facilitate understanding, an example in which the output buffer 134 is configured by a single-stage inverter circuit has been described, but it is also possible to configure the output buffer 134 by a plurality of stages of inverter circuits.

  As described above, the negative voltage is supplied from the local voltage supply unit 19 as the negative power source Vss of the output buffer 134 that handles the transfer pulse TRF as described above in order to reduce the dark current. This is because the gate voltage when the transfer transistor 22 is turned off is set to a voltage on the off side of the voltage of the well in which the transfer transistor 22 is formed, specifically, a negative voltage.

  That is, when a low level is input from the level shifter 133 to the output buffer 134 as a scanning pulse that is the source of the transfer pulse TRF, the PchMOS transistor Qp is turned on to output the Vdd level as the transfer pulse TRF and as a scan pulse. When a high level is input, the Nch MOS transistor Qn becomes conductive and outputs a Vss level (negative voltage) as the transfer pulse TRF. Thereby, the gate voltage when the transfer transistor 22 is turned off can be set to a negative voltage rather than the voltage of the well in which the transfer transistor 22 is formed.

<Operation by negative voltage supply>
Here, the operation of supplying a negative voltage from the local voltage supply unit 19 as the negative power source Vss of the output buffer 134 and applying a transfer pulse TRF having a low negative voltage to the gate of the transfer transistor 22 is shown in FIG. 5 will be described.

  5A shows the circuit configuration of the embedded photodiode 21 and the transfer transistor 22, FIG. 5B shows the configuration of the element cross section of the embedded photodiode 21 and the transfer transistor 22, and FIG. 5C shows the gate of the transfer transistor 22. Each voltage potential when a negative voltage is applied is shown.

  Although a detailed timing chart at the time of pixel driving is not shown, what is important here is that the gate potential of the transfer transistor 22 is a negative potential during the charge accumulation period. When the gate potential of the transfer transistor 22 becomes a negative potential, the amplitude of the gate voltage increases, so that the saturation signal amount increases and the dynamic range is expanded.

  In addition, another important point is that the value of the negative potential applied to the gate of the transfer transistor 22 is such that a channel (in this example, a hole channel) is formed below the gate (here, −1). .About 1V). By forming a hole channel under the gate of the transfer transistor 22, dark current can be suppressed.

  That is, a dark current flows into the photodiode 21 simultaneously with the photoelectrically converted charge during the charge accumulation period. As the photodiode 21, the charge accumulation region of the photodiode 21 (for example, an n-type semiconductor region) is formed at the interface with the oxide film. ) Is a main source of dark current when a so-called embedded photodiode in which a region of a conductivity type (for example, a p-type semiconductor region) is formed is an oxide film interface under the gate. Here, by forming a hole channel with the gate of the transfer transistor 22 having a negative potential, dark current can be prevented without deteriorating transfer characteristics.

  Note that the value of the negative potential applied to the gate of the transfer transistor 22 is about −1.1 V is merely an example. Although details are not shown in detail, it is known that a dark current reduction effect occurs when the negative potential is about −0.5 V, and the dark current becomes substantially zero when the negative potential is about −0.8 V or less. The negative potential to be applied to the gate is −0.5 V or less, preferably −0.8 or less (see Japanese Patent Application Laid-Open No. 2002-217397, particularly FIG. 9 and its description).

[Local voltage supply unit]
Next, the local voltage supply unit 19 that is a feature of the present invention will be described with reference to specific examples.

Example 1
FIG. 6 is a circuit diagram illustrating a configuration example of the local voltage supply unit 19A according to the first embodiment. The local voltage supply unit 19A according to the first embodiment has a configuration using a switched capacitor type DC-DC converter, a so-called charge pump circuit.

  That is, as shown in FIG. 6, the local voltage supply unit 19A includes a charge pump switch group 191, an output voltage setting unit 192, a reference voltage generation unit 193, a reference voltage generation unit 194, an error amplifier 195, a switching control unit 196, a period The signal generation unit 197 and the temperature detection circuit unit 198 are included.

  The charge pump switch group 191 includes four switches 1911 to 1914 and an inverter 1915. The pump capacitor 1916 connected between the two capacitor connection terminals a and b and the output terminal c to ground from which the output voltage Vout is output. A charge pump circuit is configured together with an output capacitor 1917 connected therebetween. The switches 1911 to 1914 can be configured by switch elements such as MOSFETs and bipolar transistors, for example.

  One terminal of the switch 1911 is grounded, one terminal of the switch 1912 is connected to the circuit output terminal c, one terminal of the switch 1913 is connected to the power supply Vdd, and one terminal of the switch 1914 is one circuit input terminal. connected to d. The other terminals of the switches 1911 and 1912 are commonly connected to the capacitor connection terminal a, and the other terminals of the switches 1913 and 1914 are commonly connected to the capacitor connection terminal b.

  One circuit input terminal d is connected to one control output terminal O 1 of the switching control unit 196. As a result, the output voltage control signal Sout indicating the operating point in the control loop corresponding to the output voltage Va or the output current Ia of the error amplifier 195 is applied from the switching controller 196 to one terminal of the switch 1914 via the circuit input terminal d. Is to be supplied.

  The other circuit input terminal e is connected to the other control output terminal O2 of the switching control unit 196. As a result, a switching control signal is supplied from the switching control unit 196 to the control terminals of the switches 1911 and 1913 via the circuit input terminal e, and further to the control terminals of the switches 1912 and 1914 via the inverter 1915. It has come to be given. That is, the switch 1911 and the switch 1913 and the switch 1912 and the switch 1914 are controlled in conjunction with each other.

  Although a detailed operation timing chart is not shown, when the switches 1911 and 1913 are on and the switches 1912 and 1914 are off according to the connection mode of the charge pump switch group 191, a pump capacity 1916 is supplied from an external power source (not shown). The charge is transferred to. As a result, the pump capacitor 1916 is charged to the positive potential (power supply Vdd) on the side of the capacitor connection terminal b and to the negative potential (ground) on the side of the capacitor connection terminal a.

  Thereafter, the switches 1911 and 1913 are turned off and the switches 1912 and 1914 are turned on, whereby the charge charged in the pump capacitor 1916 is transferred to the output capacitor 1917. By repeating such an operation, a predetermined voltage appears at the output terminal c of the charge pump switch group 191 and current can be supplied from the output capacitor 1917 to the load. That is, the charge is not directly transferred from the external power source to the output capacitor 1917.

  In the connection mode of the switches 1911 to 1914 of the charge pump switch group 191 according to this example, when the charge charged in the pump capacitor 1916 is transferred to the output capacitor 1917, the output of the error amplifying unit 195 is connected to the capacitor connection terminal b. A corresponding output voltage control signal Sout is supplied via a switch 1914. At the capacitor connection terminal b, it appears as a switching signal CB between the output voltage control signal Sout and the power supply voltage Vdd, the voltage appearing at the output capacitor 1917 is negative, and the theoretical maximum output possible voltage value is −1 × Vdd. It becomes.

  The configuration of the charge pump switch group 191 is not limited to the illustrated connection mode, and the output voltage value can be changed by appropriately changing the connection mode. For example, the maximum output voltage of the external power supply can be changed. It is also possible to obtain twice the voltage Vdd.

  Further, the number of switches is not limited to four as in the illustrated charge pump switch group 191, but the maximum number of absolute values of the output voltage can be increased by increasing the number of switches and adopting a connection mode corresponding thereto. The value can be further increased.

  The output voltage setting unit 192 includes, for example, five resistors connected in series between the output line from which the output voltage Vout is output from the charge pump circuit, that is, the output terminal c of the charge pump switch group 191 and the reference voltage generation unit 193. A resistive divider circuit composed of elements 1921 to 1925 and three switches 1926 to 1928 connected between divided nodes N1 and N2, N2 and N3, and N3 and N4 of the resistive elements 1921 to 1925, respectively. .

  In the output voltage setting unit 192, the resistance values of the resistance elements 1921 and 1925 are R2 and R1, respectively. In addition, the resistance values of the resistance elements 1922, 1923, and 1924 are set so that the resistance ratios have a relationship of 4R, 2R, and R. The switches 1926 to 1928 are controlled to be turned on / off by a control signal from the temperature detection circuit unit 198. The voltage value of the output voltage Vout of the charge pump circuit is set according to the resistance division ratio of the resistance divider circuit determined by the on / off states of the switches 1926 to 1928.

  The reference voltage generation unit 193 sets a reference voltage Vrefout that is a reference for output voltage setting by the output voltage setting unit 192. The output voltage setting unit 192 and the reference voltage generation unit 193 constitute a detection unit that detects the magnitude (voltage value) of the output voltage Vout (local voltage) generated by the local voltage supply unit 19A according to the first embodiment. ing.

  The resistance elements 1921 to 1925 constituting the output voltage setting unit 192 can be so-called external discrete parts, or can be positively adopted as external parts. By using external parts, the output voltage value and its temperature characteristics can be adjusted externally.

  It is assumed that the reference voltage generation unit 193 can obtain a certain reference voltage Vrefout even if the power supply voltage changes. For example, as the reference voltage generation unit 193, a band gap type reference voltage circuit or the like can be used. The power supply of the reference voltage generation unit 193 may be the power supply Vdd from the external power supply, or may be the output voltage Vout at the output terminal c of the charge pump switch group 191 depending on the circuit configuration. In any case, a power supply voltage higher than the reference voltage Vref0 generated by the reference voltage generation unit 194 is required. In this example, the reference voltage Vrefout is a stable voltage value of 0 or more.

  The reference voltage generation unit 194 generates a reference voltage Vref0. It is assumed that the reference voltage generator 194 can obtain a certain reference voltage Vref0 even if the power supply voltage changes. For example, as the reference voltage generation unit 194, a band gap type reference voltage circuit or the like can be used. The power source of the reference voltage generation unit 194 may be the power source Vdd from the external power source, or may be the output voltage Vout at the output terminal c of the charge pump switch group 191 depending on the circuit configuration. In any case, a power supply voltage higher than the generated reference voltage Vref0 is required.

  The error amplifier (error amplifier unit) 195 receives the feedback voltage VFB obtained by dividing the output voltage Vout by the output voltage setting unit 192 at the inverting input terminal (−), and receives the reference voltage Vref0 from the reference voltage generating unit 194 as a non-inverting input. The terminal (+) receives and amplifies or attenuates the difference between the feedback voltage VFB and the reference voltage Vref0. As the error amplifier 195, an operational amplifier (op amp) can be used.

  Note that a phase compensator 199 for stabilizing the feedback network is provided between the non-inverting input terminal (+) and the output terminal of the error amplifier 195. Although not shown, the output voltage setting unit 192 is also stable between the input side (output voltage Vout side) and the output side (error amplification unit 195 side) of the output voltage setting unit 192. A phase compensation unit can be provided.

  The switching control unit 196 receives the output voltage Va or the output current Ia of the error amplifying unit 195 at one input terminal IN1, and directly or indirectly sends a switching control signal (on / off control signal) to the charge pump switch group 191. ).

  The periodic signal generator 197 supplies a predetermined periodic signal such as a triangular wave to the other input terminal IN2 of the switching controller 196. As the periodic signal generation unit 197, for example, a ring oscillation circuit, an unstable multivibrator circuit, a blocking oscillation circuit, or the like can be used. The power source of the periodic signal generation unit 197 may be the power source Vdd from the external power source, similarly to the reference voltage generation unit 194, or may be the output voltage Vout at the output terminal c of the charge pump switch group 191 depending on the circuit configuration. Depending on the conditions of the output current and the pump capacity 1917, the periodic signal generation unit 197 can adjust the oscillation frequency according to a voltage given from the outside or a capacitance value connected to the outside.

  The overall control amplifier configuration centered on the error amplifier 195 is a negative feedback circuit, and the divided voltage (feedback voltage VFB) of the reference voltage Vref0 and the output voltage Vout by the output voltage setting unit 192 is equal. Will be controlled. That is, the local voltage supply unit 19A constitutes a negative feedback control loop by the error amplifying unit 195 so as to always stabilize the output voltage Vout and follow the load current fluctuation to some extent. It is unnecessary to separately provide a stabilization circuit after the voltage supply unit 19A. By eliminating the need for the stabilization circuit, the reactive power consumption can be made virtually zero.

  Therefore, by adjusting the division ratio of the reference voltage Vref0 by the reference voltage generation unit 194, the reference voltage Vrefout by the reference voltage generation unit 193, or the output voltage Vout by the output voltage setting unit 192, output current supply capability and output voltage value Can be changed. Although details will be described later, in the method of giving temperature dependence to the setting of the negative voltage, attention is paid to at least one of these three so that the output voltage has temperature characteristics.

  Note that the effect to be obtained differs depending on which of the division ratios of the reference voltage Vref0, the reference voltage Vrefout, or the output voltage Vout has temperature dependence. For example, when a method of giving temperature dependence to the reference voltage Vref0 is adopted, the power supply voltage Vdd can be used as the reference voltage Vrefout. In this case, since the reference voltage generation unit 193 is virtually unnecessary, the system is simplified and the layout can be reduced.

  In addition, when the output voltage Vout division ratio is dependent on temperature, for example, the resistive elements 1921 to 1925 are not built in the IC, but are actively used as external discrete components. An effect is obtained that the temperature characteristics can be freely adjusted by an external resistance.

  By using the two resistance elements 1921 and 1925 that determine the division ratio of the output voltage Vout that have temperature characteristics in different directions, it becomes possible to finely adjust the temperature characteristics using the difference between them. Of course, the power supply voltage Vdd can be used as the reference voltage Vrefout.

  In addition, any combination of the division ratios of the reference voltage Vref0, the reference voltage Vrefout, and the output voltage Vout is arbitrarily combined, and each has a temperature characteristic in a different direction, so that a temperature characteristic using the difference between the two can be obtained. Fine adjustments can also be made.

  The configuration of the local voltage supply unit 19A using the charge pump circuit shown here is merely an example, and various modifications are possible (for example, JP-A-6-351229 and JP-A-10-248240). And JP-A-2002-171748).

  Further, the local voltage supply unit 19A using the charge pump circuit transfers the charged charge to the pump capacitor 1916 and performs n-fold voltage boosting corresponding to so-called n-fold voltage rectification. Compared to the chopper type, it is convenient in reducing the size and power consumption.

  In this way, the negative voltage (output voltage Vout), which is the local voltage generated by the local voltage supply unit 19A, is supplied to the source of the NchMOS transistor Qn of the output buffer 134 shown in FIG. In a transistor to which this negative voltage is supplied to the source, a potential difference of the power supply voltage + | negative voltage |, that is, a voltage larger than the power supply voltage, which is a normal operating voltage, is applied between the gate and the substrate when turned on. become. As described above, when a voltage higher than the normal operating voltage is applied to the transistor, a problem of a breakdown voltage failure of the gate oxide film may occur.

  In the above description, the dark current can be suppressed by setting the value of the negative potential applied to the gate of the transfer transistor 22 of the pixel 20 to a level at which a channel is formed under the gate. It has dark current temperature dependence to try to suppress. Therefore, it is considered unnecessary to always keep the negative potential value constant. Rather, if the negative potential value is adjusted in accordance with the temperature dependence of the dark current, an excessive negative potential will not be applied. Therefore, the negative potential optimized for the temperature dependence of the dark current will be reduced. The reliability of the transistor can be improved while supplying.

  That is, it has been found that the generation of dark current, which is one of the causes of white spots, strongly depends on the temperature characteristics (see, for example, JP-A-1-196864). Therefore, the application of a negative voltage to prevent the generation of dark electrons that cause dark current increases the performance degradation effect of the transistor, but it is important to increase the absolute value as the operating temperature increases. It is thought to come. Conversely, when the operating temperature is low, such as when the operating temperature is normal temperature (for example, about 20 to 30 degrees) or lower, it may be considered that the generation of dark current is practically small, and it is adapted to the high operating temperature. If a negative voltage having a large absolute value is supplied at a low temperature, an excessive state is brought about with respect to the reduction of dark current, but the performance deterioration effect of the transistor becomes stronger. The cause of the white spot is also related to the strength of the electric field between the transfer transistor 22 and the FD unit 26, and applying a negative voltage at a high temperature at a normal temperature may deteriorate the white spot.

  Therefore, in the local voltage supply unit 19A according to the first embodiment, the negative voltage setting has a temperature dependency, that is, the negative voltage optimized in consideration of the temperature characteristics of the dark current is supplied to the output buffer 134. I try to adopt. Specifically, in order to suppress dark current and improve the reliability of a transistor such as a gate oxide film, a negative voltage that can sufficiently suppress dark current at a high temperature (for example, Japanese Patent Application Laid-Open No. 2002-217397). The absolute value of the negative voltage is lowered (for example, −0.8 V) at an operating temperature where dark current is practically not a problem, such as normal temperature.

  In the local voltage supply unit 19A, the output voltage setting unit 192 and the temperature detection circuit unit 198 have a function of making the negative voltage setting dependent on temperature. Specifically, when the temperature changes, the temperature change is detected by the temperature detection circuit unit 198, and the output voltage Vout is changed by changing the resistance division ratio of the output voltage setting unit 192 under the control of the temperature detection circuit unit 198. Change the voltage value of.

  FIG. 7 is a block diagram illustrating an example of the configuration of the temperature detection circuit unit 198. As shown in FIG. 7, the temperature detection circuit unit 198 includes a temperature detection unit 1981, a threshold value voltage generation unit 1982, a differential amplifier 1983, 1984, an AND circuit 1985, 1986, a NOR circuit 1987, and latch circuits 1988 to 1990. It has a configuration.

  The temperature detection unit 1981 is characterized in that a temperature-dependent voltage is obtained as an output of a temperature-dependent element by combining an ideal constant current source with low temperature characteristics and a temperature-dependent element. Have. In the temperature detection unit 1981 according to this example, a diode is used as an element having temperature dependency.

  In FIG. 7, the diode D1, which is a temperature-dependent element, has a cathode connected to a reference potential node (for example, ground). One end of the ideal constant current source I1 is connected to the power supply Vdd. An ideal constant current source I1 having a small temperature characteristic can be realized by a bandgap type reference voltage circuit constituted by a bandgap reference voltage and a resistor (such as polysilicon of about 100Ω) having negligible temperature characteristics.

  A switch SW1 is connected between the other end of the constant current source I1 and the anode of the diode D1. A switch SW2 is connected between the monitor terminal 1991 and the anode of the diode D1. A constant current source I2 and a switch SW3 are connected in series between the power supply Vdd and the monitor terminal 1991. The constant current source I1 and the constant current source I2 form a current mirror circuit.

  The temperature detection unit 1981 having such a configuration detects the environmental temperature using the temperature characteristics of the diode shown in FIG. That is, a forward voltage Vtemp that changes in accordance with the environmental temperature appears at the anode end of the diode D1, and this forward voltage Vtemp is output from the temperature detector 1981 as an environmental temperature detection signal.

  Here, if only the environmental temperature is detected, it is sufficient for the temperature detection unit 1981 to include the diode D1 and the constant current source I1. The temperature detection circuit unit 198 according to this example is characterized in that the temperature detection unit 1981 has a test function (test circuit) for performing an operation test of the temperature detection circuit unit 198. The switches SW1 to SW3 and the constant current source I2 are used when performing an operation test of the temperature detection circuit unit 198.

  The threshold value voltage generation unit 1982 is configured by a resistance dividing circuit including, for example, three resistance elements Ra, Rb, and Rc connected in series between the fixed potential Vref and the ground potential, and two divided voltages are applied to each divided node. V1 and V2 are obtained. As the fixed potential Vref, a voltage source having a small temperature dependence generated from a band gap reference voltage or the like is used.

  The differential amplifiers 1983 and 1984 use the divided voltages V1 and V2 output from the threshold value voltage generation unit 1982 as inverting inputs (−) and the forward voltage Vtemp output from the temperature detection unit 1981 as a non-inverting input (+). The forward voltage Vtemp that changes according to the environmental temperature is compared with the divided voltages V1 and V2 based on the fixed potential Vref. That is, the temperature range is set by setting the threshold value of the forward voltage Vtemp to the divided voltages V1 and V2.

  Here, the temperature range is set in three stages by the divided voltages V1 and V2, and the voltage value of the output voltage Vout is changed in three stages. However, the setting of the temperature range is not limited to three stages. By increasing the number of resistance elements and differential amplifiers of the threshold value voltage generation unit 1982, the temperature range is set to four stages or more, and the output voltage Vout It is also possible to change the voltage value of at least four stages.

  The comparison output of the differential amplifier 1983 is given as one input to the AND circuits 1985 and 1986, and given as one input (inverted input) to the NOR circuit 1987. The comparison output of the differential amplifier 1984 is given as the other input to the AND circuit 1985, given as the other input (inverting input) to the AND circuit 1986, and as the other input (inverting input) to the NOR circuit 1987. Given.

  The latch circuits 1988 to 1990 are constituted by, for example, D-flip-flops, and the outputs of the AND circuits 1985 and 1986 and the NOR circuit 1987, which are input to each data (D), are input to the clock (CK) via the inverter 1992. Latching is performed in synchronization with the frame synchronization signal XVS. The frame synchronization signal XVS is a signal generated in one frame period. The output signals A to C of the latch circuits 1988 to 1990 are given as the switch control signals to the three switches 1926 to 1928 of the output voltage setting unit 192 shown in FIG. Here, the frame synchronization signal XVS may be the same as the vertical synchronization signal Vsync.

  Next, the circuit operation of the temperature detection circuit unit 198 having the above configuration will be described. By setting the temperature range by setting the threshold value of the forward voltage Vtemp to the divided voltages V1 and V2, as shown in FIG. 9, the temperature range is 3 of Vtemp> V1, V2 <Vtemp <V1, Vtemp <V2. Set to stage. This temperature range is determined by the action of the differential amplifier 1983, 1984, the AND circuit 1985, 1986 and the NOR circuit 1987.

  When Vtemp> V1, V2 <Vtemp <V1, Vtemp <V2, the latch circuits 1988 to 1990 output high-level switch control signals A to C in synchronization with the frame synchronization signal XVS. In response to the switch control signals A to C, the switches 1926 to 1928 of the output voltage setting unit 198 are turned on / off, thereby changing the resistance division ratio of the output voltage setting unit 198. By changing the resistance division ratio, the voltage value of the output voltage Vout of the local voltage generator 19A changes according to the following equation (1).

Vout = {(R1 + R2 ′) / R1}
* Vref0- (R2 '/ R1) * Vrefout (1)
Note that R2 ′ = R2 + R + 2R. However, the resistance value R2 ′ at this time is a combined resistance value when Vtemp> V1, that is, when only the switch 1926 of the output voltage setting unit 198 is on. Since the on / off control of the switches 1926 to 1928 is performed in synchronization with the frame synchronization signal XVS, the change in the output voltage Vout occurs within the blanking period.

  As described above, in the local voltage supply unit 19A according to the first embodiment, the output voltage setting unit 192 and the temperature detection circuit unit 198 have a function of making the setting of the negative voltage, which is a local voltage, temperature dependent, By supplying a negative voltage optimized in consideration of the temperature characteristics of the dark current to the output buffer 134 shown in FIG. 4, white spots are suppressed by the dark current and the electric field, and the reliability of transistors such as a gate oxide film is improved. Can be improved.

  Here, in a semiconductor device (in this embodiment, a solid-state imaging device) on which a local voltage supply unit 19A including a temperature detection circuit unit 198 is mounted, the local including the temperature detection circuit unit 198 included in the manufacturing stage of the semiconductor device. Although it is necessary to perform a test (confirmation) of the circuit operation of the entire voltage supply unit 19A, the local voltage supply unit 19A according to the first embodiment provides a test function for performing the operation test as described above. 1981.

  The procedure for testing the circuit operation of the local voltage supply unit 19A will be described below. First, as a test procedure 1, as shown in FIG. 10, in the temperature detection unit 1981, the switches SW1 and SW3 are turned on, the switch SW2 is turned off, and a constant current Iconst flowing from the constant current source I1 to the diode D1 is supplied to the constant current source I1. , I2 is turned back by a current mirror circuit, and a monitoring current Itest is generated by a constant current source I2.

  This monitoring current Itest flows from the monitor terminal 1991 to the ammeter 51 previously connected to the monitor terminal 1991 through the switch SW3. At this time, the current value of the monitoring current Itest flowing through the ammeter 51 is measured. Since the temperature characteristic of the diode D1 varies depending on the current value, it can be confirmed whether or not the monitoring current Itest is a set value.

  Next, as test procedure 2, as shown in FIG. 11, the switches SW1 and SW3 are turned off to disconnect the constant current sources I1 and I2, and the switch SW2 is turned on and the anode terminal of the diode D1 is connected to the monitor terminal 1991. To do. On the other hand, the variable current source 52 is connected to the monitor terminal 1991, and the current Iforce is applied from the variable current source 52 to the diode D1 through the monitor terminal 1991.

At this time, since the IV characteristic of the diode D1 conforms to the following equation (2), the forward voltage Vtemp of the diode D1 changes by changing the current Iforce flowing through the diode D1.
Vtemp = kT / q * ln (I / Is) (2)
Here, k is the Boltzmann constant, T is the absolute temperature, q is the elementary charge, and Is is the reverse saturation current of the diode.

  As is apparent from the IV characteristics of the diode shown in FIG. 8, the forward voltage Vf of the diode decreases as the temperature increases under a constant current Iconst. Here, it is possible to create a temperature change state by observing a change in the forward voltage Vtemp caused by changing the value of the current flowing through the diode D1, and to confirm the operation of the local voltage supply unit 19A. That is, by setting the voltage V2 at the high temperature at the constant current Iconst as the supply current I2, it is possible to check the circuit operation of the local voltage supply unit 19A even at room temperature.

  Specifically, an appropriate current value satisfying Iforce> I1, I2 <Iforce <I1, Iforce <I2 is supplied three times. At that time, since the temperature detection circuit unit 198 has a circuit configuration that changes as Vtemp> V1, V2 <Vtemp <V1, Vtemp <V2, the temperature detection circuit unit 198 measures the output voltage Vout at this time. The circuit operation of 198 can be confirmed.

  By incorporating (incorporating) a test function (test circuit) capable of realizing the above-described test procedures 1 and 2 into the temperature detection circuit unit 198, specifically, the temperature detection unit 1981, the ammeter 51 and the variable can be provided at the monitor terminal 1991. By simply connecting the current source 52, it is possible to test (confirm) the circuit operation of the local voltage supply unit 19A without actually changing the environmental temperature (environmental condition).

  In particular, since this is an operation test by passing a constant current through the diode D1, which is a temperature-dependent element, the current value is smaller than when a pseudo output voltage is viewed as in the prior art described in Patent Document 2. In addition to being not affected by the parasitic resistance and contact resistance of the switches SW1, SW2, etc. connected in series to the diode D1, a plurality of voltages can be easily tested in a short time. Since the test efficiency can be increased by shortening the test time, the cost can be reduced.

(Example 2)
FIG. 12 is a circuit diagram illustrating a configuration example of the local voltage supply unit 19B according to the second embodiment. In the drawing, parts equivalent to those in FIG. 6 are denoted by the same reference numerals. Similar to the local voltage supply unit 19A according to the first embodiment, the local voltage supply unit 19B according to the second embodiment has a configuration using a charge pump circuit.

  As shown in FIG. 12, the local voltage supply unit 19B according to the second embodiment has the same components as the local voltage supply unit 19A according to the first embodiment. The generation unit 194 ′ has a function of detecting a change in environmental temperature to obtain a temperature-dependent reference voltage Vref 0, and accordingly, the output voltage setting unit 192 ′ has a resistance element (resistance value R 2) 1921 and a resistance It is in the point which consists of a resistance division circuit which consists of element (resistance value R1) 1925.

  FIG. 13 is a circuit diagram showing an example of the configuration of the reference voltage generation unit 194 ′. As shown in FIG. 13, the reference voltage generation unit 194 ′ according to this example has a configuration including a temperature detection unit 1941, a differential amplifier 1942, an output transistor 1943, and resistance elements 1944 and 1945.

  The temperature detection unit 1941 has the same configuration as the temperature detection unit 1981 of the temperature detection circuit unit 198 in the local voltage supply unit 19A according to the first embodiment. In other words, it is characterized in that a temperature-dependent voltage is obtained as an output of a temperature-dependent element by combining an ideal constant current source with low temperature characteristics and a temperature-dependent element. . In the temperature detection unit 1941 according to this example, a diode is used as an element having temperature dependency.

  In FIG. 13, the diode D1, which is a temperature-dependent element, has a cathode grounded. One end of the ideal constant current source I1 is connected to the power supply Vdd. An ideal constant current source I1 having a small temperature characteristic can be realized by a bandgap type reference voltage circuit constituted by a bandgap reference voltage and a resistor (such as polysilicon of about 100Ω) having negligible temperature characteristics.

  A switch SW1 is connected between the other end of the constant current source I1 and the anode of the diode D1. A switch SW2 is connected between the monitor terminal 1946 and the anode of the diode D1. A constant current source I2 and a switch SW3 are connected in series between the power supply Vdd and the monitor terminal 1946. The constant current source I1 and the constant current source I2 form a current mirror circuit.

  The temperature detection unit 1941 having such a configuration detects the environmental temperature using the temperature characteristics of the diode shown in FIG. That is, a forward voltage Vtemp that changes in accordance with the environmental temperature appears at the anode end of the diode D1, and this forward voltage Vtemp is output from the temperature detector 1941 as an environmental temperature detection signal.

  In the differential amplifier 1942, the forward voltage Vtemp of the diode D1 obtained by the temperature detector 1941 is set as a non-inverted (+) input, and the source potential of the output transistor 1943 is set as an inverted input (−). The output transistor 1943 has a drain connected to the power supply Vdd and a gate connected to the output terminal of the operational amplifier 1942.

  The resistance element 1944 and the resistance element 1945 are connected in series between the source of the output transistor 1943 and the ground to form a resistance divider circuit, and the connection node N11 between the source of the output transistor 1943 and the resistance element 1944 is connected. By dividing the potential difference between the potential (the source potential of the output transistor 1943) and the ground by the resistance division ratio of the resistance elements 1944 and 1945, the reference voltage Vref0 is obtained at the division node N12.

  The overall control amplifier configuration centering on the differential amplifier 1942 is a negative feedback circuit. In this negative feedback circuit, control is performed so that the potential of the node N11 becomes equal to the forward voltage Vtemp, whereby a reference voltage Vref0 having temperature dependence is obtained at the node N12.

  As described above, in the local voltage supply unit 19B according to the second embodiment, the reference voltage generation unit 194 ′ uses the temperature-dependent diode D1 as a reference for generating a negative voltage that is the output voltage Vout. By giving the voltage Vref0 temperature characteristics, the negative voltage can be changed in accordance with the change in the environmental temperature, that is, the setting of the negative voltage, which is a local voltage, can be given temperature dependence. Then, a negative voltage optimized in consideration of the dark current temperature characteristic is supplied to the output buffer 134 shown in FIG. 4 to suppress white spots due to dark current and electric field, and reliability of transistors such as a gate oxide film. Can be improved.

  In addition, in the local voltage supply unit 19B according to the second embodiment, as in the case of the local voltage supply unit 19A according to the first embodiment, a local voltage supply unit including a reference voltage generation unit 194 ′ having a built-in temperature detection unit 1941. The temperature detection unit 1941 is provided with a test function for testing the circuit operation of the entire 19B.

  A procedure for testing the circuit operation of the local voltage supply unit 19B will be described below. First, as a test procedure 1, as shown in FIG. 14, in the temperature detection unit 1941, the switches SW1 and SW3 are turned on and the switch SW2 is turned off, and a constant current Iconst flowing from the constant current source I1 to the diode D1 is supplied to the constant current source I1. , I2 is turned back by a current mirror circuit, and a monitoring current Itest is generated by a constant current source I2.

  The monitoring current Itest flows from the monitor terminal 1946 through the switch SW3 to the ammeter 51 previously connected to the monitor terminal 1946. At this time, the current value of the monitoring current Itest flowing through the ammeter 51 is measured. Since the temperature characteristic of the diode D1 varies depending on the current value, it can be confirmed whether or not the monitoring current Itest is a set value.

  Next, as test procedure 2, as shown in FIG. 15, the switches SW1 and SW3 are turned off to disconnect the constant current sources I1 and I2, and the switch SW2 is turned on and the anode terminal of the diode D1 is connected to the monitor terminal 1946. To do. On the other hand, the variable current source 52 is connected to the monitor terminal 1946, and the current Iforce is applied from the variable current source 52 to the diode D1 through the monitor terminal 1946. At this time, the forward voltage Vtemp of the diode D1 changes by changing the current Iforce flowing through the diode D1 for the reason described above.

  As is apparent from the IV characteristics of the diode shown in FIG. 8, the forward voltage Vf of the diode decreases as the temperature increases under a constant current Iconst. Here, it is possible to create a temperature change state by checking the change in the forward voltage Vtemp by changing the value of the current flowing through the diode D1, and to confirm the operation of the local voltage supply unit 19B. That is, by setting the high-temperature voltage V2 at the constant current Iconst as the supply current I2, the circuit operation of the local voltage supply unit 19B can be confirmed even at room temperature.

  By incorporating a test function (test circuit) capable of realizing the test procedures 1 and 2 described above into the reference voltage generation unit 194 ′, specifically, the temperature detection unit 1941, an ammeter 51 and a variable current source 52 are connected to the monitor terminal 1946. It is possible to perform a test (confirmation) of the circuit operation of the local voltage supply unit 19B without actually changing the environmental temperature (environmental condition) simply by connecting the.

  In particular, since this is an operation test by passing a constant current through the diode D1, which is a temperature-dependent element, as compared with the prior art described in Patent Document 2, the current value is determined in series with the diode D1. In addition to being not affected by parasitic resistances and contact resistances of the switches SW1, SW2, etc. connected to, a plurality of voltages can be easily tested in a short time. Since the test efficiency can be increased by shortening the test time, the cost can be reduced.

  In the first and second embodiments, the diode D1 is used as an example of the temperature-dependent element. However, this is only an example, and a so-called diode having a drain and a gate connected in common. Even if a connected transistor, a polysilicon resistor doped with impurities, or the like is used, the same effect can be obtained.

  In the first and second embodiments, the constant current source I1 is realized by a band gap type reference voltage circuit. However, the present invention is not limited to this, and for example, realized by a current circuit using an external resistor with little variation. Is also possible. In that case, in order to take into account the parasitic resistance, the value of the current that actually flows is measured.

  Further, instead of supplying current from outside, as shown in FIG. 16, in addition to the constant current sources I1 and I2, a plurality (for example, two) of constant current sources I3 and I4 are integrated in a current mirror mirror configuration. It can also be installed inside. As an example, the current values Iconst and Itest of the constant current sources I1 and I2 are 10 μA, and the current values of the constant current sources I3 and I4 are 1 μA and 1 mA. According to such a configuration, the current value is determined by the current mirror and is directly connected to the constant current sources I1 to I4 so that the on-resistance of the switches SW11 to SW14 can be ignored. Compared to the conventional technology, it is possible to realize a highly accurate operation test.

  In the above embodiment, the local voltage supplied from the local voltage supply unit 19 that is a power supply circuit is a negative voltage. However, the local voltage is not limited to the negative voltage, and the voltage value is different from the power supply voltage Vdd. The present invention may be applied to a power supply circuit that supplies a positive voltage as a local voltage, and the same effects as those of the above-described embodiment can be achieved.

  In the above-described embodiment, the solid-state imaging device is described as an example of the semiconductor device. However, the present invention is not limited to the application to the solid-state imaging device, and is provided on the semiconductor substrate and external to the semiconductor substrate. Is built in a power supply circuit that generates a local voltage having a voltage value different from that of the power supply voltage based on the power supply voltage supplied from the power supply circuit and supplies the local voltage to the circuit unit to be driven. The present invention can be applied to all semiconductor devices including a temperature detection circuit that detects a change.

1 is a system configuration diagram illustrating an outline of a system configuration of a solid-state imaging device to which the present invention is applied. It is a circuit diagram which shows an example of the circuit structure of a pixel. It is a block diagram which shows an example of a structure of a vertical drive part. It is a circuit diagram which shows an example of a structure of an output buffer. It is a figure for demonstrating the effect | action by a negative voltage supply. FIG. 3 is a circuit diagram illustrating a configuration example of a local voltage supply unit according to the first embodiment. It is a block diagram which shows an example of a structure of a temperature detection circuit part. It is a simplification figure showing the IV characteristic of a diode. It is a figure which shows the temperature characteristic and voltage setting range of a diode. It is a figure which shows the circuit connection of the temperature detection part in the test procedure 1 in the local voltage supply part which concerns on Example 1. FIG. It is a figure which shows the circuit connection of the temperature detection part in the test procedure 2 in the local voltage supply part which concerns on Example 1. FIG. 6 is a circuit diagram illustrating a configuration example of a local voltage supply unit according to Embodiment 2. FIG. It is a circuit diagram which shows an example of a structure of a reference voltage generation part. It is a figure which shows the circuit connection of the temperature detection part in the test procedure 1 in the local voltage supply part which concerns on Example 2. FIG. It is a figure which shows the circuit connection of the temperature detection part in the test procedure 2 in the local voltage supply part which concerns on Example 2. FIG. It is a circuit diagram which shows the test circuit using an internal constant current.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 10 ... Solid-state imaging device, 11 ... Semiconductor substrate (chip), 12 ... Pixel array part, 13 ... Vertical drive part, 14 ... Column circuit group, 15 ... Horizontal drive part, 16 ... Horizontal signal line, 17 ... Output part, 18 Control unit 19, 19A, 19B ... Local voltage supply unit, 20 ... Pixel, 21 ... Photodiode, 22 ... Transfer transistor, 23 ... Reset transistor, 24 ... Amplification transistor, 25 ... Selection transistor, 26 ... Floating diffusion part ( FD unit), 191... Charsi pump switch group, 192, 192 '... output voltage setting unit, 193 ... reference voltage generation unit, 194, 194' ... reference voltage generation unit, 195 ... error amplifier, 196 ... switching control unit, 197 ... periodic signal generator, 198 ... temperature detection circuit, 1941, 1981 ... temperature detector

Claims (8)

Provided on a semiconductor substrate, provided in a power supply circuit that generates a local voltage having a voltage value different from the power supply voltage based on a power supply voltage applied from the outside of the semiconductor substrate and supplies the local voltage to a circuit unit to be driven, In order to give temperature dependence to the value of the local voltage, a temperature detection circuit whose output changes depending on the environmental temperature using an element having temperature dependence ,
By changing the current value of the constant current supplied to the device with the temperature dependence, it built a test circuit for changing the output
Temperature detection circuit. Said test circuit, said when the local voltage is confirmed to be a predetermined voltage, Ru changing the value of the current flowing to the element with the temperature dependence without changing the environmental temperature
Temperature detection circuit 請 Motomeko 1 wherein. The test circuit, when confirming that the local voltage is a predetermined voltage, supplies current to the temperature-dependent element from the outside of the semiconductor substrate without changing the environmental temperature , Ru to change its current value
Temperature detection circuit 請 Motomeko 2 wherein. The temperature detection circuit includes:
The temperature-dependent element having one end connected to a reference potential node;
A first constant current source for supplying a constant current to the element ;
A combination of the test circuit and
The test circuit is
A monitor terminal;
A second constant current source forming a current mirror with the first constant current source;
A first switch connected between the first constant current source and the other end of the temperature-dependent element;
A second switch connected between the monitor terminal and the other end of the temperature-dependent element;
A third switch connected between the second constant current source and the monitor terminal;
The temperature detection circuit according to any one of claims 1 to 3 . The test circuit outputs from the second constant current source through the third switch and the monitor terminal when the first and third switches are turned on and the second switch is turned off. It has a configuration that can check whether the monitor current is the set value or not
Temperature detection circuit 請 Motomeko 4 wherein. The test circuit changes a current value supplied to the temperature-dependent element through the monitor terminal when the first and third switches are turned off and the second switch is turned on. The output of the temperature detection circuit can be changed by changing the forward voltage of the diode.
The temperature detection circuit according to claim 5 . Provided on a semiconductor substrate, provided in a power supply circuit that generates a local voltage having a voltage value different from the power supply voltage based on a power supply voltage applied from the outside of the semiconductor substrate and supplies the local voltage to a circuit unit to be driven, In the temperature detection circuit in which the output varies depending on the environmental temperature using a temperature-dependent element in order to give the local voltage value temperature dependency ,
When the circuit operation of the power supply circuit is tested , the output is changed by changing a current value of a constant current passed through the temperature-dependent element .
Method of operating a temperature detection circuit. Provided on a semiconductor substrate, provided in a power supply circuit that generates a local voltage having a voltage value different from the power supply voltage based on a power supply voltage applied from the outside of the semiconductor substrate and supplies the local voltage to a circuit unit to be driven, In order to give the local voltage value temperature dependency, a semiconductor device including a temperature detection circuit whose output changes depending on the environmental temperature using an element having temperature dependency ,
The temperature detection circuit includes a test circuit that changes the output by changing a current value of a constant current that flows through the temperature-dependent element.
Semi conductor device.

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