JP4985298B2 - Avalanche photodiode - Google Patents

Description

  The present invention relates to a light receiving element using a semiconductor, and more particularly to an avalanche photodiode having a low dark current and high reliability in the long term.

  Avalanche photodiodes used in optical communications, etc., are semiconductor light-receiving elements that increase the light-receiving sensitivity by providing a layer that amplifies the avalanche (avalanche) of photoelectrically converted carriers in addition to the light-absorbing layer that performs photoelectric conversion. Therefore, the dark current is required to be low and to have high reliability.

Most of the avalanche photodiodes are formed of a compound semiconductor, and can be roughly classified into a mesa structure and a planar structure. The mesa structure is a structure in which a mesa (plateau) is formed on a substrate and a pn junction is included in the mesa, and breakdown is likely to occur on the surface around the mesa. In order to suppress this, in general, a structure with an inclination is adopted, and a structure such as a buried layer serving as a high resistance portion is provided in the mesa outer peripheral region to devise a technique for reducing dark current (for example, Patent Documents). 1).
In the planar structure, a pn junction is formed by providing a selective diffusion region, but edge breakdown at the edge portion of the pn junction becomes a problem. When a current flows at the edge portion, even if the voltage is increased, the reverse voltage at the pn junction of the light receiving portion located at the center hardly increases, so that the function as an avalanche photodiode cannot be exhibited. Therefore, for example, a countermeasure such as providing a high-resistance guard ring at the edge portion by impurity implantation or the like is taken (for example, Patent Document 2).

JP 2002-324911 A (FIG. 1) Japanese Unexamined Patent Publication No. 7-31442 (page 4-6, FIGS. 2 and 6)

However, the conventional avalanche photodiode has the following problems.
In the inclined mesa structure, in order to provide the buried layer in the mesa outer peripheral region, the crystal is regrown partially and uniformly regardless of the crystal plane by, for example, metal organic chemical vapor deposition (MO-CVD) method. Therefore, there is a problem that the manufacturing cost increases and the yield is poor. Moreover, although the measure which makes dark current low is taken, there existed a problem that the suppression effect was inadequate.
In a planar structure (described as a pseudo-planar structure in Patent Document 2), for example, in a method of forming a guard ring by compensating the p conductivity type of the electric field relaxation layer around the light receiving region, a trench is formed and ions such as Ti are implanted. It was necessary to provide an etching stopper layer. Further, since the impurity diffusion layer is provided on the outer periphery, the process becomes complicated, the manufacturing cost increases, and there is a problem in the yield. In addition, since the electric field strength of the guard ring in the light absorption layer is increased, there is a problem that the tunnel dark current is increased.

  The present invention has been made to solve these problems, and an object thereof is to provide an avalanche photodiode that can be manufactured by a simple process, suppresses dark current, and ensures long-term reliability. It is.

An avalanche photodiode according to the present invention includes a first electrode and a substrate including a first semiconductor layer of a first conductivity type electrically connected to the first electrode, and the substrate includes at least an avalanche increase in the order of steps. A double layer, an electric field relaxation layer, a light absorption layer, and a second semiconductor layer having a larger band gap than the light absorption layer are sequentially stacked, and a second conductivity type conductive region is formed in the second semiconductor layer. And the second conductive type conductive region is electrically connected to the second electrode, and the second conductive type conductive region and a part of the second semiconductor layer around the second conductive type conductive region are left, Of the layers stacked on the outer peripheral substrate, at least the light absorption layer is removed to form the side surface of the light absorption layer. The light absorption layer is narrower than the avalanche multiplication layer and further narrower than the electric field relaxation layer. step is provided et between the electric field relaxation layer Te And those are.

  According to the present invention, an avalanche photodiode with low dark current and high long-term reliability can be provided by a simple process.

Reference Example 1
FIG. 1 is a sectional view showing a schematic structure of an avalanche photodiode according to Reference Example 1 of the present invention. Here, the n-type is used as the first conductivity type, the p-type is used as the second conductivity type, the n-electrode is used as the first electrode, and the p-electrode is used as the second electrode. The production of each semiconductor layer can be realized on the wafer-like substrate 1 such as n-type InP using MO-CVD, molecular beam epitaxial growth (MBE), or the like. In this reference example 1, it was produced in the following process order. On the substrate 1, for example, a first semiconductor layer 2 (hereinafter referred to as a buffer layer) such as n-type InP having a carrier concentration of 0.2 to 2 × 10 ¹⁹ cm ⁻³ is formed to a thickness of 0.1 to 1 μm, and i-type AlInAs is formed. The avalanche multiplication layer 4 has a thickness of 0.15 to 0.4 μm, the p-type InP electric field relaxation layer 5 having a carrier concentration of 0.5 to 1 × 10 ¹⁸ cm ⁻³ has a thickness of 0.03 to 0.06 μm, A second semiconductor layer 8 having a p ^- type GaInAs light absorption layer 6 having a concentration of 1 to 5 × 10 ¹⁵ cm ⁻³ having a thickness of 1 to 1.5 μm and a band gap larger than that of the light absorption layer 6 such as i-type InP. The i-type GaInAs contact layer 9 was successively grown to a thickness of 0.1 to 0.5 μm. Here, since the detection light is incident from the side opposite to the substrate 1 (hereinafter referred to as surface incidence), the band gap of the second semiconductor layer 8 is made larger than the energy of the detection light. Further, since the second semiconductor layer 8 transmits the detection light, the second semiconductor layer 8 is hereinafter referred to as a window layer.

  Next, the p-type conductive region 10 is formed in a circular portion not covered with the mask, for example, by a Zn selective thermal diffusion method, using a SiOx film that has been cut through a circle having a diameter of 25 to 55 μm as a mask. Subsequently, the central portion and the outside are removed by etching so that the i-type GaInAs contact layer 9 on the p-type conductive region 10 remains in a ring shape having a width of 5 to 10 μm. Further, a SiNx surface protection film / antireflection film 120 is formed by vapor deposition, the SiNx surface protection film / antireflection film 120 on the contact layer 9 is removed, and a p-electrode 14 is formed on the contact layer 9 by AuZn. Form. Further, the surface of the substrate 1 opposite to the surface on which the buffer layer 2 is laminated is polished so that the n electrode 13 is formed of AuGe so that the buffer layer 2 is electrically connected to the n electrode 13. . Further, the wafer-like substrate 1 is cleaved and separated to obtain an element having a cleavage plane 27 of about 300 μm square.

  The operation of the avalanche photodiode manufactured by the above process will be described below. Light 28 is incident from the p-electrode 14 side with a reverse bias voltage applied from the outside so that the n-electrode 13 side is positive and the p-electrode 14 side is negative. For example, when light in the near infrared region of the optical communication wavelength band of 1.3 μm band or 1.5 μm band is made incident inside the ring of the contact layer 9, the light passes through the window layer 8 and is absorbed by the light absorption layer 6. As a result, an electron-hole pair is generated, and the electrons move to the n electrode 13 side and the holes move to the p electrode 14 side. When the reverse bias voltage is sufficiently high, electrons are ionized in the avalanche multiplication layer 4 to generate new electron-hole pairs, and cause further ionization together with the newly generated electrons and holes. Avalanche multiplication that causes avalanche multiplication is caused.

  Next, the electric field strength in the avalanche photodiode of this reference example shown in FIG. 1 will be described. 2 is a characteristic diagram showing the electric field intensity distribution in the depth direction in the AA ′ section of FIG. 1, and FIG. 3 is the electric field intensity in the surface direction in the BB ′ section and the CC ′ section of FIG. It is a characteristic view showing distribution. 2 and 3 indicate the semiconductor layers formed above. In the drawing, the AA ′ section is taken along the line AA ′, the BB ′ section is taken along the line BB ′, and the CC ′ section is taken along the line. It is represented as CC ′. As shown in FIG. 2, the portion having the highest electric field is the avalanche multiplication layer 4. Furthermore, as shown by the electric field strength distribution in the BB ′ cross section of FIG. 3, the central portion of the light receiving region immediately below the p-type conductive region 10 is the highest region, and the electric field strength decreases toward the peripheral portion. Further, as shown by the electric field strength distribution in the CC ′ cross section of FIG. 3, the electric field strength in the peripheral portion of the p-type conductive region 10 is higher than the central portion due to the finite curvature of the diffusion region. Compared with the electric field intensity distribution in the BB ′ cross section, the electric field intensity applied to the avalanche multiplication layer 4 is lower than that of the avalanche multiplication layer 4, so that the current in the peripheral portion known as edge breakdown can be suppressed and function as an avalanche photodiode. Can do.

  Further, a region where the electric field strength around the diffusion region is locally high, that is, a portion where the electric field strength is high in the peripheral portion of the p-type conductive region 10 in the CC ′ cross section of FIG. Since it is formed in the window layer 8 having a large band gap, the tunnel dark current can be prevented from flowing from the portion where the electric field strength is high. Therefore, the avalanche photodiode according to this reference example does not need to be provided with a structure called a guard ring that suppresses edge breakdown, and can easily realize an avalanche photodiode having a low dark current and high reliability.

  In this reference example, the example in which the p-type conductive region 10 is formed by selective thermal diffusion using Zn has been described. However, the atoms to be used may be those that impart p-type conductivity. As another forming method, for example, a p-type conductive region is formed by a Zn selective thermal diffusion method using a SiOx film cut through a circle as a mask, and then the Zn film and the SiOx film as a diffusion source are removed, Further, thermal diffusion treatment may be performed again to diffuse Zn inside the p-type conductive region (hereinafter referred to as Zn additional diffusion). Alternatively, for example, by using a photoresist film that has been cut through a circle as a mask, Be is ion-implanted, and then the photoresist film is removed and subjected to a thermal annealing process at about 700 ° C. for about 12 hours (hereinafter referred to as Be implantation). ).

  FIG. 4 shows the depth direction when the Zn selective thermal diffusion (D in the figure), Zn additional diffusion (E in the figure), and Be implantation (F in the figure) are used as a method of forming the p-type conductive region 10. It is the characteristic view which showed the difference in the carrier density | concentration in (the electroconductive area | region 10-window layer 8 junction part) (The code | symbol of a horizontal axis corresponds to each layer). As a result, when Zn additional diffusion is used, the carrier concentration change can be moderated as compared with Zn selective thermal diffusion in which the carrier concentration changes remarkably, so that the electric field strength at the junction of the conductive region 10-P window layer 8 is reduced. Therefore, the tunnel dark current can be suppressed. Further, in the Be implantation, the carrier concentration change can be further moderated.

  In this reference example, the electric field relaxation layer 5 is made of p-type InP, but AlInAs may be used. The electric field relaxation layer 5 can be omitted depending on the situation. Moreover, although the example which provided the contact layer 9 in order to electrically connect the p-type conductive region 10 and the p electrode 14 was shown, you may make the p-type conductive region 10 and the p electrode 14 contact directly. Although an example in which i-type InP is used as the window layer 8 is shown, the conductivity type may be any of semi-insulating, insulating, n-type, or p-type having low conductivity. If the stopper layer 3 containing GaInAsP, AlInAs, AlGaInAs, GaInAsP, or the like is provided between the window layer 8 and the light absorption layer 6, the p-type conductive region diffuses from the p-type conductive region 10 to the light absorption layer 6. Is more preferable.

Reference Example 2
In the avalanche photodiode according to the reference example 2 of the present invention, the transition layer 7 is further provided between the light absorption layer 6 and the window layer 8 in the avalanche photodiode shown in the reference example 1. As a formation method, following the step of growing the light absorption layer 6 in Reference Example 1 described above, for example, i-type GaInAsP was grown to a thickness of 0.01 to 0.05 μm to form the transition layer 7.

  FIG. 5 shows the energy distribution at the layer junction of the conduction band and the valence band of the avalanche photodiode according to this reference example. The horizontal axis indicates the stacked semiconductor layers, the vertical axis indicates energy, G in the figure indicates the conduction band, H in the figure indicates the valence band, and I in the figure indicates the energy of each hole. FIG. 5 shows that the valence band energy of the transition layer 7 is lower than that of the light absorption layer 6 and higher than that of the window layer 8, that is, a value between the light absorption layer 6 and the window layer 8. This indicates that the transition layer 7 is sandwiched between the light absorption layer 6 and the window layer 8, so that the amount of discontinuity in the valence band is reduced and holes flow more easily than the light absorption layer 6. . Therefore, hole pile-up at the heterointerface can be prevented, and a faster optical response can be realized.

  Although the transition layer 7 is a single layer, it may be a plurality of layers in which the band gap is changed stepwise. By using a plurality of layers, the amount of discontinuity in the valence band is further reduced. As a result, holes easily flow, so that a faster optical response can be realized. Further, as shown by a broken line in FIG. 5, a layer in which the band gap is continuously changed may be used.

  In this reference example, an example in which i-type GaInAsP is used as the transition layer 7 is shown, but AlInAs, AlGaInAs, and GaInAsP may be used. In particular, when InP is used for the window layer 8, it functions as a diffusion stopper for the second conductivity type region.

Reference Example 3.
In the avalanche photodiode according to Reference Example 3 of the present invention, the p-type peripheral conductive region 110 is further provided around the p-type conductive region 10 in the avalanche photodiode shown in Reference Examples 1 and 2 above. 6 and 7 are sectional views showing a schematic structure of the avalanche photodiode according to this reference example. Here, 6 is a light absorption layer, 3 is a stopper layer, which also serves as a hole transition and diffusion stopper. 8 is a window layer, and 9 is a contact layer.
The avalanche photodiode shown in FIG. 6 forms p-type conductive region 110 by performing selective thermal diffusion shallowly so as not to reach the transition layer 7 over a wide range beyond the outer periphery of the contact layer 9, and thereafter, the p-type conductive region 110 is formed. The p-type conductive region 10 is formed by performing selective thermal diffusion deep enough to reach the transition layer 7 in a range narrower than the peripheral conductive region 110. The region of the p-type conductive region 10 is selectively thermally diffused. As described above, the resistance of the p-type conductive region 10 can be sufficiently increased, and the periphery is surrounded by the p-type peripheral conductive region 110, so that the surface electric field strength can be reduced. Therefore, breakdown can be further suppressed and reliability can be increased.

  In the avalanche photodiode shown in FIG. 7, a p-type peripheral conductive region 110 is annularly formed so as to surround the p-type conductive region 10 formed under the contact layer 9. Thus, even if the p-type conductive region 10 and the p-type peripheral conductive region 110 are formed, the surface electric field strength can be reduced, and breakdown can be suppressed.

Reference Example 4
FIG. 8 is a cross-sectional view showing a schematic structure of the avalanche photodiode according to the fourth reference example , and the depletion region 11 is shown as an image in order to explain the phenomenon. In this reference example , in the avalanche photodiode shown in the reference example 1, the p-type conductive region 10 is included, the peripheral region of the p-type conductive region 10 is left in a circular shape with a diameter of about 100 μm, and the window layer 8 on the outer periphery thereof is left. The light absorption layer 6 was removed until it reached the electric field relaxation layer 5 to form the side surface 25 (hereinafter referred to as side surface removal).

FIG. 9 is a characteristic diagram showing the relationship between the current and multiplication factor M and the reverse bias voltage for the avalanche photodiode with the side surface removed. The broken line in the figure is the dark current characteristic of the avalanche photodiode of the reference example 1 that is simply cleaved and element-isolated without removing the side surface.
The dark current that does not depend on the reverse bias voltage (Idark in the figure) is the generated dark current from the light absorption layer 6. Since the generated dark current flows through the cleavage plane in the configuration where only the cleavage is performed, the dark current is Becomes the 10 ⁻⁷ A level (Idark broken line in the figure). Compared to this, the avalanche photodiode of this reference example can cut off the generated dark current path from the light absorption layer 6, so that the dark current can be reduced to 10 ⁻⁸ A level (Idark solid line in the figure).

  As described above, the dark current is mainly generated from the light absorption layer 6 and flows through the depletion region 11, and therefore, at least the light absorption layer 6 surrounding the depletion region 11 may be removed. In consideration of the expansion of the depletion region 11, for example, the side surface may be removed while leaving the light absorption layer 6 having a width of 10 μm or more from the second conductivity type conductive region.

  If the width of the light absorption layer 6 left by the side surface removal is reduced, the electric field strength of the surface removed from the side surface increases and the long-term reliability also decreases. Therefore, the width of the light absorption layer 6 left by the side surface removal is 10 μm or more and 200 μm. The following is preferable. Moreover, the shape of the light absorption layer 6 left by the side surface removal is not particularly limited, and may be left in a circular shape or an elliptical shape, or may be a rectangular shape or a polygonal shape. In the case of the quadrangular shape or the polygonal shape, it is preferable to provide a rounded corner to prevent electric field concentration at the corner.

  As a method for removing the side surface, for example, there is a method of etching using a mixed solution of HBr / hydrogen peroxide solution. Further, organic acid etching using a mixed solution of an organic acid such as citric acid and tartaric acid and hydrogen peroxide water may be used. It may be dry etching such as reactive ion etching (RIE). Further, when the InP-based material is selectively etched, a hydrochloric acid-based solution such as a hydrochloric acid / phosphoric acid mixed solution can be used. In the case of selectively etching an AlGaInAs-based material or a GaInAsP-based material, an organic acid solution such as an organic acid (citric acid, tartaric acid, etc.) / Hydrogen peroxide solution mixed solution or a sulfuric acid solution can be used. Desirable side surface removal can be achieved by appropriately combining these with a Br-based solution such as HBr / hydrogen peroxide solution or Br / methanol having a low selective etching property.

Further, in this reference example , the example in which the side surface is removed until reaching the electric field relaxation layer 5 is shown, but the side surface may be removed to a layer deeper than the avalanche multiplication layer 4.
In this reference example , an example in which the window layer 8 and the light absorption layer 6 are joined is shown. However, as shown in the reference example 2 or the reference example 3, the transition is made between the window layer 8 and the light absorption layer 6. The layer 7 or the stopper layer 3 may be provided.
In this reference example , the example in which the conductive region 10 is formed is shown. However, as shown in the reference example 3, the peripheral conductive region 110 may be further formed.

Embodiment 1 FIG.
FIG. 10 is a sectional view showing a schematic configuration of the avalanche photodiode according to the first embodiment of the present invention. In the present embodiment, in the avalanche photodiode shown in Reference Example 4 , the side surface 25 is formed so that the width of the light absorption layer 6 is smaller than that of the window layer 8 and the electric field relaxation layer 5. For example, if a mixed solution of an organic acid and hydrogen peroxide solution is used, the light absorption layer 6 can be selectively etched deeply. By providing a step in the light absorption layer 6 and the electric field relaxation layer 5 in this way, it was difficult for the dark current to flow, and the dark current could be reduced to the 10 ⁻⁸ A level or lower.

Embodiment 2 FIG.
FIG. 11 is a cross-sectional view showing a schematic configuration of the avalanche photodiode according to the second embodiment of the present invention. In the present embodiment, in the avalanche photodiode shown in Reference Example 4 above, the window layer 8 is laterally removed with a hydrochloric acid / phosphoric acid solution, and the light absorbing layer 6 is laterally removed with an organic acid / hydrogen peroxide solution. A portion of the electric field relaxation layer 5, the avalanche multiplication layer 4, and the buffer layer 2 is removed using a HBr / hydrogen peroxide mixed solution at a position about 10 μm away from the side surface 25 of the light absorption layer 8 to form a groove 26. did. Thus, by removing at least the side of the light absorption layer 6 and further providing the groove 26, it is difficult for dark current to flow from the light absorption layer 6, and the dark current can be reduced to 10 ⁻⁸ A level or less. .

Although the distance between the side surface 25 and the groove 26 is 10 μm, it may be 10 μm or more.
The groove 26 is formed by removing the electric field relaxation layer 5, the avalanche multiplication layer 4, and the buffer layer 2, but at least the electric field relaxation layer 5 may be removed .

Embodiment 3 FIG.
FIG. 12 is a sectional view showing a schematic structure of an avalanche photodiode according to the third embodiment of the present invention. In the present embodiment, in the avalanche photodiode described in Embodiment 1-2 of the above embodiment, to form a protected by SiNx film 12 so as to cover the side surface 25 of the light-absorbing layer 6 which is at least removed.
By providing the protective film 12, oxidation and moisture absorption can be prevented, so that dark current can be suppressed and long-term reliability can be obtained. Furthermore, there is an effect that damage due to contact at the time of element handling can be prevented.

It is preferable to use SiNx as the protective film 12 because an antireflection effect can be provided, but a dielectric such as SiOx or an organic material such as polyimide may be used from the viewpoint of protection.
FIG. 12 of the present embodiment shows an example in which the protective film 12 is provided not only on the side surface 25 of the light absorption layer 6 but also on the upper surface and the side surfaces of other layers. As long as the side surface 25 is covered, only other necessary portions may be partially provided.

Embodiment 4 FIG.
FIG. 13 is a sectional view showing a schematic structure of an avalanche photodiode according to the fourth embodiment of the present invention. In the same manner as in Reference Example 1 , an n-type AlInAs / GaInAs distributed Bragg reflective layer 23 having a carrier concentration of 2 × 10 ¹⁸ to 2 × 10 ¹⁹ cm ⁻³ is formed on the n-type InP substrate 1 to a predetermined thickness. The p-type InP electric field relaxation layer having a predetermined thickness of the AlInAs reflection adjustment layer 24, an i-type AlInAs avalanche multiplication layer 4 of 0.1 to 0.3 μm, and a carrier concentration of 1 × 10 ¹⁷ to 2 × 10 ¹⁸ cm ^−3. 5 is 0.03 to 0.06 μm, the p-type GaInAs light absorption layer 6 having a carrier concentration of 1 to 5 × 10 ¹⁵ cm ⁻³ is 1.0 to 1.5 μm, and the i-type GaInAs transition layer 7 is 0.02 The i-type InP window layer 8 was grown to 1.0 to 2.0 μm, and the i-type GaInAs contact layer 9 was grown to 0.1 to 0.4 μm sequentially to about 0.2 μm.

Here, the predetermined thickness of the distributed Bragg reflection layer 23 satisfies the Bragg reflection condition given by an odd multiple of λ / (4n) where λ is the wavelength of light to be detected and n is the refractive index. The smallest λ / (4n) is preferable.
Further, the predetermined thickness of the reflection adjustment layer 24, a thick-only t _r, the refractive index n _r, the thickness of the avalanche multiplication layer 4 t _a, the refractive index n _a, the thickness of the electric field relaxation layer 5 t _e, the refractive index and _{n e,
t r = 1 / (4 ×} n r) (k × λ-4 × (t a × n a + t e × n e))> 0
(K is an odd number)
It satisfies. The minimum value is preferably used.

Further in the same manner as in Reference Example 1, p-type conductive region 10, a contact layer 9, and the side surface is removed in the same manner as in Reference Example 4, the SiNx in the same manner as in the third embodiment, the upper and side surfaces A protective film 12 was formed.

In the avalanche photodiode according to the present embodiment, when the light 28 is incident with the n-electrode 13 being positive and the p-electrode 14 being negative and applying a reverse bias voltage from the outside, the light is absorbed by the light absorption layer 6 and is electron- Create a hole pair. A part of the light is transmitted without being absorbed by the light absorption layer 6, but is effectively reflected by the reflection adjusting layer 24 and the distributed Bragg reflection layer 23 having the predetermined thickness and incident on the light absorption layer 6 again. And absorbed. This light further generates electron-hole pairs. In the region where the light absorption layer 6 is depleted by the reverse bias voltage, electrons generated by the electric field drift to the positive side and holes drift to the negative side. The holes reaching the transition layer 7 reach the p-type conductive region 10 without stagnation because the valence band discontinuity between the layers is suppressed. Therefore, a faster response is possible.
In particular, when the reverse bias voltage is sufficiently high, electrons that have reached the avalanche multiplication layer 4 are ionized to generate electron-hole pairs, and the generated electrons and holes also drift in opposite directions. By further ionizing these electrons and holes, the electrons and holes can be avalanche multiplied.

  The electric field intensity distribution in the avalanche photodiode according to the present embodiment is also the highest so as to cause avalanche multiplication due to ionization in the avalanche multiplication layer 4 as in FIG. It is possible to prevent the tunnel breakdown from occurring in the light absorption layer 6. Further, as in FIG. 3, the electric field intensity distribution in the direction parallel to each layer (plane direction) is highest immediately below the p-type conductive region 10 in the avalanche multiplication layer 4 so that edge breakdown does not occur. Further, since the transition layer 7 having a large band gap is provided, breakdown is less likely to occur. Further, since the side surface of the light absorption layer 6 was removed, the dark current path was blocked, and the rise of the electric field strength in the transition layer 7 could be further suppressed than in the example of the reference example 2.

FIG. 14 is a characteristic diagram showing the light receiving sensitivity distribution according to the present embodiment, which is represented by a normalized photocurrent with a peak of 1. FIG. 14 shows that the sensitivity is highest in the central portion of the p-type conductive region 10 and there is no edge breakdown, and a good avalanche multiplication can be obtained.
In the present embodiment, since the distributed Bragg reflection layer 23 and the reflection adjustment layer 24 are provided, the light transmitted without being absorbed in the light absorption layer 6 can be reflected again toward the light absorption layer 6. The light absorption amount in the absorption layer 6 can be further increased. Therefore, the photosensitivity of the avalanche photodiode can be increased.

In the present embodiment, an example in which the distributed Bragg reflection layer 23 is AlInAs / GaInAs is shown, but a layer having a high refractive index and a layer having a low refractive index may be alternately stacked. As the layer having a high refractive index, GaInAs, GaInAsP having a high As composition ratio, AlGaInAs having a high Ga composition ratio, or the like can be used. As the layer having a low refractive index, AlGaInAs having a high Al composition ratio, particularly AlInAs, and GaInAsP and InP having a high P composition ratio can be used.
In this embodiment, an example in which AlInAs having a low refractive index is used as the reflection adjustment layer 24 has been described. However, InP, AlGaInAs, GaInAsP, or the like may be used.
As for the n-type carrier concentration in the distributed Bragg reflection layer 23 and the reflection adjustment layer 24, the larger the resistance, the better as long as the resistance does not become a problem with respect to the operation speed.

In the present embodiment, an example in which the Bragg reflection layer 23 and the reflection adjustment layer 24 are provided between the substrate 1 and the avalanche multiplication layer 4 is shown. However, the Bragg reflection is performed on the light emitting surface side of the light absorption layer 6. It is only necessary that the layer 23 and the reflection adjusting layer 24 are provided with a predetermined thickness. Another layer may be sandwiched between the light absorption layer 6 and the Bragg reflection layer 23. In this case, the predetermined thickness of the Bragg reflection layer 23 is an odd multiple of the numerical value represented by λ / (4n), where λ is the wavelength of light to be detected and n is the refractive index of the Bragg reflection layer, The predetermined thickness _tr of the reflection adjustment layer 24 is defined by the refractive index n _r of the reflection adjustment layer 24 and the thicknesses of the layers sandwiched between the light absorption layer 6 and the Bragg reflection layer 23 by t ₁ , t ₂ ,. T _n , _where the refractive indices are n ₁ , n ₂ , n ₃ ,..., N _n and k are odd numbers, _tr = 1 / (4 × n _r ) (k × λ−4 × Σ ( t _n × n _n ))> 0
Any numerical value that satisfies the above requirement is acceptable.

In this embodiment, the example in which the side surface is removed up to the electric field relaxation layer 5 has been described, but the side surface may be removed up to the reflection adjustment layer 24.
By removing the side surfaces up to the reflection adjusting layer 24, exposure of the depleted region 11 can be prevented, and thus the reliability is further improved.

Embodiment 5 FIG.
FIG. 15 is a sectional view showing a schematic configuration of the avalanche photodiode according to the fifth embodiment of the present invention. In the present embodiment, in the avalanche photodiode shown in the first to fourth embodiments, after the side surface is removed, the insulating film 15 is provided on the outer peripheral portion, and a part of the insulating film 15 is removed to form the n-electrode 13. did. In the avalanche photodiode according to the present embodiment, the n electrode 13 and the p electrode 14 can be arranged on the element surface, so that the n electrode 13 and the p electrode 14 can be joined by wire wiring. Further, if bump electrodes are formed on the n electrode 13 using AuZn or the like, flip chip mounting is possible. Further, the n electrode 13 and the p electrode 14 can be formed of the same material at the same time.

Note that the protective film 12 may be used as the insulating film 15 in the present embodiment.
In the present embodiment, an example in which the n-electrode 13 is formed on the reflection adjustment layer 24 has been shown. However, among the layers constituting the reflection adjustment layer 24 and the Bragg reflection layer 23, the n-electrode 13 is disposed on a layer having a small band gap. Contact resistance can be reduced. The material is preferably contacted with GaInAs.

Further, in the present embodiment, the example in which the side surface is removed up to the reflection adjustment layer 24 is shown, but the light absorption layer 6 or the electric field relaxation layer 5 or the avalanche multiplication layer 4 may be used. Or it may be omitted transition layer 7. The reflection adjustment layer 24 and the distributed Bragg reflection layer 23 may be omitted. The p-type peripheral conductive region 110 shown in the reference example 3 may be provided.

Further, it is not necessary to remove all the side surfaces up to the cleaved surface 27. For example, as shown in FIG. 16, the upper surface is removed so that at least the light absorption layer is removed from the layers stacked on the outer peripheral first conductive type semiconductor substrate. The perforation hole 30 may be partially formed. FIG. 17 is a characteristic diagram showing the relationship between the current and multiplication factor M and the reverse bias voltage when the blind hole 30 is provided. A broken line in the figure is a dark current characteristic of the avalanche photodiode of the first embodiment in which the side surface is not removed and the element is simply cleaved and separated. By providing the stop hole 30, the depletion region spread changes, so that the photocurrent (Iphoto in the figure) temporarily decreases. However, the dark current is reduced to the 10 ⁻⁸ A level (Idark solid line in the figure) as in Reference Example 4 above. It can be seen that it can be reduced up to.

  The shape of the stop hole 30 is not particularly limited, and may be left in a ring shape or a track shape. The ring shape includes not only a shape in which a circular central portion is removed but also a shape in which a square shape and a polygonal central portion are removed. A shape with rounded corners is preferred so that electric field concentration can be prevented. Similarly, the track shape refers to a shape in which both ends of a rectangle are surrounded by a semicircle and a central portion is removed, and the semicircle portion includes a shape that is a part of a quadrangular shape or a polygonal shape. Similarly, a shape with rounded corners is preferable. Further, the track shape includes a shape obtained by removing an elliptical central portion.

  Moreover, as shown in FIG. 18, the said stop hole 30 may be provided and the 2nd stop hole 30 may be provided in the outer side. When a plurality of perforations 30 are provided, chipping and scratches generated during handling can be stopped outside, and yield and reliability can be improved.

  Further, if the n-electrode 13 is drawn to the upper surface, the mounting becomes easier. A p-type peripheral conductive region 110 may be provided on the outer peripheral portion.

In the first to fifth embodiments, a semi-insulating substrate 29 may be used as the substrate 1 for surface incidence. In this case, since the capacitance can be suppressed, the operating band can be improved.

In the present embodiment, the example in which the stop hole 30 is provided in order to arrange the n electrode 13 and the p electrode 14 on the element surface is shown. However, the stop hole 30 includes the second conductivity type conductive region 10. The second semiconductor layer 8 around the second conductive type conductive region can be used as a means for removing at least the side surface of the light absorption layer among the layers stacked on the outer peripheral substrate. That is, in the avalanche photodiode of the present invention in which the first electrode 13 is provided on the back surface of the substrate 1 in the above-described first to fourth embodiments, the blind hole 30 can be provided as the side surface removing means, and the dark current can be similarly reduced. There is an effect.

Embodiment 6 FIG.
FIG. 19 is a sectional view showing a schematic configuration of the avalanche photodiode according to the sixth embodiment of the present invention. In the present embodiment the avalanche photodiode shown in the first to fifth above embodiment, using a semi-insulating substrate 29, such as InP due Fe doped substrate 1. Further, the light 28 is incident from the semi-insulating substrate 29 substrate side. As a semiconductor lamination method, for example, an n-type AlInAs buffer layer 19 and an i-type AlInAs avalanche multiplication layer 4 having a carrier concentration of 2 × 10 ¹⁸ to 2 × 10 ¹⁹ cm ⁻³ are formed on a semi-insulating substrate 29 by 0.1. The p-type InP electric field relaxation layer 5 having a carrier concentration of 1 × 10 ¹⁷ to 2 × 10 ¹⁸ cm ⁻³ is 0.03 to 0.06 μm and the carrier concentration is 1 × 10 ^{15 to} 5 × 10 ¹⁵ cm ^−3. P-type GaInAs light absorption layer 6 of 1.0 to 1.5 μm, i-type AlGaInAs transition layer 7 of 0.02 to 0.2 μm, i-type InP second semiconductor layer 8 (when light is incident from the back surface) (I.e., function as a cap layer) and the i-type GaInAs contact layer 9 are sequentially grown to a thickness of 0.1 to 0.4 [mu] m, and then the p-type conductive region 10, the GaInAs contact layer 9, and the p-electrode 14 Formed.
Further, the side surface was removed up to the n-type AlInAs buffer layer 19, the protective film 12 was provided so as to cover the upper surface and the side surface 25, and the n-type electrode 13 was formed so as to contact the n-type AlInAs buffer layer 19.

  Since the avalanche photodiode according to the present embodiment is configured as described above, the light 28 can be incident from the back surface, and the light transmitted through the light absorption layer 6 can be reflected by the p electrode 14. Since the n-electrode 13 and the p-electrode 14 are provided on the surface of the InP semi-insulating substrate 29, flip-chip mounting is possible. Moreover, since the electric capacity can be reduced by using the Fe-doped InP semi-insulating substrate, the speed can be increased. There is also an effect of suppressing absorption in the substrate. Further, since the side surface 25 is provided, it can be used as a side-surface incident waveguide type, and the element capacity can be reduced.

  In this embodiment, the light 28 is incident on the back surface of the semi-insulating substrate 29, but an antireflection film may be provided on the semi-insulating substrate 29. An n-type buffer / cladding layer may be used instead of the n-type AlInAs buffer layer 19. A p-type peripheral conductive region 110 may be provided around the p-type conductive region 10.

Note that in the first to sixth the embodiments, the n-type as the first conductivity type, a p-type as the second conductivity type, an n-electrode as a first electrode, an example of using a p-electrode as a second electrode However, the p-type may be used as the first conductivity type, the n-type may be used as the second conductivity type, the p-electrode may be used as the first electrode, and the n-electrode may be used as the second electrode.

The formation of the conductive region 10 has been shown by an example of solid phase diffusion, but vapor phase diffusion may be used.
As materials for the n-electrode 13 and the p-electrode 14, AuZn / Au, AuGe / Ni / Au, Ti / Au may be used.
The avalanche multiplication layer 4 may be a GaInAsP, AlInAs / AlGaInAs superlattice, or AlInAs / GaInAsP superlattice.
In the first to tenth embodiments, the avalanche multiplication layer 4 uses an Al-based material that further multiplies electrons. However, when the multiplication layer side is p-type, holes are formed in the multiplication layer. Since it moves, an InP-based material capable of multiplying holes can be used as the avalanche multiplication layer 4.
Field relaxation layer 5, the material band gap larger are preferred. Since InP is a hole and AlInAs has a high electron ionization rate, a material having a higher electron ionization rate, for example, an Al-based material such as AlInAs, is used for the avalanche multiplication layer 4. By using the electric field relaxation layer 5, it is possible to obtain more excellent characteristics with respect to operation speed and noise.

The light absorption layer 6 may be i-type or n-conductivity of 3 × 10 ¹⁶ cm ⁻³ or less. The i-type and n-conductivity types may be only the upper part of the light absorption layer 6.
The transition layer 7 may be AlInAs or GaInAsP.
The window layer 8 may be AlInAs or AlGaInAs. Alternatively, a semi-insulating type doped with Fe may be used.
The contact layer 9 may be non-conductive type. If the conductive region 10 of the window layer 8 and the p-electrode 14 can be contacted with low resistance, they may be omitted.

In addition, there exists the said effect also in the form of each combination of the said Embodiment 1-6 .

It is sectional drawing which shows schematic structure of the avalanche photodiode by the reference example 1 of this invention. It is a characteristic view showing the electric field strength distribution of the depth direction in the AA 'cross section of FIG. 1 by the reference example 1 of this invention. It is the characteristic view showing the electric field strength distribution of the surface direction in the BB 'cross section and CC' cross section of FIG. 1 by the reference example 1 of this invention. It is the characteristic view which showed the difference in the carrier concentration in the depth direction by the reference example 1 of this invention. It is the characteristic view which showed the energy distribution in the layer junction part of the conduction band of the avalanche photodiode by the reference example 2 of this invention, and a valence band. It is sectional drawing which shows schematic structure of the avalanche photodiode by the reference example 3 of this invention. It is sectional drawing which shows schematic structure of the avalanche photodiode by the reference example 3 of this invention. It is sectional drawing which shows schematic structure which shows the avalanche photodiode by the reference example 4 of this invention. It is the characteristic figure which showed the relationship between the electric current and multiplication factor M, and a reverse bias voltage about the avalanche photodiode by the reference example 4 of this invention. It is sectional drawing which shows schematic structure of the avalanche photodiode by Embodiment 1 of this invention. It is sectional drawing which shows schematic structure of the avalanche photodiode by Embodiment 2 of this invention. It is sectional drawing which shows schematic structure of the avalanche photodiode by Embodiment 3 of this invention. It is sectional drawing which shows schematic structure of the avalanche photodiode by Embodiment 4 of this invention. It is the characteristic view which showed the light reception sensitivity distribution of the avalanche photodiode by Embodiment 4 of this invention. It is sectional drawing which shows schematic structure of the avalanche photodiode by Embodiment 5 of this invention. It is sectional drawing which shows schematic structure of the avalanche photodiode by Embodiment 5 of this invention. It is the characteristic view which showed the relationship between the electric current and multiplication factor M, and the reverse bias voltage about the avalanche photodiode by Embodiment 5 of this invention. It is sectional drawing which shows schematic structure of the avalanche photodiode by Embodiment 5 of this invention. It is sectional drawing which shows schematic structure of the avalanche photodiode by Embodiment 6 of this invention.

DESCRIPTION OF SYMBOLS 1 Board | substrate, 2, 19 1st semiconductor layer, 3 Stopper layer, 4 Avalanche multiplication layer, 5 Electric field relaxation layer, 6 Light absorption layer, 7 Transition layer, 8 2nd semiconductor layer, 9 Contact layer, 10 2nd Conductive type conductive region, 11 depleted region, 12 protective film, 13 first electrode, 14 second electrode, 15 insulating film, 23 Bragg reflection layer, 24 reflection adjustment layer, 25 side surface, 26 groove, 27 cleavage surface, 28 light , 29 semi-insulating substrate, 30 perforated hole, 110 second conductivity type peripheral conductive region, 120 surface protective film and antireflection film.

Claims (5)

A first electrode and a substrate having a first semiconductor layer of a first conductivity type electrically connected to the first electrode, the substrate including at least an avalanche multiplication layer, an electric field relaxation layer , in order of steps ; A light absorption layer and a second semiconductor layer having a larger band gap than the light absorption layer are sequentially stacked, and a second conductive type conductive region is formed in the second semiconductor layer, and the second conductive layer is formed. The mold conductive region is electrically connected to the second electrode; and
The second leaving a part of the semiconductor layer around the second conductivity type conductive region and the second conductivity type conductive region, among the layers stacked on the substrate of the outer periphery thereof, at least a light-absorbing layer is removed side surface of the light absorbing layer is formed, the light absorption layer is smaller than the avalanche multiplication layer, further, that the step is provided between the electric field relaxation layer is formed narrower than the electric field relaxation layer A characteristic avalanche photodiode.   2. The avalanche photodiode according to claim 1, wherein the side surface is formed by removing a layer deeper than the avalanche multiplication layer.   2. The avalanche photodiode according to claim 1, further comprising a second conductive type peripheral conductive region formed around the second conductive type conductive region.   The avalanche photodiode according to claim 1, wherein a protective film is provided on a side surface.   2. The avalanche photodiode according to claim 1, wherein a groove is provided in a layer laminated on a substrate on an outer periphery of a portion away from the side surface.

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