JP4957064B2 - 半導体装置及びその製造方法 - Google Patents
半導体装置及びその製造方法 Download PDFInfo
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- JP4957064B2 JP4957064B2 JP2006120846A JP2006120846A JP4957064B2 JP 4957064 B2 JP4957064 B2 JP 4957064B2 JP 2006120846 A JP2006120846 A JP 2006120846A JP 2006120846 A JP2006120846 A JP 2006120846A JP 4957064 B2 JP4957064 B2 JP 4957064B2
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Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32135—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/32145—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83191—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
Landscapes
- Adhesives Or Adhesive Processes (AREA)
- Die Bonding (AREA)
- Adhesive Tapes (AREA)
Description
エポキシ樹脂「YDCN−703」(東都化成(株)製商品名、クレゾールノボラック型エポキシ樹脂、エポキシ当量210)36重量部と、エポキシ樹脂の硬化剤としてのフェノール樹脂「ミレックスXLC−LL」(三井化学(株)製商品名、フェノール樹脂)30.1重量部と、シランカップリング剤である「A−1160」(日本ユニカー(株)製商品名)2.1重量部及び「A−189」(日本ユニカー(株)製商品名)1.1重量部と、シリカフィラー(粒子)である「アエロジルR972」(日本アエロジル株式会社、平均粒径:0.016μm、比表面積120m2/g)21.2重量部とからなる組成物にシクロヘキサノンを加え、攪拌混合してからビーズミルを用いて更に90分混練した。
配合比を表1の実施例2、3に示すように変更した以外は、実施例1と同様の工程を経て接着シートを作製した。
配合比を表1の比較例1〜6に示すように変更した以外は、実施例1と同様の工程を経て接着シートを作製した。
実施例1〜3及び比較例1〜7で得られた接着シートを用いて以下に示す評価項目について評価を行った。
ホットロールラミネータ(60℃、0.3m/分、0.3MPa)により、幅10mmの接着層を半導体ウエハに貼り合わせた。次いで、25℃の雰囲気中、引張速度50mm/分で90°の角度で剥がしたときの応力を測定して、90°ピール強度を求めた。測定装置はTOYOBALWIN製UTM−4−100型テンシロンを用いた。この場合の90°ピール強度が30N/m以上の場合はラミネート性良好、90°ピール強度が30N/m未満の場合はラミネート性不良とした。
接着シートを半導体ウェハに貼り合せ、基材を剥離して、接着層に市販の紫外線硬化型ダイシングテープ(古河電工(株)製、商品名:UC−334 EP−110)を貼り合せた。このダイシングテープは基材上に粘着層が形成されたものであり、貼り合わせの際には、粘着層と接着層とが接合するようにした。続いて、ダイサーを用いて半導体ウェハ及び接着層をダイシングしてから、ダイシングテープの基材側から紫外線を照射(500J/cm2)した。照射後、接着層からダイシングテープを剥離して、接着層付き半導体チップを得た。
170℃で1時間又は5時間の加熱により硬化した接着層から5×30mmの大きさに切り出した試験片に、20mmの間隔で2箇所に印を付し、その一端に荷重(W)のおもりを取り付けて吊り下げた状態で170℃の高温槽に投入した。投入から60秒後におけるフィルムの伸び量ΔLを測定し、その部分の断面積S(=100/(20+ΔL))を求めた。そして、高温弾性率E’をE’=20×W/(ΔL×S)の関係から算出した。なお、試験片の伸び量が5mm未満になるようにおもりの荷重を調整した。
170℃で1時間又は5時間の加熱により硬化した接着層について、動的粘弾性測定装置(レオロジー社製、DVE−V4)を用いた動的粘弾性測定により、200℃における貯蔵弾性率を測定した。動的粘弾性測定は、サンプルサイズ:長さ20mm、幅4mm、温度範囲−30℃〜200℃、昇温速度5℃/min、引張りモード、10Hz、自動静荷重の条件で行った。
接着層の両面にポリイミドフィルム(ユーピレックスS、厚さ50μm)を積層し、170℃で5時間の加熱により接着層を硬化した試験片を作製した。この試験片を幅10mmに切断し、25℃の雰囲気下でポリイミドフィルムの両端を50mm/minの速度で180°ピール強度を測定した。
Claims (4)
- 半導体チップ搭載用の支持部材に、170℃で5時間の熱履歴を受けたときに、170℃における引張弾性率が0.1〜2MPa、且つ、200℃における貯蔵弾性率が1〜6MPaとなる接着層を介して、該接着層と前記支持部材の凹凸表面との間に空隙が残された状態で半導体チップを接着する工程と、
前記支持部材に接着された半導体チップをワイヤボンディングにより前記支持部材に接続する工程と、
前記支持部材に接続された半導体チップを樹脂封止するとともに該半導体チップと前記支持部材との間の接着層によって前記空隙を充填する工程と、を備え、
前記接着層が、エポキシ樹脂及びその硬化剤並びにアクリルゴムを含む樹脂と、比表面積が30〜400m 2 /gである粒子と、からなり、前記硬化剤がフェノール樹脂で、前記粒子がシリカ粒子であり、
前記樹脂全体量に対して、エポキシ樹脂及びその硬化剤の合計量の割合が21〜26質量%、アクリルゴムの割合が74〜79質量%であり、
前記樹脂100重量部に対して、前記粒子の割合が1.8〜20重量部である、
半導体装置の製造方法。 - 前記支持部材に接続された半導体チップの前記支持部材と反対側に接着層を介して半導体チップを積層し、該半導体チップをワイヤボンディングにより前記支持部材に接続する工程を1又は2以上含む工程を更に備える、請求項1記載の製造方法。
- 半導体ウエハ、接着層及びダイシングテープがこの順で積層された積層体から、半導体チップ、接着層及びダイシングテープがこの順で積層されたチップ積層体を回転刃によって切り出し、ダイシングテープを除去して接着層付き半導体チップを得る工程を更に備え、
当該接着層付き半導体チップを前記支持部材上に載置し、0.001〜1MPaで加圧することにより前記支持部材に半導体チップを接着する、請求項1又は2に記載の製造方法。 - 請求項1〜3のいずれか一項に記載の製造方法により得られる、半導体装置。
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