JP4705384B2 - Gallium nitride semiconductor device - Google Patents

Description

  The present invention relates to a gallium nitride semiconductor device including a p-type gallium nitride semiconductor layer such as a light emitting diode (LED), a laser diode (LD), or a pin-type light receiving device.

A gallium nitride (GaN) -based semiconductor material represented by a composition formula Al _X Ga _Y In _Z N (0 ≦ X, Y, Z ≦ 1, X + Y + Z = 1) or the like corresponds to a short wavelength visible light to an ultraviolet light region. Since it has a band gap of energy direct transition type, it has been conventionally used to construct a pn junction type light emitting element such as blue, green, or ultraviolet LED or LD (for example, Patent Documents). 1).

  A p-type conductive GaN-based semiconductor layer for forming a pn junction type gallium nitride-based semiconductor light-emitting device has conventionally added a group II element of the periodic table of elements as a p-type impurity (group II impurity). Is formed. For example, a technique for adding a Group II impurity such as magnesium (Mg) or zinc (Zn) to the GaN layer by means of ion implantation has already been disclosed (see, for example, Patent Document 2).

However, a gallium nitride based semiconductor layer doped with a Group II impurity is not generally a good conducting layer exhibiting p-type conduction as it is. This is because, for example, hydrogen (H) penetrating into the layer from the growth environment during vapor phase growth electrically compensates for the added Group II impurities and inactivates them. For this reason, conventionally, after forming a gallium nitride based semiconductor layer to which a Group II impurity is added, a technical means for performing a heat treatment (see, for example, Patent Document 3) in order to deviate hydrogen in the layer as much as possible out of the layer. Has been adopted. In addition, charged particle irradiation means is known as technical means for electrically activating Group II impurities (see, for example, Patent Document 4).
Japanese Patent Publication No. 55-3834 JP 51-71590 A Japanese Patent Laid-Open No. 6-237012 JP-A-53-20882

  However, for example, a pn junction type LED is constructed using a low resistance p-type conductive layer obtained by removing most of hydrogen from a GaN-based semiconductor layer doped with a Group II element as a p-type impurity. Even so, good rectification characteristics or electrostatic withstand voltage characteristics are not always obtained stably. In particular, with regard to electrostatic withstand voltage, conductive substrates such as silicon (Si) single crystal (silicon), silicon carbide (SiC), and gallium arsenide (GaAs) are used as a substrate for providing a p-type GaN-based semiconductor layer. Even if it is, it is not always stable and good.

  For example, a means for preventing a local breakdown failure by inserting a high-resistance layer having a wide prohibited body width is also considered. However, such a high resistance layer is used as, for example, a contact layer for forming an ohmic electrode, and an ohmic electrode is provided there, for example, to form a GaN-based semiconductor LED or LD. However, there is a problem that the forward voltage (Vf) or the threshold voltage (Vth) increases easily.

  The present invention aims at overcoming the instability of electrostatic withstand voltage and, for example, the increase in forward voltage, for example, in a gallium nitride-based LED configured using the conventional p-type GaN-based semiconductor layer as described above. It was made. In particular, the present invention does not intentionally remove the hydrogen contained inside the GaN-based semiconductor layer to which the Group II impurity is added, but intentionally removes the hydrogen from the outside of the layer. In addition, a low resistance region (low resistance layer) is provided in the specific region layer (surface layer portion) to provide a GaN-based semiconductor element having a low forward voltage and the like with improved electrostatic withstand voltage. .

The present invention has been made to solve the above-described problems, and comprises the inventions of the following items.
(1) In a gallium nitride based semiconductor device including a gallium nitride (GaN) based compound semiconductor layer (p-type layer) containing p-type impurities and exhibiting p-type conductivity, the p-type layer is a surface layer portion. And the deep bottom portion is a region in which p-type impurities and hydrogen coexist, and the hydrogen concentration in the deep bottom portion of the p-type layer is 1 × 10 ¹⁸ cm ⁻³ or more and less than or equal to the impurity concentration. Higher than the hydrogen concentration of the surface layer portion and the impurity concentration is 1 × 10 ¹⁸ cm ⁻³ to 1 × 10 ²¹ cm ⁻³ , and the surface layer portion of the p-type layer has an impurity concentration of 1 × 10 ¹⁸ cm ⁻³ to A non-stoichiometric atomic concentration ratio that is 1 × 10 ²¹ cm ⁻³ , and the group III constituent element and the group V constituent element are shifted from the stoichiometric ratio to the rich side of the group III constituent element. A gallium nitride based semiconductor element including a p-type layer, characterized by having a region including .
(2) The gallium nitride based semiconductor device according to (1), wherein the thickness of the deep bottom portion of the p-type layer is 40 to 99.9% of the thickness of the p-type layer.

(3) The above (1) or (3) wherein the thickness of the region containing the group III constituent element and the group V constituent element in a non-stoichiometric atomic concentration ratio is in the range of 1 to 10 nm from the surface of the p-type layer. 2. The gallium nitride based semiconductor device according to 2).
(4) The gallium nitride based semiconductor device described in any one of (1) to (3) above, wherein Ga element is deposited on the surface of the surface layer portion of the p-type layer.
(5) A gallium nitride based semiconductor material containing a group III constituent element and a group V constituent element in a non-stoichiometric atomic concentration ratio is bonded to the surface of the p-type layer. A gallium nitride based semiconductor device including the p-type layer according to any one of (1) to (4).
(6) In a method for manufacturing a gallium nitride based semiconductor device comprising a gallium nitride (GaN) based compound semiconductor layer (p-type layer) containing p-type impurities and exhibiting p-type conductivity, a p-type layer The surface layer of the substrate is a region containing a group III constituent element and a group V constituent element in a non-stoichiometric atomic concentration ratio shifted from a stoichiometric ratio to a richer group III constituent element , and p The mold layer is heat-treated in an inert atmosphere or in an inert atmosphere containing 40% by volume or less of hydrogen gas, and the hydrogen concentration in the deep bottom portion of the p-type layer is made higher than the hydrogen concentration in the surface layer portion, and the deep bottom portion is made higher than the surface layer portion. A method of manufacturing a gallium nitride based semiconductor device, characterized by comprising a resistor.
(7) The hydrogen concentration in the deep bottom portion of the p-type layer is not less than 1 × 10 ¹⁸ cm ^{−3 and not} more than the impurity concentration, is higher than the hydrogen concentration in the surface layer portion, and the impurity concentration is 1 × 10 ¹⁸ cm ⁻³ to 1 ×. 10 ²¹ cm ⁻³ , and the surface layer portion of the p-type layer has an impurity concentration of 1 × 10 ¹⁸ cm ⁻³ to 1 × 10 ²¹ cm ^−3. Method.

  According to the present invention, a region having a non-stoichiometric composition is provided in the deep bottom portion of the layer, and the surface layer of the layer above the deep bottom portion has a high resistance region in which hydrogen remains. Since the GaN-based semiconductor light emitting device is formed by using the provided p-type GaN-based semiconductor layer to which a p-type impurity is added, for example, a GaN-based semiconductor LED having excellent electrostatic withstand voltage and low forward voltage is used. Can be configured.

The gallium nitride based semiconductor device of the present invention includes a gallium nitride (GaN) compound semiconductor layer (p-type layer) exhibiting p-type conductivity, and the p-type layer is formed from a surface layer portion and a deep bottom portion inside thereof. In the deep bottom portion, hydrogen coexists in a predetermined range together with p-type impurities, and the surface layer portion has a region containing a group III constituent element and a group V constituent in a non-stoichiometric atomic concentration ratio. It is a feature.
Conventionally known structures can be used as they are for the other components of the semiconductor element.

The p-type layer in the present invention can be applied without limitation as long as it is a p-type GaN-based layer such as a p-type GaN-based cladding layer or a p-type GaN-based contact layer, and is applied to at least one of these layers. Can do. When a p-type layer is stacked on a crystal substrate that is not lattice-matched therewith, a lattice-mismatched crystal epitaxial growth technique called a seeding process (SP) method (Japanese Patent Laid-Open No. 2003-243302) is advantageously used. it can.
In order to grow the p-type layer, vapor phase growth means such as molecular beam epitaxy (MBE), metal organic chemical vapor deposition (MOCVD), hydride vapor phase epitaxy (HVPE) can be used. Ammonia, hydrazine, azide, or the like can be used as a nitrogen source (nitrogen source) constituting the GaN-based semiconductor layer. Further, trimethylgallium, triethylgallium, trimethylindium, trimethylaluminum, or the like can be used as a raw material for the Group III constituent element.

  The p-type impurity (dopant) added during the vapor phase growth of the p-type layer is Mg, zinc (Zn), beryllium (Be), calcium (Ca), strontium (Sr), barium (Ba), cadmium (Cd And Group II elements such as mercury (Hg). Although there are amphoteric impurities belonging to Group IV, such as carbon (C) (see Teramoto Satoshi, "Introduction to Semiconductor Devices", Baifukan Co., Ltd., published on March 30, 1995, first edition, page 113), It is desirable to use a Group II element such as Mg as a p-type impurity.

The concentration of p-type impurities such as Mg is almost 1 × 10 ¹⁸ cm ⁻³ or more, preferably 5 × 10 ¹⁸ cm ⁻³ or more, and almost 1 × 10 ¹⁸ cm ⁻³ or more in the surface layer portion and deep bottom portion in the p-type layer. ²¹ cm ⁻³ or less. The surface layer in the p-type layer contains little hydrogen, but the deep bottom contains more hydrogen. The amount is generally 1 × 10 ¹⁸ cm ⁻³ or more, preferably 1 × 10 ¹⁸ to 1 × 10 ²⁰ cm ⁻³ . The concentration of p-type impurities and hydrogen atoms inside the p-type layer can be quantified by analysis means such as general secondary ion mass spectrometry (SIMS) and Auger electron spectroscopy (AES).

  The total film thickness (total thickness) including the deep bottom of the p-type layer is generally 0.5 μm or less, desirably 0.2 μm or less, and more desirably 0.1 μm or less. The lower limit of the film thickness is about 1 nm. The total thickness of the p-type layer can be controlled by adjusting the supply time of the Group III constituent elements to the growth reaction system during vapor phase growth. The total thickness of the p-type layer is known, for example, from observation with an optical microscope, a scanning electron microscope (SEM), a transmission electron microscope (TEM), or the like. In the p-type layer having such a total thickness, in the present invention, hydrogen is intentionally left in a specific range at the deep bottom portion in the layer. The deep bottom portion is a back portion viewed from the surface of the p-type layer, and is a region of the contact layer 107-1 as shown in the example of FIG.

  If hydrogen is left to electrically inactivate the added p-type impurity, the forward voltage (Vf) and threshold voltage (Vth) may increase. There is almost no effect. The thickness of the deep bottom is preferably 40% or more and 99.9% or less with respect to the thickness of the p-type layer, and particularly 70% or more and 99.9% with respect to the thickness of the p-type layer. The following regions are more preferable. The boundary surface between the surface layer portion and the deep bottom portion in the p-type layer is determined by SIMS as the position of the concentration of 2/3 of the highest hydrogen concentration in the p-type layer.

The conventional heat treatment means for causing almost all the hydrogen forming an electrically inactive complex with the p-type impurity to deviate as much as possible out of the layer allows a specific amount of hydrogen to remain in the deep bottom region according to the present invention. It is different from technical means.
In the present invention, after adding a p-type impurity to form a layer containing the p-type impurity, heat treatment is performed in an atmosphere mainly composed of an inert gas, and a region in which a specific amount of hydrogen remains is left. Can be formed.
For the heat treatment, a grown growth furnace may be used. When the temperature at which the cooling is started is the formation temperature of the layer containing the p-type impurity, the thickness of the region in which hydrogen is left decreases as the cooling rate increases. Further, when the cooling rate is the same, the higher the temperature at which the cooling is started, the smaller the thickness of the region where hydrogen remains.

The cooling of the layer containing the p-type impurity can be performed in a mixed atmosphere of an inert gas such as nitrogen (N ₂ ), argon (Ar), helium (He) and hydrogen (H ₂ ) gas, for example. When cooling is performed in an atmosphere in which the volume content of hydrogen is larger, the thickness of the region in which hydrogen remains can be further increased. However, the volume content of hydrogen gas is preferably 40% or less. When the content of hydrogen gas is extremely large, the amount of hydrogen entering the layer containing the p-type impurity from the atmosphere increases, so that it is difficult to control the thickness of the region where the hydrogen remains.

The thickness of the region in which the specific amount of hydrogen remains in the p-type layer varies depending on the cooling start temperature, the cooling rate, the configuration of the atmosphere, and the shape of the facility for cooling. Therefore, these conditions cannot be defined unconditionally, but the Mg-doped GaN layer is grown from 1050 ° C., which is the growth temperature, to room temperature in a mixed atmosphere of 95% by volume of nitrogen and 5% by volume of hydrogen. In the case of cooling, the cooling rate suitable for forming the region in which hydrogen is left according to the present invention is generally 40 ° C. or more and 120 ° C. or less per minute. For example, in the case of an Al _x Ga _y N (0 <X, Y <1, X + Y = 1) layer containing aluminum (Al), the cooling rate may be smaller (slower).
Even if the cooling rate and the structure of the atmospheric gas at the time of cooling are changed, the atomic concentration distribution of the p-type impurity added in the p-type layer does not change.

  If hydrogen remains in all the layers of the p-type layer, formation of an ohmic electrode having a low contact resistance is also inhibited. From these facts, when the p-type layer is used as a contact layer for forming an ohmic electrode, a p-type layer in which a region where hydrogen remains is provided in a deep portion while the surface side has a low resistance. Is convenient to use.

  In the present invention, in order to reduce the resistance of the surface portion in the p-type layer (low forward voltage), at least a part of the surface layer portion includes a group III element and a group V element in a non-stoichiometric ratio. Layer. Non-stoichiometric means that, for example, in the case of GaN, the element ratio of Ga and N deviates from 1: 1. The low resistance layer having a stoichiometrically shifted composition is desirably provided in a range from 1 nm to 10 nm in depth from the surface of the p-type layer. The stoichiometric composition is desirably shifted toward the rich side of the Group III constituent elements, and Ga elements are preferably deposited in the entire region from 1% or more of the surface. In the present invention, the deviation of the composition ratio of Ga and N includes not only the deviation of the composition as the GaN compound but also the case where the composition of the entire surface layer portion is shifted due to the precipitation of the Ga element. The low-resistance layer is formed of p-type GaN having a composition shifted from the stoichiometric composition toward the gallium (Ga) rich side.

  In order to provide a p-type low resistance layer deviating from the stoichiometric composition in the surface layer portion of the p-type layer, for example, it can also be formed by vapor phase growth means such as MOCVD. For example, it can be formed by changing the so-called V / III ratio in conjunction with vapor phase growth of a p-type GaN-based semiconductor layer containing a p-type impurity. For example, the supply amount of the group V constituent element to the growth reaction system is kept constant so that the V / III ratio becomes small, while the supply amount of the group III constituent element is increased to reduce the p-type layer. A resistance layer is formed. Conversely, the p-type low resistance layer is formed by reducing the supply amount of the group V constituent element while keeping the supply amount of the group III constituent element constant.

  In the semiconductor element of the present invention, for example, a p-type GaN-based semiconductor layer having a stoichiometric composition shifted can be provided on the surface of the p-type layer. As the method, for example, a target material or vapor deposition material obtained by shifting from the stoichiometric composition in advance is used, and bonding is performed by a general high-frequency sputtering means or vapor deposition means. Further, a p-type GaN-based semiconductor layer with a stoichiometric element shifted may be grown on the surface of the p-type layer while supplying Ga more than nitrogen using MBE means. The amount of stoichiometric deviation between the group III element and the group V element provided in the p-type layer or on the surface of the p-type layer is very small.

The material having a non-stoichiometric composition to be bonded to the surface of the p-type layer is not necessarily composed of the same material as the GaN-based semiconductor material same as that of the p-type layer. For example, a non-stoichiometric composition is formed on the surface of a p-type Al _x Ga _y N (0 ≦ X, Y ≦ 1, X + Y = 1) layer including a high resistance region in which hydrogen atoms remain. The p-type boron phosphide (BP) compound semiconductor layer may be bonded. In addition, GaN, AlGaN, etc. can be used. In particular, monomeric boron phosphide (BP) containing boron (B), which is a group III element rich in phosphorus (P), can be easily constructed as an undoped, low-resistance p-type conductive layer. It is. The thickness of this BP is preferably 0.01 μm to 1 μm.
The above-described method of providing a p-type GaN-based semiconductor layer having a stoichiometrically shifted composition on the surface of the p-type layer can also be used for generating the surface layer portion of the BP layer.

  The low-resistance layer having a non-stoichiometric composition in which the surface layer portion has a low resistance with a non-stoichiometric composition or a non-stoichiometric composition bonded to the surface forms a p-type ohmic electrode with a low contact resistance thereon. It works preferentially. Therefore, it is effective to supply an LED having a low forward voltage. In addition, this effect is not limited by a metal, but acts preferentially on any known metal.

  The group III nitride p-type semiconductor and the manufacturing method thereof of the present invention can be used for manufacturing various semiconductor devices. For example, in addition to semiconductor light-emitting elements such as light-emitting diodes and laser diodes, any semiconductor element such as various high-speed transistors and light-receiving elements that require group III nitride p-type semiconductors can be manufactured. It is possible to use. Among these various semiconductor elements, it can be particularly suitably used for the production of a semiconductor light emitting element that requires formation of a pn junction and formation of a positive electrode with good characteristics.

  An example of the structure of a group III nitride semiconductor light-emitting device manufactured using the group III nitride p-type semiconductor of the present invention and the method for manufacturing the group III nitride semiconductor is shown as follows. The n-type semiconductor layer, the light emitting layer, and the p-type semiconductor layer are sequentially stacked, and the negative electrode is provided in the n-type semiconductor layer and the positive electrode is provided in the p-type semiconductor layer. Here, the p-type semiconductor layer on the outermost surface has a structure described in the present invention.

  Conventionally known materials such as sapphire, SiC, GaN, AlN, Si, ZnO and other oxide substrates can be used for the element substrate without any limitation. Sapphire is preferable. The buffer layer is provided as necessary in order to adjust the lattice mismatch between the substrate and the n-type semiconductor layer grown thereon. Conventionally known buffer layer technology is used as needed.

  The composition and structure of the n-type semiconductor layer may be set to a desired composition and structure using well-known techniques well known in this technical field. Usually, the n-type semiconductor layer is composed of a contact layer capable of obtaining good ohmic contact with the negative electrode and a cladding layer having a larger band gap energy than the light emitting layer. The negative electrode may also have a desired composition and structure using known techniques well known in the art.

  For the light emitting layer, a conventionally known composition and structure such as a single quantum well structure (SQW) and a multiple quantum well structure (MQW) can be used without any limitation.

  The p-type semiconductor layer has a surface layer portion and a deep bottom portion formed by the manufacturing method of the present invention. About another composition and structure, what is necessary is just to make it a desired composition and structure using the well-known technique well known in this technical field. Usually, like an n-type semiconductor layer, it consists of a clad layer which has a larger band gap energy than a light emitting layer and a contact layer that provides good ohmic contact with the positive electrode.

  As the positive electrode material to be brought into contact with the p-type layer produced by the method of the present invention, metals such as Au, Ni, Co, Cu, Pd, Pt, Rh, Os, Ir, and Ru can be used. Moreover, you may include transparent oxides, such as ITO, NiO, and CoO. As a form containing a transparent oxide, you may include in the said metal film as a lump, and you may form in a layer form and overlap with the said metal film.

  In particular, when the present invention is used when a platinum group metal such as Pd, Pt, Rh, Os, Ir, Ru, etc. is used as a positive electrode material, an increase in driving voltage due to heat during bonding can be prevented. Greater effect. Among them, high purity Pd, Pt, and Rh can be obtained relatively easily and are easy to use.

The material brought into contact with the p-type layer produced by the method of the present invention may be a transparent material such as ITO, ZnO, SnO, or InO. Since these transparent conductive materials generally exhibit better translucency than a metal thin film, they are materials that are desired to be actively used as transparent electrodes.
However, until now, the conductivity type of these materials is n-type, and ohmic contact could not be formed even if they were brought into contact with p-type GaN. By using the technique of the present invention, ohmic contact with these conductive transparent materials can be realized.

  The positive electrode may be formed so as to cover almost the entire surface, or may be formed in a lattice shape or a tree shape with a gap. After forming the positive electrode, thermal annealing may be performed for the purpose of alloying or transparency, but it may not be performed.

As a form of the element, a so-called face-up (FU) type in which light emission is extracted from the semiconductor side using a transparent positive electrode, or so-called flip chip (FC) in which light emission is extracted from the substrate side using a reflection type positive electrode. It is good as a type.
(Function)
The hydrogen remaining in the GaN-based semiconductor layer to which the p-type impurity is added has an action of creating a high resistance region inside the same layer, and improves the withstand voltage characteristics.
The group III-V element layer having a non-stoichiometric composition provided in the surface layer portion of the p-type layer above the high resistance region formed by the remaining hydrogen has an action of reducing the resistance of the surface layer portion. .
The group III-V element layer having a non-stoichiometric composition provided bonded to the surface of the p-type layer has an action of reducing the contact resistance of the electrode.

Example 1
In this example, a p-type GaN-based semiconductor layer using a p-type GaN-based semiconductor layer provided with a region (deep bottom portion) in which hydrogen remains in the p-type layer and a surface layer portion including a region having a non-stoichiometric composition is used. The contents of the present invention will be described specifically with reference to the case of configuring an LED.

  FIG. 1 is a schematic cross-sectional view of a laminated structure 11 used for manufacturing the LED described in this example. FIG. 2 shows a schematic plan view of the LED 10 in which electrodes are attached on the laminate 11.

The laminated structure 11 has an undoped GaN layer (layer thickness = 2 μm) 102 and a silicon (Si) doped n-type GaN layer (layer thickness = layer thickness = sequentially on the c-plane ((0001) crystal plane) of sapphire as the substrate 101. 2 μm, carrier concentration = 1 × 10 ¹⁹ cm ⁻³ ) 103, Si-doped n-type Al _0.07 Ga _0.93 N cladding layer (layer thickness = 12.5 nm, carrier concentration = 1 × 10 ¹⁸ cm ⁻³ ) 104, 6 layers From a Si-doped GaN barrier layer (layer thickness = 14.0 nm, carrier concentration = 1 × 10 ¹⁸ cm ⁻³ ) and five undoped In _0.20 Ga _0.80 N well layers (layer thickness = 2.5 nm) The light emitting layer 105, the Mg-doped p-type Al _0.07 Ga _0.93 N clad layer (layer thickness = 10 nm) 106, and the Mg-doped GaN contact layer (layer thickness = 100 nm) 107 were laminated. Each of the constituent layers 102 to 107 of the laminated structure 11 was grown by a general low pressure MOCVD means.

In particular, the Mg-doped GaN contact layer 107 was grown according to the following procedure.
(1) After the growth of the Mg-doped Al _0,07 Ga _0.98 N cladding layer 106 was completed, the pressure in the growth reactor was set to 2 × 10 ⁴ pascals (Pa).
(2) Trimethylgallium ((CH ₃ ) ₃ Ga) and ammonia (NH ₃ ) as raw materials, biscyclopentamagnesium (bis- (C ₅ H ₅ ) ₂ Mg) as Mg doping source, and Mg at 1050 ° C. Vapor phase growth of the doped GaN layer was started.
(3) A trimethylgallium, ammonia, and Mg doping source was continuously supplied into the growth reactor for 4 minutes to grow a Mg-doped p-type GaN layer having a layer thickness of 80 nm. At this time, the V / III (= NH ₃ / (CH ₃ ) ₃ Ga) ratio was set to 1.9 × 10 ⁴ . Thereby, the deep bottom part 107-1 was formed.
(4) Next, without changing the supply amount of trimethylgallium, the flow rate of ammonia is sharply decreased to set the V / III ratio to 9 × 10 ^3, and the growth is continued for 30 seconds, so that Ga is reduced. A rich non-stoichiometric GaN layer was grown as a surface layer 107-2.
(5) The supply of trimethylgallium and bis- (C ₅ H ₅ ) ₂ Mg into the growth reactor was stopped, and the growth of the Mg-doped p-type GaN layer was stopped.

  Immediately after the vapor phase growth of the Mg-doped p-type GaN layer 107 was terminated, energization to the high frequency induction heating type heater used to heat the substrate 101 was stopped. Thus, the laminated structure 11 began to be cooled from 1050 ° C. in the growth reactor in which the constituent layers 102 to 107 were vapor-phase grown. The atmosphere during cooling was configured by mixing nitrogen into the hydrogen carrier gas used for vapor phase growth of each constituent layer of the laminated structure 11. The mixing ratio of nitrogen and hydrogen was 95: 5 by volume ratio. The temperature was decreased at an average rate of 50 ° C. from 1050 ° C. to room temperature.

After cooling to room temperature, the laminated structure 11 was taken out from the growth reactor, and the atomic concentrations of magnesium and hydrogen in the Mg-doped GaN layer 107 were quantified by a general SIMS analysis method. Mg atoms were distributed at a concentration of 7 × 10 ¹⁹ cm ^{−3 at} a substantially constant concentration in the depth direction from the surface. On the other hand, although hydrogen atoms were somewhat reduced in the surface layer, they existed at a substantially constant concentration of 6 × 10 ¹⁹ cm ^{−3 at} a depth of 30 nm from the surface. For this reason, in this region, most of the Mg atoms are electrically inactivated due to the hydrogen atoms, so that the resistance is high. Ga element was deposited on the surface of the surface portion of the Mg-doped GaN layer 107, and the elemental ratio of Ga and N was more than 1: 1 in the surface layer portion including this. Since the Ga element was deposited on the surface, the contact resistance with the electrode could be lowered.

  An LED 10 was fabricated using the multilayer structure 11 including the Mg-doped p-type GaN layer 107 described above. First, general dry etching was performed on a region where the n-type ohmic electrode 108 is to be formed, and the surface of the Si-doped GaN layer 103 was exposed only in that region. An n-type ohmic electrode 108 formed by stacking titanium (Ti) / aluminum (Al) was formed on the exposed surface portion. In the other region, the surface layer portion has a non-stoichiometric composition enriched in Ga, and the light is emitted from the light emitting layer to the sapphire substrate 101 side substantially over the entire surface of the Mg-doped p-type GaN layer 107. A p-type ohmic electrode 109 having a platinum (Pt) film / rhodium (Rh) film / gold (Au) film layered thereon was formed. The metal film in contact with the surface of the Mg-doped p-type GaN layer 107 was a platinum film.

  After the p-type and n-type ohmic electrodes 108 and 109 were formed, the back surface of the sapphire substrate 101 was ground using abrasive grains such as diamond fine grains, and the substrate 101 was thinned from about 350 μm to about 85 μm. Finally, the back surface of the substrate was mirror finished by precision polishing. Thereafter, the laminated structure 11 was cut and separated into individual square LEDs 10 having a 350 μm square. Next, ohmic electrodes 108 and 109 were bonded to the submount to form a flip chip. Further, after placing it on the lead frame, it was connected to the lead frame with a gold (Au) wire.

  A forward current was passed between the p-side and n-side ohmic electrodes 108 and 109 of the LED mounted in a flip type, and the electrical characteristics and the light emission characteristics were evaluated. The forward voltage (Vf) when the forward current was 20 mA was 3.1V. The wavelength of light emitted from the sapphire substrate 101 to the outside was 455 nm. The light emission output measured with a general integrating sphere was 10 mW. The LEDs having such characteristics were obtained with no variation for about 10,000 LEDs excluding defective products formed on substantially the entire surface of the circular substrate 101 having a diameter of 2 inches.

  Moreover, the simple electrostatic breakdown test was implemented about LED10. Assuming that static electricity is suddenly applied, a pulse voltage was instantaneously applied between the electrodes, and then the presence or absence of a short circuit between the electrodes in the reverse direction was investigated. Among 100 specimens, one LED chip was destroyed by applying a 1000 V pulse voltage. That is, the defect occurrence rate of the reverse voltage (Vr) was 1%.

(Example 2)
In Example 2, an example in which an LED is configured by bonding a material having a non-stoichiometric composition to the surface of the same stacked structure described in Example 1 is described. The contents of the invention will be described.

  In FIG. 3, the cross-sectional schematic diagram of LED20 as described in a present Example is shown. The same components as those shown in FIGS. 1 and 2 are denoted by the same reference numerals, and description thereof is omitted.

  Immediately after the vapor phase growth of the Mg-doped p-type GaN layer 107 was terminated, energization to the high frequency induction heating type heater used to heat the substrate 101 was stopped. Thus, the laminated structure 11 began to be cooled from 1050 ° C. in the growth reactor in which the constituent layers 102 to 107 were vapor-phase grown. The atmosphere during cooling was configured by mixing nitrogen into the hydrogen carrier gas used for vapor phase growth of each constituent layer of the laminated structure 11. The mixing ratio of nitrogen and hydrogen was 9: 1 by volume ratio. The temperature was decreased from 1050 ° C. to 850 ° C. at a rate of 120 ° C. per minute.

Next, while maintaining the temperature of the laminated structure 11 at 850 ° C., an undoped boron phosphide (BP) is formed on the surface of the Mg-doped p-type GaN layer 107 by a general atmospheric pressure (substantially atmospheric pressure) MOCVD means. ) Layer 110 was vapor grown. The boron phosphide layer 110 was grown using triethyl boron ((C ₂ H ₅ ) ₃ B) and phosphine (PH ₃ ) gas as raw materials. The V / III ratio (= PH ₃ / (C ₂ H ₅ ) ₃ B ratio) at the time of growth was set to 10 in order to form the boron phosphide layer 110 rich in boron (B). The undoped boron phosphide layer 110 exhibits p-type conduction, a carrier (hole) concentration at room temperature is 1 × 10 ¹⁹ cm ⁻³ , and a resistivity is 5 × 10 ⁻² Ω · cm. became. The deviation from the stoichiometric amount of the boron phosphide layer 110 was about 0.5% due to the difference in lattice constant. The layer thickness of the undoped boron phosphide layer 110 having a non-stoichiometric composition was 0.1 μm.

According to SIMS analysis, a hydrogen atom, stands for Mg-doped p-type GaN layer from the 107 surface to a depth 15nm is 3 × 10 ¹⁹ cm ^-3, a deeper than the depth 15nm 6 × 10 ¹⁹ cm ^-3 It was present at a constant concentration. On the other hand, Mg atoms were present at a substantially constant concentration of 7 × 10 ¹⁹ cm ^{−3 in} the depth direction from the surface of the same layer 107. That is, in the deep bottom portion of the Mg-doped p-type GaN layer 107 extending from the junction interface with the lower layer 106 to a thickness of 85 nm in the increasing direction of the layer thickness, a high resistance region in which Mg and hydrogen atoms exist at substantially the same concentration. Was formed. From the current-voltage (IV) characteristics of the Mg-doped p-type GaN layer 107, the resistivity in the high resistance region was estimated to be about 10 Ω · cm.

  In the same manner as described in Example 1, an n-type ohmic electrode 108 was provided on the n-type GaN layer 103. One p-type ohmic electrode 109 was provided on an undoped boron phosphide layer having a non-stoichiometric composition to form a laminate 20 shown in a sectional view in FIG. A forward current was passed between the p-side and n-side ohmic electrodes 108 and 109 of the laminate 20 mounted in a flip type, and the electrical characteristics and the light emission characteristics were evaluated. The forward voltage (Vf) when the forward current was 20 mA was 3.0 V, which was lower than that of the LED chip 10 of Example 1. The wavelength of light emitted from the sapphire substrate 101 to the outside was 455 nm. Moreover, the light emission output measured with a general integrating sphere was 12 mW. The LEDs having such characteristics were obtained with no variation for about 10,000 LEDs excluding defective products formed on substantially the entire surface of the circular substrate 101 having a diameter of 2 inches.

  In addition, a simple electrostatic breakdown test was performed on the laminate 20. Assuming that static electricity is suddenly applied, a pulse voltage was instantaneously applied between the electrodes, and then the presence or absence of a short circuit between the electrodes in the reverse direction was investigated. Among 100 specimens, one LED chip was destroyed by applying a 1000 V pulse voltage. That is, the defect occurrence rate of the reverse voltage (Vr) was 1%.

(Example 3)
In Example 3, in addition to Example 1, after the vapor phase growth of the contact layer 107 made of the Mg-doped AlGaN layer was completed, the carrier gas was immediately switched from hydrogen to nitrogen, and the flow rate of ammonia was reduced. The nitrogen flow rate of the carrier gas was increased by the amount that was increased. Specifically, during the growth, ammonia, which accounted for 50% of the total circulation gas volume, was reduced to 0.2%. At the same time, the energization of the high frequency induction heating type heater used to heat the substrate 101 was stopped.

  Furthermore, after maintaining for 2 minutes in this state, the circulation of ammonia was stopped. At this time, the temperature of the substrate was 850 ° C.

After cooling to room temperature in this state, the laminated structure 11 was taken out from the growth reactor, and the atomic concentrations of magnesium and hydrogen in the contact layer 107 were quantified by a general SIMS analysis method. Mg atoms were distributed at a concentration of 7 × 10 ¹⁹ cm ^{−3 at} a substantially constant concentration in the depth direction from the surface. On the other hand, although hydrogen atoms were somewhat reduced in the surface region, they existed at a substantially constant concentration of 6 × 10 ¹⁹ cm ^{−3 at} a depth of 20 nm from the surface. For this reason, in this region, most of the Mg atoms are electrically inactivated due to the hydrogen atoms, so that the resistance is high. Since the surface layer portion having a depth of 30 nm or less from the surface in the Mg-doped GaN layer 107 is formed with an extremely low V / III ratio, it becomes a low resistance layer having a resistivity at room temperature of about 0.5 Ω · cm. It was.

An LED 10 was fabricated using the multilayer structure 11 including the Mg-doped p-type GaN layer 107 described above. First, general dry etching was performed on a region where the n-type ohmic electrode 108 is to be formed, and the surface of the Si-doped GaN layer 103 was exposed only in that region. An n-type ohmic electrode 108 formed by stacking titanium (Ti) / aluminum (Al) was formed on the exposed surface portion. In the other region, the surface layer portion has a non-stoichiometric composition enriched in Ga, and the light is emitted from the light emitting layer to the sapphire substrate 101 side substantially over the entire surface of the Mg-doped p-type GaN layer 107. A p-type ohmic electrode 109 having a platinum (Pt) film / rhodium (Rh) film / gold (Au) film layered thereon was formed. The metal film in contact with the surface of the Mg-doped p-type GaN layer 107 was a platinum film.

After the p-type and n-type ohmic electrodes 108 and 109 were formed, the back surface of the sapphire substrate 101 was ground using abrasive grains such as diamond fine grains, and the substrate 101 was thinned from about 350 μm to about 85 μm. Finally, the back surface of the substrate was mirror finished by precision polishing. Thereafter, the laminated structure 11 was cut and separated into individual square LEDs 10 having a 350 μm square. Next, ohmic electrodes 108 and 109 were bonded to the submount to form a flip chip. Further, after placing it on the lead frame, it was connected to the lead frame with a gold (Au) wire.

A forward current was passed between the p-side and n-side ohmic electrodes 108 and 109 of the LED mounted in a flip type, and the electrical characteristics and the light emission characteristics were evaluated. The forward voltage (Vf) when the forward current was 20 mA was 3.1V. The wavelength of light emitted from the sapphire substrate 101 to the outside was 455 nm. The light emission output measured with a general integrating sphere was 10 mW. The LEDs having such characteristics were obtained with no variation for about 10,000 LEDs excluding defective products formed on substantially the entire surface of the circular substrate 101 having a diameter of 2 inches.

Moreover, the simple electrostatic breakdown test was implemented about LED10. Assuming that static electricity is suddenly applied, a pulse voltage was instantaneously applied between the electrodes, and then the presence or absence of a short circuit between the electrodes in the reverse direction was investigated. Among 100 specimens, one LED chip was destroyed by applying a 1000 V pulse voltage. That is, the defect occurrence rate of the reverse voltage (Vr) was 1%.

  The semiconductor element of the present invention is used for a light emitting diode, a laser diode, a pin type light receiving element, and the like.

3 is a schematic cross-sectional view showing a laminated configuration of the laminated structure described in Example 1. FIG. 1 is a schematic plan view of an LED described in Example 1. FIG. 3 is a schematic cross-sectional view of a laminated structure described in Example 2. FIG.

Explanation of symbols

10 LED
11, 20 Multilayer structure 101 Crystal substrate 102 Undoped GaN layer 103 n-type GaN layer 104 n-type AlGaN clad layer 105 multiple quantum well structure light emitting layer 106 p-type AlGaN clad layer 107 p-type GaN contact layer 107-1 p-type GaN contact 107-2 Surface layer part of p-type GaN contact layer 108 n-type ohmic electrode 109 p-type ohmic electrode 110 Non-stoichiometric boron phosphide layer

Claims (7)

In a gallium nitride-based semiconductor device comprising a gallium nitride (GaN) -based compound semiconductor layer (p-type layer) containing p-type impurities and exhibiting p-type conductivity, the p-type layer includes a surface layer portion and a surface layer portion thereof. The deep bottom portion is a region where a p-type impurity and hydrogen coexist, and the hydrogen concentration in the deep bottom portion of the p-type layer is 1 × 10 ¹⁸ cm ⁻³ or more and less than or equal to the impurity concentration. The impurity concentration is 1 × 10 ¹⁸ cm ⁻³ to 1 × 10 ²¹ cm ⁻³ , and the surface concentration of the p-type layer is 1 × 10 ¹⁸ cm ⁻³ to 1 × 10. A region that is ²¹ cm ⁻³ and includes a group III constituent element and a group V constituent element at a non-stoichiometric atomic concentration ratio that is shifted from a stoichiometric ratio toward a richer group III constituent element. A gallium nitride based semiconductor device including a p-type layer.   The gallium nitride based semiconductor device according to claim 1, wherein the thickness of the deep bottom portion of the p-type layer is 40 to 99.9% of the thickness of the p-type layer.   The nitriding according to claim 1 or 2, wherein the thickness of the region containing the group III constituent element and the group V constituent element in a non-stoichiometric atomic concentration ratio is in the range of 1 to 10 nm from the surface of the p-type layer. Gallium-based semiconductor device.   The gallium nitride based semiconductor device according to any one of claims 1 to 3, wherein a Ga element is deposited on a surface of a surface layer portion of the p-type layer.   A gallium nitride based semiconductor material containing a group III constituent element and a group V constituent element in a non-stoichiometric atomic concentration ratio is bonded to the surface of the p-type layer. 5. A gallium nitride based semiconductor device including the p-type layer according to claim 1. In a method for manufacturing a gallium nitride based semiconductor device comprising a gallium nitride (GaN) based compound semiconductor layer (p-type layer) containing p-type impurities and exhibiting p-type conductivity, a surface layer portion of the p-type layer Is a region containing a group III constituent element and a group V constituent element in a non-stoichiometric atomic concentration ratio shifted from a stoichiometric ratio to a richer group III constituent element , and a p-type layer is Heat treatment was performed under an inert atmosphere or an inert atmosphere containing 40% by volume or less of hydrogen gas, and the hydrogen concentration in the deep bottom portion of the p-type layer was made higher than the hydrogen concentration in the surface layer portion so that the deep bottom portion had a higher resistance than the surface layer portion. A method for manufacturing a gallium nitride based semiconductor device. The hydrogen concentration in the deep bottom portion of the p-type layer is not less than 1 × 10 ¹⁸ cm ^{−3 and not} more than the impurity concentration, is higher than the hydrogen concentration in the surface layer portion, and the impurity concentration is 1 × 10 ¹⁸ cm ⁻³ to 1 × 10 ²¹ cm. ^The method for manufacturing a gallium nitride based semiconductor element according to claim 6, wherein the surface layer portion of the p-type layer has an impurity concentration of 1 × 10 ¹⁸ cm ⁻³ to 1 × 10 ²¹ cm ⁻³ .

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