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JP4617524B2 - Battery protection device - Google Patents

Battery protection device Download PDF

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Publication number
JP4617524B2
JP4617524B2 JP30909999A JP30909999A JP4617524B2 JP 4617524 B2 JP4617524 B2 JP 4617524B2 JP 30909999 A JP30909999 A JP 30909999A JP 30909999 A JP30909999 A JP 30909999A JP 4617524 B2 JP4617524 B2 JP 4617524B2
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Japan
Prior art keywords
fet
protection device
battery
die pad
drain
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
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JP30909999A
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JP2001135361A (en
Inventor
直樹 菊地
泰久 東島
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Mitsumi Electric Co Ltd
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Mitsumi Electric Co Ltd
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Priority to JP30909999A priority Critical patent/JP4617524B2/en
Publication of JP2001135361A publication Critical patent/JP2001135361A/en
Priority to JP2009233079A priority patent/JP4775676B2/en
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Publication of JP4617524B2 publication Critical patent/JP4617524B2/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49113—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting different bonding areas on the semiconductor or solid-state body to a common bonding area outside the body, e.g. converging wires
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
    • Y02E60/10—Energy storage using batteries

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  • Protection Of Static Devices (AREA)
  • Charge And Discharge Circuits For Batteries Or The Like (AREA)
  • Secondary Cells (AREA)

Description

【０００１】
【発明の属する技術分野】
本発明は、リチウムイオン電池等の二次電池を保護するための電池保護装置に関する。
【０００２】
【従来の技術】
携帯電話装置等で使用される再充電可能な電池パックは、リチウムイオン電池を絶縁性のパッケージに内蔵したものである。この電池パックには、上記電池に対する過放電や過充電を防止するための充電保護装置が内蔵されている。この保護装置を構成する複数の回路部品、具体的には図４に示すように、充電用スイッチ手段としての電界効果型のトランジスタ（ＦＥＴ）２１、放電用スイッチ手段としてのＦＥＴ２２、保護ＩＣ２３が印刷配線パターンを有する回路基板２４に別々のパッケージ品として実装される。なお、ＦＥＴとしては、日本電気株式会社、三菱電機株式会社、又は株式会社日立製作所による製品等を使うことができる。また、保護ＩＣとしては、本件出願人であるミツミ電機株式会社製の製品を使うことができる。
【０００３】
また、現在、携帯機器等は小型化が進んでおり、電池パックの小型化も必要とされている。
【０００４】
【発明が解決しようとする課題】
ところで、上記従来の充電保護装置では、充電用ＦＥＴ、放電用ＦＥＴ、保護ＩＣを、上記回路基板上に別々のパッケージとして配設しているので、軽量化、小型化、配線の簡素化が困難であった。また、実装不良の低減も困難である。
【０００５】
本発明は、上記実情に鑑みてなされたものであり、軽量化、小型化、配線の簡素化、実装不良の低減を可能とする電池保護装置の提供を目的とする。
【０００６】
【課題を解決するための手段】
本発明に係る電池保護装置は、上記課題を解決するために、二次電池における過充電及び過放電を防止するための１パッケージ化された電池保護装置であって、前記二次電池に接続され、裏面にドレインを有する充電用ＦＥＴと、前記二次電池に接続され、裏面にドレインを有する放電用ＦＥＴと、前記二次電池の両端電圧に基づき前記充電用ＦＥＴと前記放電用ＦＥＴとを制御して前記二次電池の過充電及び過放電を防ぐ保護手段と、第一のダイパッドと第二のダイパッドを含むリードフレームとを備え、前記リードフレームの第一のダイパッドには、前記保護手段がマウントされ、前記リードフレームの第二のダイパッドには、前記充電用ＦＥＴと前記放電用ＦＥＴとがマウントされ、前記充電用ＦＥＴの裏面のドレインと前記放電用ＦＥＴの裏面のドレインとが接続されていることを特徴とする。
【０００７】
ここで、上記充電用スイッチ手段及び放電用スイッチ手段をマウントするダイパッドと、上記保護手段をマウントするダイパッドとは電位が異なる。
【０００８】
【発明の実施の形態】
以下、本発明の実施の形態について図面を参照しながら説明する。この実施の形態は、リチウムイオン電池における過充電及び過放電を防止するための電池保護装置であり、図１に示すように、充電制御用スイッチとしてのＦＥＴ（充電用ＦＥＴ）１と、放電制御用スイッチとしてのＦＥＴ（放電用ＦＥＴ）２と、保護ＩＣ３とを樹脂４にて封止し、１パッケージ化してなる。
【０００９】
この電池保護装置の製造手順を説明する。リードフレーム５の枠６には搬送用の孔７が開けられている。また、リードフレーム５上には、充電量ＦＥＴ及び放電用ＦＥＴと、保護ＩＣ用とに電位の異なるダイパッド８と、ダイパッド９が用意されている。二つのダイパッド８及び９の周囲にはリードフレーム５のインナーリード１０が設けられている。また、インナーリード１０と、このインナーリード１０に続くアウターリード１１との間には、タイバー部１２が設けられている。
【００１０】
一方のダイパッド９にマウントされた保護ＩＣ３、他方のダイパッド８にマウントされた充電用ＦＥＴ１及び放電用ＦＥＴ２は、それぞれの各電極とインナーリード１０とを金Auなどからなるワイヤ１３によりボンディング接続している。例えば、充電用ＦＥＴ１は、ゲートＧとソースＳをインナーリード１０にボンディング接続している。ＦＥＴのドレインＤはチップの裏面全面であり、ＦＥＴ同士（１と２）はダイパッド部の銀Agペーストによりドレインを接続させている。ここで、放電用ＦＥＴ２のソース電極Ｓからリードフレーム１０の一部に多数のワイヤ１３がボンディングされているのは、例えば５Ａ程度の大電流が流れたときに単数のワイヤ１３の溶断を防ぐためである。ワイヤ１本は１Ａ程度で溶断する。
【００１１】
ワイヤ（Au）１３でボンディング接続した後、保護ＩＣ３と、充電量ＦＥＴ１及び放電用ＦＥＴ２は、まとめて樹脂４により封止される。その後、フレーム枠６とタイバー部１２とを切り取り、各アウターリード１１を独立させて図２に示すような１パッケージ化された電池保護装置１４が作成される。この１パッケージ化された電池保護装置１４は、図３に示すように基板１５上に配設される。基板１５上には、図示しないコンデンサ、抵抗等も配設される。コンデンサ、抵抗等、その他の部品はユーザにより定数が異なることが多い為、１パッケージ化していない。
【００１２】
以上、上記電池保護装置１４は、充電用ＦＥＴ１、放電用ＦＥＴ２、保護ＩＣ３を、１パッケージ化して回路基板１５に配設することができるので、軽量化、小型化、配線の簡素化が可能である。
【００１３】
また、上記ＦＥＴ等の部品を一つにまとめてモジュール化したので、半田付け個所を減らすことができ、結果的に信頼性を向上でき、実装不良の低減を可能とする。
【００１４】
【発明の効果】
本発明によれば、電池保護装置の軽量化、小型化、配線の簡素化、実装不良の低減を可能とする。
【図面の簡単な説明】
【図１】本発明の実施の形態となる電池保護装置の製造手順を説明するための図である。
【図２】上記電池保護装置の外観図である。
【図３】回路基板上に配置した上記電池保護装置を示す図である。
【図４】従来の電池保護装置における各部の配設を示す図である。
【符号の説明】
１ 充電用ＦＥＴ
２ 放電用ＦＥＴ
３ 保護ＩＣ
４ 封止樹脂
５ リードフレーム[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a battery protection device for protecting a secondary battery such as a lithium ion battery.
[0002]
[Prior art]
A rechargeable battery pack used in a cellular phone device or the like has a lithium ion battery built in an insulating package. This battery pack incorporates a charge protection device for preventing overdischarge and overcharge of the battery. A plurality of circuit components constituting this protection device, specifically, a field effect transistor (FET) 21 as a charging switch means, an FET 22 as a discharging switch means, and a protection IC 23 are printed as shown in FIG. It is mounted on the circuit board 24 having the wiring pattern as a separate package product. As the FET, products manufactured by NEC Corporation, Mitsubishi Electric Corporation, or Hitachi, Ltd. can be used. As the protection IC, a product manufactured by Mitsumi Electric Co., Ltd., the applicant of the present application, can be used.
[0003]
At present, portable devices and the like are being miniaturized, and the battery pack is also required to be miniaturized.
[0004]
[Problems to be solved by the invention]
By the way, in the conventional charge protection device, since the charging FET, the discharging FET, and the protection IC are arranged as separate packages on the circuit board, it is difficult to reduce the weight, reduce the size, and simplify the wiring. Met. It is also difficult to reduce mounting defects.
[0005]
The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a battery protection device that can be reduced in weight, reduced in size, simplified in wiring, and reduced in mounting defects.
[0006]
[Means for Solving the Problems]
In order to solve the above problems, the battery protection device according to the present invention is a battery protection device in one package for preventing overcharge and overdischarge in a secondary battery, and is connected to the secondary battery. a charging FET having a drain on the rear surface, it is connected to the secondary battery, control and discharge FET having a drain on the rear surface, and said discharging FET and the charging FET based on the voltage across the secondary battery And a protection means for preventing overcharge and overdischarge of the secondary battery, and a lead frame including a first die pad and a second die pad, and the protection means is provided on the first die pad of the lead frame. is mounted, said the second die pad of a lead frame, said a charging FET and the discharge FET is mounted, F for the discharge and the back surface of the drain of the charging FET Wherein the the back surface of the drain of T is connected.
[0007]
Here, the die pad for mounting the charging switch means and the discharging switch means and the die pad for mounting the protection means have different potentials.
[0008]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings. This embodiment is a battery protection device for preventing overcharge and overdischarge in a lithium ion battery. As shown in FIG. 1, an FET (charge FET) 1 as a charge control switch, and a discharge control are provided. An FET (discharge FET) 2 as a switch for use and a protection IC 3 are sealed with a resin 4 to form one package.
[0009]
The manufacturing procedure of this battery protection device will be described. A transport hole 7 is formed in the frame 6 of the lead frame 5. On the lead frame 5, a die pad 8 and a die pad 9 having different potentials for a charge amount FET and a discharge FET and for a protection IC are prepared. Inner leads 10 of the lead frame 5 are provided around the two die pads 8 and 9. A tie bar portion 12 is provided between the inner lead 10 and the outer lead 11 following the inner lead 10.
[0010]
The protective IC 3 mounted on one die pad 9 and the charging FET 1 and discharging FET 2 mounted on the other die pad 8 are bonded and connected to each electrode and the inner lead 10 by a wire 13 made of gold Au or the like. Yes. For example, the charging FET 1 has the gate G and the source S bonded to the inner lead 10. The drain D of the FET is the entire back surface of the chip, and the FETs (1 and 2) are connected to each other by silver Ag paste in the die pad portion. Here, the reason why a large number of wires 13 are bonded from the source electrode S of the discharge FET 2 to a part of the lead frame 10 is to prevent the single wire 13 from fusing when a large current of about 5 A flows, for example. It is. One wire melts at about 1A.
[0011]
After the bonding connection with the wire (Au) 13, the protection IC 3, the charge amount FET 1 and the discharge FET 2 are collectively sealed with the resin 4. Thereafter, the frame frame 6 and the tie bar portion 12 are cut out, and the outer leads 11 are made independent to form the battery protection device 14 in one package as shown in FIG. The battery protection device 14 in one package is disposed on a substrate 15 as shown in FIG. On the substrate 15, capacitors, resistors, and the like (not shown) are also arranged. Other components such as capacitors and resistors are not packaged in one package because they often have different constants depending on the user.
[0012]
As described above, the battery protection device 14 can charge the FET 1, the discharge FET 2, and the protection IC 3 in one package and be disposed on the circuit board 15. Therefore, it is possible to reduce the weight, reduce the size, and simplify the wiring. is there.
[0013]
In addition, since the parts such as the FET are integrated into a module, the number of soldering points can be reduced, and as a result, the reliability can be improved and the mounting defects can be reduced.
[0014]
【The invention's effect】
According to the present invention, it is possible to reduce the weight, size, wiring, and mounting defects of the battery protection device.
[Brief description of the drawings]
FIG. 1 is a diagram for explaining a manufacturing procedure of a battery protection device according to an embodiment of the present invention.
FIG. 2 is an external view of the battery protection device.
FIG. 3 is a diagram showing the battery protection device arranged on a circuit board.
FIG. 4 is a diagram showing an arrangement of each part in a conventional battery protection device.
[Explanation of symbols]
1 Charging FET
2 Discharge FET
3 Protection IC
4 Sealing resin 5 Lead frame

Claims (2)

二次電池における過充電及び過放電を防止するための１パッケージ化された電池保護装置であって、
前記二次電池に接続され、裏面にドレインを有する充電用ＦＥＴと、
前記二次電池に接続され、裏面にドレインを有する放電用ＦＥＴと、
前記二次電池の両端電圧に基づき前記充電用ＦＥＴと前記放電用ＦＥＴとを制御して前記二次電池の過充電及び過放電を防ぐ保護手段と、
第一のダイパッドと第二のダイパッドを含むリードフレームとを備え、
前記リードフレームの第一のダイパッドには、前記保護手段がマウントされ、
前記リードフレームの第二のダイパッドには、前記充電用ＦＥＴと前記放電用ＦＥＴとがマウントされ、
前記充電用ＦＥＴの裏面のドレインと前記放電用ＦＥＴの裏面のドレインとが接続されていることを特徴とする電池保護装置。A battery protection device in one package for preventing overcharge and overdischarge in a secondary battery,
A charging FET connected to the secondary battery and having a drain on the back surface ;
A discharging FET connected to the secondary battery and having a drain on the back surface ;
And protection means for preventing overcharge and overdischarge of the secondary battery by controlling the said discharging FET and the charging FET based on the voltage across the secondary battery,
A lead frame including a first die pad and a second die pad;
The protection means is mounted on the first die pad of the lead frame,
The charging FET and the discharging FET are mounted on the second die pad of the lead frame,
Battery protection apparatus characterized by a drain of the rear surface of the back surface of the drain and the discharging FET of the charging FET is connected. 前記充電用ＦＥＴの裏面のドレインと、前記放電ＦＥＴの裏面のドレインとは、前記第二のダイパッド部の銀ペーストで接続されていることを特徴とする請求項１記載の電池保護装置。2. The battery protection device according to claim 1, wherein the drain on the back surface of the charging FET and the drain on the back surface of the discharge FET are connected by a silver paste of the second die pad portion.
JP30909999A 1999-10-29 1999-10-29 Battery protection device Expired - Lifetime JP4617524B2 (en)

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JP30909999A JP4617524B2 (en) 1999-10-29 1999-10-29 Battery protection device
JP2009233079A JP4775676B2 (en) 1999-10-29 2009-10-07 Battery protection device

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JP4882235B2 (en) * 2005-01-27 2012-02-22 ミツミ電機株式会社 Battery protection module
US7868432B2 (en) * 2006-02-13 2011-01-11 Fairchild Semiconductor Corporation Multi-chip module for battery power control
KR100943594B1 (en) * 2006-03-27 2010-02-24 삼성에스디아이 주식회사 Single unit protection circuit module and battery pack using it
JP5165543B2 (en) * 2008-11-28 2013-03-21 株式会社日立超エル・エス・アイ・システムズ Battery monitoring device and battery monitoring semiconductor device
KR101093907B1 (en) 2009-11-26 2011-12-13 삼성에스디아이 주식회사 Semiconductor device for protection battery cell, protection circuit module and battery pack having the same
KR101054888B1 (en) * 2009-12-21 2011-08-05 주식회사 아이티엠반도체 Integrated chip arrangement of battery protection circuit
JP6795888B2 (en) 2016-01-06 2020-12-02 力智電子股▲フン▼有限公司ｕＰＩ Ｓｅｍｉｃｏｎｄｕｃｔｏｒ Ｃｏｒｐ． Semiconductor devices and mobile devices using them

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