JP4691974B2

JP4691974B2 - Power converter control method

Info

Publication number: JP4691974B2
Application number: JP2004355547A
Authority: JP
Inventors: 貫太郎吉本; 康彦北島
Original assignee: Nissan Motor Co Ltd
Current assignee: Nissan Motor Co Ltd
Priority date: 2004-12-08
Filing date: 2004-12-08
Publication date: 2011-06-01
Anticipated expiration: 2024-12-08
Also published as: JP2006166629A

Description

本発明は、交流モータを駆動する電力変換装置の制御方法である。 The present invention is a method for controlling a power converter that drives an AC motor.

従来技術として燃料電池を主電源として高効率にモータを駆動する構成が、特開２００２−１１８９８１号公報（特許文献１を参照されたい。）に示されている。この例では、図１に示すようにバッテリーがＤＣＤＣコンバータを介して燃料電池と並列に接続されており、ＤＣＤＣコンバータの出力電圧を制御することで、電源の出力効率を改善することを狙っている。また、ＤＣＤＣコンバータを不要にした技術として、本願発明者らは先願（出願番号2004-200545号）において、ＤＣＤＣコンバータを介さずに、燃料電池とバッテリーの組み合わせに限らず、複数の電源電力を利用・配分し、全体の体積・損失を低減可能な電力変換器の制御方法を開発している。
特開２００２−１１８９８１号公報（段落0004-0005、図１） Japanese Laid-Open Patent Publication No. 2002-118981 (refer to Patent Document 1) discloses a configuration of driving a motor with high efficiency using a fuel cell as a main power source as a conventional technique. In this example, as shown in FIG. 1, the battery is connected in parallel with the fuel cell via the DCDC converter, and the output voltage of the DCDC converter is controlled to improve the output efficiency of the power source. . In addition, as a technique that eliminates the need for a DCDC converter, the inventors of the present application (in Japanese Patent Application No. 2004-200545) do not use a DCDC converter, and not only a combination of a fuel cell and a battery, but also a plurality of power sources. We are developing a power converter control method that can be used and distributed to reduce the overall volume and loss.
JP 2002-118981 A (paragraphs 0004-0005, FIG. 1)

しかしながら、最初に挙げた例の構成においては、ＤＣＤＣコンバータを使っているため、電源と電力変換装置、モータを全て含めたシステム全体の体積が大きくなるとともに、バッテリーを充放電するためにはＤＣＤＣコンバータを通過するために損失が発生する。そこで本発明は、ＤＣＤＣコンバータを介さずに、燃料電池とバッテリーの組み合わせに限らず、複数の電源電力を利用・配分し、全体の体積・損失を低減可能な電力変換器の制御方法を提供することを目的とする。
また、次に挙げた先願（出願番号2004-200545号）においては、電力変換装置のスイッチをオン・オフさせるときに極間短絡電流が流れるタイミングが発生する場合があるが、これを防ぐ方法については考慮されていなかった。そこで、本発明は、極間の短絡電流を防ぎ、スイッチの発熱を低減する極間短絡を防ぐ制御方法を提供することも目的とする。 However, in the configuration of the first example, since the DCDC converter is used, the volume of the entire system including the power source, the power conversion device, and the motor is increased, and the DCDC converter is used for charging and discharging the battery. Loss occurs due to passing through. Therefore, the present invention provides a method of controlling a power converter that can reduce and reduce the overall volume and loss by using and distributing a plurality of power sources without using a DCDC converter, and not limited to a combination of a fuel cell and a battery. For the purpose.
Moreover, in the following prior application (Application No. 2004-200545), there is a case where a short-circuit current flows between the electrodes when the power converter is turned on / off. Was not considered. Then, this invention also aims at providing the control method which prevents the short circuit current between electrodes and prevents the short circuit between electrodes which reduces the heat_generation | fever of a switch.

上述した諸課題を解決すべく、第１の発明による、電力変換装置の制御方法は、
複数の直流電源に接続され、これら直流電源のそれぞれの出力電圧からパルスを生成・合成することで駆動電圧を生成し交流モータを駆動する電力変換装置の制御方法であって、
電位の異なる極間経路の短絡を防止する短絡防止ステップ、
を含み、
前記短絡防止ステップは、
電位の異なる同極性の極間経路の短絡を防止するステップと、
前記電位の異なる同極性の極間経路の状態に基づき、電位の異なる異極性の極間経路の短絡を防止するステップとを含む、
ことを特徴とする。
In order to solve the above-described problems, a method for controlling a power conversion device according to the first invention includes:
A method for controlling a power converter that is connected to a plurality of DC power supplies, generates a drive voltage by generating and synthesizing pulses from the output voltages of each of these DC power supplies, and drives an AC motor,
A short-circuit prevention step for preventing a short circuit between paths having different potentials,
Only including,
The short circuit prevention step includes:
A step of preventing a short circuit between paths of the same polarity with different potentials;
Preventing short-circuiting between different-polarity interpolar paths with different potentials based on the state of the same-polarity different-polarity paths with different potentials,
It is characterized by that.

また、第２の発明による電力変換装置の制御方法は、
前記短絡防止ステップが、さらに、
電位の異なる同極性の極間経路における複数のスイッチがともにオフする所定の時間を経過した後に前記複数のスイッチのいずれか一つをオフからオンへ切り換えるステップと、
前記電位の異なる同極性の極間経路における複数のスイッチのオン信号に基づき、異なる極性の極間経路におけるスイッチのオン信号を生成するオン信号生成ステップとを含む、
ことを特徴とする。
The control method of the power converter according to the second invention is
The short-circuit prevention step further comprises:
A step of switching any one of the plurality of switches from off to on after a predetermined time has elapsed when both of the switches in the same-polarity path of different potentials are turned off;
An on signal generating step of generating an on signal of the switch in the interpolar path of different polarity based on the on signal of the plurality of switches in the interpolar path of the same polarity having different potentials,
It is characterized by that.

さらにまた、第３の発明による電力変換装置の制御方法は、
前記オン信号生成ステップが、
電位の異なる同極性の極間経路における複数のスイッチのオン信号の論理積の演算結果に基づき、前記異なる極性の極間経路におけるスイッチのオン信号を生成するステップを含む、
ことを特徴とする。
Furthermore, the control method of the power converter according to the third invention is
The on signal generation step includes:
Generating a switch ON signal in the interpolar path of the different polarity based on a logical product of the ON signals of a plurality of switches in the interpolar path of the same polarity with different potentials,
It is characterized by that.

さらにまた、第４の発明による電力変換装置の制御方法は、
前記短絡防止ステップが、さらに、
前記複数のスイッチのいずれか一つのスイッチのオン信号と、前記いずれか一つのスイッチを含む極間経路にある前記いずれか一つのスイッチ以外のスイッチのオン信号と、を論理演算し、前記論理演算上で複数のスイッチの同時オンを検出した際にオフ信号を出力するステップと、
前記出力されたオフ信号で、前記同時オンが検出された極間経路に置かれているスイッチのオン信号を置き換えるステップとを含む、
ことを特徴とする。
Furthermore, the control method of the power conversion device according to the fourth invention is:
The short-circuit prevention step further comprises:
A logical operation of an ON signal of any one of the plurality of switches and an ON signal of a switch other than the one switch in the inter-electrode path including the one switch, and the logical operation A step of outputting an OFF signal when simultaneous ON of a plurality of switches is detected;
Replacing the on signal of a switch placed in the inter-pole path where the simultaneous on is detected with the output off signal.
It is characterized by that.

さらにまた、第５の発明による電力変換装置の制御方法は、
前記短絡防止ステップが、さらに
前記複数のスイッチのいずれか一つのスイッチのオン信号と、前記いずれか一つのスイッチを含む極間経路にある前記いずれか一つのスイッチ以外のスイッチのオン信号を論理反転させた信号と、の論理積で生成した出力信号で、前記いずれか一つのスイッチのオン信号を置き換えるステップとを含む、
ことを特徴とする。
Furthermore, the control method of the power converter according to the fifth invention is:
The short-circuit prevention step further comprises:
A logic of an ON signal of any one of the plurality of switches and a signal obtained by logically inverting an ON signal of a switch other than the any one switch in the inter-electrode path including the any one switch Replacing the on signal of any one of the switches with an output signal generated by a product,
It is characterized by that.

さらにまた、第６の発明による電力変換装置の制御方法は、
前記短絡防止ステップが、さらに
電位の異なる極間の電位差を求めるステップと、
前記電位差に基づき、短絡を防止すべき極間経路を選択する経路選択信号を生成するステップと、
前記複数のスイッチのいずれか一つのスイッチのオン信号と、
前記いずれか一つのスイッチを含む極間経路にある前記いずれか一つのスイッチ以外のスイッチのオン信号と前記経路選択信号との論理積を求めこれを論理反転させた出力信号と、の論理積で生成した出力信号で、前記いずれか一つのスイッチのオン信号を置き換えるステップとを含む、
ことを特徴とする。
Furthermore, the control method of the power conversion device according to the sixth invention is:
The short-circuit prevention step further comprises:
Obtaining a potential difference between poles of different potentials;
Generating a path selection signal for selecting a path between electrodes to prevent a short circuit based on the potential difference; and
An ON signal of any one of the plurality of switches;
A logical product of an ON signal of a switch other than any one of the switches in the inter-pole path including any one switch and the path selection signal is obtained by logically inverting this. Replacing the on signal of any one of the switches with the generated output signal,
It is characterized by that.

さらにまた、第７の発明による電力変換装置の制御方法は、
第一および第二の直流電源をそなえ、第一の直流電源の負極と、第二の直流電源の負極を接続し、これら直流電源のそれぞれの出力電圧からパルスを生成・合成することで駆動電圧を生成して交流モータを駆動する電力変換装置の制御方法であって、
交流の各相毎に、第一の直流電源の正極から第二の直流電源の正極へのみ導通する経路における、第一の直流電源の正極と前記電力変換装置の出力端子との間のスイッチと、前記電力変換装置の出力端子と第二の直流電源の正極との間のスイッチとの組がともにオフする所定の時間を経過した後に、前記スイッチの組のいずれかのスイッチをオフからオンへ切り換える第一の短絡防止時間生成ステップと、
交流の各相毎に、前記第二の直流電源の正極から第一直流電源の正極へのみ導通する経路における、前記第二の直流電源の正極と前記電力変換装置の出力端子との間のスイッチと、前記電力変換装置の出力端子と第一の直流電源との間の正極のスイッチの組がともにオフする所定の時間を経過した後に、前記スイッチの組のいずれかをオフからオンへ切り換える第二の短絡防止時間生成ステップと、
交流の各相毎に、第一の直流電源の正極から第二の直流電源の正極へのみ導通する経路における、前記電力変換装置の出力端子と第二の直流電源の正極との間のスイッチと、第二の直流電源の正極から第一の直流電源の正極へのみ導通する経路における、前記電力変換装置の出力端子と第一の直流電源の正極との間のスイッチがともにオンする際に、前記電力変換装置の出力端子と、第一の直流電源及び第二の直流電源のうちの少なくとも一つの負極との間のスイッチをオンさせるステップと、
を含むことを特徴とする。

Furthermore, the control method of the power conversion device according to the seventh invention is:
Drive voltage by providing the first and second DC power supply, connecting the negative electrode of the first DC power supply and the negative electrode of the second DC power supply, and generating and synthesizing pulses from the output voltages of each of these DC power supplies Is a control method of a power converter that drives an AC motor by generating
A switch between the positive electrode of the first DC power supply and the output terminal of the power converter in a path that conducts only from the positive electrode of the first DC power supply to the positive electrode of the second DC power supply for each phase of AC Then, after a predetermined time when both of the pair of the switch between the output terminal of the power converter and the positive electrode of the second DC power supply have been turned off, the switch of any one of the pair of switches is turned off to on. A first short-circuit prevention time generation step to be switched;
For each phase of AC, between the positive electrode of the second DC power source and the output terminal of the power converter in a path that conducts only from the positive electrode of the second DC power source to the positive electrode of the first DC power source. After a predetermined time when both the switch and the positive switch between the output terminal of the power converter and the first DC power supply have been turned off has passed, one of the switch sets is switched from OFF to ON. A second short-circuit prevention time generation step;
A switch between the output terminal of the power converter and the positive electrode of the second DC power source in a path that conducts only from the positive electrode of the first DC power source to the positive electrode of the second DC power source for each phase of AC When the switch between the output terminal of the power conversion device and the positive electrode of the first DC power supply is turned on in a path that conducts only from the positive electrode of the second DC power supply to the positive electrode of the first DC power supply, Turning on a switch between the output terminal of the power converter and at least one negative electrode of the first DC power source and the second DC power source;
It is characterized by including .

また、上述したように本発明の解決手段を方法として説明してきたが、本発明はこれらに実質的に相当する装置、この方法をコンピュータで実行するプログラム、プログラムを記録した記憶媒体としても実現され得るものであり、本発明の範囲にはこれらも包含されるものと理解されたい。
例えば、第１の発明を装置で実現させると、電力変換装置の制御装置は、
複数の直流電源に接続され、これら直流電源のそれぞれの出力電圧からパルスを生成・合成することで駆動電圧を生成し交流モータを駆動する電力変換装置の制御装置であって、
電位の異なる極間経路の短絡を防止する短絡防止手段（回路）を含む、
ことを特徴とする。
なお、上述したような手順（ステップ）は、複数の論理回路（ＡＮＤ、ＮＯＴ、ＯＲ回路など）の組み合わせを利用して実現できるが、当業者によればこれらを等価変換した別構成の回路（等価回路）、論理演算を利用した手順でも実現可能であり、このような手順、或いは論理回路の組み合わせも本発明の範囲に入るものである。 Further, as described above, the solving means of the present invention has been described as a method, but the present invention is also realized as an apparatus substantially equivalent to these, a program for executing this method by a computer, and a storage medium storing the program. It should be understood that these are included within the scope of the present invention.
For example, when the first invention is realized by the device, the control device for the power converter is
A control device for a power converter that is connected to a plurality of DC power supplies, generates a drive voltage by generating and synthesizing pulses from respective output voltages of these DC power supplies, and drives an AC motor,
Including short-circuit prevention means (circuit) for preventing short-circuiting between paths between different potentials,
It is characterized by that.
The procedure (step) as described above can be realized by using a combination of a plurality of logic circuits (AND, NOT, OR circuit, etc.). (Equivalent circuit) and a procedure using a logic operation can be realized, and such a procedure or a combination of logic circuits also falls within the scope of the present invention.

第１の発明によれば、極間短絡を防止することができ、不要な短絡電流によるスイッチの発熱を防ぐことができる。
さらにまた、同極性の極間短絡防止の結果を用いて、異極性の極間短絡を防止するため、新たに異極性の極間短絡防止を生成する必要が無く、制御装置または制御回路を簡素化することが可能である。
さらにまた、第２の発明によれば、同極性の極間短絡防止のスイッチのオン信号を用いて、異極性の極間短絡のオン信号を生成するため、新たに異極性の極間短絡防止を生成する必要が無く、制御装置を簡素化することが可能である。
さらにまた、第３の発明によれば、同極性の極間短絡防止のスイッチのオン信号の論理積をもとに、異極性の極間短絡のオン信号を生成するため、新たに異極性の極間短絡防止を生成する必要が無く、制御装置を簡素化することが可能である。
According to the first invention, it is possible to prevent the inter-electrode short circuit, Ru can prevent heat generation of the switch due to unnecessary short-circuit current.
Was the Ranima, using the results of the short circuit prevention between the same polarity poles, to prevent shorting between opposite polarity poles, there is no need to generate a new short circuit prevention between the opposite polarity poles, the control device or control It is possible to simplify the circuit.
Furthermore, according to the second aspect of the present invention, the on signal of the interpolar short circuit prevention switch is generated using the on signal of the same polarity interpolar short circuit prevention switch. Therefore, the control device can be simplified.
Furthermore, according to the third aspect of the invention, an on-signal for the interpolar short circuit is generated based on the logical product of the on signal of the same polarity interpolar short circuit prevention switch. It is not necessary to generate an inter-electrode short-circuit prevention, and the control device can be simplified.

さらにまた、第４の発明によれば、極間を短絡する駆動信号の組が入力された場合に、それらの組をオフ信号に置き換える事で、極間を短絡する電流を防止することができ、スイッチの発熱を増加させずにすむ。
さらにまた、第５の発明によれば、極間を短絡する駆動信号の組が入力された場合に、それらの組をオフ信号に置き換える事で、極間を短絡する電流を防止することができ、スイッチの発熱を増加させずにすむ。
さらにまた、第６の発明によれば、極間を短絡する電流を防止することができ、スイッチの発熱を増加させずにすみ、また、短絡を防止する必要の無い経路に関しては、電圧判定信号によって、オン・オフのスイッチングを新たに生じさせずにすむため、スイッチングの損失をより低減することが可能である。
さらにまた、第７の発明によれば、各相毎に５つのスイッチに４組の極間短絡防止を行うにあたり、２組の極間短絡を防止する短絡防止時間生成手段と、その生成結果から、残るスイッチのオン信号を生成しているため、制御装置を簡素化しつつ、極間短絡を防止し、不要な短絡電流によるスイッチの発熱を防ぐことができる。

Furthermore, according to the fourth aspect of the present invention, when a set of drive signals that short-circuit between the electrodes is input, the current that short-circuits the electrodes can be prevented by replacing those sets with off signals. It is not necessary to increase the heat generation of the switch.
Furthermore, according to the fifth invention, when a set of drive signals for short-circuiting between the electrodes is input, the current for short-circuiting the electrodes can be prevented by replacing those sets with off signals. It is not necessary to increase the heat generation of the switch.
Furthermore, according to the sixth aspect of the present invention, it is possible to prevent a current short-circuiting between the electrodes, and it is possible to avoid increasing the heat generation of the switch. Therefore, it is not necessary to newly generate on / off switching, so that switching loss can be further reduced.
Furthermore, according to the seventh invention, in order to prevent four sets of short-circuits between the five switches for each phase, the short-circuit prevention time generating means for preventing two sets of short-circuits between the poles, and the generation results thereof Since the ON signal of the remaining switch is generated, the control device can be simplified, the short circuit between the electrodes can be prevented, and the heat generation of the switch due to an unnecessary short circuit current can be prevented.

以降、諸図面を参照しつつ、本発明の実施態様を詳細に説明する。図３は、本発明による電力変換装置の制御方法の使用に適した電力変換装置の回路図の一例を示す。電源10aの負極と、電源10bの負極が共通負極母線15に接続されている。共通負極母線15とモータ20の各相端子間には、一般的に知られているインバータの下アームと同様に、半導体スイッチ107a,108a,109aとダイオード107b,108b,109bの組が接続される。電源10aの正極母線14とモータ20の各相端子間とは、双方向の導通を制御可能な半導体スイッチ101a/101b,102a/102b,103a/103bでそれぞれ接続する。また、電源10bの正極母線16とモータ20の各相端子間にも、双方向の導通を制御可能な半導体スイッチ104a/104b,105a/105b,106a/106bをそれぞれ接続する。 Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. FIG. 3 shows an example of a circuit diagram of a power converter suitable for use in the method for controlling a power converter according to the present invention. The negative electrode of the power supply 10a and the negative electrode of the power supply 10b are connected to the common negative electrode bus 15. A pair of semiconductor switches 107a, 108a, 109a and diodes 107b, 108b, 109b is connected between the common negative electrode bus 15 and each phase terminal of the motor 20 in the same manner as a generally known lower arm of an inverter. . The positive electrode bus 14 of the power supply 10a and each phase terminal of the motor 20 are connected by semiconductor switches 101a / 101b, 102a / 102b, 103a / 103b, respectively, capable of controlling bidirectional conduction. Further, semiconductor switches 104a / 104b, 105a / 105b, and 106a / 106b that can control bidirectional conduction are also connected between the positive electrode bus 16 of the power supply 10b and each phase terminal of the motor 20.

電源10aの正極母線14と共通負極母線15の間には平滑コンデンサ12を設け、電源10bの正極母線16と共通負極母線15の間にも平滑コンデンサ13を設ける。電力変換器30は、共通負極母線と電源10aの正極母線と電源10bの正極母線、以上の３つの電位の電圧をもとに、モータに印加する電圧を生成する直流-交流電力変換器である。Ｕ相（30U）、Ｖ相（30V）、Ｗ相（30W）の各相に設けられた半導体スイッチが、交流モータの各相に出力する電圧を生成するスイッチ手段であり、これらの電位のなかから択一的に接続し、その接続する時間の割合を変化させることで、モータに必要な電圧を供給する。 A smoothing capacitor 12 is provided between the positive electrode bus 14 and the common negative electrode bus 15 of the power source 10a, and a smoothing capacitor 13 is also provided between the positive electrode bus 16 and the common negative electrode bus 15 of the power source 10b. The power converter 30 is a DC-AC power converter that generates a voltage to be applied to the motor based on the voltage of the above three potentials, the common negative electrode bus, the positive electrode bus of the power source 10a, and the positive electrode bus of the power source 10b. . The semiconductor switch provided in each phase of U phase (30U), V phase (30V), and W phase (30W) is a switch means that generates a voltage to be output to each phase of the AC motor. Alternatively, the necessary voltage is supplied to the motor by changing the ratio of the connection time.

第一の実施例を説明する。図２は、本発明による電力変換装置の制御方法の使用に適したモータ制御システムの一例を示す構成図である。まず、制御装置40の構成を説明する。図に示すように、41は、外部より与えられるトルク指令とモータの回転速度とから交流モータのｄ軸電流の指令値ｉd*とｑ軸電流の指令値ｉq*とを演算するトルク制御手段（回路）である。42は、ｄｑ軸電流指令値ｉd*、ｉq*とｄｑ軸電流値ｉd、ｉqとから、これらを一致させるための電圧指令値ｖd*、ｖq*を演算する電流制御手段（回路）である。ｉd、ｉqは３相／ｄｑ変換手段（回路）48により３相電流ｉu、ｉｖから求められる。43は、ｄｑ軸電圧指令値ｖd*、ｖq*を３相電圧指令ｖu*、ｖq*、ｖw*に変換するｄｑ／３相電圧変換手段（回路）である。44は、３相電圧指令を、電源10aから供給する電力Ｐaと、電源10bから供給する電力Ｐbの分配目標値（rto_pa、rto_pb）に応じて、それぞれの電源の電圧から生成するＵ相電圧指令ｖu_a*、ｖu_b*、Ｖ相電圧指令ｖv_a*、ｖv_b*、Ｗ相電圧指令ｖw_a*、ｖw_b*を生成する電圧分配手段（回路）である（以下、電源10aから生成する電圧の指令を電源10a分電圧指令、電源10bから生成する電圧の指令を電源10b分電圧指令と記す）。45は、電源10aの電圧Ｖdc_a、電源10bの電圧Ｖdc_bを入力し、ｖu_a*、ｖu_b*、ｖv_a*、ｖv_b*、ｖw_a*、ｖw_b*正規格化した電圧指令である瞬時変調率指令ｍu_a*、ｍu_b*、ｍv_a*、ｍv_b*、ｍw_a*、ｍw_b*を生成する変調率演算手段（回路）である。46は、瞬時変調率指令にＰＷＭを行う前の処理を行い最終的な瞬時変調率指令ｍu_a_c*、ｍu_b_c *、ｍv_a_c *、ｍv_b_c *、ｍw_a_c *、ｍw_b_c *を生成する変調率補正手段（回路）である。47は、最終的な瞬時変調率指令に基づいて電力変換器30の各スイッチをオン／オフするＰＷＭパルスを生成するＰＷＭパルス生成手段であり、本発明の主となる部分である。 A first embodiment will be described. FIG. 2 is a configuration diagram showing an example of a motor control system suitable for use in the method for controlling the power conversion apparatus according to the present invention. First, the configuration of the control device 40 will be described. As shown in the figure, 41 is a torque control means for calculating a d-axis current command value id * and a q-axis current command value iq * from an externally provided torque command and motor rotational speed ( Circuit). Reference numeral 42 denotes current control means (circuit) for calculating voltage command values vd * and vq * for matching the dq-axis current command values id * and iq * and the dq-axis current values id and iq. id and iq are obtained from the three-phase currents iu and iv by the three-phase / dq conversion means (circuit) 48. Reference numeral 43 denotes dq / 3-phase voltage conversion means (circuit) for converting the dq-axis voltage command values vd * and vq * into three-phase voltage commands vu *, vq * and vw *. 44 is a U-phase voltage command generated from the voltage of each power supply according to the distribution target value (rto_pa, rto_pb) of the power Pa supplied from the power supply 10a and the power Pb supplied from the power supply 10b. vu_a *, vu_b *, V-phase voltage commands vv_a *, vv_b *, W-phase voltage commands vw_a *, vw_b * are voltage distribution means (circuits) (hereinafter referred to as voltage commands generated from the power supply 10a). A voltage command and a voltage command generated from the power source 10b are referred to as a power source 10b voltage command). 45, the voltage Vdc_a of the power source 10a and the voltage Vdc_b of the power source 10b are input, and the instantaneous modulation rate command mu_a *, which is a standardized voltage command, vu_a *, vu_b *, vv_a *, vv_b *, vw_a *, vw_b *, Modulation rate calculation means (circuit) for generating mu_b *, mv_a *, mv_b *, mw_a *, mw_b *. 46 is a modulation rate correction means (circuit) that performs processing before performing PWM on the instantaneous modulation rate command and generates final instantaneous modulation rate commands mu_a_c *, mu_b_c *, mv_a_c *, mv_b_c *, mw_a_c *, mw_b_c * It is. 47 is a PWM pulse generating means for generating a PWM pulse for turning on / off each switch of the power converter 30 based on the final instantaneous modulation rate command, and is a main part of the present invention.

図２に示すように、電圧分配手段44、規格化電圧指令生成手段45で電力の分配を所望の値にするための電圧指令値を生成する。電圧分配手段44には、電圧指令ｖu*、ｖv*、ｖw*と分配電力指令値rto_pa（＝１-rto_pb）が入力される。これらから、以下の計算により電源10a分電圧指令、電源10b分電圧指令を求める。
ｖu_a*＝rto_pa・ｖu*
ｖu_b*＝rto_pb・ｖu*
ｖv_a*＝rto_pa・ｖv*
ｖv_b*＝rto_pb・ｖv*
ｖw_a*＝rto_pa・ｖw*
ｖw_b*＝rto_pb・ｖu*
以下、変調率演算手段45、変調率補正手段46、ＰＷＭパルス生成手段47を図４、５、６を用いて詳細に説明する。図５は、図４の各手段で行う演算をフローチャートで示したものである。図６は、ＰＷＭパルスの生成方法を示したものである。以下の説明は、Ｕ相についてのみ行うが、Ｖ相、Ｗ相についても全く同様の操作を行う。 As shown in FIG. 2, the voltage distribution unit 44 and the standardized voltage command generation unit 45 generate a voltage command value for setting the power distribution to a desired value. A voltage command vu *, vv *, vw * and a distributed power command value rto_pa (= 1−rto_pb) are input to the voltage distribution unit 44. From these, the power supply 10a divided voltage command and the power supply 10b divided voltage command are obtained by the following calculation.
vu_a * = rto_pa ・ vu *
vu_b * = rto_pb ・ vu *
vv_a * = rto_pa ・ vv *
vv_b * = rto_pb ・ vv *
vw_a * = rto_pa ・ vw *
vw_b * = rto_pb ・ vu *
Hereinafter, the modulation factor calculation unit 45, the modulation factor correction unit 46, and the PWM pulse generation unit 47 will be described in detail with reference to FIGS. FIG. 5 is a flowchart showing the calculation performed by each means of FIG. FIG. 6 shows a method for generating PWM pulses. The following description is performed only for the U phase, but the same operation is performed for the V phase and the W phase.

変調率演算手段45
変調率演算手段45は、図５に示す演算２を行う。Ｕ相の電源10a分電圧指令ｖu_a*、電源10b分電圧指令ｖu_b*をそれぞれの直流電圧の半分の値で正規化することで電源10a分瞬時変調率指令ｍu_a*、電源10b分瞬時変調率指令ｍu_b*を求める。
ｍu_a*＝ｖu_a*／(Ｖdc_a／２)
ｍu_b*＝ｖu_b*／(Ｖdc_b／２) Modulation rate calculation means 45
The modulation factor calculation means 45 performs calculation 2 shown in FIG. By normalizing the U-phase power supply 10a voltage command vu_a * and power supply 10b voltage command vu_b * with half the value of each DC voltage, the power supply 10a instantaneous modulation rate command mu_a * and the power supply 10b instantaneous modulation rate command Find mu_b *.
mu_a * = vu_a * / (Vdc_a / 2)
mu_b * = vu_b * / (Vdc_b / 2)

変調率補正手段46
変調率補正手段46は、図５に示す演算３を行う。この演算では、電源電圧Ｖdc_a、Ｖdc_ｂと分配電力目標値rto_paとrto_pbを用いて、次の式に基づいて電源10a分瞬時変調率指令ｍu_a*、電源10b分瞬時変調率指令ｍu*_bの補正を行う。

このように、電源10a分瞬時変調率指令ｍu_a*、電源10b分瞬時変調率指令ｍu*_bに分配電力目標値の大きさに応じた値を乗じるとともにオフセット値を減算することで、分配電力目標値の大きさが大きい電源から生成する電圧を大きくできるようにしている。 Modulation rate correction means 46
The modulation factor correction means 46 performs calculation 3 shown in FIG. In this calculation, the power supply voltage Vdc_a, Vdc_b and the distributed power target values rto_pa and rto_pb are used to correct the instantaneous modulation factor command mu_a * for the power supply 10a and the instantaneous modulation factor command mu * _b for the power supply 10b based on the following equations. Do.

In this way, the power supply 10a instantaneous modulation rate command mu_a * and the power supply 10b instantaneous modulation rate command mu * _b are multiplied by a value corresponding to the size of the distribution power target value and the offset value is subtracted to obtain the distribution power target. The voltage generated from the power supply having a large value can be increased.

ＰＷＭパルス生成手段47（第１−５、１０の発明に相当）
図６において、電源10a用キャリアは、電源10aの電圧Ｖdc_aから電圧パルスを出力するために、各スイッチを駆動するＰＷＭパルスを生成するための三角波キャリアであり、同様に、電源10b用キャリアとして三角波を設ける。これら二つの三角波キャリアは、上限＋１、下限―１の値をとり、１８０度の位相差を持つ。
ここでは、Ｕ相の各スイッチを駆動する信号を、図７をもとに次のようにおく。
Ａ：電源10aから出力端子の方向へ導通するスイッチの駆動信号
Ｂ：出力端子から負極の方向へ導通するスイッチの駆動信号
Ｃ：出力端子から電源10aの方向へ導通するスイッチの駆動信号
Ｄ：電源10bから出力端子の方向へ導通するスイッチの駆動信号
Ｅ：出力端子から電源10bの方向へ導通するスイッチの駆動信号 PWM pulse generating means 47 (corresponding to the first to fifth inventions)
In FIG. 6, a power supply 10a carrier is a triangular wave carrier for generating a PWM pulse for driving each switch in order to output a voltage pulse from the voltage Vdc_a of the power supply 10a. Similarly, a triangular wave carrier is used as the power supply 10b carrier. Is provided. These two triangular wave carriers have values of an upper limit of +1 and a lower limit of -1, and have a phase difference of 180 degrees.
Here, the signals for driving the U-phase switches are set as follows based on FIG.
A: Switch drive signal conducting from the power supply 10a to the output terminal B: Switch drive signal conducting from the output terminal to the negative electrode C: Switch drive signal conducting from the output terminal to the power supply 10a D: Power supply Switch drive signal conducting from 10b to output terminal E: Switch drive signal conducting from output terminal to power supply 10b

まず、電源10aから電圧パルスを出力する際のパルス生成方法について述べる。電源10aからＰＷＭパルスを出力する際に、Ａをオンする必要がある。正極と正極の間に電位差があり、Ｖdc_a＞Ｖdc_bであるとすると、ＡとＥがともにオンする際に、正極間を短絡する電流が流れることになる。スイッチが半導体スイッチで構成された場合、オフからオンの状態の切り換えに時間遅れが生じる。例えば、同時にＡをオンからオフへ、Ｅをオフからオンへ信号を切り換えた場合に、Ａが完全にオフするまでに時間を要するため、Ｅのオン時と重なり、ともにオンする時間が生じる。この際に、短絡電流が流れ、この経路に設置された半導体スイッチの発熱量が増加する。このような発熱の増加を予防するために、駆動信号ＡとＥがともにオフする時間を経過した後に、Ａ、Ｅをオフからオンへ切り換えるようにする。このように駆動信号に短絡防止時間（デッドタイム）付加したパルス生成を行う。
このＡとＥの駆動信号にデッドタイムを付加するのと同様に、正極間の短絡を防止するためにＥとＣにデッドタイムを付加し、さらに、正極と負極の短絡防止のためには、ＡとＢ、ＥとＢにデッドタイムを付加することになる。 First, a pulse generation method when a voltage pulse is output from the power supply 10a will be described. When outputting a PWM pulse from the power supply 10a, it is necessary to turn on A. If there is a potential difference between the positive electrode and the positive electrode and Vdc_a> Vdc_b, when both A and E are turned on, a current that short-circuits between the positive electrodes flows. When the switch is constituted by a semiconductor switch, a time delay occurs in switching from the off state to the on state. For example, when A is switched from on to off and E is switched from off to on at the same time, it takes time for A to completely turn off. At this time, a short-circuit current flows, and the amount of heat generated by the semiconductor switch installed in this path increases. In order to prevent such an increase in heat generation, A and E are switched from OFF to ON after a time during which both the drive signals A and E are turned off. In this way, pulse generation is performed by adding a short-circuit prevention time (dead time) to the drive signal.
Similarly to adding dead time to the drive signals of A and E, dead time is added to E and C in order to prevent short circuit between the positive electrodes, and furthermore, in order to prevent short circuit between the positive electrode and negative electrode, A dead time is added to A and B, and E and B.

図８を用いて、ＡとＥの駆動信号にデッドタイムを付加する方法を以下に説明する。デッドタイムを付加した駆動信号生成を行うため、ｍu_a_c*からデッドタイム分オフセットしたｍu_a_c_up*,ｍu_a_c_down*を次のように求める。
mu_a_c_up* = ｍu_a_c* ＋ Hd
ｍu_a_c_down* = ｍu_a_c* − Hd
ここで、Hdは三角波の振幅(底辺から頂点まで)Htrと周期Ttr、デッドタイムTdから次のように求める。
Hd = 2Td・Htr／Ttr
キャリアとｍu_a_c*,ｍu_a_c_up*,ｍu_a_c_down*の比較を行って、ＡとＥのスイッチの駆動信号を次のルールに従って求める。
ｍu_a_c_down* ≧電源10a用キャリアならばＡ＝ＯＮ
ｍu_a_c* ≦電源10a用キャリアならばＡ＝ＯＦＦ
ｍu_a_c* ≧電源10a用キャリアならばＥ＝ＯＦＦ
ｍu_a_c_up* ≦電源10a用キャリアならばＥ＝ＯＮ
このように、駆動信号を生成することで、ＡとＥの間にはTdのデッドタイムを設けることができ、正極間の短絡を防止することができる。 A method for adding dead time to the A and E drive signals will be described below with reference to FIG. In order to generate a drive signal with a dead time added, mu_a_c_up * and mu_a_c_down * offset from the mu_a_c * by the dead time are obtained as follows.
mu_a_c_up * = mu_a_c * + Hd
mu_a_c_down * = mu_a_c * − Hd
Here, Hd is obtained from the amplitude of the triangular wave (from the base to the apex) Htr, the period Ttr, and the dead time Td as follows.
Hd = 2Td · Htr / Ttr
The carrier and mu_a_c *, mu_a_c_up *, mu_a_c_down * are compared, and the drive signals for the A and E switches are obtained according to the following rules.
If mu_a_c_down * ≧ carrier for power supply 10a, A = ON
If mu_a_c * ≤ carrier for power supply 10a, A = OFF
If mu_a_c * ≥ carrier for power supply 10a, E = OFF
mu_a_c_up * ≤ Carrier for power supply 10a E = ON
Thus, by generating the drive signal, a dead time of Td can be provided between A and E, and a short circuit between the positive electrodes can be prevented.

また、電源10bから電圧パルスを出力する際のパルス生成方法は、電源10aの場合と同様であり、次のｍu_b_c_up*,ｍu_b_c_down*を求め、電源10b用キャリアとの比較を行う（図９）。
mu_b_c_up* = ｍu_b_c* ＋ Hd
ｍu_b_c_down* = ｍu_b_c* − Hd
ＤとＣのスイッチの駆動信号を次のルールに従って求める。
ｍu_b_c_down* ≧電源10b用キャリアならばＤ＝ＯＮ
ｍu_b_c* ≦電源10b用キャリアならばＤ＝ＯＦＦ
ｍu_b_c* ≧電源10b用キャリアならばＣ＝ＯＦＦ
ｍu_b_c_up* ≦電源10b用キャリアならばＣ＝ＯＮ
このようにして、ＤとＣの間にもTdのデッドタイムを設けることができ、正極間の短絡を防止することができる。 Further, the pulse generation method when outputting a voltage pulse from the power supply 10b is the same as that of the power supply 10a, and the following mu_b_c_up * and mu_b_c_down * are obtained and compared with the carrier for the power supply 10b (FIG. 9).
mu_b_c_up * = mu_b_c * + Hd
mu_b_c_down * = mu_b_c * − Hd
The drive signals for the D and C switches are obtained according to the following rules.
If mu_b_c_down * ≥ carrier for power supply 10b, D = ON
If mu_b_c * ≤ carrier for power supply 10b, D = OFF
If mu_b_c * ≥ carrier for power supply 10b, C = OFF
If mu_b_c_up * ≤ carrier for power supply 10b, C = ON
In this way, a dead time of Td can be provided between D and C, and a short circuit between the positive electrodes can be prevented.

駆動信号Ｂは、生成された駆動信号ＥとＣの論理積から生成する（第３・４・５の発明に相当）。
Ｂ＝Ｅ・Ｃ
ＥはＡとの間にデッドタイムが付加した駆動信号であり、ＣはＤとの間にデッドタイムが付加した駆動信号である。このため、ＢをＥとＣの論理積から生成することで、ＢとＡ、ＢとＥにもデッドタイムを生成することができる。デッドタイムが付加されたパルス生成の例を図１０に示す。 The drive signal B is generated from the logical product of the generated drive signals E and C (corresponding to the third, fourth and fifth inventions).
B = E ・ C
E is a drive signal with a dead time added to A, and C is a drive signal with a dead time added to D. Therefore, by generating B from the logical product of E and C, dead time can also be generated for B and A and B and E. An example of pulse generation with a dead time added is shown in FIG.

このようにして、デッドタイムを付加したパルスを生成することで、極間短絡を防止することができ、不要な短絡電流によるスイッチの発熱を防ぐことができる。また、本発明の生成方法によれば、ＡとＥ、ＤとＣの二組にデッドタイムを付加し、Ｂを論理積から生成することで、ＡとＢ、ＥとＢのデッドタイム生成を省略することができ、制御装置を簡略化することが可能になる。 In this way, by generating a pulse with a dead time added, it is possible to prevent a short circuit between the electrodes, and it is possible to prevent the switch from being heated due to an unnecessary short circuit current. Also, according to the generation method of the present invention, dead time is added to two sets of A and E, D and C, and B is generated from the logical product, thereby generating dead times of A and B, E and B. This can be omitted, and the control device can be simplified.

第二の実施例では、第一の実施例との差異のみを説明する。
電位差を求める手段（第７・８・９の発明に相当）
図１１において、電圧比較器101は、電源10aの電圧Ｖdc_aと電源10bの電圧Ｖdc_bを入力とし、これらを比較し電圧判定信号を出力する。電圧判定信号は、Ｖdc_a-Ｖdc_b＞0であるときに、H信号、そうでないときに、L信号とする。この電圧判定は、Ｖdc_a-Ｖdc_bを、ヒステリシス（例えば所定の幅の閾値など）を設けて判別を行う。その構成は図１２のように、減算器103にてＶdc_a-Ｖdc_bを演算し、その出力はヒステリシス制御器104を通過させて電圧判定信号のH/Lを出力させる。 In the second embodiment, only differences from the first embodiment will be described.
Means for obtaining a potential difference (equivalent to the seventh, eighth and ninth inventions)
In FIG. 11, the voltage comparator 101 receives the voltage Vdc_a of the power supply 10a and the voltage Vdc_b of the power supply 10b, compares them, and outputs a voltage determination signal. The voltage determination signal is an H signal when Vdc_a−Vdc_b> 0, and an L signal otherwise. In this voltage determination, Vdc_a-Vdc_b is determined by providing a hysteresis (for example, a threshold having a predetermined width). As shown in FIG. 12, the subtractor 103 calculates Vdc_a−Vdc_b, and the output is passed through the hysteresis controller 104 to output H / L of the voltage determination signal.

短絡を防止する経路を選択する手段（第６・７・８・９の発明に相当）
短絡防止経路判定器102は、電圧判定信号と、ＥとＣの駆動信号を入力とし、新たなＥとＣの駆動信号を出力する。この短絡防止判定器の内部の動作は、図１３に示したような論理演算にて行い、電圧判定信号がHであるときに、Ｃと論理和を演算するため、Ｃはオンの信号となる。また、電圧判定信号がLであるときには。Ｅがオンの信号となる。
この動作は、次のような考えに基づく。電圧判定信号がH、すなわちＶdc_a＞Ｖdc_bならば、ＡとＥがともにオンする際に、正極間を短絡する電流が流れることになるため、この電源間の短絡防止時間を設ける必要がある。この短絡防止時間の生成は、実施例一と同様にして行う。
一方で、ＤとＣが同時にオンしても、Ｖdc_a＞Ｖdc_bであるため、この経路のスイッチに、この電圧が加わるが、短絡する電流は流れない。このため、短絡電流の防止という点からは、Ｃはオンしたままでよく、正極間についてはＡとＥによる短絡防止を行えばよい。同様に、電圧判定信号がLのときには、Ｅをオンしたままで良いということになる。このように、電圧判定信号を受けて、ＣもしくはＥをオンさせることで、電力変換装置のスイッチング周波数毎にＣ、もしくはＥのスイッチのオン・オフをさせずに済み、スイッチング損失を低減することができる。 Means for selecting a path for preventing a short circuit (corresponding to the sixth, seventh, eighth and ninth inventions)
The short-circuit prevention path determination unit 102 receives the voltage determination signal and the E and C drive signals as inputs, and outputs new E and C drive signals. The internal operation of this short-circuit prevention determiner is performed by a logical operation as shown in FIG. 13, and when the voltage determination signal is H, a logical sum is calculated with C. Therefore, C is an ON signal. . When the voltage determination signal is L. E becomes an ON signal.
This operation is based on the following idea. If the voltage determination signal is H, that is, Vdc_a> Vdc_b, when both A and E are turned on, a current for short-circuiting between the positive electrodes flows, so it is necessary to provide a short-circuit prevention time between the power supplies. The generation of the short-circuit prevention time is performed in the same manner as in the first embodiment.
On the other hand, even if D and C are turned on at the same time, since Vdc_a> Vdc_b, this voltage is applied to the switch in this path, but no short-circuit current flows. For this reason, from the point of prevention of short circuit current, C may remain on, and between the positive electrodes, short circuit prevention by A and E may be performed. Similarly, when the voltage determination signal is L, E can be kept on. In this way, by receiving the voltage determination signal and turning on C or E, it is not necessary to turn on or off the C or E switch for each switching frequency of the power conversion device, thereby reducing the switching loss. Can do.

電位差が０近くで、検出電圧値にノイズが含まれる場合には、ノイズによって電圧判定信号が切り換わる。すなわち、ＥとＣのスイッチングが行われてしまう。また、実際に電源10aと電源10bの近い電圧の値で、これらの電圧が変動している場合に、ヒステリシスを設ける事で、スイッチング損失を増加させない効果がある。ただし、ヒステリシスを設けた場合には、短絡する電流が流れることもあるが、ヒステリシス幅（ヒステリシス制御に使用する閾値）を適切に設定する事で、その短絡電流の大きさは、スイッチの発熱には、大きな影響を及ぼさない。 When the potential difference is close to 0 and the detected voltage value includes noise, the voltage determination signal is switched by the noise. That is, switching between E and C is performed. In addition, when these voltages are fluctuating at values close to the voltages of the power supply 10a and the power supply 10b, providing a hysteresis has an effect of not increasing the switching loss. However, if a hysteresis is provided, a short-circuit current may flow. However, by setting the hysteresis width (threshold used for hysteresis control) appropriately, the magnitude of the short-circuit current will affect the heat generated by the switch. Has no significant effect.

第三の実施例（第１１，１２の発明に相当する）について、図１４を用いて説明する。駆動信号Ａ〜Ｅを入力とする論理回路である。正極間短絡を防止する回路として、ＡとＥを見ると、Ａの論理反転した信号と、Ｅの信号の論理積から、新たなＥを出力している。逆に、Ｅの論理反転した信号と、Ａの信号の論理積から、新たなＡを出力しているため、ＡとＥがともにオン信号であるとき、ＡとＥはオフの信号に置き換えられる。もう一方の正極間短絡を防止する回路として、ＤとＣの間にも、同様な回路を設けている。正負極間の短絡を防止する回路として、ＡとＢが同時にオンであるとき、ＤとＢが同時にオンである時に、前述の論理演算と同様な回路で、オフ信号に置き換えられる。
このような回路を設けることで、極間を短絡する駆動信号の組が入力された場合に、それらの組をオフ信号に置き換える事で、極間を短絡する電流を防止することができ、スイッチの発熱を増加させずにすむ。 A third embodiment (corresponding to the eleventh and twelfth inventions) will be described with reference to FIG. It is a logic circuit that receives drive signals A to E as inputs. When A and E are viewed as a circuit for preventing a short circuit between the positive electrodes, a new E is output from the logical product of the logically inverted signal of A and the signal of E. Conversely, since a new A is output from the logical product of the logically inverted signal of E and the signal of A, when both A and E are on signals, A and E are replaced with off signals. . A similar circuit is also provided between D and C as a circuit for preventing the other positive electrode short circuit. As a circuit for preventing a short circuit between the positive and negative electrodes, when A and B are simultaneously turned on, and when D and B are simultaneously turned on, they are replaced with an off signal by a circuit similar to the above-described logical operation.
By providing such a circuit, when a set of drive signals that short-circuit the poles is input, by replacing those sets with off-signals, the current that short-circuits the poles can be prevented, and the switch It is not necessary to increase the fever.

第四の実施例（第１３の発明に相当する）では、第三の実施例との差異のみを、図１５を用いて説明する。電圧判別信号は、Ｖdc_a-Ｖdc_b＞0であるときに、H信号、そうでないときに、L信号とするものであり、第二の実施例で示した電圧比較器で生成する。この電圧判別信号と駆動信号Ａ、または電圧判別信号と駆動信号Ｅの論理積を演算する。これら論理積の出力の論理反転を行った信号と、駆動信号Ａ、Ｅの論理積を演算する。Ｖdc_a-Ｖdc_b＞0であるときには、ＡとＥを同時にオンすると、正極間を短絡する電流が流れるが、図１５の回路を用いる事で、この場合にＡとＥは同時にオフする。Ｖdc_a-Ｖdc_b≦0の場合には、電圧判別信号がＬであるから、本回路から出力される駆動信号ＡとＥは、ともにオン信号である。この場合には、同時オンであっても短絡する電流は流れない。 In the fourth embodiment (corresponding to the thirteenth invention), only differences from the third embodiment will be described with reference to FIG. The voltage discrimination signal is an H signal when Vdc_a-Vdc_b> 0, and an L signal when not, and is generated by the voltage comparator shown in the second embodiment. The logical product of the voltage determination signal and the drive signal A or the voltage determination signal and the drive signal E is calculated. The logical product of the signal obtained by logically inverting the output of these logical products and the drive signals A and E is calculated. When Vdc_a-Vdc_b> 0, if A and E are turned on at the same time, a current for short-circuiting between the positive electrodes flows. However, by using the circuit of FIG. 15, A and E are simultaneously turned off. In the case of Vdc_a−Vdc_b ≦ 0, since the voltage determination signal is L, the drive signals A and E output from this circuit are both ON signals. In this case, a short-circuit current does not flow even when simultaneously turned on.

同様に、ＣとＤにも電圧判定信号を入力とした回路を設ける。ＣとＤでは、前述のＡとＥの場合と、短絡電流の流れる経路が逆になるため、電圧判定信号の論理反転の信号をも演算してから、各論理積の入力に使用する。
このような、回路を設ける事で、極間を短絡する電流を防止することができ、スイッチの発熱を増加させずにすみ、また、短絡を防止する必要の無い経路に関しては、電圧判定信号によって、オン・オフのスイッチングを新たに生じさせずにすむため、スイッチングの損失をより低減することが可能である。 Similarly, a circuit having a voltage determination signal as an input is also provided for C and D. In C and D, the path through which the short-circuit current flows is opposite to that in the case of A and E described above. Therefore, a logical inversion signal of the voltage determination signal is also calculated and used for input of each logical product.
By providing such a circuit, it is possible to prevent a current short-circuiting between the electrodes, and it is not necessary to increase the heat generation of the switch, and for a path that does not need to prevent a short-circuit, a voltage determination signal is used. Therefore, it is possible to further reduce the switching loss because the on / off switching is not newly generated.

本発明を諸図面や実施例に基づき説明してきたが、当業者であれば本開示に基づき種々の変形や修正を行うことが容易であることに注意されたい。従って、これらの変形や修正は本発明の範囲に含まれることに留意されたい。 Although the present invention has been described based on the drawings and examples, it should be noted that those skilled in the art can easily make various modifications and corrections based on the present disclosure. Therefore, it should be noted that these variations and modifications are included in the scope of the present invention.

従来のモータ制御システムの構成を示す図である。It is a figure which shows the structure of the conventional motor control system. 本発明による電力変換装置の制御方法の使用に適したモータ制御システムの一例を示す構成図である。It is a block diagram which shows an example of the motor control system suitable for use of the control method of the power converter device by this invention. 本発明による電力変換装置の制御方法の使用に適した電力変換装置の回路図の一例である。It is an example of the circuit diagram of the power converter device suitable for use of the control method of the power converter device by this invention. 図２の一部を抜き出した図である。It is the figure which extracted a part of FIG. 図４の各ブロックの演算を示すフローチャートである。It is a flowchart which shows the calculation of each block of FIG. 第１の実施例のＰＷＭパルス生成手段での演算を示す図である。It is a figure which shows the calculation in the PWM pulse production | generation means of 1st Example. 図３からU相のみを抜き出した構成を示す図である。It is a figure which shows the structure which extracted only the U phase from FIG. 三角波比較によるＡとＥのパルス生成を示す図である。It is a figure which shows the pulse generation of A and E by a triangular wave comparison. 三角波比較によるＤとＣのパルス生成を示す図である。It is a figure which shows the pulse generation of D and C by a triangular wave comparison. デッドタイムが付加されたパルス生成の例を示す図である。It is a figure which shows the example of the pulse generation to which the dead time was added. 第二の実施例における制御ブロック図の一部を示す図である。It is a figure which shows a part of control block diagram in a 2nd Example. 図１１の電圧比較器の詳細を示す図である。It is a figure which shows the detail of the voltage comparator of FIG. 図１１の短絡防止経路判定器の詳細を示す図である。It is a figure which shows the detail of the short circuit prevention path | route determination device of FIG. 第三の実施例における短絡防止回路を示す図である。It is a figure which shows the short circuit prevention circuit in a 3rd Example. 第四の実施例における短絡防止回路を示す図である。It is a figure which shows the short circuit prevention circuit in a 4th Example.

Explanation of symbols

10a,10b 電源
12,13 平滑コンデンサ
14 電源10aの正極母線
15 共通負極母線
16 電源10bの正極母線
20 モータ
101a/101b,102a/102b,103a/103b 半導体スイッチ
104a/104b,105a/105b,106a/106b 半導体スイッチ
107a,108a,109a 半導体スイッチ
107b,108b,109b ダイオード
30 電力変換器
30U Ｕ相のスイッチ群
30V Ｖ相のスイッチ群
30W Ｗ相のスイッチ群
40 制御装置
41 トルク制御手段
42 電流制御手段
43 ｄｑ／３相電圧変換手段
44 電圧分配手段
45 変調率演算手段
46 変調率補正手段
47 ＰＷＭパルス生成手段
48 ３相／ｄｑ電圧変換手段 10a, 10b power supply
12,13 Smoothing capacitor
14 Positive bus of power supply 10a
15 Common negative electrode bus
16 Power supply 10b positive bus
20 Motor
101a / 101b, 102a / 102b, 103a / 103b Semiconductor switch
104a / 104b, 105a / 105b, 106a / 106b semiconductor switch
107a, 108a, 109a Semiconductor switch
107b, 108b, 109b Diode
30 Power converter
30U U-phase switch group
30V V-phase switch group
30W W phase switch group
40 Control unit
41 Torque control means
42 Current control means
43 dq / 3-phase voltage conversion means
44 Voltage distribution means
45 Modulation rate calculation means
46 Modulation rate correction means
47 PWM pulse generation means
48 Three-phase / dq voltage conversion means

Claims

A method for controlling a power converter that is connected to a plurality of DC power supplies, generates a drive voltage by generating and synthesizing pulses from the output voltages of each of these DC power supplies, and drives an AC motor,
A short-circuit prevention step for preventing a short circuit between paths having different potentials,
Only including,
The short circuit prevention step includes:
A step of preventing a short circuit between paths of the same polarity with different potentials;
Preventing short-circuiting between different-polarity interpolar paths with different potentials based on the state of the same-polarity different-polarity paths with different potentials,
A method for controlling a power conversion device.

In the control method of the power converter device according to claim 1,
The short circuit prevention step further includes:
A step of switching any one of the plurality of switches from off to on after a predetermined time has elapsed when both of the switches in the same-polarity path of different potentials are turned off;
An on signal generating step of generating an on signal of the switch in the interpolar path of different polarity based on the on signal of the plurality of switches in the interpolar path of the same polarity having different potentials,
A method for controlling a power conversion device.

In the control method of the power converter device according to claim 2 ,
The on signal generation step includes:
Generating a switch ON signal in the interpolar path of the different polarity based on a logical product of the ON signals of a plurality of switches in the interpolar path of the same polarity with different potentials,
A method for controlling a power conversion device.

In the control method of the power converter device according to claim 2 or 3 ,
The short circuit prevention step further includes:
A logical operation of an ON signal of any one of the plurality of switches and an ON signal of a switch other than the one switch in the inter-electrode path including the one switch, and the logical operation A step of outputting an OFF signal when simultaneous ON of a plurality of switches is detected;
Replacing the on signal of a switch placed in the inter-pole path where the simultaneous on is detected with the output off signal.
A method for controlling a power conversion device.

In the control method of the power converter device according to claim 2 or 3 ,
The short-circuit prevention step further includes
A logic of an ON signal of any one of the plurality of switches and a signal obtained by logically inverting an ON signal of a switch other than the any one switch in the inter-electrode path including the any one switch Replacing the on signal of any one of the switches with an output signal generated by a product,
A method for controlling a power conversion device.

In the control method of the power converter device according to claim 2 or 3 ,
The short-circuit prevention step further includes
Obtaining a potential difference between poles of different potentials;
Generating a path selection signal for selecting a path between electrodes to prevent a short circuit based on the potential difference; and
An ON signal of any one of the plurality of switches;
A logical product of an ON signal of a switch other than any one of the switches in the inter-pole path including any one switch and the path selection signal is obtained by logically inverting this. Replacing the on signal of any one of the switches with the generated output signal,
A method for controlling a power conversion device.

Drive voltage by providing the first and second DC power supply, connecting the negative electrode of the first DC power supply and the negative electrode of the second DC power supply, and generating and synthesizing pulses from the output voltages of each of these DC power supplies Is a control method of a power converter that drives an AC motor by generating
A switch between the positive electrode of the first DC power supply and the output terminal of the power converter in a path that conducts only from the positive electrode of the first DC power supply to the positive electrode of the second DC power supply for each phase of AC Then, after a predetermined time when both of the pair of the switch between the output terminal of the power converter and the positive electrode of the second DC power supply have been turned off, the switch of any one of the pair of switches is turned off to on. A first short-circuit prevention time generation step to be switched;
For each phase of AC, between the positive electrode of the second DC power source and the output terminal of the power converter in a path that conducts only from the positive electrode of the second DC power source to the positive electrode of the first DC power source. After a predetermined time when both the switch and the positive switch between the output terminal of the power converter and the first DC power supply have been turned off has passed, one of the switch sets is switched from OFF to ON. A second short-circuit prevention time generation step;
A switch between the output terminal of the power converter and the positive electrode of the second DC power source in a path that conducts only from the positive electrode of the first DC power source to the positive electrode of the second DC power source for each phase of AC When the switch between the output terminal of the power conversion device and the positive electrode of the first DC power supply is turned on in a path that conducts only from the positive electrode of the second DC power supply to the positive electrode of the first DC power supply, Turning on a switch between the output terminal of the power converter and at least one negative electrode of the first DC power source and the second DC power source;
The control method of the power converter device characterized by including .