Nothing Special   »   [go: up one dir, main page]

JP4513326B2 - Nitride semiconductor crystal manufacturing method and nitride semiconductor substrate manufacturing method - Google Patents

Nitride semiconductor crystal manufacturing method and nitride semiconductor substrate manufacturing method Download PDF

Info

Publication number
JP4513326B2
JP4513326B2 JP2004006467A JP2004006467A JP4513326B2 JP 4513326 B2 JP4513326 B2 JP 4513326B2 JP 2004006467 A JP2004006467 A JP 2004006467A JP 2004006467 A JP2004006467 A JP 2004006467A JP 4513326 B2 JP4513326 B2 JP 4513326B2
Authority
JP
Japan
Prior art keywords
crystal
growth
nitride semiconductor
manufacturing
semiconductor substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2004006467A
Other languages
Japanese (ja)
Other versions
JP2005200250A (en
Inventor
祐一 大島
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Cable Ltd
Original Assignee
Hitachi Cable Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Cable Ltd filed Critical Hitachi Cable Ltd
Priority to JP2004006467A priority Critical patent/JP4513326B2/en
Publication of JP2005200250A publication Critical patent/JP2005200250A/en
Application granted granted Critical
Publication of JP4513326B2 publication Critical patent/JP4513326B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Landscapes

  • Crystals, And After-Treatments Of Crystals (AREA)

Description

本発明は、窒化物半導体結晶の製造方法及び窒化物半導体基板の製造方法に関するものである。   The present invention relates to a method for manufacturing a nitride semiconductor crystal and a method for manufacturing a nitride semiconductor substrate.

GaN等の窒化物半導体は、禁制帯幅が大きく、且つ直接遷移型であることから、紫外〜青色発光素子材料として注目されている。   Nitride semiconductors such as GaN are attracting attention as materials for ultraviolet to blue light-emitting elements because they have a large forbidden band and a direct transition type.

この窒化物半導体発光素子を作製するための基板としては、サファイア等の異種基板が用いられてきたが、ヘテロエピタキシャル成長に伴う高密度の転位の発生や、素子作製プロセスの複雑化などの問題があった。   As a substrate for manufacturing this nitride semiconductor light emitting device, a heterogeneous substrate such as sapphire has been used, but there are problems such as generation of high-density dislocations due to heteroepitaxial growth and complication of the device manufacturing process. It was.

これを解決するために窒化物半導体自立基板の開発が盛んに行われている。代表的な方法としては、サファイア等の異種基板上にHVPE法(Hydride Vapor Phase Epitaxy:ハイドライド気相成長法)を用いて厚いGaN層を形成し、成長後に異種基板を除去することで自立GaN基板とする方法がある(例えば、特許文献1参照)。これは、空隙を有する層を歪み緩和層として機能させ、下地基板とIII族窒化物半導体層との格子定数差や熱膨張係数差に起因する歪みを緩和するものであり、これにより、欠陥密度が低く、結晶品質の良好な反りのないIII族窒化物半導体基板を得ることができ、基板の除去を容易に行うことができるとされている。この技術によって低転位のGaN基板が実現しつつあり、市場にも出回り始めている。   In order to solve this, a nitride semiconductor free-standing substrate has been actively developed. As a typical method, a thick GaN layer is formed on a heterogeneous substrate such as sapphire by using an HVPE method (hydride vapor phase epitaxy), and the heterogeneous substrate is removed after growth to form a freestanding GaN substrate. (For example, refer to Patent Document 1). This is because the layer having voids functions as a strain relaxation layer, and the strain caused by the difference in lattice constant and thermal expansion coefficient between the base substrate and the group III nitride semiconductor layer is alleviated. It is said that a group III nitride semiconductor substrate having a low crystallinity and a good crystal quality can be obtained, and the substrate can be easily removed. With this technology, low dislocation GaN substrates are being realized and are beginning to appear on the market.

しかし、HVPE法で作製されたGaN基板は非常に高価である。流通量もごく僅かである。これは、それぞれの基板を1枚ずつ結晶成長し、加工していることが大きな原因である。一般に、この工程はサファイアやGaAsのような異種基板上のヘテロ成長であるから、成長するGaN結晶中の転位の発生を防ぐために、下地基板の準備には非常に手間がかかる。下地基板作製方法の一例を挙げれば、まずサファイア基板上に有機金属気相成長法(MOVPE法)で1μm程度の薄いGaN層を形成し、その上に精密なフォトリソグラフィ技術を用いて、幅数μm程度のSiO2のストライプマスクを形成する。このような加工を施した下地基板の上にHVPE法を用いて厚さ500μm程度のGaN厚膜を形成する。その後、レーザ剥離法などを用いてGaN厚膜をサファイア基板から分離し、両面を研磨加工して、ようやくGaN基板が完成する。これを、1枚1枚の基板すべてに実施する。このような多数の工程を経るため、GaN基板の製造歩留まりは非常に低い。特に、下地GaN層の成長とマスク形成工程、そして異種基板の除去工程で問題が多い。 However, a GaN substrate manufactured by the HVPE method is very expensive. The distribution volume is very small. This is largely due to crystal growth and processing of each substrate one by one. In general, since this process is hetero-growth on a heterogeneous substrate such as sapphire or GaAs, preparation of the base substrate is very laborious in order to prevent the occurrence of dislocations in the growing GaN crystal. To give an example of a method for manufacturing a base substrate, first, a thin GaN layer of about 1 μm is formed on a sapphire substrate by metal organic vapor phase epitaxy (MOVPE method), and then the number of widths is measured using a precise photolithography technique. A stripe mask of about 2 μm of SiO 2 is formed. A GaN thick film having a thickness of about 500 μm is formed on the base substrate subjected to such processing using the HVPE method. Thereafter, the GaN thick film is separated from the sapphire substrate using a laser peeling method or the like, and both surfaces are polished to finally complete the GaN substrate. This is performed on all the substrates one by one. Due to such a large number of processes, the production yield of the GaN substrate is very low. In particular, there are many problems in the growth of the underlying GaN layer, the mask formation process, and the removal process of the dissimilar substrate.

そこで、上記のような方法で得られたGaN基板を新たに種結晶とし、高速で長時間成長を行うことでインゴットを作製し、そこからGaN基板を切り出す方法が提案されている(例えば、特許文献2参照)。
特開2003−178984号公報 特開2003−527296号公報
Therefore, a method has been proposed in which a GaN substrate obtained by the above method is newly used as a seed crystal, an ingot is produced by growing at a high speed for a long time, and the GaN substrate is cut out therefrom (for example, a patent) Reference 2).
JP 2003-178984 A JP 2003-527296 A

しかしながら、従来通りの気相成長法で、単に長時間成長を行っても、インゴット成長は失敗する。ひとつは、インゴット側面へ多結晶付着や成長面最外周部における異常成長による歪やクラックの発生であり、もう一つは、厚さの増大に伴う成長位置変化の結果として起こる、結晶品質の不均一である。   However, ingot growth fails if the conventional vapor phase growth method is used for simple growth for a long time. One is the occurrence of strain and cracks due to polycrystal adhesion to the side of the ingot and abnormal growth at the outermost periphery of the growth surface, and the other is the poor crystal quality that occurs as a result of changes in the growth position as the thickness increases. It is uniform.

そこで、本発明は、上述の問題を解決し、これまでにない高品質な窒化物半導体基板、およびその製造方法を提案するものである。   Accordingly, the present invention solves the above-described problems and proposes an unprecedented high-quality nitride semiconductor substrate and a method for manufacturing the same.

上記目的を達成するため、本発明は、次のように構成したものである。   In order to achieve the above object, the present invention is configured as follows.

請求項1の発明に係る窒化物半導体結晶の製造方法は、単結晶窒化物半導体基板を種結晶として用い、ハイドライド気相成長法によって厚さ5mm以上の窒化物単結晶を製造する方法において、下端面に半径方向内側に延びた領域を有し、上端面が開放されているカバーによって、成長結晶の成長面エッジ部分および側面部分を、当該成長結晶の結晶成長面の外周から1mm以上の距離を置いて周囲から前記領域で覆い、前記カバーの長さを成長する前記成長結晶の長さより大きくし、結晶回転軸を成長速度に合わせて後退させることにより前記下端面から前記上端面へ前記種結晶を後退させ、前記成長結晶の結晶成長面の炉内での成長位置が一定になるように補正制御しながら窒化物単結晶を成長することを特徴とする。 According to a first aspect of the present invention, there is provided a method for producing a nitride semiconductor crystal comprising: using a single crystal nitride semiconductor substrate as a seed crystal and producing a nitride single crystal having a thickness of 5 mm or more by hydride vapor phase epitaxy ; With a cover having a region extending radially inward on the end face and having an open upper end face, the growth face edge portion and the side face portion of the growth crystal are separated from the outer periphery of the crystal growth face of the growth crystal by a distance of 1 mm or more. The seed crystal is placed from the lower surface to the upper surface by covering the region from the periphery and making the length of the cover larger than the length of the growing crystal to be grown, and retracting the crystal rotation axis in accordance with the growth rate. The nitride single crystal is grown while correcting and controlling so that the growth position in the furnace of the crystal growth surface of the grown crystal becomes constant.

上記カバーを設けることによって、成長面エッジ部分および側面の異常成長を防止することができる。またカバーの長さを、成長しようとするインゴットの長さよりも大きくすることにより、結晶が大きく成長しても炉内の流れを常に一定に保つことができる。また、厚く成長することによる、炉内での成長位置変化を補正するために、結晶回転軸を成長速度に合わせて後退させる。この位置補正制御手段は、例えば成長面位置の光学的な検出装置と、コンピュータ制御されたアクチュエータによって比較的簡単に実現することができる。 By providing the cover, it is possible to prevent abnormal growth of the growth surface edge and side surfaces. Further, by making the length of the cover larger than the length of the ingot to be grown, the flow in the furnace can be kept constant even when the crystal grows large. Further, in order to correct the growth position change in the furnace due to the thick growth, the crystal rotation axis is retracted according to the growth rate. This position correction control means can be realized relatively easily by, for example, an optical detection device for the growth surface position and a computer-controlled actuator.

ここで上記の距離は、例えば種結晶の、成長面の外周から半径方向内側1mm以上の部分、および側面の全てを覆うカバーと、結晶との間隔である。 Here, the above distance is, for example, the distance between the crystal and the cover that covers all of the side surface of the seed crystal that is 1 mm or more in the radial direction from the outer periphery of the growth surface and the side surface.

請求項の発明は、請求項に記載の窒化物半導体結晶の製造方法において、前記補正制御は、前記結晶成長面にレーザ光を照射し、前記結晶成長面において反射された前記レーザ光を検出することにより取得される検出信号から前記結晶成長面の位置を読み取り、前記結晶成長面の位置と、所定位置との偏差に応じて前記結晶成長面の前記炉内における位置を制御することにより、結晶の成長速度と同じ速度で結晶の位置が後退し、成長面が常に同じ位置に保たれるように行うことを特徴とする。 According to a second aspect of the invention, in the manufacturing method of the nitride semiconductor crystal according to claim 1, wherein the correction control, the laser beam is irradiated to the crystal growth surface, the laser light reflected at said crystal growth surface By reading the position of the crystal growth surface from the detection signal acquired by detecting, and controlling the position of the crystal growth surface in the furnace according to the deviation between the position of the crystal growth surface and a predetermined position The method is characterized in that the crystal position retreats at the same speed as the crystal growth speed, and the growth surface is always kept at the same position.

請求項の発明は、請求項記載の窒化物半導体結晶の製造方法において、成長速度が350μm/h以上であることを特徴とする。 A third aspect of the present invention, in the manufacturing method according to claim 2 nitride semiconductor crystal according, characterized in that the growth rate is 350 .mu.m / h or more.

請求項の発明に係る窒化物半導体基板の製造方法は、請求項1〜のいずれかに記載の方法で作製された窒化物半導体結晶をスライスして得ることを特徴とする。 A method for manufacturing a nitride semiconductor substrate according to a fourth aspect of the present invention is characterized by being obtained by slicing a nitride semiconductor crystal manufactured by the method according to any one of the first to third aspects.

請求項の発明は、請求項記載の窒化物半導体基板の製造方法において、窒化物半導体結晶を円筒形に整形した後に、オリエンテーションフラットを形成し、その後にスライスすることを特徴とする。 According to a fifth aspect of the present invention, in the method for manufacturing a nitride semiconductor substrate according to the fourth aspect , after the nitride semiconductor crystal is shaped into a cylindrical shape, an orientation flat is formed and then sliced.

請求項の発明は、請求項記載の窒化物半導体基板の製造方法において、2箇所以上のオリエンテーションフラットを形成することを特徴とする窒化物半導体基板の製造方法。
The invention of claim 6 is the method for manufacturing a nitride semiconductor substrate according to claim 5 , wherein two or more orientation flats are formed.

<発明の要点>
本発明の要点は、気相成長による窒化物半導体単結晶インゴットの成長において、成長中の結晶の成長面外周および側面を覆うカバーを設けることによって、結晶側面への他結晶の付着を防止するのと同時に、結晶回転軸を成長速度に合わせて後退させ、成長表面を炉内で常に一定の位置に維持することで、上記の問題を解決し、均質で高品質な窒化物半導体単結晶を得ることにある。
<Key points of the invention>
The main point of the present invention is that, in the growth of a nitride semiconductor single crystal ingot by vapor phase growth, by providing a cover that covers the outer periphery and the side surface of the growing crystal, it prevents adhesion of other crystals to the crystal side surface. At the same time, the crystal rotation axis is retracted according to the growth rate, and the growth surface is always maintained at a constant position in the furnace, thereby solving the above problems and obtaining a uniform and high-quality nitride semiconductor single crystal. There is.

詳述するに、本発明での気相成長によるインゴット成長が、SiやGaAsなど、融液からの引き上げによる方法と大きく異なるのは、次の2点である。   In detail, the ingot growth by vapor phase growth in the present invention is greatly different from the method by pulling up from a melt such as Si or GaAs in the following two points.

(1)側面やエッジ部分への異常成長
気相成長では、原料ガスが成長結晶の成長面のみならず、側面にまで回り込んでしまい、結晶側面において、多結晶付着等、異常な成長を引き起こす。多結晶の付着があると、成長に伴ってそれらが結晶中心部に向かって増殖し、成長結晶の大部分が多結晶化してしまうことがある。また、成長面のエッジ部分では原料ガスの流れが乱れるため、盛り上がりが生じ、さらにガスの流れを乱し、成長結晶の形状を著しく損ねてしまう。次第に大きく成長する結晶それ自体も、流れを変化させる要因となる。
(1) Abnormal growth on side surfaces and edge portions In vapor phase growth, the source gas circulates not only to the growth surface of the growth crystal but also to the side surfaces, causing abnormal growth such as polycrystal adhesion on the crystal side surface. . If there is adhesion of polycrystals, they proliferate toward the center of the crystal as they grow, and most of the grown crystals may become polycrystallized. Further, since the flow of the raw material gas is disturbed at the edge portion of the growth surface, the swell is generated, and further, the gas flow is disturbed and the shape of the grown crystal is significantly impaired. Gradually growing crystals themselves are also a factor in changing the flow.

(2)厚さの増大による成長位置変化
通常の気相成長装置では、インゴット成長を想定していないため、結晶支持軸の位置は固定である。そのため、厚さの増大に伴って、成長表面の位置が上流に向かって前進してしまう。窒化物半導体結晶の気相成長は気相反応の激しい系であるため、成長表面位置の変化は、大きな影響がある。最も影響を受けるのは成長速度で、成長位置の数mmの変化が数十%もの大きな変動を招くことがある。成長速度が大きく変化すると、ドーパントの濃度や欠陥密度、歪が不均一になり、インゴットをスライスして基板を作製した場合、切り出す位置によって特性がばらついてしまうことになる。
(2) Growth position change due to increase in thickness Since a normal vapor phase growth apparatus does not assume ingot growth, the position of the crystal support shaft is fixed. Therefore, as the thickness increases, the position of the growth surface advances toward the upstream. Since the vapor phase growth of nitride semiconductor crystals is a system in which a vapor phase reaction is intense, the change in the growth surface position has a great influence. The growth rate is most affected, and a change of several millimeters in the growth position can cause a large fluctuation of several tens of percent. When the growth rate changes greatly, the dopant concentration, defect density, and strain become non-uniform, and when a substrate is made by slicing an ingot, the characteristics vary depending on the position to be cut out.

以上2点の考察から、気相成長による窒化物単結晶インゴットの製造方法における、次のような手法を考案した。   Based on the above two considerations, the following method has been devised in a method for producing a nitride single crystal ingot by vapor phase growth.

まず、厚く成長することによる、炉内での成長位置変化を補正するために、結晶回転軸を成長速度に合わせて後退させる。この補正制御は、例えば成長面位置の光学的な検出装置と、コンピュータ制御されたアクチュエータによって比較的簡単に実現できる。同時に、成長結晶の成長面エッジ部分および側面部分を覆うカバーを設ける。これによって成長面エッジ部分および側面の異常成長を防止する。さらに、カバーの長さを、成長しようとするインゴットの長さよりも大きくする。それにより、結晶が大きく成長しても炉内の流れを常に一定に保つことができる。   First, in order to correct the growth position change in the furnace due to the thick growth, the crystal rotation axis is retracted according to the growth rate. This correction control can be realized relatively easily by using, for example, an optical detection device for the growth surface position and a computer-controlled actuator. At the same time, a cover for covering the growth surface edge portion and the side surface portion of the growth crystal is provided. This prevents abnormal growth of the growth surface edge and side surfaces. Furthermore, the length of the cover is made larger than the length of the ingot to be grown. Thereby, the flow in the furnace can always be kept constant even if the crystal grows greatly.

上述のような種結晶と成長装置の使用に加え、インゴット成長の際には、成長速度を350μm/h以上とすることで不純物の混入を抑え、高品質な結晶を得ることができる。   In addition to the use of the seed crystal and the growth apparatus as described above, at the time of ingot growth, the growth rate is set to 350 μm / h or more, so that contamination of impurities can be suppressed and a high quality crystal can be obtained.

成長したインゴットは、スライス加工をする前に、オリエンテーションフラットを形成しておくことが望ましい。これによって、従来のような1枚ずつ加工した場合と比べて大幅なコストダウンが可能である。   The grown ingot is preferably formed with an orientation flat before slicing. As a result, the cost can be significantly reduced as compared with the case of processing one sheet at a time.

本発明によれば、成長結晶の成長面エッジ部分および側面部分を所定距離を置いて周囲からカバーで覆うことによって成長面エッジ部分および側面の異常成長を防止しながら窒化物単結晶を成長することができる。   According to the present invention, the nitride single crystal is grown while preventing the abnormal growth of the growth surface edge portion and the side surface by covering the growth surface edge portion and the side surface portion of the growth crystal with a cover from the periphery at a predetermined distance. Can do.

また本発明の他の特徴によれば、結晶回転軸を成長速度に合わせて後退させ、炉内での成長位置が一定になるように補正制御しながら窒化物単結晶を成長するため、厚く成長することができる。   Further, according to another feature of the present invention, the nitride single crystal is grown while the crystal rotation axis is retracted in accordance with the growth rate, and the growth position in the furnace is controlled to be constant, so that the nitride single crystal is grown thick. can do.

従って、本発明の製造方法で得られた窒化物単結晶を用いることで、クラックや転位などの欠陥の少ない、特性が高いレベルで揃った窒化物半導体基板を低コストで得ることができる。   Therefore, by using the nitride single crystal obtained by the manufacturing method of the present invention, a nitride semiconductor substrate having few defects such as cracks and dislocations and having a high level of characteristics can be obtained at low cost.

以下、本発明の実施の形態を、実施例を中心にして説明する。   Hereinafter, embodiments of the present invention will be described focusing on examples.

図1は本発明の実施例で用いた、HVPE法による結晶育成装置(HVPE炉)の模式図である。   FIG. 1 is a schematic view of a crystal growth apparatus (HVPE furnace) by the HVPE method used in an embodiment of the present invention.

1は上部に排気口10を有する石英反応管であり、周囲に配置したヒータ2で加熱でされる。石英反応管1内の下方にはGaソースボート5が設置されると共に、NH3導入管3、HCl導入管4及びGaCl導入管7を通じて、それぞれのガスを導入できるようになっている。石英反応管1内の上方には、下端に種基板9が固定された結晶回転軸8が垂下され、アクチュエータ15によって上下方向に変位し得るように構成されている。 Reference numeral 1 denotes a quartz reaction tube having an exhaust port 10 at the top, which is heated by a heater 2 disposed around it. A Ga source boat 5 is installed below the quartz reaction tube 1, and each gas can be introduced through the NH 3 introduction tube 3, the HCl introduction tube 4 and the GaCl introduction tube 7. Above the quartz reaction tube 1, a crystal rotation shaft 8 having a seed substrate 9 fixed at the lower end is suspended and can be displaced in the vertical direction by an actuator 15.

種基板9より成長するGaN単結晶の面の現在位置は、これに対し斜め下方からレーザ光源11の光12を発射し、その反射光を検出器13で検出することで把握される。すなわち、検出器13からの基板成長面位置の検出信号をコンピュータ14で読み取り、所望位置からの偏差に応じてアクチュエータ15を制御し、結晶成長面が炉内で常に同じ所望位置になるように制御する。   The current position of the surface of the GaN single crystal grown from the seed substrate 9 is grasped by emitting the light 12 of the laser light source 11 obliquely from below and detecting the reflected light by the detector 13. That is, the detection signal of the substrate growth surface position from the detector 13 is read by the computer 14, and the actuator 15 is controlled according to the deviation from the desired position, so that the crystal growth surface is always at the same desired position in the furnace. To do.

上記成長結晶の成長面エッジ部分および側面部分は、種結晶9の成長面の外周から1mm以上の所定距離を置いて周囲からカバー16で覆われる。カバー16の構造は図2に示す通りである。円筒本体の内径は、62mmで下端面は、半径方向内側に3.5mm延びた領域aを有し、直径55mmのカバー開口17を形成してなる円筒形のグラファイト製のカバー16である。   The growth surface edge portion and side surface portion of the growth crystal are covered with a cover 16 from the periphery at a predetermined distance of 1 mm or more from the outer periphery of the growth surface of the seed crystal 9. The structure of the cover 16 is as shown in FIG. The cylindrical main body has an inner diameter of 62 mm, and the lower end surface is a cylindrical graphite cover 16 having a region a extending 3.5 mm radially inward and having a cover opening 17 having a diameter of 55 mm.

<実施例>
本発明に関する実施例を、図1を用いて説明する。
<Example>
An embodiment relating to the present invention will be described with reference to FIG.

はじめに、種基板として、ボイド形成剥離法(特許文献1の特開2003−178984号公報に開示された製造方法)を用いて、直径60mmの単結晶GaN基板を作製した。種基板は両面鏡面研磨加工されており、厚さは430μmである。主面はc面であり、表側がGa極性面である。   First, as a seed substrate, a single crystal GaN substrate having a diameter of 60 mm was manufactured using a void formation peeling method (a manufacturing method disclosed in Japanese Patent Laid-Open No. 2003-178984 of Patent Document 1). The seed substrate is subjected to double-side mirror polishing and has a thickness of 430 μm. The main surface is a c-plane, and the front side is a Ga polar surface.

この種基板を、図1に示すHVPE炉にセットした。   This seed substrate was set in the HVPE furnace shown in FIG.

種結晶のエッジ部分(結晶成長面における外周から半径方向内側2.5mmまでの領域)、および側面部分は、図2に示すような長さ50mmの円筒形のグラファイト製のカバー16で覆った。種結晶成長面のカバー開口径は55mmである。   The edge portion of the seed crystal (the region from the outer periphery to the radially inner side 2.5 mm in the crystal growth surface) and the side surface portion were covered with a cylindrical graphite cover 16 having a length of 50 mm as shown in FIG. The cover opening diameter of the seed crystal growth surface is 55 mm.

ヒータ2で加熱した石英反応管1の中に設置されたGaソースボート5中に、HCl導入管4を通じてHCIガスを流すと、ボート5に充填された金属Ga6と反応してGaClとなる。これを、GaCl導入管7を通じて、結晶回転軸8に固定された種基板9に供給する。NH3は、NH3導入管3を通じて、GaClとは独立に種基板9に供給する。GaClとNH3は種基板9上で反応し、GaN単結晶が成長する。この際、レーザ光源11から発射され、結晶成長面で反射したレーザ光12を検出器13で検出することで、基板成長面位置は常にモニタされる。信号をコンピュータ14で読み取り、アクチュエータ15を制御して、結晶成長面が炉内で常に同じ位置になるように制御する。このようなHVPE装置を用いて、種結晶9の上に成長速度400μm/hで100時間の結晶成長を行った。 When HCI gas is flowed through the HCl introduction tube 4 into the Ga source boat 5 installed in the quartz reaction tube 1 heated by the heater 2, it reacts with the metal Ga6 filled in the boat 5 to become GaCl. This is supplied to the seed substrate 9 fixed to the crystal rotation shaft 8 through the GaCl introduction tube 7. NH 3 is supplied to the seed substrate 9 through the NH 3 introduction tube 3 independently of GaCl. GaCl and NH 3 react on the seed substrate 9 to grow a GaN single crystal. At this time, the position of the substrate growth surface is always monitored by detecting the laser beam 12 emitted from the laser light source 11 and reflected by the crystal growth surface by the detector 13. The signal is read by the computer 14 and the actuator 15 is controlled so that the crystal growth surface is always at the same position in the furnace. Using such an HVPE apparatus, crystal growth was performed on the seed crystal 9 at a growth rate of 400 μm / h for 100 hours.

これにより、直径55mm、長さ40mmの円筒形のインゴットが得られた。カバー16の効果によって、側面への多結晶付着等は見られなかった。また、結晶回転軸8の移動速度から、成長速度は常に一定であることが確認された。   As a result, a cylindrical ingot having a diameter of 55 mm and a length of 40 mm was obtained. Due to the effect of the cover 16, no polycrystals adhered to the side surfaces. Moreover, it was confirmed from the moving speed of the crystal rotation axis 8 that the growth speed is always constant.

得られたインゴットを直径50mmにまで円筒研削した。X線回折によって(1−100)面の位置を割り出し、長さ15mmのオリエンテーションフラットを作成した。スライス後に裏表を判別するために、90度回転した位置に長さ10mmの第2オリエンテーションフラットも形成した。その後、ワイヤーソーを用いてスライスし、厚さ500μmのGaN基板を40枚切り出した。それぞれの基板に両鏡面研磨加工を施し、直径50mmの透明なGaN単結晶基板とした。   The obtained ingot was cylindrically ground to a diameter of 50 mm. The position of the (1-100) plane was determined by X-ray diffraction, and an orientation flat with a length of 15 mm was created. In order to distinguish the front and back after slicing, a second orientation flat having a length of 10 mm was also formed at a position rotated 90 degrees. Then, it sliced using the wire saw and cut out 40 sheets of 500-micrometer-thick GaN substrates. Each substrate was subjected to both mirror polishing processes to form a transparent GaN single crystal substrate having a diameter of 50 mm.

得られた40枚のGaN基板の転位密度をEPD法によって測定したところ、3×105cm-2±10%であった。また、Hall測定によるキャリア濃度の測定結果は1.5×1018cm-3±12%であった。これらの結果から、高品質且つ特性の揃ったGaN基板が得られたことが分かった。 When the dislocation density of the obtained 40 GaN substrates was measured by the EPD method, it was 3 × 10 5 cm −2 ± 10%. The measurement result of the carrier concentration by Hall measurement was 1.5 × 10 18 cm −3 ± 12%. From these results, it was found that a GaN substrate having high quality and uniform characteristics was obtained.

<比較例:軸を止め、カバーなし>
実施例1と同様の種結晶を、同じ装置にセットし、同じ条件で成長を行った。ただし、実施例1で説明したようなカバー16は外した。結晶回転軸8の位置も固定したままにした。その結果、長さ35mmのインゴットが得られたが、その側面には多結晶がびっしりと付着していた。成長面はシワが寄ったように荒れており、そのエッジ部分も大きく盛り上がっていた。
<Comparative example: Stopping the shaft and no cover>
A seed crystal similar to that in Example 1 was set in the same apparatus and grown under the same conditions. However, the cover 16 as described in Example 1 was removed. The position of the crystal rotation axis 8 was also fixed. As a result, an ingot having a length of 35 mm was obtained, but polycrystals were firmly attached to the side surface. The growth surface was rough as wrinkles approached, and the edges were also raised.

得られたインゴットを直径50mmにまで円筒研削したところ、結晶内部に多数の微小なクラックを含んでいることがわかった。これは、側面への多結晶の付着や、成長面エッジ部分の盛り上がりに起因する応力によって成長中にクラックが生じたものと考えられる。先述した成長面の荒れは、クラックを埋め込みながら成長が進行したために生じたと考えられる。X線回折によって(1−100)面の位置を割り出し、長さ15mmのオリエンテーションフラットを作製した。スライス後に裏表を判別するために、90度回転した位置に長さ10mmの第2オリエンテーションフラットも形成した。その後、ワイヤーソーを用いてスライスし、厚さ500μmのGaN基板を25枚切り出した。それぞれの基板に両鏡面研磨加工を施し、直径50mmの透明なGaN単結晶基板とした。   When the obtained ingot was cylindrically ground to a diameter of 50 mm, it was found that a large number of minute cracks were contained inside the crystal. This is presumably because cracks were generated during growth due to the stress caused by the adhesion of polycrystals on the side surfaces and the rise of the growth surface edge. The above-mentioned roughening of the growth surface is considered to have occurred because the growth progressed while embedding cracks. The position of the (1-100) plane was determined by X-ray diffraction to produce an orientation flat having a length of 15 mm. In order to distinguish the front and back after slicing, a second orientation flat having a length of 10 mm was also formed at a position rotated 90 degrees. Then, it sliced using the wire saw and cut out 25 pieces of GaN substrates with a thickness of 500 μm. Each substrate was subjected to both mirror polishing processes to form a transparent GaN single crystal substrate having a diameter of 50 mm.

得られた25枚のGaN基板の転位密度をEPD法によって測定したところ、5×107cm-2±50%と高い値を示し、しかも大きくばらついていた。生じたクラックを埋め込みながら成長したことが原因と考えられる。また、Hall測定によるキャリア濃度の測定結果は、インゴットの根元付近では1.5×1018cm-3であり、先端に近づくにつれて上昇し、先端付近では3×1018cm-3であった。これは、厚さの増大に伴って成長表面位置が変化したのと同時に、周囲の流れが変化し、それによって成長速度が次第に低下したことを示している。結局、結晶性が悪く、ばらつきの大きなものしか得られなかった。 When the dislocation density of the obtained 25 GaN substrates was measured by the EPD method, it showed a high value of 5 × 10 7 cm −2 ± 50%, and it varied greatly. This is considered to be caused by growing while filling the generated cracks. The measurement result of the carrier concentration by Hall measurement was 1.5 × 10 18 cm −3 near the root of the ingot, increased as it approached the tip, and 3 × 10 18 cm −3 near the tip. This indicates that the growth surface position changed with increasing thickness, and at the same time the ambient flow changed, thereby gradually reducing the growth rate. Eventually, only those with poor crystallinity and large variations were obtained.

<他の応用例、変形例>
以上述べた実施例においては、本発明をGaN基板の製造方法に適用した例について説明したが、窒化アルミニウムガリウムや窒化ガリウムインジウムなどの3元混晶の単結晶自立基板の製造や、Mg等をドープしたp型GaN基板の製造に適用することもできる。
<Other application examples and modifications>
In the embodiment described above, the example in which the present invention is applied to the method for manufacturing a GaN substrate has been described. However, the manufacture of a single crystal free-standing substrate of a ternary mixed crystal such as aluminum gallium nitride or gallium indium nitride, Mg, etc. It can also be applied to the manufacture of a doped p-type GaN substrate.

昇華法や、他の成長方法にも適用可能である。   It can also be applied to the sublimation method and other growth methods.

本法で作製した結晶を種基板として繰り返し用いることも考えられる。   It is also conceivable to repeatedly use the crystal produced by this method as a seed substrate.

本発明により得られるIII族窒化物半導体基板は、GaN系デバイス用の基板として広く用いることができる。特に、レーザダイオード用の基板として用いると、欠陥密度の低い良質なGaN系結晶が得られるため、信頼性の高い高性能なレーザダイオードを作製することができるようになる。   The group III nitride semiconductor substrate obtained by the present invention can be widely used as a substrate for a GaN-based device. In particular, when used as a substrate for a laser diode, a high-quality GaN-based crystal with a low defect density can be obtained, so that a highly reliable high-performance laser diode can be manufactured.

本発明の一実施例を示す、HVPE法による結晶育成装置の模式図である。It is a schematic diagram of the crystal growth apparatus by HVPE method which shows one Example of this invention. 図1におけるカバーの形状を描いた図である。It is the figure on which the shape of the cover in FIG. 1 was drawn.

符号の説明Explanation of symbols

1 石英反応管
3 NH3導入管
4 HCl導入管
5 Gaソースボート
6 金属Ga
7 GaCl導入管
8 結晶回転軸
9 種基板
11 レーザ光源
12 レーザ光
13 検出器
14 コンピュータ
15 アクチュエータ
16 カバー
17 カバー開口
1 Quartz reaction tube 3 NH 3 introduction tube 4 HCl introduction tube 5 Ga source boat 6 Metal Ga
7 GaCl introduction tube 8 Crystal rotation axis 9 Seed substrate 11 Laser light source 12 Laser light 13 Detector 14 Computer 15 Actuator 16 Cover 17 Cover opening

Claims (6)

単結晶窒化物半導体基板を種結晶として用い、ハイドライド気相成長法によって厚さ5mm以上の窒化物単結晶を製造する方法において、
下端面に半径方向内側に延びた領域を有し、上端面が開放されているカバーによって、成長結晶の成長面エッジ部分および側面部分を、当該成長結晶の結晶成長面の外周から1mm以上の距離を置いて周囲から前記領域で覆い、前記カバーの長さを成長する前記成長結晶の長さより大きくし、結晶回転軸を成長速度に合わせて後退させることにより前記下端面から前記上端面へ前記種結晶を後退させ、前記成長結晶の結晶成長面の炉内での成長位置が一定になるように補正制御しながら窒化物単結晶を成長することを特徴とする窒化物半導体結晶の製造方法。
In a method of manufacturing a nitride single crystal having a thickness of 5 mm or more by a hydride vapor phase growth method using a single crystal nitride semiconductor substrate as a seed crystal,
The growth surface edge portion and the side surface portion of the growth crystal are separated from the outer periphery of the crystal growth surface of the growth crystal by a distance of 1 mm or more by a cover having a region extending radially inward at the lower end surface and having an open upper end surface. The cover is covered with the region from the periphery, and the length of the cover is made larger than the length of the growing crystal to be grown, and the seed is moved from the lower end surface to the upper end surface by retracting the crystal rotation axis in accordance with the growth rate. A method for producing a nitride semiconductor crystal, comprising: retreating a crystal and growing a nitride single crystal while correcting and controlling so that a growth position in a furnace of a crystal growth surface of the grown crystal is constant.
請求項に記載の窒化物半導体結晶の製造方法において、
前記補正制御は、前記結晶成長面にレーザ光を照射し、前記結晶成長面において反射された前記レーザ光を検出することにより取得される検出信号から前記結晶成長面の位置を読み取り、前記結晶成長面の位置と、所定位置との偏差に応じて前記結晶成長面の前記炉内における位置を制御することにより、結晶の成長速度と同じ速度で結晶の位置が後退し、成長面が常に同じ位置に保たれるように行うことを特徴とする窒化物半導体結晶の製造方法。
In the manufacturing method of the nitride semiconductor crystal according to claim 1 ,
The correction control reads the position of the crystal growth surface from a detection signal obtained by irradiating the crystal growth surface with laser light and detecting the laser light reflected on the crystal growth surface, By controlling the position of the crystal growth surface in the furnace according to the deviation between the position of the surface and the predetermined position, the position of the crystal is retreated at the same speed as the crystal growth speed, and the growth surface is always at the same position. A method for producing a nitride semiconductor crystal, wherein
請求項記載の窒化物半導体結晶の製造方法において、
成長速度が350μm/h以上であることを特徴とする窒化物半導体結晶の製造方法。
In the manufacturing method of the nitride semiconductor crystal according to claim 2 ,
A method for producing a nitride semiconductor crystal, wherein the growth rate is 350 μm / h or more.
請求項1〜のいずれかに記載の方法で作製された窒化物半導体結晶をスライスして得ることを特徴とする窒化物半導体基板の製造方法。 Nitride semiconductor substrate manufacturing method, characterized in that obtained by slicing the fabricated nitride semiconductor crystal by the method according to any one of claims 1-3. 請求項記載の窒化物半導体基板の製造方法において、
窒化物半導体結晶を円筒形に整形した後に、オリエンテーションフラットを形成し、その後にスライスすることを特徴とする窒化物半導体基板の製造方法。
In the manufacturing method of the nitride semiconductor substrate according to claim 4 ,
A method of manufacturing a nitride semiconductor substrate, comprising: shaping a nitride semiconductor crystal into a cylindrical shape, forming an orientation flat, and then slicing the orientation flat.
請求項記載の窒化物半導体基板の製造方法において、
2箇所以上のオリエンテーションフラットを形成することを特徴とする窒化物半導体基板の製造方法。
In the manufacturing method of the nitride semiconductor substrate according to claim 5 ,
A method of manufacturing a nitride semiconductor substrate, wherein two or more orientation flats are formed.
JP2004006467A 2004-01-14 2004-01-14 Nitride semiconductor crystal manufacturing method and nitride semiconductor substrate manufacturing method Expired - Fee Related JP4513326B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2004006467A JP4513326B2 (en) 2004-01-14 2004-01-14 Nitride semiconductor crystal manufacturing method and nitride semiconductor substrate manufacturing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2004006467A JP4513326B2 (en) 2004-01-14 2004-01-14 Nitride semiconductor crystal manufacturing method and nitride semiconductor substrate manufacturing method

Publications (2)

Publication Number Publication Date
JP2005200250A JP2005200250A (en) 2005-07-28
JP4513326B2 true JP4513326B2 (en) 2010-07-28

Family

ID=34820418

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2004006467A Expired - Fee Related JP4513326B2 (en) 2004-01-14 2004-01-14 Nitride semiconductor crystal manufacturing method and nitride semiconductor substrate manufacturing method

Country Status (1)

Country Link
JP (1) JP4513326B2 (en)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4849296B2 (en) * 2005-04-11 2012-01-11 日立電線株式会社 GaN substrate
JP2006290677A (en) * 2005-04-11 2006-10-26 Hitachi Cable Ltd Method for manufacturing nitride-based compound semiconductor crystal and method for manufacturing nitride-based compound semiconductor substrate
TWI519686B (en) * 2005-12-15 2016-02-01 聖戈班晶體探測器公司 New process for growth of low dislocation density gan
JP4816079B2 (en) * 2005-12-28 2011-11-16 三菱化学株式会社 Method for producing Ga-containing nitride semiconductor
JP4788397B2 (en) * 2006-02-27 2011-10-05 住友電気工業株式会社 Method for producing group III nitride crystal
CN102358955B (en) * 2006-05-08 2014-06-25 弗赖贝格化合物原料有限公司 Process for producing a III-N bulk crystal and a free-standing III-N substrate, and III-N bulk crystal and free-standing III-N substrate
JP4899911B2 (en) * 2007-02-16 2012-03-21 日立電線株式会社 Group III nitride semiconductor substrate
JP4645622B2 (en) 2007-06-01 2011-03-09 住友電気工業株式会社 GaN crystal growth method
JP5023834B2 (en) * 2007-06-19 2012-09-12 住友電気工業株式会社 Semiconductor crystal growth method
JP5262203B2 (en) 2008-03-11 2013-08-14 住友電気工業株式会社 Compound semiconductor single crystal manufacturing apparatus and manufacturing method
JP4565042B1 (en) * 2009-04-22 2010-10-20 株式会社トクヤマ Method for manufacturing group III nitride crystal substrate
JP5328682B2 (en) * 2010-01-13 2013-10-30 日立電線株式会社 Method for producing group III nitride crystal and method for producing group III nitride semiconductor substrate
JP5601033B2 (en) * 2010-05-28 2014-10-08 三菱化学株式会社 Nitride single crystal manufacturing method and nitride single crystal
JP5808208B2 (en) * 2011-09-15 2015-11-10 株式会社サイオクス Manufacturing method of nitride semiconductor substrate
JP6045633B2 (en) * 2015-05-25 2016-12-14 住友化学株式会社 Manufacturing method of nitride semiconductor substrate

Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05294785A (en) * 1992-04-17 1993-11-09 Komatsu Denshi Kinzoku Kk Device for measuring and controlling molten material surface position of semiconductor single crystal producing device
JPH06104193A (en) * 1992-08-03 1994-04-15 Sumitomo Electric Ind Ltd System and method for vapor growth of compound semiconductor crystal
JPH06291058A (en) * 1993-04-06 1994-10-18 Japan Energy Corp Manufacture of semiconductor substrate
JPH07307316A (en) * 1994-05-12 1995-11-21 Sumitomo Electric Ind Ltd Iii-v compound semiconductor wafer and its machining method
JP2001226197A (en) * 2000-02-18 2001-08-21 Denso Corp Method and device for producing silicon carbide single crystal
JP2001253794A (en) * 2000-03-10 2001-09-18 Mitsubishi Chemicals Corp Method for producing semiconductor bulk single crystal
JP2002316892A (en) * 2001-04-12 2002-10-31 Matsushita Electric Ind Co Ltd Vapor phase epitaxial growth system
JP2003002795A (en) * 2001-06-22 2003-01-08 Toyota Central Res & Dev Lab Inc Method and apparatus for producing silicon carbide single crystal
JP2003527296A (en) * 2000-03-13 2003-09-16 アドバンスド.テクノロジー.マテリアルス.インコーポレイテッド III-V nitride substrate bowl and method of making and using III-V nitride substrate bowl

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05294785A (en) * 1992-04-17 1993-11-09 Komatsu Denshi Kinzoku Kk Device for measuring and controlling molten material surface position of semiconductor single crystal producing device
JPH06104193A (en) * 1992-08-03 1994-04-15 Sumitomo Electric Ind Ltd System and method for vapor growth of compound semiconductor crystal
JPH06291058A (en) * 1993-04-06 1994-10-18 Japan Energy Corp Manufacture of semiconductor substrate
JPH07307316A (en) * 1994-05-12 1995-11-21 Sumitomo Electric Ind Ltd Iii-v compound semiconductor wafer and its machining method
JP2001226197A (en) * 2000-02-18 2001-08-21 Denso Corp Method and device for producing silicon carbide single crystal
JP2001253794A (en) * 2000-03-10 2001-09-18 Mitsubishi Chemicals Corp Method for producing semiconductor bulk single crystal
JP2003527296A (en) * 2000-03-13 2003-09-16 アドバンスド.テクノロジー.マテリアルス.インコーポレイテッド III-V nitride substrate bowl and method of making and using III-V nitride substrate bowl
JP2002316892A (en) * 2001-04-12 2002-10-31 Matsushita Electric Ind Co Ltd Vapor phase epitaxial growth system
JP2003002795A (en) * 2001-06-22 2003-01-08 Toyota Central Res & Dev Lab Inc Method and apparatus for producing silicon carbide single crystal

Also Published As

Publication number Publication date
JP2005200250A (en) 2005-07-28

Similar Documents

Publication Publication Date Title
JP6578570B2 (en) Method for producing group III nitride semiconductor crystal substrate
JP4513326B2 (en) Nitride semiconductor crystal manufacturing method and nitride semiconductor substrate manufacturing method
JP6584428B2 (en) Method for producing silicon carbide single crystal and silicon carbide single crystal substrate
EP2119815B1 (en) Method for manufacturing self-supporting nitride semiconductor substrate
US9822465B2 (en) Method of fabricating group III nitride with gradually degraded crystal structure
JPWO2009090821A1 (en) Manufacturing method of laminate having Al-based group III nitride single crystal layer, stacked body manufactured by the manufacturing method, manufacturing method of Al-based group III nitride single crystal substrate using the stacked body, and aluminum nitride single Crystal substrate
JP2009519202A (en) Group III nitride product and method for producing the same
KR102372706B1 (en) β-Ga₂O₃-BASED-SINGLE CRYSTAL SUBSTRATE
JP6212203B2 (en) Manufacturing method of nitride semiconductor single crystal substrate
KR20150003723A (en) Method for producing iii-n templates and the reprocessing thereof and iii-n template
JP2007230823A (en) Method for manufacturing silicon carbide single crystal ingot, and silicon carbide single crystal ingot
JP2007217227A (en) METHOD FOR PRODUCING GaN CRYSTAL, GaN CRYSTAL SUBSTRATE, AND SEMICONDUCTOR DEVICE
JP2008074663A (en) Method for producing silicon carbide single crystal, silicon carbide single crystal ingot, and silicon carbide single crystal substrate
JP2014196242A (en) AlxGa1-xN crystal substrate
JP6526811B2 (en) Method of processing a group III nitride crystal
JP4603386B2 (en) Method for producing silicon carbide single crystal
JP2006290677A (en) Method for manufacturing nitride-based compound semiconductor crystal and method for manufacturing nitride-based compound semiconductor substrate
JP2018095490A (en) Method for manufacturing silicon single crystal, silicon single crystal and silicon single crystal wafer
JPH0797299A (en) Method for growing sic single crystal
JP4178989B2 (en) III-V compound semiconductor wafer manufacturing method
JP5145488B2 (en) Sapphire single crystal substrate and manufacturing method thereof
JP2007070131A (en) Method of manufacturing epitaxial wafer, and epitaxial wafer
JP7554215B2 (en) Indium phosphide substrates and semiconductor epitaxial wafers
WO2024004961A1 (en) Method of reusing sam substrate
JP3560180B2 (en) Method for producing ZnSe homoepitaxial single crystal film

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20060217

RD02 Notification of acceptance of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7422

Effective date: 20060217

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20080714

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20080722

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20080902

RD02 Notification of acceptance of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7422

Effective date: 20080902

RD05 Notification of revocation of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7425

Effective date: 20080912

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20090915

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20091106

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20100420

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20100503

R150 Certificate of patent or registration of utility model

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130521

Year of fee payment: 3

LAPS Cancellation because of no payment of annual fees