JP4412244B2 - Engine start control device - Google Patents

Description

  The present invention relates to an engine start control device that starts and stops an engine by driving and stopping a starter motor.

  Conventionally, an idling stop vehicle that automatically stops the engine during idling of the engine to improve fuel efficiency, and a vehicle driving motor that travels together with the engine and a vehicle driving motor and automatically stops the engine during low load traveling. A hybrid vehicle that runs alone is being developed.

  Among these, in an idling stop vehicle, the driver's intention to stop or start is generally determined based on clutch operation information, shift operation information, accelerator operation information, vehicle speed information, etc., and the engine is automatically stopped or automatically started. .

In the hybrid vehicle, the engine is automatically stopped or automatically started according to the vehicle speed information of the vehicle being driven or the load state of the vehicle.
In this type of vehicle, in order to automatically start an engine that has been automatically stopped, a CPU that operates by receiving power supply from a vehicle battery and a starter motor that is driven by power supply from the same vehicle battery are used. ing.

  That is, after the engine is automatically stopped, if the CPU determines that the engine start condition is satisfied based on the above-described various information, a drive signal for driving the starter motor or a stop signal for stopping the starter motor is generated. The engine is output and the engine is automatically started.

  By the way, when the CPU outputs a drive signal to drive the starter motor, a large current temporarily flows through the starter motor, and the voltage of the in-vehicle battery temporarily decreases. At this time, since the CPU and the starter motor are supplied with power from the same in-vehicle battery, the voltage supplied to the CPU may also decrease and the CPU may be reset. When the CPU is reset, the drive signal is not output from the CPU before the engine starts, and the starter motor stops.

  Therefore, a latch circuit is provided on the output side of the CPU, and when the drive signal is output from the CPU, the drive signal is latched to continue driving the starter motor, and when the stop signal is output from the CPU, the drive signal is latched. There is known a technique for releasing and stopping the starter motor.

Also, a control device for controlling the vehicle at the time of idling stop or traveling by the vehicle driving motor in order to prevent the CPU from being reset due to a voltage drop at the time of driving the starter motor without using a latch circuit. A technology is known that suppresses power consumption in the vehicle so that the power of the in-vehicle battery is not consumed as much as possible, and prevents the voltage of the in-vehicle battery from decreasing when the engine is started (that is, when the starter motor is driven). (Refer to patent document 1 etc.).
JP 2004-137905 A

  By the way, even if the CPU is reset immediately after outputting the drive signal and the drive signal is not output, as described above, by providing a latch circuit on the output side of the CPU and latching the drive signal output from the CPU, The starter motor is driven and the engine is reliably started. However, if a latch circuit is provided, the starter motor may continue to be driven by the latch circuit.

  That is, after the drive signal is latched by the latch circuit, if the CPU is abnormally operated due to noise superimposed on the input signal to the CPU, the CPU cannot output the stop signal. Then, the drive signal remains latched by the latch circuit, and thus the starter motor continues to be driven.

  In addition, the technology described in Patent Document 1 can prevent power consumption of the in-vehicle battery during idle stop or traveling with the vehicle drive motor, and prevent the voltage of the in-vehicle battery from being lowered when the starter motor is driven. However, when the CPU is abnormally operated due to noise or the like, it is impossible to prevent the starter motor from being continuously driven as described above.

  The present invention has been made in view of these problems, and an object of the present invention is to provide an engine start control device that can reliably drive and stop a starter motor even when a CPU is abnormally operated when the engine is started.

An engine start control device according to claim 1, which has been made to solve such a problem, is used for an idle stop vehicle in which a driver's intention to stop or start is determined, and the engine is automatically stopped or automatically started. A start control device, comprising a relay for conducting / interrupting the energization path from the in-vehicle battery to the starter motor that starts the engine, and a control means that operates by receiving power supply from the in- vehicle battery, based determines whether the starting condition of the engine is satisfied and, if the conditions of the automatic starting of the engine is satisfied, and outputs a drive command for driving the starter motor, then a stop command for stopping the starter motor Is output.

Once the drive command is output from the control means, the drive signal is latched, and then the switch drive means continues to output a signal that keeps the relay conducting until a stop command is output from the control means. When the starter motor is rotated and a stop command is output from the control means, the latch of the drive command is released and the relay is cut off to stop the rotation of the starter motor.

Further, when a state in which a signal that keeps the relay conducting from the switch control means continues to be output for a preset time limit or longer, the starting time limit means arranged at the subsequent stage of the switch means forcibly cuts off the relay .
Therefore, according to the present invention, after the control means outputs the drive command, even if the control means malfunctions due to noise and the control means stops outputting the starter motor stop command, the starter motor is surely stopped. be able to. That is, since the starter motor is not continuously driven for a long time, the starter motor does not break down. Furthermore, since the drive current of the starter motor does not continue to flow for a long time, it is possible to prevent the in-vehicle battery from being consumed and broken.

  By the way, the time (starter motor drive time) in which the starter motor must be continuously driven to start the engine varies depending on various conditions. For example, when the outside air temperature is low and the engine is cold as in winter, it is necessary to increase the driving time of the starter motor because the engine is not started. Conversely, when the outside air temperature is high and the engine is relatively warm as in summer, the starter motor drive time may be short because the engine starts well.

Therefore, as described in claim 2, it is preferable that the time limit of the start time limiting means can be set by an external operation by the setting means.
If it does in this way, a time limit can be set according to a start condition of an engine by a start time limit means, and it can prevent unnecessary consumption of an in-vehicle battery by extension.

In addition, the relay may be anything as long as it can conduct / cut off the energization path from the in-vehicle battery to the starter motor, but normally the drive current that flows to drive the starter motor is a large current. , as described in claim 3, a relay, a relay coil, the contact is switched conductive or blocked state by energization and non-energization to the relay coil, Bei give a, the switch driving means, the relay coil The semiconductor element that switches between energization / non-energization may be provided on the positive electrode side, the negative electrode side, or both of the energization path from the in-vehicle battery to the relay coil.

Thus, as a relay, by the use of one having a relay coil and contact, the switch drive means is connected to the relay coil, a starter motor which a large current flows is connected to the contact. Therefore, it is possible to drive a starter motor in which a large drive current flows by only passing a small current for exciting the relay coil by the switch drive means. In addition, since the switch drive means and the starter motor can be electrically separated, large current and noise flowing through the relay contacts do not flow into the switch drive means when the starter motor is driven, and the switch drive means is destroyed. It never happens.

Further, the use of the relay, it is also possible to downsizing than using semiconductor switches of large capacity capable of flowing a large current of the starter relay drive.
By the way, when a semiconductor element is provided only on either the positive electrode side or the negative electrode side of the energization path from the in-vehicle battery to the relay coil, the connection point between the semiconductor element and the relay coil is short-circuited to the positive electrode side or the negative electrode side. Then, current continues to flow through the relay coil, and the starter motor cannot be stopped. For this reason, it is good to provide a semiconductor element in the both sides of the positive electrode side and negative electrode side of the electricity supply path | route from a vehicle-mounted battery to a relay coil. In other words, even if such a short circuit occurs, the relay coil can be de-energized by the semiconductor element provided on the opposite polarity side to the shorted side. Can be stopped.

Embodiments of the present invention will be described below with reference to the drawings.
FIG. 1 is a circuit diagram showing a schematic circuit configuration of a vehicle engine start control device 1 to which the present invention is applied. FIG. 2 is a timing chart of each signal in the engine start control device 1.

  As shown in FIG. 1, the engine start control device 1 is for starting the engine by turning on and off the energization path of the starter motor 70 via a starter relay 60, and is connected to the outputs of the CPU 10 and CPU 10. NPN transistor 12 for signal level conversion, resistors 14 and 16 for pull-up, latch circuit 20 connected to the collector of transistor 12, and PNP type for signal level conversion connected to the output of latch circuit 20 The transistor 26 includes a hard mask circuit 30 connected to the collector of the transistor 26, a PNP transistor 52 for driving a starter relay connected to the output of the hard mask circuit 30, an NMOS FET 54, and a starter relay 60. .

  Here, the starter relay 60 is provided with a contact point 64 on the energization path of the starter motor 70, and the starter motor 70 is driven / stopped by conducting / interrupting the contact point 64 by energization / non-energization of the relay coil 62. Is.

Further, the CPU 10 determines whether or not an engine start condition is satisfied when the engine is stopped based on clutch operation information, shift operation information, accelerator operation information, vehicle speed information, and the like input from various sensors mounted on the vehicle. it is determined that the starting condition of the engine is satisfied, and outputs a starter set signal S _SS and starter reset signal S _SR is a signal for driving and stopping the starter motor.

That, CPU 10, at the time of engine stop, Low level (hereinafter, referred to as L level.) Outputs a starter set signal S _SS and L-level of the starter reset signal S _SR of. (State (a1) in FIG. 2).

Next, when the starter motor 70 is driven to start the engine, the CPU 10 keeps the starter reset signal _SSR at the L level and the starter set signal _SSS at the High level (hereinafter abbreviated as H level). (In the state of (b1) in FIG. 2).

After the engine has started, when stopping the starter motor 70, CPU 10 sets the starter set signal S _SS while the starter reset signal S _SR to L level to L level. In other words, a starter set signal S _SS and starter reset signal S _SR to the same state as when the engine is stopped (the state of in Fig. 2 (c1)).

Thus, CPU 10 outputs an H level and a starter set signal L level S _SS and starter reset signal S _SR according to various information and the like from various sensors mounted in the vehicle, and driving the starter motor 70 The engine is started by stopping it.

The CPU 10 used in the engine start control device 1 is of a type whose output becomes high impedance when it is in a reset state.
Next, the starter reset signal S _SR outputted from the CPU10 are inputted directly to the R terminal of the latch circuit 20. Here, it referred to signals input to the R terminal of the latch circuit and latch reset input signal S _R.

The other starter set signal _SSS is not directly input to the S terminal of the latch circuit 20, but is input to the base of the transistor 12.
The transistor 12 has a function of converting the signal level of the starter set signal S _SS.

That is, the transistor 12 has a collector connected to the power supply via the resistor 14 and an emitter grounded. The collector is input to the S terminal of the latch circuit 20 as the output of the transistor 12. Then, the transistor 12 is because it is NPN type, the starter set signal S _SS signal of L level is input to the base turned OFF. As a result, the output of the transistor 12 (that is, the collector voltage) becomes equal to the power supply voltage (that is, H level). Conversely, when an H level signal is input to the base, the transistor 12 is turned on and the output is at the L level.

In this manner, the transistor 12 is to convert the signal level of the starter set signal S _SS inputted. Here, a signal whose signal level is converted by the transistor 12 and input to the S terminal of the latch circuit 20 is referred to as a latch set input signal S _S.

Next, the latch circuit 20 connected to the output (collector) of the transistor 12 includes the latch set input signal S _S whose level has been converted by the transistor 12 and the starter reset signal S _SR (that is, the latch reset input signal) output from the CPU 10. S _R ) and outputs a latch signal S _L.

  The latch circuit 20 is a so-called R / S flip-flop circuit, which is composed of two NAND elements 22 and 24, and has two input terminals (S terminal and R terminal) and one output terminal (Q terminal). And have.

The output signal (that is, the latch signal S _L ) changes depending on the state of the latch set input signal S _S and the latch reset input signal S _R. That is, if both the latch set input signal S _S and the latch reset input signal S _R are at the H level, the latch signal S _L does not change and is maintained as it is. If latch set input signal S _S is at L level and latch reset input signal S _R is at H level, latch signal _SL is at H level, latch set input signal S _S is at H level and latch reset input signal S _R is at L level. If so, the latch signal S _L becomes L level, and if both the latch set input signal S _S and the latch reset input signal S _R are L level, the latch signal S _L becomes H level.

Then, when the engine is stopped, the starter reset signal S _SR L level of the starter set signal S _SS and L level is output from the CPU 10. Since the starter set signal S _SS is converted to the H level by the signal level converting transistor 12, the latch set input signal S _S at the H level is input to the S terminal of the latch circuit 20 and the L terminal is set to the L level. latch reset input signal S _R of the level is input.

When an H level latch set input signal SS is input to the _S terminal and an L level latch reset input signal SR is input to the _R terminal, the L level latch is applied from the Q terminal of the latch circuit 20 as described above. The signal S _L is output (state (a1) in FIG. 2).

On the other hand, when the engine is started, the CPU 10 outputs an H level starter set signal S _SS and an L level starter reset signal S _SR, and the signal level of the starter set signal S _SS is converted by the transistor 12. An L level latch set input signal S _S is input to the _S terminal, and an H level latch reset input signal S _R is input to the R terminal.

When the L level latch set input signal S _S is input to the _S terminal and the H level latch reset input signal SR is input to the _R terminal, the H level latch signal is output from the Q terminal of the latch circuit 20 as described above. S _L is output (state (b1) in FIG. 2).

After the engine is started, the CPU 10 sets the starter set signal _SSS to the H level and sets the starter reset signal _SSR to the H level. Then, since the same as when the engine stops (the state of in Fig. 2 (c1)) in which the latch signal S _L of L level is outputted from the latch circuit 20.

Further, when the CPU 10 is reset during engine start-up (state (a2) in FIG. 2), the output of the CPU 10 becomes high impedance as described above.
Then, the transistor 12 is turned off. Since the pull-up resistor 14 is connected to the collector of the transistor 12, the latch set input signal S _S becomes H level. Further, since the pull-up resistor 16 is present, the latch reset input signal S _R becomes H level (state (b2) in FIG. 2).

The latch set input signal S _S of H level is inputted to the S terminal, as described above with the signal of L level latch reset input signal S _R is input to the R terminal, from the Q terminal of the latch circuit 20, The latch signal S _{L at} H level is output (state (b2) in FIG. 2).

As described above, the latch circuit 20, when the engine is stopped, and outputs a latch signal S _L L level, the time of starting the engine, and outputs a latch signal S _L of H level. When the CPU 10 is reset, an H level latch signal _SL is output.

Incidentally, CPU 10 when normally restored after CPU 10 has been reset, like after the engine is started, and outputs the starter reset signal S _SR L level of the starter set signal S _SS and L level. Accordingly, the latch circuit 20 outputs the latch signal S _L L level (the state of in Fig. 2 (c2)).

The latch signal S _L output from the latch circuit 20 as described above is input to the base of the transistor 26.
The transistor 26 has a function of opening and grounding the input of the hard mask circuit 30 in accordance with the signal level of the latch signal S _L.

That is, the transistor 26 has a collector connected to the input of the hard mask circuit 30 and an emitter grounded. Since the transistor 26 is an NPN type, it is turned ON when an H level latch signal _SL is input to the base. As a result, the output of the transistor 26 (that is, the input of the hard mask circuit 30) is grounded. On the contrary, when an L level signal is input to the base, the transistor 26 is turned OFF and the output (that is, the input of the hard mask circuit 30) is opened.

In this way, the transistor 26 is or grounded or opened to enter the hard mask circuit 30 in accordance with the signal level of the latch signal S _L that is input.
Next, the hard mask circuit 30 that operates in response to the output of the transistor 26 will be described.

  In the hard mask circuit 30, the input is internally divided into two signal lines, and the two signal lines are respectively an inverting input terminal and a non-inverting input terminal of the comparator 50 in the final stage (output stage) of the hard mask circuit 30. Are connected via a diode or a resistor.

In the signal line connected to the non-inverting input terminal of the comparator 50, a diode 32, a resistor 36, and a resistor 42 are serially connected in this order from the input side of the hard mask circuit 30 to the non-inverting input terminal of the comparator 50. It is connected. One end of each of the resistor 38 and the capacitor 40 is connected to the signal line between the resistor 36 and the resistor 42, and the other end thereof is connected to the power source. (That is, the resistor 38 and the capacitor 40 are connected in parallel between the power source and the signal line.)
A diode 34 and a resistor 46 are connected in series to the signal line connected to the inverting input terminal of the comparator 50. Further, one end of each of the resistor 44 and the variable resistor 48 is connected between the resistor 46 and the comparator 50, and the other end of the resistor 44 is connected to a power source (that is, the resistor 44 is connected between the power source and the signal line). The other end of the variable resistor 48 is grounded (that is, the variable resistor 48 is connected in parallel between the ground and the signal line).

  In the hard mask circuit 30 having such a configuration, the function of each component will be described. The diodes 32 and 34 prevent the backflow of current between the two signal lines connected to the comparator 50.

The resistors 36, 38, 44, 46 and the variable resistor 48 are voltage dividing resistors for determining the value of the voltage input to the non-inverting input terminal and the inverting input terminal of the comparator 50.
When the input of the hard mask circuit 30 is released, the voltage across the capacitor 40 (that is, the voltage across the resistor 38) divides the power supply voltage by the ratio between the resistance value of the resistor 36 and the resistance value of the resistor 38. It gradually increases from the value to the power supply voltage. That is, the voltage at the non-inverting input terminal of the comparator 50 gradually increases from the value obtained by dividing the power supply voltage by the ratio between the resistance value of the resistor 36 and the resistance value of the resistor 38 to the power supply voltage. The speed of voltage increase at this time is determined by a time constant T that is the product of the resistance value of the resistor 38 and the capacitance of the capacitor 40.

The inverting input terminal of the comparator 50 is a voltage obtained by dividing the power supply voltage by the resistor 44 and the variable resistor 48.
On the other hand, when the input of the hard mask circuit 30 is grounded, the non-inverting input terminal of the comparator 50 becomes a voltage obtained by dividing the power supply voltage by the ratio between the resistance value of the resistor 36 and the resistance value of the resistor 38. The inverting input terminal of the comparator 50 is a voltage obtained by dividing the power supply voltage by the combined resistance value of the resistor 46 and the variable resistor 48 and the resistance value of the resistor 44.

The comparator 50 is a comparator. If the voltage at the non-inverting input terminal is larger than the voltage at the inverting input terminal, the comparator 50 outputs the H level hard mask circuit output voltage S _HM and the voltage at the non-inverting input terminal is the inverting input terminal. If it is smaller than the voltage of, the L level hard mask circuit output signal S _HM is output.

In the hard mask circuit 30 configured as described above, first, when the engine is stopped, the latch signal S _L is at the L level, and the input of the hard mask circuit 30 is in an open state, so that a sufficient time has elapsed. Therefore, the voltage at the non-inverting input terminal of the comparator 50 becomes the power supply voltage. A voltage obtained by dividing the power supply voltage by the resistor 44 and the variable resistor 48 is input to the inverting input terminal.

Accordingly, since the voltage at the non-inverting input terminal of the comparator 50 becomes larger than the voltage at the inverting input terminal, the output of the comparator 50, that is, the hard mask circuit output signal S _HM becomes H level ((a1) in FIG. 2). State).

Next, when the engine is started, since the latch signal S _L becomes H level, the input of the hard mask circuit 30 is in the ground state.
Then, the voltage at the non-inverting input terminal of the comparator 50 becomes a value obtained by dividing the power supply voltage by the ratio between the resistance value of the resistor 36 and the resistance value of the resistor 38, and then gradually increases with the time constant T. Go. The inverting input terminal of the comparator 50 is a voltage obtained by dividing the power supply voltage by the combined resistance value of the resistor 46 and the variable resistor 48 and the resistance value of the resistor 44.

At this time, the values of the resistors 36, 38, 44, and 46 and the variable resistor 48 are set so that the voltage of the inverting input terminal is larger than the voltage of the non-inverting input terminal. The mask circuit output signal S _HM once becomes L level (states (b1), (a2), (a3) in FIG. 2).

When the start of the engine is finished before the voltage at the non-inverting input terminal of the comparator 50 gradually increases and becomes higher than the voltage at the inverting input terminal, the CPU 10 sets the starter set signal to the L level, so that the latch signal S _L becomes L level.

Then, in the same manner as when the engine is stopped, the hard mask circuit output signal S _HM becomes the H level (the states (c1, c2, in FIG. 2)).
Next, when the CPU 10 operates abnormally during engine start-up (the state (a3) in FIG. 2) and the input of the hard mask circuit 30 continues to be in an open state (the latch signal _SL is at the H level). In the state (b3) in FIG. 2, after the hard mask circuit output signal _SHM becomes L level, the voltage at the non-inverting input terminal of the comparator 50 gradually increases with the time constant T. When the voltage at the non-inverting input terminal of the comparator 50 becomes larger than the voltage input to the inverting input terminal, that is, when a predetermined time determined by the time constant T elapses, the output of the comparator 50 (hard mask circuit output signal) S _HM ) becomes H level (state (c3) in FIG. 2).

As described above, when the latch signal S _L becomes L level or H level within a predetermined time, the hard mask circuit 30 outputs the H level or L level hard mask circuit output signal S _HM accordingly. When the latch signal S _L continues to be at H level (state (a3 to c3) in FIG. 2), the L level hard mask circuit output signal S _HM is output for a predetermined time (in FIG. A3～b3) state of), then it is to output the hard mask circuit output signal S _HM the H-level voltage when a predetermined time has elapsed (state of in Fig. 2 (c3)).

  Note that, by adjusting the size of the variable resistor 48 in the hard mask circuit 30, the time until the output of the comparator 50 changes from the L level to the H level (that is, a predetermined time for stopping the starter motor 70) is adjusted. Can be done.

  That is, the voltage at the inverting input terminal of the comparator is determined by the ratio of the combined resistance value of the resistor 46 and the variable resistor 48 to the resistance value of the resistor 44. Therefore, if the resistance value of the variable resistor 48 is reduced, The voltage decreases, and the voltage at the inverting input terminal increases as the resistance value of the variable resistor 48 increases. Therefore, if the predetermined time until the starter motor 70 is stopped is shortened, the resistance value of the variable resistor 48 is decreased, and the time until the capacitor 40 is charged and the voltage at the non-inverting input terminal of the comparator 50 is increased is set. In order to increase the predetermined time, the resistance value of the variable resistor 48 may be increased.

When the hard mask circuit output signal _SHM becomes H level (state (a1) in FIG. 2), the base of the transistor 52 connected to the output terminal of the hard mask circuit 30 has an H level hard mask. A circuit output signal S _HM is input. Here, the transistor 52 has an emitter connected to the power supply and a collector connected to the gate of the FET 54. Since the transistor 52 is a PNP type, it is turned off when the signal input to the base is at the H level, and the gate of the FET 54 connected to the output (collector) of the transistor 52 is at the L level.

  The FET 54 has a drain connected to a power source and a source grounded. Since the FET 54 is an NMOS type, it is turned off when the gate is at the L level, no current flows through the relay coil 62, and the contact 64 is turned off (state (a1) in FIG. 2). The starter motor 70 is not driven.

Next, when the hard mask circuit output signal S _HM becomes L level (states (b1), (a2), (a3) in FIG. 2), the transistor 52 connected to the output terminal of the hard mask circuit 30. Since the L level signal is input to the base of the transistor 52, the transistor 52 is turned on.

  When the transistor 52 is turned on, the output signal of the transistor 52 becomes H level. As a result, the gate of the FET 54 connected to the output (collector) of the transistor 52 becomes H level, and the FET 54 is turned on.

  When the FET 54 is turned on, a current flows through the relay coil 62 and is excited. As a result, the contact 64 is turned on and the starter motor 70 is driven ((b1), (a2), (a3 in FIG. 2). ) State).

As described above, according to the engine start control device 1, the starter motor 70 is driven when the CPU 10 operates normally, the starter reset signal _SSR is at the H level, and the starter set signal _SSS is at the H level. When the starter set signal _SSS becomes L level, the starter motor 70 is stopped and the engine is started.

Further, once the signal for starting the engine is output from the CPU 10, the latch signal S _L of the latch circuit 20 is maintained at the H level even when the CPU 10 is reset. Start. When the CPU 10 returns to normal, the starter motor 70 is stopped.

Further, even if a signal for starting the engine is output from the CPU 10 and the CPU 10 operates abnormally during the engine starting and the latch signal S _L of the latch circuit 20 continues to be at the H level, the hard mask circuit 30 causes the predetermined time to pass. When elapses, the starter motor 70 is stopped.

As a result, it is possible to prevent the starter motor from continuing to be driven, and thus it is possible to prevent a failure of the starter motor and the vehicle-mounted battery.
Incidentally, in the engine start control device 1, the FET 54 is provided on the negative electrode side of the energization path from the battery to the relay coil 62. However, as shown in FIG. 3A, the FET 54 is energized from the battery to the relay coil 62. Similarly, the contact 64 can be turned ON / OFF, that is, the starter motor 70 can be driven / stopped even if it is provided on the positive electrode side (that is, the battery side).

  Further, even if the FETs 54 and 56 are respectively provided on the positive electrode side and the negative electrode side of the energization path from the battery to the relay coil 62, the contact 64 is similarly turned ON / OFF, that is, the starter motor 70 is driven / stopped. Can do.

  Thus, when the FET 54 is provided on the positive side of the energization path and the FET 56 is provided on the negative side, the energization path between the FET 54 and the relay coil 62 is short-circuited to the positive side of the battery, or between the FET 56 and the relay coil 62. Since the relay coil can be de-energized by the FETs 54 and 56 provided on the opposite polarity side to the short-circuited side even when the current-carrying path is short-circuited with the negative electrode side of the battery, the starter motor 70 is reliably connected. Can be stopped.

In this embodiment, the starter relay 60 corresponds to the relay in the present invention, and the CPU 10 corresponds to the control means in the present invention.
Further, the latch circuit 20, the transistors 26 and 52, and the FETs 54 and 56 are set as switch driving means in the present invention, the FETs 54 and 56 are set as semiconductor elements in the present invention, the hard mask circuit 30 is set as starting time limiting means, and the variable resistor 48 is set. It corresponds to each means.

As mentioned above, although embodiment of this invention was described, this invention is not limited to this embodiment, A various aspect can be taken.
For example, in the embodiment, the hard mask circuit 30 has a circuit configuration in which the time (predetermined time) from ON to OFF of the starter relay 60 is determined by the charging time of the capacitor 40. It may be determined by a timer circuit.

That is, the latch circuit output signal S _L is used as a start trigger signal for the timer circuit, the timer circuit is activated to determine a predetermined time, and after the predetermined time has elapsed, the starter relay activation signal S _RL is turned off by the output of the timer circuit. You may do it.

  When using the timer circuit, use a power source for driving the timer circuit (for example, a battery, an electric double layer capacitor, etc.) that is different from the on-vehicle battery, and ensure that the timer circuit operates. Is preferred.

  In the embodiment, the time until the starter motor 70 is stopped is adjusted by the variable resistor 48. However, the variable resistor 48 is a fixed resistor, and any of the other resistors 38, 36, and 44 is a variable resistor. Thus, the time until the starter motor 70 is stopped may be adjusted. Alternatively, the capacitor 40 may be a variable capacitor, and the time until the starter motor 70 is stopped may be adjusted.

Further, instead of operating by one of the starter relay actuation signal S _RL to indicate FET54,56 provided on the positive electrode side and negative electrode side of the current path in FIG. 3, the current path of two FET54 engine start control system 1 It goes without saying that the relay coil 62 may be operated by being provided on the positive electrode side and the negative electrode side and operating each independently.

1 is a circuit diagram showing a schematic circuit configuration of an engine start control device 1 to which the present invention is applied. FIG. 4 is a timing chart of signals in the engine start control device 1. It is a circuit diagram which shows the circuit of the output part of starter relay operation signal _SRL .

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... Engine start control apparatus, 10 ... CPU, 12, 26, 52 ... Transistor, 14, 36, 38, 42, 44, 46 ... Resistance, 20 ... Latch circuit, 22, 24 ... NAND element 30 ... Hard mask circuit, 32, 34 ... Diode, 40 ... Capacitor, 48 ... Variable resistor, 50 ... Comparator, 54, 56 ... FET, 60 ... Starter relay, 62 ... Relay coil, 64 ... Contact, 70 ... Starter motor.

Claims (3)

An engine start control device used for an idle stop vehicle in which a driver's intention to stop or start is determined and an engine is automatically stopped or automatically started.
A relay to turn on and off the energization path from the vehicle battery to the starter motor that starts the engine;
The activated by receiving power supply from the vehicle battery, it is determined whether the starting condition of the engine is satisfied based on the operating state of the vehicle, when the automatic start condition of the engine is established, drive the starter motor A control means for outputting a drive command for causing the starter motor to stop, and then outputting a stop command for stopping the starter motor;
Once the drive command is output from the control means, the drive command is latched, and thereafter, until the stop command is output from the control means, a signal that keeps the relay on is continuously output, and the control When the stop command is output from the means, the drive command latch is released, and a switch drive means for outputting a signal for cutting off the relay ;
A start time limit arranged at a subsequent stage of the switch drive means forcibly shuts off the relay when a state in which a signal that keeps the relay conducting from the switch drive means continues for a preset time limit or longer. Means,
An engine start control device comprising:   The engine start control device according to claim 1, wherein the start time limiting means includes a setting means for setting the time limit by an external operation. The relay is
A relay coil, and a contact that can be switched between conductive and cut-off state by energizing / de-energizing the relay coil;
Bei to give a,
The switch driving means includes a semiconductor element that is provided on the positive electrode side, the negative electrode side, or both of the energization path from the in-vehicle battery to the relay coil, and switches between energization / non-energization to the relay coil. The engine start control device according to claim 1 or 2, characterized by the above.

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