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JP4322035B2 - Polishing composition for semiconductor substrate and semiconductor substrate polishing method using the same - Google Patents

Polishing composition for semiconductor substrate and semiconductor substrate polishing method using the same Download PDF

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Publication number
JP4322035B2
JP4322035B2 JP2003100373A JP2003100373A JP4322035B2 JP 4322035 B2 JP4322035 B2 JP 4322035B2 JP 2003100373 A JP2003100373 A JP 2003100373A JP 2003100373 A JP2003100373 A JP 2003100373A JP 4322035 B2 JP4322035 B2 JP 4322035B2
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Prior art keywords
polishing
semiconductor substrate
abrasive grains
polishing composition
composition
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JP2003100373A
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Japanese (ja)
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JP2004311575A (en
Inventor
宏樹 加藤
裕之 中野
勝之 白井
匡志 寺本
直樹 松本
菊郎 竹本
祥紀 三浦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sumitomo Electric Industries Ltd
Nitta DuPont Inc
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Nitta Haas Inc
Sumitomo Electric Industries Ltd
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Priority to JP2003100373A priority Critical patent/JP4322035B2/en
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  • Finish Polishing, Edge Sharpening, And Grinding By Specific Grinding Devices (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)

Description

【0001】
【発明の属する技術分野】
本発明は、青色発光ダイオードや青紫色半導体レーザに用いられる窒化ガリウム系半導体基板の研磨に主として供される研磨組成物およびこの研磨組成物を用いた半導体基板研磨方法に関する。
【0002】
【従来の技術】
従来から、大口径の窒化ガリウム基板(ウェハ)を精密仕上げするまでの研磨方法として次のような方法が提案されている(特許文献1参照)。大きな粒子からなる砥粒で研磨除去速度が12μm/hr前後の高速研磨を行い、その後、段階を経て順次小さな粒径(0.1〜0.5μm)の多結晶ダイヤモンド砥粒に切り換え、研磨除去速度1μm/hrまで徐々に遅くしながら研磨していくことで基板表面の平坦性を大幅に改善する方法である。最後に基板に残った表面ダメージ層(スクラッチや加工変質層(以下、潜傷と称する))を除去するために、RIEを用いて低いエッチングレート(300nm/min以下)で基板の表面をエッチングして、スクラッチや潜傷を取り去る。
【0003】
【特許文献1】
特開2001−322899
【0004】
【発明が解決しようとする課題】
しかしながら、上記のようにRIE法により最終的な平坦化処理を行うものにおいても、以下のような問題がある。
【0005】
すなわち、湿式研磨した後に洗浄、乾燥を行い、次いで基板をチャンバーにセットしプロセスガスとして塩素ガスを流しつつ高周波電源を用いてRIEエッチング(50℃)処理を施さなければならないという問題である。具体的にいうと、湿式の研磨工程から乾式のRIEエッチング工程に移行することによる加工工程の複雑さ、その工程の長さや、塩素ガスを使用するための設備対策費用などによりコスト増大は避けられない。ところで、従来の3μm/hr以上の研磨速度で研磨した後に引き続き湿式研磨でスクラッチや潜傷を発生させることなく平坦化する方法があれば、RIE工程を省略することができ、大幅なコストダウンを図ることが期待できる。
【0006】
本発明は、上記実状に鑑みてなされたものであって、窒化ガリウム系半導体基板のように比較的硬質で研磨の困難性の高い被研磨物の研磨作業を安価かつ簡易に行うことができるようにすることを解決しようとする課題としている。
【0007】
【課題を解決するための手段】
本発明に係る研磨組成物は、ビッカース硬度が400〜1000kg/mmである軟質砥粒と、ビッカース硬度が1300〜6000kg/mmである硬質砥粒とが、分散媒としての水に分散され、前記硬質砥粒の平均粒径が100〜600nmであり、前記軟質砥粒の平均粒子径が、前記硬質砥粒の平均粒子径の2/3以下1/20以上の範囲にあり、前記軟質砥粒と前記硬質砥粒の重量比が、硬質砥粒1に対して、少なくとも軟質砥粒2.5以上25以下の範囲にある、ことを特徴とする。
【0008】
質砥粒は、ビッカース硬さ試験によるその硬度が400〜1000kg/mm2の砥粒であり、硬質砥粒は、ビッカース硬さ試験によるその硬度が1300〜6000kg/mm2の砥粒である。なお、軟質砥粒と硬質砥粒として同じ硬度の砥粒を用いることはない。
【0009】
本発明に係る研磨組成物によれば、硬質砥粒とは別に軟質砥粒も含まれた複合的な砥粒となっているために、硬質砥粒の被研磨面への強い接触が軟質砥粒で緩和されることになる。すなわち、軟質砥粒によって硬質砥粒同士が凝集することが妨げられることで、微小な硬質砥粒でも被研磨面にスクラッチや潜傷を発生させる原因として考えられる凝集体の発生が抑制される。これにより、被研磨面に硬質砥粒が強くかみつかないよう軟質砥粒の緩衝作用が働いて被研磨面にスクラッチや潜傷が発生しないようにでき、高精度の平坦性を有する被研磨面を得ることができる。また、そのようにスクラッチや潜傷を発生させることなく、所望の高速研磨を行えるので、効率的な研磨ができる。例えば硬質砥粒としてダイヤモンドと軟質砥粒とを組み合わせた研磨組成物の場合、比較的高い研磨圧力での研磨や研磨時の温度を比較的高い状態で研磨できるようになるから、研磨速度も1μm/hr以上にすることができる。なお、研磨後の被研磨面におけるスクラッチが深さ100オングストローム以下であればよいのであって、全くスクラッチや潜傷が無い状態に研磨しなければならないというわけではなく、少なくとも上記スクラッチ深さの条件達成により課題解決ができたことになる。これにより、RIE加工などの超精密な平坦化加工を別途行わなくても半導体基板の所望の仕上げ研磨が十分行える。このため、湿式研磨を行うだけで最終工程である仕上げ研磨まで行えるので、設備費用も少なくできるとともに、その研磨加工の効率が向上し、生産性が高められる。さらに、水を砥粒の分散媒としているので、油性の分散媒を用いた場合に比して樹脂製研磨パッドを傷めにくいから、その研磨パッド寿命が長くなるなどの利点もある。
【0010】
本発明に係る研磨組成物は、前記水は比抵抗が1MΩ・cm以上であることが好ましい。この場合、前記水は、例えばイオン交換器により水中の陽イオン成分や陰イオン成分を除去するなどにより純水または超純水を製造する装置から得られる水(純水または超純水)であることが好ましい。
【0011】
本発明に係る研磨組成物は、研磨促進剤および殺菌剤が含まれていることが好ましい。前記研磨促進剤は、水酸化ナトリウム、水酸化カリウム、一塩基酸、二塩基酸、および、リン酸のうちの少なくともいずれか一つを含むものであることが好ましい。研磨促進剤により化学的研磨作用などが促進されるので、研磨速度が高まり、作業効率が向上する。また、殺菌剤は、過酸化水素、アンモニア、有機アミンのうちのいずれか一つであることが好ましい。この場合、前記有機アミンは、ピペラジン、アミノエチルエタノール、エチレンジアミン、ジエチレントリアミンのうちのいずれか一つであることが好ましい。すなわち、水を分散媒として用いていることでバクテリアなどの細菌類が研磨組成物中に増殖し、研磨装置や研磨組成物を循環する装置や管路などを汚染するおそれがあるけれども、殺菌剤により細菌類の増殖が発生しないよう殺菌できるので、細菌類の汚染箇所を清浄化する作業や汚染による配管交換などが不要になり、工事費用の省略を図れるし、清掃作業などのためのプラント停止が回避できる。なお、過酸化水素を利用した殺菌剤の場合、液中に過酸化水素が少なくとも200ppm以上研磨組成物中に含まれていると殺菌効果がある。アンモニアの場合は、0.1重量%以上研磨組成物中に含まれていると殺菌効果がある。上記に示した各有機アミンについては、殺菌作用のみならず、金属イオンをトラップするので、被研磨物として例えば窒化ガリウム系化合物半導体の基板表面の金属イオンによる汚染を低減できる。
【0012】
本発明に係る研磨組成物は、前記硬質砥粒は、平均粒径が100〜600nmであり、ダイヤモンドまたはアルファアルミナからなることが好ましい。硬質砥粒の平均粒径が100nmよりも小さいと、研磨速度が遅くなって作業効率を低下させる。硬質砥粒の平均粒径が1000nmより大きいと、被研磨面の面粗さの点で平坦度の高い所望の表面状態が得られない。従って、上記のように硬質砥粒の平均粒径を設定していることによって、研磨作業効率を必要以上に低下させることなく、平坦度の高い研磨を行うことができる。上記の粒径範囲の微小粒ダイヤモンドやアルファアルミナの場合、スクラッチや潜傷を発生させないように研磨することができるのみならず、安価な研磨組成物にできる。
【0013】
本発明に係る研磨組成物は、前記軟質砥粒は、コロイダルシリカ、ヒュームドシリカ、コロイダルアルミナ、ヒュームドアルミナ、ベータアルミナ、ヒュームドチタニアのうちの少なくともいずれか一つであることが好ましい。
【0014】
本発明に係る研磨組成物は、前記軟質砥粒の平均粒子径が前記硬質砥粒の平均粒子径の2/3以下1/20以上の範囲にある。この場合、軟質砥粒が硬質砥粒と被研磨面との間に入り込み易くなるため、硬質砥粒の被研磨面へのかみこみが軟質砥粒によって抑制され易くなる。
【0015】
本発明に係る研磨組成物は、前記軟質砥粒と前記硬質砥粒の重量比が硬質砥粒1に対して、少なくとも軟質砥粒2.5以上25以下の範囲にある。この場合、軟質砥粒が硬質砥粒の2.5倍〜25倍程度含まれていると、軟質砥粒が硬質砥粒の凝集を抑制するとともに、軟質砥粒が硬質砥粒と被研磨面との間に入り込み易くなり、緩衝材として十分機能するため、硬質砥粒の被研磨面へのかみこみが抑制され易くなり、スクラッチや潜傷の発生が十分抑制される。
【0016】
本発明に係る研磨組成物は、前記硬質砥粒としてダイヤモンド0.2〜2.0重量%、前記軟質砥粒0.4〜20.0重量%、前記研磨促進剤0.1〜5.0重量%、前記殺菌剤0.02〜2重量%および残部が水からなることが好ましい。
ダイヤモンドはその密度が3.5g/cm3であるから、ダイヤモンドの砥粒は水の分散媒中では静置により沈降していくが、上記割合で軟質砥粒が含まれていることにより、沈降したダイヤモンド砥粒の凝集が生じないように軟質砥粒が機能する。そのため、凝集したダイヤモンド砥粒により研磨時にスクラッチや潜傷が発生するという不具合も解消できる。なお、ダイヤモンド砥粒が沈降していても、超音波による振動を与えることによって容易に分散状態に戻すことができる。また、軟質砥粒が含まれることによってもダイヤモンド砥粒の分散性が高めれられることになる。また、軟質砥粒の含有比率(濃度)を0.4〜20.0重量%とすることは、本発明の研磨組成物において軟質砥粒が常時安定に存在できる濃度を定めている。硬質砥粒と軟質砥粒との関係は、硬質砥粒濃度は小さく、軟質砥粒濃度が大きくなることが好ましく、研磨速度の点から硬質砥粒濃度が0.2重量%よりも低いと、通常必要な研磨速度である1μm/hrを維持できなくなる。硬質砥粒濃度が2.0重量%よりも濃いものとなると、硬質砥粒の凝集が生じやすくなることでスクラッチや潜傷の発生の抑制の解消が図れにくくなる点で硬質砥粒濃度の上限となる。軟質砥粒についての濃度上限として20.0重量%としているのは、特に粒子径100nm以下のコロイダルシリカを使用する場合においては20.0重量%を越えた濃度となっていると、研磨組成物のゲル化が急速に生じるおそれが高いためである。一旦ゲル化するとその研磨組成物を元の分散状態に戻すことが困難である。
【0017】
本発明に係る半導体基板の研磨方法は、本発明に係る半導体基板用研磨組成物を用いて窒化ガリウム系化合物半導体基板を研磨することを特徴とする。
【0018】
本発明に係る半導体基板の研磨方法によれば、シリコンウェハなどと比較して硬質の半導体基板である窒化ガリウム系化合物半導体基板(ビッカース硬度が1000〜1300kg/mm2程度である)を研磨するのに、ダイヤモンドあるいはアルファアルミナ(コランダム)などの硬質砥粒を用いることにより研磨レートを十分大きくとった研磨を行うことができながらも、そのような硬質の砥粒のみで研磨したときのように、スクラッチや潜傷が研磨面に不当に残ってしまうという不具合も解消できるに至った。したがって、RIE加工などの超精密な平坦化加工を別途行わなくても窒化ガリウム系化合物半導体基板の研磨が十分行えることになる。このため、窒化ガリウム系化合物半導体基板の研磨工程としては湿式研磨を行うだけで精密研磨まで行え、湿式研磨工程のみで最終研磨工程まで行うことができるので、設備費用も少なくできるとともに、その研磨加工の効率が向上し、生産性が高められる。
【0019】
本発明に係る半導体基板の研磨方法は、被研磨物の被研磨面に対して対向する研磨面を備えるとともに、その対向する方向に沿った軸心周りで回転される研磨具の前記被研磨物に対する研磨荷重が50〜900gf/cm2で、前記研磨具の研磨面の外周における移動速度が25〜250m/minであることが好ましい。この場合、被研磨物の被研磨面における研磨除去速度(研磨レート)が0.5〜2.0μm/hrの比較的迅速で、かつ精密な平坦化加工を研磨によって行うことができる。研磨荷重や、研磨具の外周における移動速度(周速)が上記値の上限よりも大きい場合、研磨具に貼り付けた研磨パッドが挫屈する可能性が高くなることで、被研磨物の平坦性が損なわれるおそれがあるとともに、研磨パッドの寿命を短くしてしまうおそれがあるが、上記範囲内であれば研磨パッドの寿命も適正なものとなる。
【0020】
本発明に係る半導体基板の研磨方法は、前記半導体基板用研磨組成物は、研磨時に10℃以上80℃以下の温度範囲で用いられることが好ましい。この場合、研磨組成物の研磨時における温度が高いほど研磨レートが高められるので有効であり、したがって、必要な研磨レートにできる温度として10℃以上に研磨組成物の温度が設定され、研磨パッドなどを用いた場合そのパッドの寿命を十分長く使用できる研磨温度として80℃以下であることが認められるので、研磨レートと研磨パッドの寿命とが適正なものにできる。
【0021】
本発明に係る半導体基板の研磨方法は、研磨用の定盤に研磨パッドを貼り付けた状態で、前記半導体組成物を用いて半導体基板を研磨することが好ましい。この場合、研磨パッドは引っ張り強度に強く、耐摩耗性ある樹脂を金属定盤に貼り付けた状態で研磨することにより、被研磨物に対するスクラッチや潜傷の発生を抑制できる。直接金属定盤上で研磨する場合、研磨中に硬質砥粒(例えばダイヤモンド)が定盤に突き刺さって残るおそれがあり、そのような硬質砥粒が研磨の際固定砥粒として機能することによって、窒化ガリウム系化合物半導体基板にスクラッチや潜傷が発生することがあるけれども、研磨パッドにより硬質砥粒が金属定盤に突き刺さらないようになっているから、硬質砥粒が研磨の際固定砥粒として機能することもない。
【0022】
本発明に係る半導体基板の研磨方法は、前記研磨組成物を用いて前記被研磨物を研磨する工程の後、前記硬質砥粒が含まれていない研磨組成物を用いて仕上げ研磨することが好ましい。この場合、仕上げ研磨において硬質砥粒による研磨がないので、研磨レートは低いものの、被研磨面の平坦度は著しく精度のよいものにできる。
【0023】
本発明に係る半導体基板の研磨方法は、被研磨物を研磨するとき、前記研磨パッドの圧縮率は、1.0〜20vol%であることが好ましい。研磨パッドが軟らか過ぎると研磨圧力に負けて押しひしがれることになり被研磨物の被研磨面の平坦度が粗悪なものとなるおそれが高く、一方研磨パッドが硬過ぎると平坦度がよいものとなるものの研磨パッドに硬質砥粒が突き刺さりやすくなることで硬質砥粒が固定砥粒として機能しスクラッチや潜傷が生じやすくなるが、研磨パッドが上記圧縮率に設定されていると、被研磨面の平坦度を良好なものとしながら、かつスクラッチや潜傷の発生を防ぐことができる。
【0024】
本発明に係る半導体基板の研磨方法は、前記仕上げ研磨は、前記軟質砥粒、水酸化カリウム、水酸化ナトリウム、リン酸および純水のみにより構成される研磨組成物のみが研磨剤として用いられることが好ましい。この場合、平坦度の点で高精度の仕上げ研磨ができる。
【0025】
本発明に係る半導体基板の研磨方法は、前記研磨された後の被研磨物の被研磨面の表面粗さが算術平均粗さ(Ra)が20オングストローム以下で、かつ前記被研磨面の厚さばらつき(TTV)が20μm以下であることが好ましい。
【0026】
【発明の実施の形態】
以下、本発明の実施の形態を詳細に説明する。
【0027】
図1を参照して、本発明に係る研磨組成物を用いて窒化ガリウム系半導体基板を研磨する工程を示している。この工程では、例えば脂肪酸、アルコール、高分子界面活性剤を主体とした非水溶媒系でなく、複合砥粒と研磨促進剤、殺菌剤、および水(ただし純水が望ましい)からなる本発明に係る新規な水溶性研磨組成物が用いられる。この研磨組成物は、研磨時に用いられる樹脂製研磨パッドを研磨作業において損傷することなくその長期使用を保証するものである。
【0028】
図1には、窒化ガリウム化合物半導体基板の研磨に供される研磨装置1の要部が概略的に示されている。図1を参照して、研磨装置1は、円盤状の金属定盤2と、この金属定盤2の上方に対向する状態で被研磨物3を保持する保持側定盤4とを設けている。金属定盤2上には、研磨パッド5が貼り付けられている。この研磨パッド5は、表面がスエード調に加工された樹脂製のものである。保持側定盤4と金属定盤2のうち、少なくとも金属定盤2は上下方向に沿った縦軸心周りで回転駆動される。保持側定盤4は回転駆動するものでも、しないものでもよい。研磨時においては、被研磨物3であるワークに対して保持側定盤4を介して所望の研磨荷重が付与されるようにしている。
【0029】
被研磨物3である窒化ガリウム系化合物半導体基板からなる半導体ウェハは、カラーなどの保持具(図示せず)により保持側定盤4に保持されている。研磨装置1には、研磨組成物として、研磨スラリー6を研磨位置に滴下供給する供給装置7が設けられているとともに、その供給装置7は研磨に供されたその研磨スラリーを回収して再び研磨箇所に供給できるように循環させるものである。
【0030】
この研磨スラリー6は、硬質砥粒と軟質砥粒とを分散媒としての純水に分散し、さらにその各砥粒を水に分散したものには研磨促進剤および殺菌剤を混合して構成したものである。硬質砥粒としては、例えば微小粒のダイヤモンド、または、アルファアルミナを用いている。軟質砥粒としては、例えば、コロイダルシリカ、ヒュームドシリカ、コロイダルアルミナ、ヒュームドアルミナ、ベータアルミナ、ヒュームドチタニアのうちの少なくともいずれか一つを用いている。分散媒としての水は、イオン交換器により製造された純水を用いている。この場合、その純水の比抵抗は1MΩ・cm以上であることが好ましい。ただし、分散媒としての水は、その比抵抗が100kΩ・cm程度でも使用可能である。研磨促進剤としては、例えば水酸化ナトリウム、水酸化カリウム、一塩基酸(R・COOM)、二塩基酸(R・(COOM)2)、および、リン酸のうちの少なくともいずれか一つを用いてもよい。ここで、一塩基酸、二塩基酸のRは直鎖のアルキル基であり、Mは例えばカリウムやナトリウムなどから選択される金属を意味する。なお、研磨促進剤としては、例示しなかったその他のアルカリ金属の水酸化物などでもよい。殺菌剤としては、過酸化水素(H22)、アンモニア、有機アミンのうち少なくとも1つを含む。また、殺菌剤としての有機アミンについては、ピペラジン、アミノエチルエタノール(AEEA)、エチレンジアミン(EDA)、ジエチレントリアミン(DETA)のうちのいずれか一つが選択されてもよい。これら有機アミンは、研磨時に研磨スラリーに取り込まれた金属イオンに配位して錯体をつくる傾向があるため、殺菌効果のみならず窒化ガリウム系化合物半導体基板の金属イオン汚染を抑制することにも寄与する。
【0031】
本発明に係る研磨組成物の好ましい組成としては、ダイヤモンドが平均粒径100〜600nmであり、これに対して軟質砥粒としてのコロイダルシリカが平均粒径35〜130nmである。そして、コロイダルシリカの粒径はダイヤモンドの粒径の2/3以下1/20以上の範囲にあることがコロイダルシリカ砥粒によってダイヤモンド砥粒の凝集を抑制する上で好ましい。
【0032】
また、硬質砥粒としてダイヤモンド0.2〜2.0重量%、軟質砥粒0.4〜20.0重量%、研磨促進剤0.1〜5.0重量%、殺菌剤0.02〜2重量%および残部が水からなる組成の研磨組成物が好ましい。
【0033】
研磨パッド5は、その樹脂素材としてポリウレタンがある。また、研磨パッド5は、その非研磨時に対して研磨時における圧縮率が1.0〜20vol%であることが精密研磨を行う上で好ましい。
【0034】
また、窒化ガリウム系化合物半導体に対する研磨を本実施形態にかかる研磨組成物を用いたとき、研磨荷重が50〜900gf/cm2で、前記研磨具の研磨面の外周における移動速度が25〜250m/minであることが好ましい。研磨組成物の研磨面に供給されるときの温度は10℃〜80℃の範囲であることが好ましい。
【0035】
このようにして研磨された後の被研磨物の被研磨面の表面粗さは、算術平均粗さ(Ra)が20オングストローム以下で、かつ前記被研磨面の厚さばらつき(TTV)が20μm以下にできるのであり、このため、RIE工程を不要にでき、湿式研磨を行う工程のみで精密仕上げできることになる。
【0036】
硬質砥粒と軟質砥粒とを水に分散した研磨組成物による研磨工程を経た後、さらに、上述研磨組成物に使用される硬質砥粒を含まないで軟質砥粒のみを含む研磨組成物を用いて仕上げ研磨してもよい。この場合、上述研磨組成物に使用される軟質砥粒、水酸化カリウム、水酸化ナトリウム、リン酸および純水のみにより構成される研磨組成物のみが研磨剤として用いられて、仕上げ研磨を行ってもよい。こうすることにより、一層平面精度の高い研磨を行うことができる。
【0037】
本発明に係る半導体基板用組成物は、主に窒化ガリウム系化合物半導体基板の研磨に用いられるが、これに限定されるものではなく、窒化ガリウム系化合物半導体基板の硬度に近い硬度の半導体基板の研磨に好適である。
【0038】
【実施例】
本発明者は、本発明に係る半導体基板用研磨組成物を作製し、その作製した研磨組成物を用いた研磨実験を行った。以下に、その研磨組成物および実験について説明する。
【0039】
その実験は、市販の研磨機を用い、研磨圧力は600g/cm2、研磨時間60〜80分、定盤回転数60〜80rpm(定盤の周速20〜30m/min)、研磨に供される研磨組成物による研磨スラリーの流量20〜30ml/min、精密仕上げ用のスウェード調樹脂製研磨パッドを用いた。被研磨物は、窒化ガリウム系化合物半導体基板(ウェハ)である。研磨組成物の組成として、硬質砥粒は、ダイヤモンド砥粒(平均粒径100nmと500nmをそれぞれ使用)、軟質砥粒は、コロイダルシリカ(平均粒径70nmを使用)、分散媒として純水(比抵抗1MΩ・cm以上)、研磨促進剤として、水酸化カリウム、殺菌剤として、過酸化水素を使用した。さらに、研磨組成物中におけるコロイダルシリカ濃度を0.9重量%、2,7重量%の2種とし、研磨組成物中におけるダイヤモンド濃度を0.3重量%、0.9重量%の2種とし、さらに、平均粒径100nm、500nmの2種とし、それぞれの種類の組み合わせで8種類設定されて作成された研磨組成物について同一条件で上記基板の研磨を行った。その結果を図2に示している。図2において、縦軸は研磨レート(単位はμm/hr)を示し、横軸は、各研磨組成物のコロイダルシリカ濃度(重量%)、ダイヤモンド濃度(重量%)、ダイヤモンド粒径(nm)の組合わせに対応する研磨組成物を示す。これにより、ダイヤモンド粒径が100nmで、かつダイヤモンド濃度が0.3重量%の場合、シリカ濃度に関係なく、研磨レートが低く、それ以外の場合、研磨レートが0.6μm/hrより高くなっている。この実験結果から、表1に示す分散分析表が得られた。
【0040】
【表1】

Figure 0004322035
表1は得られた研磨レートを3要因2水準で統計解析ソフトJUSE−GCVS V7.0を用いて多元配置分散分析を行った結果である。分散分析はどの要因が特性値(研磨レート)に影響を及ぼしているか統計学的に明らかにする手法である。ダイヤモンド粒径を要因A、ダイヤモンド濃度を要因B、シリカ濃度を要因Cと表し、その左側に特性値(研磨レート)から計算したそれぞれの平方和、自由度、不偏分散及び分散比(F0)という統計学的数値を示している。分散比とは各要因の不偏分散を誤差の不偏分散で割った値である。得られた分散比をF分布表と対照させることにより、これらの要因がどれくらいの信頼度で特性値に影響を及ぼしているかを調べる。尚、要因ABはダイヤモンド粒径とダイヤモンド濃度因子間の交互作用を表している(BC,ACも同様にこれらの要因の交互作用を表している)。また、シリカ濃度は単一では主効果として研磨レートに影響を及ぼしていなかったため、統計学的手法(プーリング)により誤差の項として処理した。
【0041】
分散分析の結果、ダイヤモンド粒径とダイヤモンド濃度が信頼度99%(危険率1%)で、またこれらの交互作用及びダイヤモンド粒径とシリカ濃度との交互作用が信頼度95%(危険率5%)で有意であった。この場合、危険率5%とは、100回研磨試験を行った中で要因が特性値に影響を及ぼさない確率は5回以下という割合であることを表す。統計学的には確率が5%以下であれば偶然ではないと考えられる。
【0042】
したがって、研磨レートに最も寄与するのは硬質砥粒のダイヤモンド粒径であり、次いでダイヤモンド濃度であることがわかる。
【0043】
次に、上記実験結果によるダイヤモンド粒径と研磨レートとの相互の関係を図3のグラフに示す。図3は、縦軸に研磨レートを表し、横軸にダイヤモンドの平均粒径を表している。図3を参照して、ダイヤモンド粒子径が大きくなるほど研磨レートが大きくなることを示している。
【0044】
次に、本発明者は、研磨組成物中におけるコロイダルシリカ濃度を2.7重量%として、平均粒径500nmのダイヤモンド濃度(その単位は重量%)をそれぞれ0.1、0.3、0.5、0.9、1.2とする5つの試料を作製し、それら各試料について上記条件と同様の研磨を行った。その結果を図4に示している。図4は、縦軸に研磨レートを表し、横軸にそれぞれのダイヤモンド濃度を表している。その結果、ダイヤモンド濃度が1.2重量%の試料について、被研磨物としての窒化ガリウム系化合物半導体基板の被研磨面に所定以上のスクラッチや潜傷が認められた。その他の4つの試料については、所定以上のスクラッチや潜傷が認められなかった。この結果、ダイヤモンド濃度と研磨レートとには相互に関連性があることが認められる。すなわち、研磨組成物中のダイヤモンド濃度は被研磨物に潜傷などを生じさせないためにも極力薄いものが望ましいが、0.2重量%よりも薄い研磨組成物については、研磨レートが著しく低下することから効率的な研磨を行う研磨組成物として不向きであることがわかる。また、ダイヤモンド濃度が1.2重量%では潜傷の発生が認められるため、研磨レートが高くても精密研磨に不向きである。したがって、この場合、ダイヤモンド濃度0.3重量%〜0.9重量%での研磨が精密研磨において研磨レートが高く、かつ被研磨面に潜傷を与えない研磨が行える点で望ましい。より望ましくは、ダイヤモンド濃度0.3重量%〜0.5重量%の範囲である。
【0045】
次に、本発明者は、研磨組成物中におけるダイヤモンド砥粒を平均粒径500nmで、かつ濃度0.9重量%として、コロイダルシリカ濃度(単位重量%)をそれぞれ0.9、2.7、9.0とする3つの試料を作製し、それら各試料について上記条件と同様の研磨を行った。その結果を図5に示している。図5は、縦軸に研磨レートを表し、横軸にそれぞれのコロイダルシリカ濃度を表している。その結果、軟質砥粒であるコロイダルシリカの量が多いことが望ましいが、その濃度が10.0重量%を越えると研磨レートを大きく低下させる。コロイダルシリカ濃度が0.9重量%の場合、潜傷の発生が認められるため、研磨レートが高くても精密研磨に不向きである。したがって、この場合、コロイダルシリカ濃度2.7重量%〜10.0重量%での研磨が精密研磨において研磨レートが高く、かつ被研磨面に潜傷を与えない研磨が行える点で望ましい。より望ましくは、コロイダルシリカ濃度8.0重量%〜10.0重量%の範囲である。
【0046】
図6に、本発明の研磨組成物を用いて研磨(研磨速度ほぼ1μm/hr)した窒化ガリウム系化合物半導体基板の蛍光顕微鏡写真を示す(倍率200倍)。この写真から潜傷やスクラッチのない研磨がなされたことがわかる。
【0047】
図7にコロイダルシリカ濃度を少量(0.9重量%)とした研磨組成物を用いて研磨(研磨速度ほぼ1μm/hr)した窒化ガリウム系化合物半導体基板の蛍光顕微鏡写真を示す(倍率200倍)。この写真では筋を描く潜傷が発生していることがわかる。
【0048】
【発明の効果】
以上説明したように、本発明によれば、硬質砥粒とは別に軟質砥粒も含まれた複合的な砥粒となっているために、硬質砥粒の被研磨面への強い接触が軟質砥粒で緩和されることになる。すなわち、軟質砥粒によって硬質砥粒同士が凝集することが軟質砥粒によって妨げられることで、微小な硬質砥粒でも被研磨面にスクラッチや潜傷を発生させる原因として考えられる硬質砥粒の凝集体の発生が抑制される。これにより、被研磨面に硬質砥粒が強くかみつかないよう軟質砥粒の緩衝作用が働いて被研磨面にスクラッチや潜傷が発生しないようにでき、高精度の平坦性を有する被研磨面を得ることができる。また、そのようにスクラッチや潜傷を発生させることなく、所望の高速研磨を行えるので、効率的な研磨ができる。
【図面の簡単な説明】
【図1】 本発明の実施の形態に係る研磨組成物を用いた研磨の様子を概略的に示す側面図
【図2】 本発明の実施例として、軟質砥粒濃度、硬質砥粒濃度、硬質砥粒粒径の異なる複数種の研磨組成物試料による研磨レートを示すグラフ
【図3】 本発明の実施例として、硬質砥粒粒径と研磨レートとの関係を示すグラフ
【図4】 本発明の実施例として、硬質砥粒濃度と研磨レートとの関係を示すグラフ
【図5】 本発明の実施例として、軟質砥粒濃度と研磨レートとの関係を示すグラフ
【図6】 本発明に係る研磨組成物で研磨した後の窒化ガリウム系化合物半導体基板の蛍光顕微鏡写真
【図7】 比較例の研磨組成物で研磨した後の窒化ガリウム系化合物半導体基板の蛍光顕微鏡写真
【符号の説明】
6 研磨組成物(研磨スラリー)[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a polishing composition mainly used for polishing a gallium nitride based semiconductor substrate used for a blue light emitting diode or a blue-violet semiconductor laser, and a semiconductor substrate polishing method using the polishing composition.
[0002]
[Prior art]
Conventionally, the following method has been proposed as a polishing method for precisely finishing a large-diameter gallium nitride substrate (wafer) (see Patent Document 1). High-speed polishing at a polishing removal rate of about 12 μm / hr with abrasive grains made of large particles, and then gradually switches to polycrystalline diamond abrasive grains with a small particle size (0.1-0.5 μm) through steps to remove by polishing In this method, the flatness of the substrate surface is greatly improved by polishing while gradually slowing down to a speed of 1 μm / hr. Finally, in order to remove the surface damage layer (scratch or work-affected layer (hereinafter referred to as latent scratch)) remaining on the substrate, the surface of the substrate is etched at a low etching rate (300 nm / min or less) using RIE. Remove scratches and latent scratches.
[0003]
[Patent Document 1]
JP 2001-322899 A
[0004]
[Problems to be solved by the invention]
However, even in the case where the final flattening process is performed by the RIE method as described above, there are the following problems.
[0005]
That is, there is a problem that cleaning and drying must be performed after wet polishing, and then a RIE etching (50 ° C.) process must be performed using a high frequency power source while a substrate is set in a chamber and a chlorine gas is supplied as a process gas. Specifically, an increase in cost is unavoidable due to the complexity of the processing process, the length of the process, and the cost of equipment measures for using chlorine gas, by moving from a wet polishing process to a dry RIE etching process. Absent. By the way, if there is a method of flattening without generating scratches or latent scratches by subsequent wet polishing after polishing at a conventional polishing rate of 3 μm / hr or more, the RIE process can be omitted, which greatly reduces the cost. We can expect to plan.
[0006]
The present invention has been made in view of the above-described circumstances, and is capable of inexpensively and easily polishing an object to be polished that is relatively hard and difficult to polish, such as a gallium nitride semiconductor substrate. It is an issue to try to solve.
[0007]
[Means for Solving the Problems]
The polishing composition according to the present invention has a Vickers hardness of 400 to 1000 kg / mm. 2 Soft abrasive grains and a Vickers hardness of 1300-6000 kg / mm 2 The hard abrasive grains are dispersed in water as a dispersion medium, and the average grain size of the hard abrasive grains is 100 to 100. 600 nm, the average particle diameter of the soft abrasive grains is in the range of 2/3 or less 1/20 or more of the average particle diameter of the hard abrasive grains, and the weight ratio of the soft abrasive grains to the hard abrasive grains is With respect to the hard abrasive grain 1, it is at least in the range of 2.5 to 25 soft abrasive grains.
[0008]
Soft The quality abrasive grains have a hardness of 400 to 1000 kg / mm according to the Vickers hardness test. 2 With abrasive grains Yes, Hard abrasive grains have a hardness of 1300-6000 kg / mm according to the Vickers hardness test. 2 Of abrasive grains The Note that abrasive grains having the same hardness are not used as soft abrasive grains and hard abrasive grains.
[0009]
According to the polishing composition of the present invention, since the composite abrasive grains include soft abrasive grains in addition to the hard abrasive grains, strong contact of the hard abrasive grains with the surface to be polished is soft abrasive. It will be relaxed with grains. That is, since the hard abrasive grains are prevented from aggregating with the soft abrasive grains, the generation of aggregates that are considered to cause scratches and latent scratches on the polished surface can be suppressed even with minute hard abrasive grains. This allows the soft abrasive grains to act so that hard abrasive grains do not strongly bite on the surface to be polished, so that scratches and latent scratches do not occur on the surface to be polished. Obtainable. In addition, since desired high-speed polishing can be performed without causing scratches or latent scratches, efficient polishing can be performed. For example, in the case of a polishing composition in which diamond and soft abrasive are combined as hard abrasive grains, polishing at a relatively high polishing pressure and polishing temperature can be performed at a relatively high temperature, so the polishing rate is also 1 μm. / Hr or more. It should be noted that the scratch on the polished surface after polishing may be 100 angstroms or less in depth, and it is not necessarily required to polish without scratches or latent scratches. The achievement has solved the problem. Thereby, the desired finish polishing of the semiconductor substrate can be sufficiently performed without performing ultra-precision planarization processing such as RIE processing separately. For this reason, since the final polishing, which is the final process, can be performed only by performing wet polishing, the equipment cost can be reduced, the efficiency of the polishing process is improved, and the productivity is increased. Further, since water is used as the dispersion medium for the abrasive grains, the polishing pad made of resin is less likely to be damaged than when an oil-based dispersion medium is used.
[0010]
In the polishing composition according to the present invention, the water preferably has a specific resistance of 1 MΩ · cm or more. In this case, the water is water (pure water or ultrapure water) obtained from an apparatus for producing pure water or ultrapure water, for example, by removing a cation component or an anion component in water with an ion exchanger. It is preferable.
[0011]
The polishing composition according to the present invention preferably contains a polishing accelerator and a bactericidal agent. The polishing accelerator preferably contains at least one of sodium hydroxide, potassium hydroxide, monobasic acid, dibasic acid, and phosphoric acid. Since a chemical polishing action or the like is promoted by the polishing accelerator, the polishing rate is increased and the working efficiency is improved. Moreover, it is preferable that a disinfectant is any one of hydrogen peroxide, ammonia, and an organic amine. In this case, the organic amine is preferably any one of piperazine, aminoethylethanol, ethylenediamine, and diethylenetriamine. In other words, the use of water as a dispersion medium may cause bacteria such as bacteria to grow in the polishing composition and contaminate the polishing apparatus, the apparatus that circulates the polishing composition, the pipeline, etc. Can be sterilized so that bacterial growth does not occur, eliminating the need to clean the contaminated areas of the bacteria and replacing pipes due to contamination, reducing construction costs and stopping the plant for cleaning work, etc. Can be avoided. In the case of a disinfectant using hydrogen peroxide, if the polishing composition contains at least 200 ppm of hydrogen peroxide in the liquid, there is a disinfecting effect. When ammonia is contained in the polishing composition in an amount of 0.1% by weight or more, it has a bactericidal effect. About each organic amine shown above, since not only a bactericidal action but a metal ion is trapped, the contamination by the metal ion on the substrate surface of a gallium nitride compound semiconductor as an object to be polished can be reduced.
[0012]
In the polishing composition according to the present invention, the hard abrasive grains have an average particle diameter of 100 to 100. 600 nm, preferably consisting of diamond or alpha alumina. When the average particle size of the hard abrasive grains is smaller than 100 nm, the polishing rate is slowed, and the working efficiency is lowered. If the average particle size of the hard abrasive grains is larger than 1000 nm, a desired surface state with high flatness cannot be obtained in terms of surface roughness of the surface to be polished. Therefore, by setting the average particle size of the hard abrasive grains as described above, polishing with high flatness can be performed without lowering the polishing work efficiency more than necessary. In the case of fine-grained diamond or alpha alumina having the above particle diameter range, not only can polishing be performed without causing scratches and latent scratches, but also an inexpensive polishing composition can be obtained.
[0013]
In the polishing composition according to the present invention, the soft abrasive grains are preferably at least one of colloidal silica, fumed silica, colloidal alumina, fumed alumina, beta alumina, and fumed titania.
[0014]
In the polishing composition according to the present invention, the average particle diameter of the soft abrasive grains is in the range of 2/3 or less and 1/20 or more of the average particle diameter of the hard abrasive grains. The In this case, since the soft abrasive grains easily enter between the hard abrasive grains and the surface to be polished, the soft abrasive grains easily suppress the entrapment of the hard abrasive grains into the surface to be polished.
[0015]
In the polishing composition according to the present invention, the weight ratio of the soft abrasive grains to the hard abrasive grains is at least in the range of 2.5 to 25 soft abrasive grains with respect to the hard abrasive grains 1. The In this case, when the soft abrasive grains are contained about 2.5 to 25 times the hard abrasive grains, the soft abrasive grains suppress the aggregation of the hard abrasive grains, and the soft abrasive grains are hard abrasive grains and the surface to be polished. , And sufficiently functions as a cushioning material, it is easy to suppress the hard abrasive grains from being caught on the surface to be polished, and the occurrence of scratches and latent scratches is sufficiently suppressed.
[0016]
The polishing composition according to the present invention comprises 0.2 to 2.0% by weight of diamond as the hard abrasive grains, 0.4 to 20.0% by weight of the soft abrasive grains, and 0.1 to 5.0 of the polishing accelerator. It is preferable that the weight percent, 0.02 to 2 weight percent of the fungicide, and the balance are water.
Diamond has a density of 3.5 g / cm Three Therefore, the diamond abrasive grains settle upon standing in a water dispersion medium. However, since soft abrasive grains are contained in the above ratio, the aggregated diamond abrasive grains do not agglomerate. Soft abrasive functions. Therefore, the problem that scratches or latent scratches occur during polishing due to the agglomerated diamond abrasive grains can be solved. Even if the diamond abrasive grains are settled, they can be easily returned to the dispersed state by applying vibration by ultrasonic waves. Moreover, the dispersibility of a diamond abrasive grain is improved also by including a soft abrasive grain. Further, the content ratio (concentration) of the soft abrasive grains being 0.4 to 20.0% by weight defines the concentration at which the soft abrasive grains can always exist stably in the polishing composition of the present invention. The relationship between the hard abrasive grains and the soft abrasive grains is such that the hard abrasive grain concentration is small and the soft abrasive grain concentration is preferably large, and when the hard abrasive grain concentration is lower than 0.2% by weight in terms of polishing speed, Usually, the necessary polishing rate of 1 μm / hr cannot be maintained. If the hard abrasive concentration is higher than 2.0% by weight, the hard abrasive concentration tends to occur, making it difficult to eliminate the suppression of scratches and latent scratches. It becomes. The upper limit of the concentration of the soft abrasive grains is 20.0% by weight, particularly when colloidal silica having a particle diameter of 100 nm or less is used, when the concentration exceeds 20.0% by weight, the polishing composition This is because there is a high possibility that gelation will occur rapidly. Once gelled, it is difficult to return the polishing composition to its original dispersed state.
[0017]
A method for polishing a semiconductor substrate according to the present invention includes: According to the present invention A gallium nitride compound semiconductor substrate is polished using a polishing composition for a semiconductor substrate.
[0018]
According to the method for polishing a semiconductor substrate according to the present invention, a gallium nitride compound semiconductor substrate (Vickers hardness is 1000 to 1300 kg / mm) which is a hard semiconductor substrate compared to a silicon wafer or the like. 2 Can be polished with a sufficiently high polishing rate by using hard abrasive grains such as diamond or alpha alumina (corundum), but only such hard abrasive grains can be polished. The problem that scratches and latent scratches remain unreasonably on the polished surface, as in the case of polishing with, can be solved. Therefore, the gallium nitride compound semiconductor substrate can be sufficiently polished without separately performing ultra-precision planarization processing such as RIE processing. For this reason, the polishing process of the gallium nitride compound semiconductor substrate can be performed up to precision polishing only by performing wet polishing, and can be performed up to the final polishing process only by the wet polishing process. Efficiency is improved and productivity is increased.
[0019]
A method for polishing a semiconductor substrate according to the present invention includes a polishing surface that is opposed to a surface to be polished of an object to be polished, and the object to be polished of a polishing tool that is rotated about an axis along the facing direction. Polishing load with respect to 50 to 900 gf / cm 2 And it is preferable that the moving speed in the outer periphery of the grinding | polishing surface of the said polishing tool is 25-250 m / min. In this case, the polishing removal rate (polishing rate) on the surface to be polished of the object to be polished can be relatively quick and precise flattening with a polishing rate of 0.5 to 2.0 μm / hr by polishing. When the polishing load or the moving speed (peripheral speed) on the outer periphery of the polishing tool is larger than the upper limit of the above value, the polishing pad attached to the polishing tool is more likely to buckle, so that the flatness of the workpiece May be impaired and the life of the polishing pad may be shortened, but within the above range, the life of the polishing pad is also appropriate.
[0020]
In the method for polishing a semiconductor substrate according to the present invention, the polishing composition for a semiconductor substrate is preferably used in a temperature range of 10 ° C. to 80 ° C. during polishing. In this case, the higher the temperature at which the polishing composition is polished, the higher the polishing rate, which is more effective. Therefore, the temperature of the polishing composition is set to 10 ° C. or higher as the temperature at which the required polishing rate can be obtained, and the polishing pad, etc. Since it is recognized that the polishing temperature at which the life of the pad can be used for a sufficiently long time is 80 ° C. or less, the polishing rate and the life of the polishing pad can be made appropriate.
[0021]
In the method for polishing a semiconductor substrate according to the present invention, it is preferable to polish the semiconductor substrate using the semiconductor composition in a state where a polishing pad is attached to a polishing surface plate. In this case, the polishing pad has a high tensile strength and is polished in a state where a wear-resistant resin is attached to a metal surface plate, thereby suppressing the occurrence of scratches and latent scratches on the object to be polished. When polishing directly on a metal surface plate, hard abrasive grains (for example, diamond) may remain stuck in the surface plate during polishing, and such hard abrasive grains function as fixed abrasive grains during polishing, Although scratches and latent scratches may occur in the gallium nitride compound semiconductor substrate, the hard abrasive grains do not pierce the metal surface plate by the polishing pad. It does not function as.
[0022]
In the method for polishing a semiconductor substrate according to the present invention, after the step of polishing the object to be polished using the polishing composition, it is preferable to perform final polishing using a polishing composition that does not contain the hard abrasive grains. . In this case, since there is no polishing with hard abrasive grains in the final polishing, the flatness of the surface to be polished can be made extremely accurate although the polishing rate is low.
[0023]
In the method for polishing a semiconductor substrate according to the present invention, the polishing pad preferably has a compressibility of 1.0 to 20 vol% when polishing an object to be polished. If the polishing pad is too soft, the polishing pressure will be lost and the flatness of the surface to be polished will be poor, and if the polishing pad is too hard, the flatness will be good. However, the hard abrasive grains tend to pierce the polishing pad so that the hard abrasive grains function as fixed abrasive grains, and scratches and latent scratches are likely to occur, but if the polishing pad is set to the above compression rate, the surface to be polished It is possible to prevent the occurrence of scratches and latent scratches while improving the flatness of the film.
[0024]
In the method for polishing a semiconductor substrate according to the present invention, in the finish polishing, only a polishing composition comprising only the soft abrasive grains, potassium hydroxide, sodium hydroxide, phosphoric acid and pure water is used as an abrasive. Is preferred. In this case, finish polishing can be performed with high accuracy in terms of flatness.
[0025]
In the method for polishing a semiconductor substrate according to the present invention, the surface roughness of the polished surface of the polished object after polishing is an arithmetic average roughness (Ra) of 20 angstroms or less, and the thickness of the polished surface. The variation (TTV) is preferably 20 μm or less.
[0026]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described in detail.
[0027]
With reference to FIG. 1, the process of grind | polishing a gallium nitride-type semiconductor substrate using the polishing composition which concerns on this invention is shown. In this step, for example, the present invention is not composed of a non-aqueous solvent system mainly composed of fatty acid, alcohol, and polymer surfactant, but composed of composite abrasive grains, a polishing accelerator, a disinfectant, and water (however, pure water is desirable). Such a novel water-soluble polishing composition is used. This polishing composition guarantees long-term use without damaging a resin polishing pad used during polishing in polishing operations.
[0028]
FIG. 1 schematically shows a main part of a polishing apparatus 1 used for polishing a gallium nitride compound semiconductor substrate. Referring to FIG. 1, a polishing apparatus 1 includes a disk-shaped metal surface plate 2 and a holding-side surface plate 4 that holds an object to be polished 3 in a state of facing the metal surface plate 2. . A polishing pad 5 is affixed on the metal surface plate 2. The polishing pad 5 is made of a resin whose surface is processed to a suede tone. Of the holding surface plate 4 and the metal surface plate 2, at least the metal surface plate 2 is driven to rotate about the vertical axis along the vertical direction. The holding side surface plate 4 may or may not be rotationally driven. At the time of polishing, a desired polishing load is applied to the work as the object to be polished 3 via the holding side surface plate 4.
[0029]
A semiconductor wafer made of a gallium nitride compound semiconductor substrate, which is the object to be polished 3, is held on the holding side surface plate 4 by a holder such as a collar (not shown). The polishing apparatus 1 is provided with a supply device 7 that supplies the polishing slurry 6 to the polishing position as a polishing composition. The supply device 7 collects the polishing slurry used for polishing and polishes it again. It is circulated so that it can be supplied to the location.
[0030]
This polishing slurry 6 is constituted by dispersing hard abrasive grains and soft abrasive grains in pure water as a dispersion medium, and further mixing each of the abrasive grains in water with a polishing accelerator and a bactericidal agent. Is. As the hard abrasive, for example, fine diamond or alpha alumina is used. As the soft abrasive grains, for example, at least one of colloidal silica, fumed silica, colloidal alumina, fumed alumina, beta alumina, and fumed titania is used. As water as a dispersion medium, pure water produced by an ion exchanger is used. In this case, the specific resistance of the pure water is preferably 1 MΩ · cm or more. However, water as a dispersion medium can be used even if the specific resistance is about 100 kΩ · cm. Examples of the polishing accelerator include sodium hydroxide, potassium hydroxide, monobasic acid (R · COOM), dibasic acid (R · (COOM) 2 ) And at least one of phosphoric acid may be used. Here, R of monobasic acid and dibasic acid is a linear alkyl group, and M means a metal selected from, for example, potassium and sodium. As the polishing accelerator, other alkali metal hydroxides not illustrated may be used. As a disinfectant, hydrogen peroxide (H 2 O 2 ), At least one of ammonia and organic amine. Moreover, about the organic amine as a disinfectant, any one of piperazine, aminoethylethanol (AEEA), ethylenediamine (EDA), and diethylenetriamine (DETA) may be selected. These organic amines tend to coordinate with metal ions taken into the polishing slurry during polishing to form complexes, contributing not only to bactericidal effects but also to suppressing metal ion contamination of gallium nitride compound semiconductor substrates. To do.
[0031]
As a preferable composition of the polishing composition according to the present invention, diamond has an average particle size of 100 to 600 nm, while colloidal silica as a soft abrasive has an average particle size of 35 to 130 nm. The colloidal silica preferably has a particle size in the range of 2/3 or less and 1/20 or more of the diamond particle size in order to suppress the aggregation of the diamond abrasive particles by the colloidal silica abrasive particles.
[0032]
Further, as hard abrasive grains, 0.2 to 2.0% by weight of diamond, 0.4 to 20.0% by weight of soft abrasive grains, 0.1 to 5.0% by weight of polishing accelerator, and 0.02 to 2 of bactericidal agent. A polishing composition having a composition consisting of% by weight and the balance water is preferred.
[0033]
The polishing pad 5 includes polyurethane as its resin material. In addition, the polishing pad 5 preferably has a compressibility at the time of polishing of 1.0 to 20 vol% with respect to the non-polishing when performing the fine polishing.
[0034]
Further, when the polishing composition according to the present embodiment is used for polishing a gallium nitride compound semiconductor, the polishing load is 50 to 900 gf / cm. 2 And it is preferable that the moving speed in the outer periphery of the grinding | polishing surface of the said polishing tool is 25-250 m / min. The temperature when supplied to the polishing surface of the polishing composition is preferably in the range of 10 ° C to 80 ° C.
[0035]
The surface roughness of the surface of the object to be polished after being polished in this way has an arithmetic average roughness (Ra) of 20 angstroms or less and a thickness variation (TTV) of the surface to be polished of 20 μm or less. For this reason, the RIE process can be eliminated, and the precision finishing can be performed only by the wet polishing process.
[0036]
After passing through a polishing step with a polishing composition in which hard abrasive grains and soft abrasive grains are dispersed in water, a polishing composition containing only soft abrasive grains without including the hard abrasive grains used in the above-mentioned polishing composition It may be used for finish polishing. In this case, only the polishing composition composed only of soft abrasive grains, potassium hydroxide, sodium hydroxide, phosphoric acid and pure water used in the above-described polishing composition is used as an abrasive, and finish polishing is performed. Also good. By doing so, polishing with higher planar accuracy can be performed.
[0037]
The composition for a semiconductor substrate according to the present invention is mainly used for polishing a gallium nitride-based compound semiconductor substrate, but is not limited thereto, and is not limited to the hardness of a gallium nitride-based compound semiconductor substrate. Suitable for polishing.
[0038]
【Example】
The present inventor prepared a polishing composition for a semiconductor substrate according to the present invention, and conducted a polishing experiment using the prepared polishing composition. Below, the polishing composition and experiment are demonstrated.
[0039]
In the experiment, a commercially available polishing machine was used, and the polishing pressure was 600 g / cm. 2 Polishing time 60 to 80 minutes, surface plate rotation speed 60 to 80 rpm (surface plate peripheral speed 20 to 30 m / min), polishing slurry flow rate 20 to 30 ml / min for polishing, used for precision finishing A suede-like resin polishing pad was used. The object to be polished is a gallium nitride compound semiconductor substrate (wafer). As the composition of the polishing composition, hard abrasive grains are diamond abrasive grains (using average particle diameters of 100 nm and 500 nm, respectively), soft abrasive grains are colloidal silica (using average particle diameter of 70 nm), and pure water (ratio) is used as a dispersion medium. Resistance 1 MΩ · cm or more), potassium hydroxide as a polishing accelerator, and hydrogen peroxide as a bactericide. Further, the colloidal silica concentration in the polishing composition is 0.9% by weight and 2,7% by weight, and the diamond concentration in the polishing composition is 0.3% by weight, 0.9% by weight. Further, the substrate was polished under the same conditions with respect to the polishing compositions prepared by setting two kinds of average particle diameters of 100 nm and 500 nm and setting eight kinds of combinations of the respective kinds. The result is shown in FIG. In FIG. 2, the vertical axis indicates the polishing rate (unit: μm / hr), and the horizontal axis indicates the colloidal silica concentration (% by weight), diamond concentration (% by weight), and diamond particle size (nm) of each polishing composition. The polishing composition corresponding to a combination is shown. Thus, when the diamond particle size is 100 nm and the diamond concentration is 0.3% by weight, the polishing rate is low regardless of the silica concentration, and in other cases, the polishing rate is higher than 0.6 μm / hr. Yes. From this experimental result, the analysis of variance table shown in Table 1 was obtained.
[0040]
[Table 1]
Figure 0004322035
Table 1 shows the result of multi-way analysis of variance using the statistical analysis software JUSE-GCVS V7.0 with the obtained polishing rate at three factors and two levels. Analysis of variance is a method for statistically clarifying which factor affects the characteristic value (polishing rate). The diamond particle size is represented as factor A, the diamond concentration is represented as factor B, and the silica concentration is represented as factor C. On the left side, the sum of squares, degrees of freedom, unbiased dispersion, and dispersion ratio (F0) calculated from the characteristic value (polishing rate) are referred to. Statistical values are shown. The variance ratio is a value obtained by dividing the unbiased variance of each factor by the unbiased variance of the error. By comparing the obtained dispersion ratio with the F distribution table, it is examined to what extent these factors affect the characteristic value. The factor AB represents the interaction between the diamond particle size and the diamond concentration factor (BC and AC represent the interaction of these factors as well). In addition, since the silica concentration as a single effect did not affect the polishing rate as a single effect, it was treated as an error term by a statistical method (pooling).
[0041]
As a result of analysis of variance, the diamond particle size and diamond concentration are 99% reliable (risk rate 1%), and the interaction between them and the interaction between diamond particle size and silica concentration is 95% reliable (risk rate 5%). ). In this case, the risk rate of 5% means that the probability that the factor does not affect the characteristic value in the 100 polishing tests is a ratio of 5 times or less. Statistically, if the probability is 5% or less, it is not a coincidence.
[0042]
Therefore, it can be seen that the diamond particle size of the hard abrasive grains is the most contributive to the polishing rate, followed by the diamond concentration.
[0043]
Next, the relationship between the diamond particle size and the polishing rate based on the above experimental results is shown in the graph of FIG. In FIG. 3, the vertical axis represents the polishing rate, and the horizontal axis represents the average particle diameter of diamond. Referring to FIG. 3, it is shown that the polishing rate increases as the diamond particle diameter increases.
[0044]
Next, the present inventor sets the colloidal silica concentration in the polishing composition to 2.7% by weight, and the diamond concentration with an average particle diameter of 500 nm (the unit is weight%) is 0.1, 0.3,. Five samples of 5, 0.9, and 1.2 were prepared, and each sample was polished under the same conditions as described above. The result is shown in FIG. In FIG. 4, the vertical axis represents the polishing rate and the horizontal axis represents the respective diamond concentration. As a result, with respect to the sample having a diamond concentration of 1.2% by weight, scratches or latent scratches exceeding a predetermined level were observed on the surface to be polished of the gallium nitride compound semiconductor substrate as the object to be polished. For the other four samples, scratches and latent scratches exceeding a predetermined level were not observed. As a result, it is recognized that the diamond concentration and the polishing rate are mutually related. That is, the diamond concentration in the polishing composition is preferably as thin as possible so as not to cause latent scratches on the object to be polished, but the polishing rate is significantly reduced for polishing compositions thinner than 0.2% by weight. This shows that it is not suitable as a polishing composition for performing efficient polishing. Moreover, since the occurrence of latent scratches is observed at a diamond concentration of 1.2% by weight, it is not suitable for precision polishing even if the polishing rate is high. Therefore, in this case, polishing with a diamond concentration of 0.3 wt% to 0.9 wt% is desirable in that the polishing rate is high in precision polishing and polishing without causing latent scratches on the surface to be polished can be performed. More desirably, the diamond concentration is in the range of 0.3 wt% to 0.5 wt%.
[0045]
Next, the inventors set the diamond abrasive grains in the polishing composition to an average particle size of 500 nm and a concentration of 0.9% by weight, and a colloidal silica concentration (unit weight%) of 0.9, 2.7, respectively. Three samples of 9.0 were prepared, and each sample was polished under the same conditions as described above. The result is shown in FIG. In FIG. 5, the vertical axis represents the polishing rate, and the horizontal axis represents the respective colloidal silica concentration. As a result, it is desirable that the amount of colloidal silica, which is a soft abrasive, is large, but if the concentration exceeds 10.0% by weight, the polishing rate is greatly reduced. When the colloidal silica concentration is 0.9% by weight, the occurrence of latent scratches is observed, so that it is not suitable for precision polishing even if the polishing rate is high. Therefore, in this case, polishing with a colloidal silica concentration of 2.7 wt% to 10.0 wt% is desirable in that the polishing rate is high in precision polishing and polishing without causing latent scratches on the surface to be polished can be performed. More desirably, the colloidal silica concentration is in the range of 8.0 wt% to 10.0 wt%.
[0046]
FIG. 6 shows a fluorescence micrograph of a gallium nitride compound semiconductor substrate polished with the polishing composition of the present invention (polishing rate of about 1 μm / hr) (200 × magnification). It can be seen from this photograph that polishing without latent scratches or scratches was made.
[0047]
FIG. 7 shows a fluorescence micrograph of a gallium nitride compound semiconductor substrate polished (polishing rate of approximately 1 μm / hr) using a polishing composition with a small colloidal silica concentration (0.9 wt%) (magnification 200 times). . In this photo, it can be seen that there is a latent scar that draws a streak.
[0048]
【The invention's effect】
As described above, according to the present invention, since the composite abrasive grains include soft abrasive grains in addition to the hard abrasive grains, strong contact of the hard abrasive grains with the surface to be polished is soft. It will be relaxed by the abrasive. In other words, the soft abrasive grains prevent the hard abrasive grains from aggregating with each other, and even the hard abrasive grains, which are considered to cause scratches and latent scratches on the surface to be polished, are observed. Aggregation is suppressed. This allows the soft abrasive grains to act so that hard abrasive grains do not strongly bite on the surface to be polished, so that scratches and latent scratches do not occur on the surface to be polished. Obtainable. In addition, since desired high-speed polishing can be performed without causing scratches or latent scratches, efficient polishing can be performed.
[Brief description of the drawings]
FIG. 1 is a side view schematically showing a state of polishing using a polishing composition according to an embodiment of the present invention.
FIG. 2 is a graph showing polishing rates of a plurality of types of polishing composition samples having different soft abrasive concentration, hard abrasive concentration, and hard abrasive particle size as examples of the present invention.
FIG. 3 is a graph showing the relationship between hard abrasive grain size and polishing rate as an example of the present invention.
FIG. 4 is a graph showing the relationship between hard abrasive concentration and polishing rate as an example of the present invention.
FIG. 5 is a graph showing the relationship between the soft abrasive grain concentration and the polishing rate as an example of the present invention.
FIG. 6 is a fluorescence micrograph of a gallium nitride compound semiconductor substrate after polishing with the polishing composition according to the present invention.
FIG. 7 is a fluorescence micrograph of a gallium nitride compound semiconductor substrate after polishing with a polishing composition of a comparative example.
[Explanation of symbols]
6 Polishing composition (polishing slurry)

Claims (17)

ビッカース硬度が400〜1000kg/mmである軟質砥粒と、ビッカース硬度が1300〜6000kg/mmである硬質砥粒とが、分散媒としての水に分散され、
前記硬質砥粒の平均粒子径が100〜600nmであり、前記軟質砥粒の平均粒子径が、前記硬質砥粒の平均粒子径の2/3以下1/20以上の範囲にあり、
前記軟質砥粒と前記硬質砥粒の重量比が、硬質砥粒1に対して、少なくとも軟質砥粒2.5以上25以下の範囲にある、ことを特徴とする半導体基板用研磨組成物。
And soft abrasive grains Vickers hardness of 400~1000kg / mm 2, the Vickers hardness and the hard abrasive grains are 1300~6000kg / mm 2, are dispersed in water as a dispersion medium,
The average particle diameter of the hard abrasive grains is 100 to 600 nm, the average particle diameter of the soft abrasive grains is in the range of 2/3 or less and 1/20 or more of the average particle diameter of the hard abrasive grains,
A polishing composition for a semiconductor substrate, wherein the weight ratio of the soft abrasive grains to the hard abrasive grains is in the range of at least soft abrasive grains 2.5 to 25 with respect to the hard abrasive grains 1.
請求項1に記載の半導体基板用研磨組成物において、
前記水は比抵抗が1MΩ・cm以上である、ことを特徴とする半導体基板用研磨組成物。
In the polishing composition for a semiconductor substrate according to claim 1,
A polishing composition for a semiconductor substrate, wherein the water has a specific resistance of 1 MΩ · cm or more.
請求項1または2のいずれかに記載の半導体基板用研磨組成物において、
研磨促進剤および殺菌剤が含まれている、ことを特徴とする半導体基板用研磨組成物。
In the polishing composition for semiconductor substrates in any one of Claim 1 or 2,
A polishing composition for a semiconductor substrate, comprising a polishing accelerator and a bactericidal agent.
請求項1ないし3のいずれかに記載の半導体基板用研磨組成物において、
前記硬質砥粒は、ダイヤモンドまたはアルファアルミナからなる、ことを特徴とする半導体基板用研磨組成物。
In the polishing composition for semiconductor substrates in any one of Claims 1 thru | or 3,
The polishing composition for a semiconductor substrate, wherein the hard abrasive is made of diamond or alpha alumina.
請求項1ないし4のいずれかに記載の半導体基板用研磨組成物において、
前記軟質砥粒は、コロイダルシリカ、ヒュームドシリカ、コロイダルアルミナ、ヒュームドアルミナ、ベータアルミナ、ヒュームドチタニアのうちの少なくともいずれか一つである、ことを特徴とする半導体基板用研磨組成物。
In the polishing composition for semiconductor substrates in any one of Claims 1 thru | or 4,
The polishing composition for a semiconductor substrate, wherein the soft abrasive is at least one of colloidal silica, fumed silica, colloidal alumina, fumed alumina, beta alumina, and fumed titania.
請求項3に記載の半導体基板用研磨組成物において、
前記殺菌剤は、過酸化水素、アンモニア、有機アミンのうちのいずれか一つである、ことを特徴とする半導体基板用研磨組成物。
In the polishing composition for a semiconductor substrate according to claim 3,
The semiconductor composition polishing composition, wherein the bactericidal agent is any one of hydrogen peroxide, ammonia, and organic amine.
請求項6に記載の半導体基板用研磨組成物において、
前記有機アミンは、ピペラジン、アミノエチルエタノール、エチレンジアミン、ジエチレントリアミンのうちのいずれか一つである、ことを特徴とする半導体基板用研磨組成物。
In the polishing composition for a semiconductor substrate according to claim 6,
The polishing composition for a semiconductor substrate, wherein the organic amine is any one of piperazine, aminoethylethanol, ethylenediamine, and diethylenetriamine.
請求項3に記載の半導体基板用研磨組成物において、
前記研磨促進剤は、水酸化ナトリウム、水酸化カリウム、一塩基酸、二塩基酸、および、リン酸のうちの少なくともいずれか一つを含むものである、ことを特徴とする半導体基板用研磨組成物。
In the polishing composition for a semiconductor substrate according to claim 3,
The polishing composition for a semiconductor substrate, wherein the polishing accelerator contains at least one of sodium hydroxide, potassium hydroxide, monobasic acid, dibasic acid, and phosphoric acid.
請求項3に記載の半導体基板用研磨組成物において、
前記硬質砥粒としてダイヤモンド0.2〜2.0重量%、前記軟質砥粒0.4〜20.0重量%、前記研磨促進剤0.1〜5.0重量%、前記殺菌剤0.02〜2重量%および残部が水からなる、ことを特徴とする半導体基板用研磨組成物。
In the polishing composition for a semiconductor substrate according to claim 3,
The hard abrasive grains are 0.2 to 2.0% by weight of diamond, 0.4 to 20.0% by weight of the soft abrasive grains, 0.1 to 5.0% by weight of the polishing accelerator, and 0.02 of the bactericide. A polishing composition for a semiconductor substrate, characterized in that ˜2% by weight and the balance consists of water.
請求項1ないし9のいずれかに記載の半導体基板用研磨組成物を用いて窒化ガリウム系化合物半導体基板を研磨する、ことを特徴とする半導体基板研磨方法。  A method for polishing a semiconductor substrate, comprising polishing a gallium nitride compound semiconductor substrate using the polishing composition for a semiconductor substrate according to claim 1. 請求項10に記載の半導体基板研磨方法において、
被研磨物の被研磨面に対して対向する研磨面を備えるとともに、その対向する方向に沿った軸心周りで回転される研磨具の前記被研磨物に対する研磨荷重が50〜900gf/cm2で、前記研磨具の研磨面の外周における移動速度が25〜250m/minである、ことを特徴とする半導体基板研磨方法。
The semiconductor substrate polishing method according to claim 10,
A polishing load for the object to be polished is 50 to 900 gf / cm 2 provided with a polishing surface opposed to the surface to be polished of the object to be polished and rotated around an axis along the facing direction. A method for polishing a semiconductor substrate, wherein the moving speed of the polishing tool on the outer periphery of the polishing surface is 25 to 250 m / min.
請求項10または11に記載の半導体基板研磨方法において、
前記半導体基板用研磨組成物は、研磨時に10℃以上80℃以下の温度範囲で用いられる、ことを特徴とする半導体基板研磨方法。
The semiconductor substrate polishing method according to claim 10 or 11,
The semiconductor substrate polishing method, wherein the polishing composition for a semiconductor substrate is used in a temperature range of 10 ° C. to 80 ° C. during polishing.
請求項10ないし12のいずれかに記載の半導体基板研磨方法において、
研磨用の定盤に研磨パッドを貼り付けた状態で、前記半導体基板用研磨組成物を用いて半導体基板を研磨する、ことを特徴とする半導体基板研磨方法。
The method for polishing a semiconductor substrate according to any one of claims 10 to 12,
A semiconductor substrate polishing method, comprising polishing a semiconductor substrate using the polishing composition for a semiconductor substrate in a state where a polishing pad is attached to a polishing surface plate.
請求項10ないし13のいずれかに記載の半導体基板研磨方法において、
前記半導体基板用研磨組成物を用いて前記被研磨物を研磨する工程の後、前記硬質粒子が含まれていない研磨組成物を用いて仕上げ研磨する、ことを特徴とする半導体基板研磨方法。
In the semiconductor substrate polishing method according to any one of claims 10 to 13,
A method for polishing a semiconductor substrate, comprising: polishing the object to be polished using the polishing composition for a semiconductor substrate, and then performing final polishing using a polishing composition containing no hard particles.
請求項13または14のいずれかに記載の半導体基板研磨方法において、
被研磨物を研磨するとき、前記研磨パッドの圧縮率は、1.0〜20vol%である、ことを特徴とする半導体基板研磨方法。
In the semiconductor substrate grinding | polishing method in any one of Claim 13 or 14,
A method for polishing a semiconductor substrate, comprising: a polishing pad having a compressibility of 1.0 to 20 vol% when polishing an object to be polished.
請求項14に記載の半導体基板研磨方法において、
前記仕上げ研磨は、前記軟質砥粒、水酸化カリウム、水酸化ナトリウム、リン酸および純水のみにより構成される研磨組成物のみが研磨剤として用いられる、ことを特徴とする半導体基板研磨方法。
The semiconductor substrate polishing method according to claim 14,
The method for polishing a semiconductor substrate is characterized in that in the final polishing, only a polishing composition comprising only the soft abrasive grains, potassium hydroxide, sodium hydroxide, phosphoric acid and pure water is used as an abrasive.
請求項10ないし16のいずれかに記載の半導体基板研磨方法において、
前記研磨された後の被研磨物の被研磨面の表面粗さが算術平均粗さ(Ra)で20オングストローム以下で、かつ前記被研磨面の厚さばらつき(TTV)が20μm以下である、ことを特徴とする半導体基板研磨方法。
The method for polishing a semiconductor substrate according to claim 10,
The surface roughness of the polished surface of the polished object after polishing is 20 angstroms or less in arithmetic average roughness (Ra), and the thickness variation (TTV) of the polished surface is 20 μm or less . A method for polishing a semiconductor substrate.
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