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JP4319514B2 - Plasma processing apparatus having high frequency power supply with sag compensation function - Google Patents

Plasma processing apparatus having high frequency power supply with sag compensation function Download PDF

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JP4319514B2
JP4319514B2 JP2003357828A JP2003357828A JP4319514B2 JP 4319514 B2 JP4319514 B2 JP 4319514B2 JP 2003357828 A JP2003357828 A JP 2003357828A JP 2003357828 A JP2003357828 A JP 2003357828A JP 4319514 B2 JP4319514 B2 JP 4319514B2
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power supply
frequency
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processing apparatus
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JP2004193564A (en
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尚輝 安井
成一 渡辺
誠浩 角屋
仁 田村
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Hitachi High Tech Corp
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Description

本発明はプラズマ処理装置に係り、特に半導体素子基板等の試料を、プラズマを用いかつ試料に高周波電圧を印加して、エッチング処理を施すのに好適なプラズマ処理装置に関するものである。   The present invention relates to a plasma processing apparatus, and more particularly to a plasma processing apparatus suitable for performing an etching process on a sample such as a semiconductor element substrate by using plasma and applying a high frequency voltage to the sample.

従来のエッチング用プラズマ処理装置は、例えば下記特許文献1に記載のように、被処理材であるウェハを載置する電極には正弦波形の高周波電圧が印加されていた。この場合、ウェハに入射するイオンのエネルギー分布は、図12に示すように、高エネルギー側と低エネルギー側に2つのピ−クを有するサドルピーク形状となる。高エネルギーピークのイオンはエッチングに寄与するが、低エネルギーピークのイオンはエッチングにほとんど寄与しない。正弦波形の高周波電圧を印加した場合、高エネルギー側と低エネルギー側のイオン量の比は、ほぼ1:1である。高周波電圧を変化させても、この高/低エネルギーイオン比率はほとんど変化せず、エッチング効率が良くないという問題があった。
特開平5−174995号公報
In a conventional plasma processing apparatus for etching, for example, as described in Patent Document 1 below, a sinusoidal high-frequency voltage is applied to an electrode on which a wafer that is a material to be processed is placed. In this case, as shown in FIG. 12, the energy distribution of ions incident on the wafer has a saddle peak shape having two peaks on the high energy side and the low energy side. High energy peak ions contribute to etching, but low energy peak ions contribute little to etching. When a sinusoidal high frequency voltage is applied, the ratio of the amount of ions on the high energy side and the low energy side is approximately 1: 1. Even if the high frequency voltage is changed, the high / low energy ion ratio hardly changes, and there is a problem that the etching efficiency is not good.
JP-A-5-174959

本発明の目的は、高速で高精度のエッチング処理に好適なプラズマ処理装置に提供することにある。   An object of the present invention is to provide a plasma processing apparatus suitable for high-speed and high-precision etching processing.

上記目的を達成するために、被処理材に発生する高周波電圧波形が矩形となる高周波印加手段を有するようにしたものである。矩形波を発振する高周波電源を、矩形高周波電圧の正側あるいは負側の少なくともいずれか一方の電圧の絶対値を、時間とともに変化させる高周波電圧波形制御回路(サグ補償回路)を介して、被処理材を載置する電極に接続した。被処理材に矩形波が印加されるように高周波電圧波形制御回路(サグ補償回路)は、モニター量に対して自動制御される。これにより被処理材には矩形高周波電圧が印加される。被処理材であるウェハに入射するイオンは、ウェハ上に形成されるイオンシース中の電解により加速される。このイオンシース中の電界は、イオンシース上のプラズマ電位とウェハ電位との電位差とイオンシースの厚さに関係している。ウェハに矩形高周波電圧を印加した場合、正電圧を印加した期間に低エネルギーイオンがウェハに入射され、負電圧を印加した期間に高エネルギーイオンがウェハに入射される。したがって、矩形高周波電圧のデューティ比を変化させることにより、ウェハに入射する高エネルギーイオンと低エネルギーイオンの比率を変化させることができる。これにより高速で高精度のエッチング処理を行うことが可能である。 In order to achieve the above object, a high-frequency applying means is used in which a high-frequency voltage waveform generated in a material to be processed is rectangular. A high-frequency power source that oscillates a rectangular wave is processed via a high-frequency voltage waveform control circuit (sag compensation circuit) that changes the absolute value of at least one of the positive and negative voltages of the rectangular high-frequency voltage over time. It connected to the electrode which mounts material. The high-frequency voltage waveform control circuit (sag compensation circuit) is automatically controlled with respect to the monitored amount so that a rectangular wave is applied to the material to be processed. Thereby, a rectangular high frequency voltage is applied to the material to be processed. Ions incident on the wafer, which is the material to be processed, are accelerated by electrolysis in an ion sheath formed on the wafer. Electric field in the ion sheath is related to the thickness of the potential difference and the ion sheath between the plasma potential and wafer potential on the ion sheath. When a rectangular high-frequency voltage is applied to the wafer, low energy ions are incident on the wafer during a period in which a positive voltage is applied, and high energy ions are incident on the wafer in a period in which a negative voltage is applied. Therefore, by changing the duty ratio of the rectangular high-frequency voltage, the ratio of high energy ions and low energy ions incident on the wafer can be changed. As a result, high-speed and high-precision etching can be performed.

本発明によれば、高周波電圧の絶対値が時間とともに増加し、正電圧と負電圧にスイッチングする電圧波形をウェハ載置用電極9に印加し、その結果ウェハ10に矩形高周波電圧を発生させることにより、高効率で高精度のエッチング加工が可能となり、材料選択比が向上するという効果がある。   According to the present invention, the absolute value of the high frequency voltage increases with time, and a voltage waveform that switches between a positive voltage and a negative voltage is applied to the wafer mounting electrode 9, and as a result, a rectangular high frequency voltage is generated on the wafer 10. Thus, it is possible to perform highly efficient and highly accurate etching, and the material selection ratio is improved.

以下、本発明の第1の実施例を図1〜図12により説明する。   A first embodiment of the present invention will be described below with reference to FIGS.

図1は、本発明のプラズマ処理装置の一実施例である有磁場UHFエッチング装置を示す。容器1a、放電管1b及び石英窓2で区画された処理室1の内部を真空排気装置(図示省略)により減圧した後、ガス供給装置(図示省略)によりエッチングガスを処理室1内に導入し、所望の圧力に調整する。また処理室1は、コイル3とヨーク4により生成される磁場領域内にある。高周波電源5から発振された、この場合450MHzのUHF波は、整合器6を経由して同軸導波管(ケ−ブル)7内を伝播し、アンテナ8から石英窓2を透過して処理室1内に入射される。UHF波は磁場との相互作用により、処理室1内にプラズマを生成する。このUHF波によって生成されたプラズマより、ウェハ載置用電極9に配置されたウェハ10がエッチング処理される。またウェハ10のエッチング形状を制御するため、ウェハ載置用電極9には整合器11、高周波電圧波形制御回路(サグ補償回路)12を介して矩形高周波電源13が接続され、高周波電圧を印加することが可能になっている。ウェハ載置用電極の高周波電圧印加部には、電極電流モニター15が接続され、電極に発生する電流波形を測定できる。また、測定した電極電流は、高周波電圧波形制御回路(サグ補償回路)12の制御用信号として使用している。 FIG. 1 shows a magnetic field UHF etching apparatus which is an embodiment of the plasma processing apparatus of the present invention. After the pressure inside the processing chamber 1 defined by the container 1a, the discharge tube 1b and the quartz window 2 is reduced by a vacuum exhaust device (not shown), an etching gas is introduced into the processing chamber 1 by a gas supply device (not shown). Adjust to the desired pressure. The processing chamber 1 is in a magnetic field region generated by the coil 3 and the yoke 4. In this case, the 450 MHz UHF wave oscillated from the high-frequency power source 5 propagates through the coaxial waveguide 7 through the matching unit 6, passes through the quartz window 2 from the antenna 8, and passes through the processing chamber. 1 is incident. The UHF wave generates plasma in the processing chamber 1 by interaction with the magnetic field. The wafer 10 disposed on the wafer mounting electrode 9 is etched from the plasma generated by the UHF wave. Further, in order to control the etching shape of the wafer 10, a rectangular high frequency power source 13 is connected to the wafer mounting electrode 9 via a matching unit 11 and a high frequency voltage waveform control circuit (sag compensation circuit) 12 to apply a high frequency voltage. It is possible. An electrode current monitor 15 is connected to the high frequency voltage application section of the wafer mounting electrode, and the current waveform generated in the electrode can be measured. The measured electrode current is used as a control signal for the high-frequency voltage waveform control circuit (sag compensation circuit) 12.

ウェハ載置用電極9は、電極表面が溶射膜(図示省略)で被覆されており、直流電源14が接続されている。これによりウェハ10は、溶射膜を介してウェハ載置用電極に静電吸着により固定される。また石英窓2の直下には石英製のシャワープレート2aが設けられており、エッチングガスは石英窓2とシャワープレート2aの間を流れ、シャワープレート2aの中央部に設けられたガス導入口より、処理室1内に導入される。ウェハ10直上よりエッチングガスが供給されるため、高均一のエッチング処理が可能である。また処理室1内部には、汚染防止のため石英カバー12が設けられている。 The wafer mounting electrode 9 has an electrode surface covered with a sprayed film (not shown) and is connected to a DC power source 14. Thereby, the wafer 10 is fixed to the wafer mounting electrode through electrostatic spraying by electrostatic adsorption. Further, a quartz shower plate 2a is provided immediately below the quartz window 2, and an etching gas flows between the quartz window 2 and the shower plate 2a, and from a gas inlet provided in the center of the shower plate 2a, It is introduced into the processing chamber 1. Since etching gas is supplied from directly above the wafer 10, highly uniform etching processing is possible. A quartz cover 12 is provided inside the processing chamber 1 to prevent contamination.

図2に、ウェハ載置用電極9に接続される整合器11、高周波電圧波形制御回路(サグ補償回路)12および直流電源14の回路構成例を示す。整合器11は、インダクタおよびコンデンサで構成されているが、矩形高周波電源13から入力される矩形電圧波形を維持するために、広帯域の周波数特性が必要である。例えば、高周波トランスによってインピーダンスを変換してもよい。高周波電圧波形制御回路(サグ補償回路)12は、ダイオードおよびFET等の半導体素子とコンデンサで構成されている。基本的には、正電圧および負電圧の任意の電圧で入力波形をクリップできる機能を有している。高周波電圧波形制御回路(サグ補償回路)12には、ダイオードD1,D2と直列に可変容量コンデンサVC1,VC2がある。VC1,VC2のコンデンサ容量によりフラットにクリップした波形から、電圧の絶対値が時間ともに増加する波形に変化できる。高周波電圧波形制御回路(サグ補償回路)12は、図2に示す回路に限らず、例えば積分回路や位相制御回路といった、高周波電圧の絶対値が時間とともに増加するように波形整形できる回路であれば良い。また、モニター量に応じてコンデンサ容量を可変できる自動制御回路16が、VC1,VC2に接続されている。図1では、モニター量を電極に設置した電極電流モニター15から得られる電流としたが、例えば、モニター量を、被処理材に発生する電圧、被処理材に流入する電流、ウェハ載置用電極の電圧、処理材に印加する電力、高周波電源の出力電力のうち少なくとも1つとすれば良い。図1、図2では、電極電流波形が矩形波に最も近くなる様にVC1,VC2を制御している。波形整形された高周波電圧は、直流電圧をブロッキングするコンデンサC2を介して、ウェハ載置用電極9に印加される。直流電源14はインダクタL3を介し、ウェハ載置用電極9に接続されている。このインダクタL3は、直流電源14への高周波電圧の流入を防止している。 FIG. 2 shows a circuit configuration example of the matching unit 11, the high-frequency voltage waveform control circuit (sag compensation circuit) 12, and the DC power supply 14 connected to the wafer mounting electrode 9. The matching unit 11 is composed of an inductor and a capacitor. However, in order to maintain a rectangular voltage waveform input from the rectangular high-frequency power source 13, a broadband frequency characteristic is required. For example, the impedance may be converted by a high frequency transformer. The high-frequency voltage waveform control circuit (sag compensation circuit) 12 includes a semiconductor element such as a diode and FET and a capacitor. Basically, it has a function of clipping an input waveform with an arbitrary voltage of positive voltage and negative voltage. The high-frequency voltage waveform control circuit (sag compensation circuit) 12 includes variable capacitors VC1 and VC2 in series with the diodes D1 and D2. The waveform can be changed from a waveform clipped flat by the capacitor capacities of VC1 and VC2 to a waveform in which the absolute value of the voltage increases with time. The high-frequency voltage waveform control circuit (sag compensation circuit) 12 is not limited to the circuit shown in FIG. 2, but may be any circuit that can shape the waveform so that the absolute value of the high-frequency voltage increases with time, such as an integration circuit or a phase control circuit. good. In addition, an automatic control circuit 16 capable of varying the capacitor capacity according to the monitor amount is connected to VC1 and VC2. In FIG. 1, the monitor amount is the current obtained from the electrode current monitor 15 installed on the electrode. For example, the monitor amount is the voltage generated in the material to be processed, the current flowing into the material to be processed, the electrode for placing the wafer. At least one of the voltage, the power applied to the processing material, and the output power of the high frequency power source may be used. In FIGS. 1 and 2 , VC1 and VC2 are controlled so that the electrode current waveform is closest to a rectangular wave. The waveform-shaped high frequency voltage is applied to the wafer mounting electrode 9 via a capacitor C2 that blocks a DC voltage. The DC power source 14 is connected to the wafer mounting electrode 9 via the inductor L3. The inductor L3 prevents the high frequency voltage from flowing into the DC power supply 14.

図3にウェハ載置用電極9に印加される高周波電圧波形を、図4にウェハ10での高周波電圧波形を示す。この場合、高周波電圧の周波数は400kHzである。また図5に、矩形高周波電圧のデューティ比を変化させた場合におけるウェハ上に入射するイオンのエネルギー分布を示す。ここでデューティ比は、図4に示すように、高周波電圧波形における正電圧の印加時間T/周期Tとした。デューティ比50%の場合は、図9に示す正弦波高周波電圧を印加した場合と同じように、高エネルギー側と低エネルギー側のイオン量の比は、ほぼ1:1であるが、ディーティ比を減少させると高エネルギー側のイオン量の比率が増加し、逆にディーティ比を増加させると低エネルギー側のイオン量の比率が増加する。イオンのエネルギーが増加するほど、エッチングの反応効率(化学スパッタ率)が増加するため、高エネルギー側のイオン量が増加するほどエッチレートが増加する。また言い換えるとイオンエネルギー分布が単色化されるため、エッチング形状が垂直で高精度の加工ができる。例えばゲートエッチングにおける垂直、高精度加工である。更に被エッチング材料により、イオンエネルギーと化学スパッタ率との関係が異なるため、最適なイオンエネルギーを選択することにより、複数の被エッチング材のエッチング選択比を向上させることができる。例えば、低誘電率(Low−k)絶縁膜エッチングにおけるハードマスク選択比向上やゲートエッチングにおける下地の極薄酸化膜との選択比向上である。低誘電率(Low−k)絶縁膜エッチングにおいては、高周波電源の周波数は800kHzとした。 FIG. 3 shows a high-frequency voltage waveform applied to the wafer mounting electrode 9, and FIG. 4 shows a high-frequency voltage waveform on the wafer 10. In this case, the frequency of the high frequency voltage is 400 kHz. FIG. 5 shows the energy distribution of ions incident on the wafer when the duty ratio of the rectangular high-frequency voltage is changed. Here, as shown in FIG. 4, the duty ratio is set to positive voltage application time T 1 / cycle T in the high-frequency voltage waveform. If the duty ratio of 50%, as in the case of applying a sine-wave high-frequency voltage shown in FIG. 9, the amount of ions the ratio of the high energy side and the low energy side is approximately 1: 1, the duty ratio When the ratio is decreased, the ratio of the amount of ions on the high energy side increases. Conversely, when the duty ratio is increased, the ratio of the amount of ions on the low energy side increases. As the ion energy increases, the etching reaction efficiency (chemical sputtering rate) increases. Therefore, the etch rate increases as the amount of ions on the high energy side increases. In other words, since the ion energy distribution is monochromatic, the etching shape is vertical and high-precision processing can be performed. For example, vertical and high-precision processing in gate etching. Furthermore, since the relationship between the ion energy and the chemical sputtering rate differs depending on the material to be etched, the etching selectivity of a plurality of materials to be etched can be improved by selecting the optimum ion energy . For example, the improvement of the hard mask selection ratio in low dielectric constant (Low-k) insulating film etching and the improvement of the selection ratio with the underlying ultrathin oxide film in gate etching. In the low dielectric constant (Low-k) insulating film etching, the frequency of the high frequency power source was set to 800 kHz.

図6に示すような矩形高周波電圧をウェハ載置用電極9に印加した場合、ウェハ10での高周波電圧は図7に示すような波形となる。つまり高周波電圧の絶対値が時間とともに減少する(以下サグと呼ぶ)。ここでサグを図8に示すように定義する。矩形波電圧波形の振幅をV(V)、サグ量をV(V)とし、サグ量比率(%)を次式で定義する。

Figure 0004319514
When a rectangular high frequency voltage as shown in FIG. 6 is applied to the wafer mounting electrode 9, the high frequency voltage at the wafer 10 has a waveform as shown in FIG. That is, the absolute value of the high-frequency voltage decreases with time (hereinafter referred to as sag). Here, the sag is defined as shown in FIG. The amplitude of the rectangular wave voltage waveform is V 0 (V), the sag amount is V S (V), and the sag amount ratio (%) is defined by the following equation.
Figure 0004319514

図9にサグ量比率のUHF出力依存性を示す。UHF出力を増加しプラズマ密度が増加するとサグ量比率が大きくなる。また図10にサグ量比率の静電チャック用溶射膜等で形成されるコンデンサ容量依存性を示す。コンデンサ容量を増加させるとサグ量比率が小さくなる。以上よりサグが発生する原因は、ウェハ載置用電極9の表面に設けられた静電チャック用溶射膜等のコンデンサ容量と生成されるプラズマのプラズマ抵抗により、実効的な微分回路を構成するためといえる。微分回路におけるサグVsは、抵抗RとコンデンサCにより一般的に

Figure 0004319514
で与えられる。プラズマ抵抗を一定とした場合のサグ量比率のコンデンサ容量依存性の計算結果を図10に示しておく。ウェハ10での高周波電圧は図7に示すようなサグ量比率の高い波形の場合、エネルギー分布は、高エネルギーピ−ク、低エネルギーピ−クにおけるエネルギー幅が増加し、ピークでのイオン量が減少したブロードな分布となる。このため、エッチングレート、加工精度および材料選択比が減少する。このような高周波電圧の絶対値が時間とともに減少する、いわゆるサグを補償するために、高周波電圧波形制御回路(サグ補償回路)12により高周波電圧の絶対値が時間とともに増加するように波形整形し、ウェハ載置用電極9に高周波電圧を印加することが必要である。また、エッチング処理の条件によってプラズマ抵抗は異なるため、サグ量も異なる。エッチング処理の条件によらず、ウェハ10に図4のような矩形高周波電圧を発生させるため、高周波電圧波形制御回路(サグ補償回路)12を自動制御しなければならない。本方式では、ウェハに発生するサグ量と相関のあるパラメータをモニター量とし、高周波電圧波形制御回路(サグ補償回路)12を自動制御している。また、モニター量を演算処理した値を用いて高周波電圧波形制御回路(サグ補償回路)12を自動制御しても良い。 FIG. 9 shows the UHF output dependency of the sag amount ratio. When the UHF output is increased and the plasma density is increased, the sag amount ratio is increased. Further, FIG. 10 shows the capacitance dependency of the sag amount ratio formed by a sprayed film for electrostatic chuck or the like. Increasing the capacitor capacity decreases the sag amount ratio. As described above, the cause of the sag is that an effective differentiating circuit is constituted by the capacitor capacity of the sprayed film for the electrostatic chuck provided on the surface of the wafer mounting electrode 9 and the plasma resistance of the generated plasma. It can be said. The sag Vs in the differentiation circuit is generally determined by a resistor R and a capacitor C.
Figure 0004319514
Given in. FIG. 10 shows the calculation result of the capacitor capacity dependency of the sag amount ratio when the plasma resistance is constant. When the high-frequency voltage on the wafer 10 has a waveform with a high sag amount ratio as shown in FIG. 7, the energy distribution increases the energy width at the high energy peak and the low energy peak , and the ion amount at the peak increases. Reduced broad distribution. For this reason, an etching rate , processing accuracy, and a material selection ratio decrease. In order to compensate for the so-called sag in which the absolute value of the high-frequency voltage decreases with time, the high-frequency voltage waveform control circuit (sag compensation circuit) 12 shapes the waveform so that the absolute value of the high-frequency voltage increases with time, It is necessary to apply a high frequency voltage to the wafer mounting electrode 9. Further, since the plasma resistance varies depending on the etching process conditions, the sag amount also varies. In order to generate a rectangular high frequency voltage as shown in FIG. 4 on the wafer 10 regardless of the conditions of the etching process, the high frequency voltage waveform control circuit (sag compensation circuit) 12 must be automatically controlled. In this method, a parameter having a correlation with the sag amount generated on the wafer is used as a monitor amount, and the high-frequency voltage waveform control circuit (sag compensation circuit) 12 is automatically controlled. Further, the high-frequency voltage waveform control circuit (sag compensation circuit) 12 may be automatically controlled using a value obtained by calculating the monitor amount.

以上のように、高周波電圧の絶対値が時間とともに増加し、正電圧と負電圧にスイッチングする電圧波形をウェハ載置用電極9に印加し、その結果ウェハ10に矩形高周波電圧を発生させることにより、高効率で高精度のエッチング加工が可能となり、材料選択比が向上するという効果がある。   As described above, the absolute value of the high-frequency voltage increases with time, and a voltage waveform that switches between a positive voltage and a negative voltage is applied to the wafer mounting electrode 9, thereby generating a rectangular high-frequency voltage on the wafer 10. High-efficiency and high-precision etching is possible, and the material selection ratio is improved.

図11に、矩形波のデューティ比T/Tを50%以上に増加させた場合のウェハ10での電圧波形を示す。デューティ比が増加するほど、高周波電圧の直流電圧成分の絶対値Vdcが増加する。つまり正電圧が減少する。一般にプラズマ電位は正電圧となり、ウェハ10が正電圧の時のプラズマ電位は、ウェハ10電位+約20Vであり、負電圧の時のプラズマ電位は約20Vである。処理室1は接地されているので、処理室1内面の実効的なアース部近傍にはイオンシースが形成され、イオンシースにはプラズマ電位に相当する高周波電圧が印加される。このイオンシースの電界により加速されたイオンが処理室内壁面をスパッタするために、ウェハ10が金属汚染され、最終的にはデバイスの電気特性が劣化するという問題を生じる。また一般に、高周波電圧が印加されるウェハ10面積/実効的ア−ス面積の比が小さいほど、高周波電圧の印加効率の指標となるVdc/Vpp比(ここでVppは図4に示すように、高周波電圧のピーク・トウ・ピーク電圧)は大きい。ウェハ10の直径がφ200mmからφ300mmと大口径化されることにより、ウェハ10面積/実効的ア−ス面積の比が大きくなり、プラズマ電位が増加するため、金属汚染対策が重要となった。本実施例の場合、デューティ比が増加するほどプラズマ電位を減少できるので、金属汚染を抑制できるという効果がある。 FIG. 11 shows a voltage waveform on the wafer 10 when the duty ratio T 1 / T of the rectangular wave is increased to 50% or more. As the duty ratio increases, the absolute value Vdc of the DC voltage component of the high-frequency voltage increases. That is, the positive voltage decreases. In general, the plasma potential is a positive voltage. The plasma potential when the wafer 10 is positive is about wafer potential + about 20V, and the plasma potential when the wafer 10 is negative is about 20V. Since the processing chamber 1 is grounded, an ion sheath is formed in the vicinity of an effective ground portion on the inner surface of the processing chamber 1, and a high-frequency voltage corresponding to a plasma potential is applied to the ion sheath. Since ions accelerated by the electric field of the ion sheath sputter the wall surface of the processing chamber, the wafer 10 is contaminated with metal, which ultimately causes a problem that the electrical characteristics of the device deteriorate. In general, the smaller the ratio of the wafer 10 area to which the high frequency voltage is applied / the effective earth area is, the Vdc / Vpp ratio (where Vpp is as shown in FIG. The high-frequency voltage peak-to-peak voltage is large. By increasing the diameter of the wafer 10 from φ200 mm to φ300 mm, the ratio of the wafer 10 area / effective earth area is increased and the plasma potential is increased, so that metal contamination countermeasures have become important. In the case of the present embodiment, the plasma potential can be reduced as the duty ratio increases, so that there is an effect that metal contamination can be suppressed.

また上記各実施例では、ウェハ10に高周波電圧を印加する場合について述べたが、処理室内部に高周波電圧を印加する場合ならば、特に制限はない。例えば絶縁膜エッチング装置の場合には、ウェハ10に対向する位置にシリコンプレートを設置し、高周波電圧を印加することにより、フロン系ガスにより生成されたプラズマ中の過剰のフッ素ラジカルを除去し、マスク選択比を向上させる。このような装置の場合には、シリコンプレートの電圧が矩形の高周波電圧波形となるようにしても同様の作用効果がある。またウェハ10とシリコンプレートともに電圧が矩形の高周波電圧波形となるようにしても同様の効果があるし、両者の高周波電圧の周波数を同じとし、両者の電圧の位相差を制御する(特に位相差を180度付近とする)ことにより、より大きな効果(特にプラズマ電位の抑制効果)が得られる。特に絶縁膜エッチング装置の場合は、高出力の高周波電圧をウェハ10に印加するので、プラズマ電位が大きくなり、処理室1側壁がスパッタされ、また処理室1下部へのプラズマ拡散するため、異物の発生等が問題となる。本実施例の場合、プラズマ電位を抑制することができるので、異物低減に効果があり、装置稼働率の向上やデバイスの歩留まりを向上させることができるという効果がある。 In each of the above embodiments, the case where a high frequency voltage is applied to the wafer 10 has been described. However, there is no particular limitation as long as the high frequency voltage is applied to the inside of the processing chamber. For example, in the case of an insulating film etching apparatus, a silicon plate is installed at a position facing the wafer 10 and a high frequency voltage is applied to remove excess fluorine radicals in the plasma generated by the chlorofluorocarbon-based gas. Improve selectivity. In the case of such an apparatus, even if the voltage of the silicon plate has a rectangular high-frequency voltage waveform, the same effect is obtained. Further, even if the voltage is set to a rectangular high-frequency voltage waveform on both the wafer 10 and the silicon plate , the same effect can be obtained, and the frequency of both high-frequency voltages is made the same, and the phase difference between the two voltages is controlled (particularly the phase difference) By setting the angle to around 180 degrees, a greater effect (especially a plasma potential suppressing effect) can be obtained. In particular, in the case of an insulating film etching apparatus, since a high-output high-frequency voltage is applied to the wafer 10, the plasma potential increases, the side wall of the processing chamber 1 is sputtered, and the plasma diffuses to the lower portion of the processing chamber 1. Occurrence is a problem. In the case of the present embodiment, since the plasma potential can be suppressed, there is an effect in reducing foreign matter, and there is an effect in that the apparatus operating rate can be improved and the device yield can be improved.

また以上の実施例では整合器11を用いたが、プラズマ負荷との整合がある程度とれるならば、簡略化のため、整合器11を高周波トランスとする、または整合器11を除外しても良い。また簡略化のために、任意信号発生器と高周波パワーアンプにより、図3に示すような高周波電圧の絶対値が時間とともに増加する電圧波形をウェハ載置用電極9に印加しても同様の作用効果が得られる。上記実施例では、理想的な場合として矩形波を用いて説明したが、台形波や周波数特性のために多少の波形が乱れた類似の波形を用いてもほぼ同様の作用効果が得られる。 In the above embodiment, the matching unit 11 is used. However, if matching with the plasma load can be achieved to some extent, the matching unit 11 may be a high-frequency transformer or the matching unit 11 may be omitted for simplification. For simplification, the same effect can be obtained even when a voltage waveform in which the absolute value of the high frequency voltage increases with time as shown in FIG. 3 is applied to the wafer mounting electrode 9 by an arbitrary signal generator and a high frequency power amplifier . An effect is obtained. In the above-described embodiment, a rectangular wave is used as an ideal case. However, substantially the same operation and effect can be obtained by using a trapezoidal wave or a similar waveform in which some waveforms are disturbed due to frequency characteristics.

本発明の第2の実施例を図13を用いて説明する。本図において図1と同符号は同一部材を示し説明を省略する。本図が図1と異なる点を以下に説明する。矩形高周波電源13は、DC電源17とスイッチング回路18(チョッパ回路)から構成される。DC電源からのDC電圧出力をスイッチング素子によって高速でオン・オフを繰り返すことでパルス波形を出力できる。これより、実施例1と同様の作用効果を得ることができ、かつ矩形高周波電源の構成を簡便にできる。またスイッチング回路(チョッパ回路)18に用いるスイッチ素子は、サイリスタ、GTO(Gate Turn−Off thyristor),IGBT(Insulated Gate Bipolar Transistor),MOSFET,パワートランジスタ等を用いることができる。またこれらスイッチング素子を直列、並列化することでスイッチング周波数、耐電圧、耐電流を増加させることができ、ウェハに印加できる矩形波の周波数を数MHz程度まで増加できる。また、スイッチング素子のオン・オフ信号を制御することにより、図3に示すような高周波電圧の絶対値が時間とともに増加する電圧波形を発生させ、ウェハ載置用電極9に印加しても実施例1と同様の作用効果が得られる。この場合、高周波電圧波形制御回路(サグ補償回路)12は省略でき、モニター量として例えば電極電流モニター15からの信号を使用し、スイッチング回路18(チョッパ回路)の自動制御を行う。 A second embodiment of the present invention will be described with reference to FIG. In this figure, the same reference numerals as those in FIG. The difference between FIG. 1 and FIG. 1 will be described below. The rectangular high-frequency power source 13 includes a DC power source 17 and a switching circuit 18 (chopper circuit). A pulse waveform can be output by repeatedly turning on and off a DC voltage output from a DC power source at high speed by a switching element. As a result, the same effects as those of the first embodiment can be obtained, and the configuration of the rectangular high-frequency power source can be simplified. The switching element used for the switching circuit (chopper circuit) 18 may be a thyristor, a GTO (Gate Turn-Off Thyristor), an IGBT (Insulated Gate Bipolar Transistor), a MOSFET, a power transistor, or the like. Further, by switching these switching elements in series and in parallel, the switching frequency, withstand voltage, and withstand current can be increased, and the frequency of the rectangular wave that can be applied to the wafer can be increased to about several MHz. Further, by controlling the ON / OFF signal of the switching element, a voltage waveform in which the absolute value of the high frequency voltage increases with time as shown in FIG. 3 is generated and applied to the wafer mounting electrode 9. 1 is obtained. In this case, the high-frequency voltage waveform control circuit (sag compensation circuit) 12 can be omitted, and for example, a signal from the electrode current monitor 15 is used as a monitor amount, and the switching circuit 18 (chopper circuit) is automatically controlled.

本発明の第3の実施例を図14〜図19を用いて説明する。本図において図1と同符号は同一部材を示し説明を省略する。本図が図1,2と異なる点を以下に説明する。矩形高周波電源13は、正弦波出力電源19により構成される。正弦波電源19から出力された正弦波電圧波形を高周波電圧波形制御回路(サグ補償回路)12でクリップし、クリップ部において電圧の絶対値が時間とともに増加する電圧波形を発生させる。これによりウェハに矩形高周波電圧波形に近い波形を印加することが可能となる。これにより、実施例1と同様の作用効果を得ることができ、かつ矩形高周波電源の構成を簡便にできる。 A third embodiment of the present invention will be described with reference to FIGS. In this figure, the same reference numerals as those in FIG. The difference between this figure and FIGS. 1 and 2 will be described below. The rectangular high frequency power supply 13 is constituted by a sine wave output power supply 19. The sine wave voltage waveform output from the sine wave power source 19 is clipped by the high frequency voltage waveform control circuit (sag compensation circuit) 12 to generate a voltage waveform in which the absolute value of the voltage increases with time in the clip portion. As a result, a waveform close to a rectangular high-frequency voltage waveform can be applied to the wafer . Thereby, the effect similar to Example 1 can be acquired, and the structure of a rectangular high frequency power supply can be simplified.

図15(b)に、実際に正弦波電圧波形をクリップしウェハにてサグ量比率0%を達成した電圧波形を示す。Vpp700Vの正弦波電圧波形に対してクリップ電圧を−400V、−200Vと変化させ、サグ補償することでウェハ電位にてサグ量比率0%となるように制御した。図15(a)に各ウェハ電圧波形におけるイオンエネルギー分布の測定結果を三次元的に示す。Vpp700Vの正弦波電圧波形では高エネルギーピークと低エネルギーピークのイオン量の割合は50%程度であるが、クリップ電圧をー400V、−200Vと設定しクリップ部のフラットな時間を長くすることで高エネルギーピークのイオン量が増加する。言い換えれば単色に近いイオンエネルギー分布とすることができる。ここで、図16に示すように低エネルギー側のピークイオン量をP、高エネルギー側のピークイオン量をPとして、高エネルギーピーク比率を

Figure 0004319514
と定義する。図17に高エネルギーピーク比率のVpp依存性を示す。理想の単色のイオンエネルギー分布は高エネルギーピーク比率が100%であるのに対して、従来の正弦波バイアスでは高エネルギーピーク比率が50%程度となる。図15で示したサグ量比率0%の正弦波クリップ電圧波形では高エネルギーピーク比率を約85%まで増加できる。 FIG. 15B shows a voltage waveform obtained by actually clipping the sine wave voltage waveform and achieving a sag amount ratio of 0% on the wafer . The clip voltage was changed to −400 V and −200 V with respect to the sine wave voltage waveform of Vpp 700 V, and sag compensation was performed to control the sag amount ratio to 0% at the wafer potential. FIG. 15A three-dimensionally shows the measurement result of ion energy distribution in each wafer voltage waveform. In the sine wave voltage waveform of Vpp 700V, the ratio of the amount of ions of the high energy peak and the low energy peak is about 50%. However, the clip voltage is set to -400V and -200V and the flat time of the clip portion is increased. The amount of ions at the energy peak increases. In other words, an ion energy distribution close to a single color can be obtained. Here, the peak ion amount of the low-energy side P L as shown in FIG. 16, the peak ion of the high energy side as P H, a high energy peak ratio
Figure 0004319514
It is defined as FIG. 17 shows the Vpp dependence of the high energy peak ratio. The ideal monochromatic ion energy distribution has a high energy peak ratio of 100%, whereas the conventional sine wave bias has a high energy peak ratio of about 50%. In the sine wave clip voltage waveform with the sag amount ratio of 0% shown in FIG. 15, the high energy peak ratio can be increased to about 85%.

また、図18にイオンエネルギー分布のサグ量比率依存性を示しておく。図18(b)にサグ補償しウェハ電位にてサグ量比率を0%から13%まで変化させたウェハ電圧波形を示し、図18(a)に各サグ量比率におけるイオンエネルギー分布の測定結果を三次元的に示す。サグ量比率が高くなると、高エネルギー側ピークイオン量PHが減少している。図19に高エネルギーピーク比率のサグ量比率依存性を示す。高エネルギーピーク比率を80%以上とし単色に近いイオンエネルギー分布を達成するにはサグ量比率が10%以下でなければならない。 FIG. 18 shows the sag amount dependency of the ion energy distribution. FIG. 18B shows a wafer voltage waveform in which sag compensation is performed and the sag amount ratio is changed from 0% to 13% at the wafer potential. FIG. 18A shows the measurement result of the ion energy distribution at each sag amount ratio. Shown in three dimensions. As the sag amount ratio increases, the high energy side peak ion amount PH decreases. FIG. 19 shows the dependence of the high energy peak ratio on the sag amount ratio. In order to achieve a high energy peak ratio of 80% or more and an ion energy distribution close to a single color, the sag amount ratio must be 10% or less.

以上の実施例では、矩形高周波電源13の周波数を400kHz,800kHzとしたが、交番電界へのイオンの追従性を考慮すると10kHzから4MHz程度が好ましく、特にイオンのウェハへの入射効率を考慮すると100kHzから2MHz程度が好ましい。 In the above embodiment, the frequency of the rectangular high frequency power supply 13 is set to 400 kHz and 800 kHz. However, when considering the followability of ions to an alternating electric field, about 10 kHz to 4 MHz is preferable. In particular, considering the incident efficiency of ions to the wafer , 100 kHz To about 2 MHz is preferable.

以上の実施例では有磁場UHF放電を利用したエッチング装置を例に説明したが、他の放電(有磁場マイクロ波放電、容量結合型放電、誘導結合型放電、マグネトロン放電、表面波励起放電、トランスファー・カップルド放電)を利用したドライエッチング装置においても同様の作用効果がある。また上記各実施例では、エッチング装置について述べたが、プラズマ処理を行うその他のプラズマ処理装置、例えばプラズマCVD装置、アッシング装置、表面改質装置等についても同様の作用効果がある。   In the above embodiment, the etching apparatus using the magnetic field UHF discharge has been described as an example. A dry etching apparatus using a coupled discharge has the same effect. In each of the above embodiments, the etching apparatus has been described. However, other plasma processing apparatuses that perform plasma processing, such as a plasma CVD apparatus, an ashing apparatus, and a surface modification apparatus, have similar operational effects.

本発明のプラズマ処理装置の一実施例である有磁場UHFエッチング装置の縦断面図。The longitudinal cross-sectional view of the magnetic field UHF etching apparatus which is one Example of the plasma processing apparatus of this invention. 本発明の一実施例におけるウェハ載置用電極9に接続される整合器11、高周波電圧波形制御回路(サグ補償回路)12および直流電源14の回路構成説明図。1 is a circuit configuration explanatory diagram of a matching unit 11, a high-frequency voltage waveform control circuit (sag compensation circuit) 12, and a DC power supply 14 connected to a wafer mounting electrode 9 in one embodiment of the present invention. 本発明の一実施例におけるウェハ載置用電極9に印加される高周波電圧波形図。The high frequency voltage waveform figure applied to the electrode 9 for wafer mounting in one Example of this invention. 本発明の一実施例におけるウェハ10での高周波電圧波形図。The high frequency voltage waveform figure in the wafer 10 in one Example of this invention. 本発明の一実施例における矩形高周波電圧のデューティ比を変化させた場合のウェハ上に入射するイオンのエネルギー分布図。The energy distribution diagram of the ion which injects on a wafer at the time of changing the duty ratio of the rectangular high frequency voltage in one Example of this invention. 比較例としてのウェハ載置用電極9に印加する矩形高周波電圧波形図。The rectangular high frequency voltage waveform figure applied to the electrode 9 for wafer mounting as a comparative example. 比較例としてのウェハ載置用電極9に矩形高周波電圧を印加した場合のウェハ10での高周波電圧波形図。The high frequency voltage waveform figure in the wafer 10 at the time of applying a rectangular high frequency voltage to the electrode 9 for wafer mounting as a comparative example. 本発明の一実施例における矩形波のサグ量の定義説明図。The definition explanatory drawing of the amount of sag of a rectangular wave in one example of the present invention. 本発明の一実施例におけるウェハ10電圧波形でのサグ量比率とUHF出力の関係を示すグラフ図。The graph which shows the relationship between the sag amount ratio in the wafer 10 voltage waveform and UHF output in one Example of this invention. 本発明の一実施例におけるウェハ10電圧波形でのサグ量比率とコンデンサ容量を示すグラフ図。The graph which shows the sag amount ratio and capacitor | condenser capacity | capacitance in the wafer 10 voltage waveform in one Example of this invention. 本発明の一実施例における矩形波のデューティ比T/Tを50%以上に増加させた場合のウェハ10での電圧波形図。Voltage waveform diagram of the wafer 10 when the duty ratio T 1 / T of the rectangular waves was increased to 50% or more in an embodiment of the present invention. 従来方式における正弦波形の高周波電圧をウェハ載置用電極に印加する場合のウェハに入射するイオンのエネルギー分布説明図。The energy distribution explanatory drawing of the ion which injects into a wafer in the case of applying the sinusoidal high frequency voltage in a conventional system to the electrode for wafer mounting. 本発明のプラズマ処理装置の一実施例である有磁場UHFエッチング装置の縦断面図。The longitudinal cross-sectional view of the magnetic field UHF etching apparatus which is one Example of the plasma processing apparatus of this invention. 本発明のプラズマ処理装置の一実施例である有磁場UHFエッチング装置の縦断面図。The longitudinal cross-sectional view of the magnetic field UHF etching apparatus which is one Example of the plasma processing apparatus of this invention. 正弦波電圧波形をサグ補償しクリップしたウェハ10電圧波形と各電圧波形でのウェハ10に入射するイオンのエネルギー分布図。The wafer 10 voltage waveform which sag-compensated and clipped the sine wave voltage waveform, and the energy distribution diagram of the ion which injects into the wafer 10 in each voltage waveform. 本発明の一実施例における高エネルギーイオン比率を説明する図。The figure explaining the high energy ion ratio in one Example of this invention. 本発明の一実施例における高エネルギーピーク比率のVpp依存性を示す図。The figure which shows the Vpp dependence of the high energy peak ratio in one Example of this invention. 正弦波電圧波形のサグ量比率を制御したウェハ10電圧波形と各電圧波形でのウェハ10に入射するイオンのエネルギー分布図。The wafer 10 voltage waveform which controlled the sag amount ratio of the sine wave voltage waveform, and the energy distribution diagram of the ion which injects into the wafer 10 in each voltage waveform. 本発明の一実施例における高エネルギーピーク比率のサグ量比率の依存性を示す図。The figure which shows the dependence of the sag amount ratio of the high energy peak ratio in one Example of this invention.

符号の説明Explanation of symbols

1…処理室、1a…容器、1b…放電管、2…石英窓、2a…シャワープレート、3…コイル、4…ヨーク、5…高周波電源、6…整合器、7…同軸導波管(ケーブル)、8…アンテナ、9…ウェハ載置用電極、10…ウェハ、11…整合器、12…高周波電圧波形制御回路(サグ補償回路)、13…矩形高周波電源、14…直流電源、15…電極電流モニター、16…自動制御回路、17…直流電源、18…スイッチング回路(チョッパ回路)、19…正弦波出力電源。
DESCRIPTION OF SYMBOLS 1 ... Processing chamber, 1a ... Container, 1b ... Discharge tube, 2 ... Quartz window, 2a ... Shower plate , 3 ... Coil, 4 ... Yoke, 5 ... High frequency power supply, 6 ... Matching device, 7 ... Coaxial waveguide ( cable 8 ... Antenna, 9 ... Wafer mounting electrode, 10 ... Wafer, 11 ... Matching device, 12 ... High frequency voltage waveform control circuit (sag compensation circuit), 13 ... Rectangular high frequency power supply, 14 ... DC power supply, 15 ... Electrode Current monitor, 16 ... automatic control circuit, 17 ... DC power supply, 18 ... switching circuit (chopper circuit), 19 ... sine wave output power supply.

Claims (8)

処理室内部にプラズマを発生させるプラズマ発生手段と、被処理材に高周波電圧を印加する手段と、真空排気装置が接続され内部を減圧可能な処理室と、前記処理室内へのガス供給装置と、前記真空処理室内に配置され被処理材を載置するため表面を誘電体で被覆された基板電極と、前記基板電極に基板バイアス電圧を供給する基板バイアス電源回路とから成るプラズマ処理装置において、
前記基板バイアス電源回路が、高周波電源回路と高周波電圧波形制御回路を有し概略矩形波の矩形高周波電圧を出力する矩形高周波電源として構成され、
前記高周波電圧波形制御回路は、前記高周波電源回路の出力端子間に接続されたダイオードと可変容量コンデンサの直列回路と、該可変容量コンデンサに並列に接続された半導体素子からなるクリップ回路を有し、前記ダイオードと前記可変容量コンデンサと前記半導体素子により、前記高周波電源回路から出力された高周波電圧波形の正側あるいは負側の電圧の絶対値がそれぞれ任意のDC電圧以上の電圧を除去するとともに、前記可変容量コンデンサの容量を可変することにより前記DC電圧を変化させて高周波電圧波形制御回路の出力電圧の絶対値に時間とともに増加する傾きを生じさせる操作を行い、
前記操作により前記被処理材に発生する高周波電圧波形が与えられた周期で正の一定電圧と負の一定電圧を繰り返すような電圧波形となるように制御する
ことを特徴とするプラズマ処理装置。
Plasma generating means for generating plasma in the processing chamber; means for applying a high-frequency voltage to the material to be processed; a processing chamber to which an evacuation device is connected and whose inside can be decompressed; a gas supply device to the processing chamber; In a plasma processing apparatus comprising a substrate electrode disposed in the vacuum processing chamber and having a surface coated with a dielectric to place a material to be processed, and a substrate bias power supply circuit for supplying a substrate bias voltage to the substrate electrode,
The substrate bias power supply circuit is configured as a rectangular high-frequency power supply that has a high-frequency power supply circuit and a high-frequency voltage waveform control circuit and outputs a rectangular high-frequency voltage of a substantially rectangular wave,
The high-frequency voltage waveform control circuit includes a series circuit of a diode and a variable capacitor connected between output terminals of the high-frequency power supply circuit, and a clip circuit including a semiconductor element connected in parallel to the variable capacitor, The diode, the variable capacitor, and the semiconductor element remove a voltage whose absolute value of the positive or negative voltage of the high-frequency voltage waveform output from the high-frequency power circuit is not less than an arbitrary DC voltage , and An operation for changing the DC voltage by changing the capacitance of the variable capacitor and causing the absolute value of the output voltage of the high-frequency voltage waveform control circuit to increase with time ,
A plasma processing apparatus, wherein a high-frequency voltage waveform generated in the material to be processed by the operation is controlled to be a voltage waveform that repeats a positive constant voltage and a negative constant voltage in a given cycle.
処理室内部にプラズマを発生させるプラズマ発生手段と、被処理材に高周波電圧を印加する手段と、真空排気装置が接続され内部を減圧可能な処理室と、前記処理室内へのガス供給装置と、前記真空処理室内に配置され被処理材を載置するため表面を誘電体で被覆された基板電極と、前記基板電極に基板バイアス電圧を供給する基板バイアス電源回路とから成るプラズマ処理装置において、
前記基板バイアス電源回路が、高周波電源回路と高周波電圧波形制御回路を有し概略矩形波の矩形高周波電圧を出力する矩形高周波電源として構成され、
前記高周波電圧波形制御回路は、前記高周波電源回路の出力端子間に接続されたダイオードと可変容量コンデンサの直列回路と、可変容量コンデンサに並列に接続された半導体素子からなるクリップ回路を有し、前記ダイオードと前記可変容量コンデンサと前記半導体素子により、前記高周波電源回路から出力された高周波電圧波形の正側あるいは負側の電圧の絶対値がそれぞれ任意のDC電圧以上の電圧を除去するとともに、前記可変容量コンデンサの容量を可変することにより前記DC電圧を変化させて高周波電圧波形制御回路の出力電圧の絶対値に時間とともに増加する傾きを生じるように制御する
ことを特徴とするプラズマ処理装置。
Plasma generating means for generating plasma in the processing chamber; means for applying a high-frequency voltage to the material to be processed; a processing chamber to which an evacuation device is connected and whose inside can be decompressed; a gas supply device to the processing chamber; In a plasma processing apparatus comprising a substrate electrode disposed in the vacuum processing chamber and having a surface coated with a dielectric to place a material to be processed, and a substrate bias power supply circuit for supplying a substrate bias voltage to the substrate electrode,
The substrate bias power supply circuit is configured as a rectangular high-frequency power supply that has a high-frequency power supply circuit and a high-frequency voltage waveform control circuit and outputs a rectangular high-frequency voltage of a substantially rectangular wave,
The high frequency voltage waveform control circuit includes a series circuit of the high frequency power supply circuit connected to a diode and a variable capacitance capacitor between the output terminals of the clip circuit composed of semiconductor elements connected in parallel to said variable capacitor, The diode, the variable capacitor, and the semiconductor element remove a voltage whose absolute value of the positive or negative voltage of the high-frequency voltage waveform output from the high-frequency power circuit is not less than an arbitrary DC voltage , and varying the DC voltage by varying the capacitance of the variable capacitor and said <br/> be controlled so that rise to slope increases with time to the absolute value of the output voltage of the high frequency voltage waveform control circuit Plasma processing equipment.
請求項1または請求項2記載のプラズマ処理装置において、
前記高周波電源回路が、矩形波高周波電源またはDC電源とスイッチング回路(チョッパ回路)から構成される
ことを特徴とするプラズマ処理装置。
The plasma processing apparatus according to claim 1 or 2 ,
The plasma processing apparatus , wherein the high-frequency power supply circuit includes a rectangular wave high-frequency power supply or a DC power supply and a switching circuit (chopper circuit) .
請求項記載のプラズマ処理装置において、
前記スイッチング回路(チョッパ回路)のスイッチ素子が、サイリスタ、GTO(Gate Turn-Off thyristor)、IGBT(Insulated Gate Bipolar Transistor)、MOSFET、パワートランジスタのいずれかにより構成される
ことを特徴とするプラズマ処理装置。
The plasma processing apparatus according to claim 3 , wherein
A plasma processing apparatus, wherein a switching element of the switching circuit (chopper circuit) is formed of any of a thyristor, a GTO (Gate Turn-Off thyristor), an IGBT (Insulated Gate Bipolar Transistor), a MOSFET, and a power transistor. .
請求項1または請求項2に記載のプラズマ処理装置において、
前記高周波電源回路が、出力される矩形波のデューティ比を可変できる
ことを特徴とするプラズマ処理装置。
In the plasma processing apparatus according to claim 1 or 2 ,
The plasma processing apparatus , wherein the high frequency power supply circuit can vary a duty ratio of an output rectangular wave .
請求項1または請求項2記載のプラズマ処理装置において、
前記高周波電源回路が、正弦波出力電源から構成される
ことを特徴とするプラズマ処理装置。
The plasma processing apparatus according to claim 1 or 2 ,
The plasma processing apparatus , wherein the high-frequency power supply circuit comprises a sine wave output power supply .
請求項1乃至請求項6のいずれか1項に記載のプラズマ処理装置において、
前記高周波電源回路は、出力周波数が10kHz〜4MHzである
ことを特徴とするプラズマ処理装置。
The plasma processing apparatus according to any one of claims 1 to 6,
The plasma processing apparatus , wherein the high frequency power supply circuit has an output frequency of 10 kHz to 4 MHz .
請求項1または請求項2記載のプラズマ処理装置において、
高周波電圧波形制御回路(サグ補償回路)が、モニター量として、ウェハ載置用電極の電流、あるいは被処理材に発生する電圧、被処理材に流入する電流、ウェハ載置用電極の電圧、被処理材に印加する電力、高周波電源の出力電力の少なくともいずれか1つを検出し、該モニター量に対して、前記矩形高周波電圧の正側あるいは負側の少なくともいずれか一方の電圧の絶対値を時間とともに増加させ、被処理材に発生する高周波電圧波形が概略矩形となるように制御する機能を有する
ことを特徴とするプラズマ処理装置。
The plasma processing apparatus according to claim 1 or 2 ,
The high-frequency voltage waveform control circuit (sag compensation circuit) can monitor the current of the wafer mounting electrode, the voltage generated in the processing target material, the current flowing into the processing target material, the voltage of the wafer mounting electrode, At least one of the power applied to the processing material and the output power of the high-frequency power source is detected, and the absolute value of at least one of the positive and negative voltages of the rectangular high-frequency voltage is detected with respect to the monitoring amount. A plasma processing apparatus having a function of controlling the high-frequency voltage waveform generated in the material to be processed to be approximately rectangular, which increases with time .
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