JP4228839B2 - Bonding equipment - Google Patents

Description

  The present invention relates to a bonding apparatus and a method for manufacturing a semiconductor device, and is particularly suitable for application to FDB (face down bonding) in COF (chip on film).

In a conventional semiconductor device, for example, as disclosed in Patent Document 1, there is a method of realizing FDB in COF by Au-Au bonding under heating and pressurization.
FIG. 8 is a cross-sectional view showing a conventional method for manufacturing a semiconductor device.
8A, a Cu wiring layer 112 is formed as an inner lead on the tape substrate 111, the periphery of the Cu wiring layer 112 is covered with a protective film 113, and an exposed portion of the Cu wiring layer 112 is an Au plating layer. 114.

For example, a polyimide film or the like can be used as the tape substrate 111, and a solder resist or the like can be used as the protective film 113, for example.
On the other hand, a pad electrode 116 is provided on the semiconductor chip 115, the periphery of the pad electrode 116 is covered with a protective film 117, and an Au bump electrode 118 having a height H 2 is formed on the pad electrode 116.

As the pad electrode 116, for example, Al can be used, and as the protective film 117, for example, a silicon oxide film or a silicon nitride film can be used.
When the semiconductor chip 115 is mounted on the tape substrate 111, the tape substrate 111 is placed on the heated bonding stage 101 as shown in FIG. 8B. Then, the Au bump electrode 118 is pressed onto the Cu wiring layer 112 covered with the Au plating layer 114 while the semiconductor chip 115 is held by suction with the bonding head 102.

  Here, when the Au bump electrode 118 is pressed onto the Cu wiring layer 112 covered with the Au plating layer 114, the tape substrate 111 under the Au bump electrode 118 sinks, and the end portion of the semiconductor chip 115 and the Au plating layer 114. Since the clearance CL2 with the Cu wiring layer 112 covered with the surface decreases, the end of the semiconductor chip 115 may come into contact with the Au plating layer 114.

For this reason, in the conventional semiconductor device, the height H2 of the Au bump electrode 118 is increased in order to prevent the end of the semiconductor chip 115 from coming into contact with the Au plating layer 114.
For example, when the semiconductor chip 115 is mounted on the tape substrate 111, the clearance CL2 between the end of the semiconductor chip 115 and the Cu wiring layer 112 covered with the Au plating layer 114 is about 10 to 12 μm. For this reason, for example, the height H2 of the Au bump electrode 118 is set to about 22.5 μm to prevent the end of the semiconductor chip 115 from coming into contact with the Au plating layer 114.
JP 2000-138253 A

However, if the height H2 of the Au bump electrode 118 is increased, about 400 to 500 Au bump electrodes 118 may be provided for each semiconductor chip 115, which causes a cost increase and the Au bump electrode 118. There was a problem that the variation in the height H2 between them became large, and the connection reliability of the Au bump electrode 118 deteriorated.
Accordingly, an object of the present invention is to provide a bonding apparatus and a semiconductor device manufacturing method capable of increasing the clearance between the end portion of the semiconductor chip and the lead terminal of the tape substrate while suppressing the height of the bump electrode. Is to provide.

In order to solve the above-described problem, according to a bonding apparatus according to an aspect of the present invention, a bonding stage that supports a tape substrate, a push-up portion that is inserted into the bonding stage and can push up the inside of the tape substrate, A suction part provided on the bonding stage and disposed around the push-up part, and mounting means for mounting a semiconductor chip on the tape substrate are provided.

  Thus, when the semiconductor chip is mounted on the circuit board, the inside of the circuit board can be lifted while adsorbing the periphery of the circuit board on the bonding stage. For this reason, it becomes possible to bend the circuit board so that the outer periphery of the circuit board is away from the end of the semiconductor chip, and while maintaining the mounting accuracy of the semiconductor chip, the end of the semiconductor chip and the lead terminal of the circuit board It is possible to increase the clearance between the two. As a result, it is possible to reduce the height of the bump electrode, thereby reducing the cost and improving the uniformity of the height between the bump electrodes, so that the gap between the semiconductor chip and the circuit board can be improved. Connection reliability can be improved.

Moreover, according to the bonding apparatus which concerns on 1 aspect of this invention, the edge part of the said raising part is arrange | positioned outside the bump electrode provided in the said semiconductor chip, and inside the edge part of the said semiconductor chip. Features.
As a result, even when the mounting position of the semiconductor chip varies, the circuit board can be moved away from the end of the semiconductor chip without increasing the height of the bump electrode, and the end of the semiconductor chip is placed on the circuit board. It is possible to prevent contact.

Moreover, according to the bonding apparatus which concerns on 1 aspect of this invention, the outer periphery of the said pushing-up part is arrange | positioned corresponding to the outer periphery of the said semiconductor chip, It is characterized by the above-mentioned.
As a result, the lead terminal on the circuit board can be moved away from the end of the semiconductor chip, and the semiconductor chip can be prevented from being short-circuited with the lead terminal without increasing the height of the bump electrode.

Hereinafter, a bonding apparatus and a semiconductor device manufacturing method according to embodiments of the present invention will be described with reference to the drawings.
FIG. 1 is a perspective view showing a schematic configuration of a bonding apparatus according to the first embodiment of the present invention.
In FIG. 1, a semiconductor chip mounting area 2 for mounting a semiconductor chip 4 is provided on a tape substrate 1, and inner leads 3 are formed so as to cover the semiconductor chip mounting area 2. The tape substrate 1 can be composed of, for example, a polyimide film, and the inner lead 3 can be composed of, for example, an Au plated Cu wiring layer.

  A bonding head 12 that adsorbs the semiconductor chip 4 is provided above the tape substrate 1, and a heater block 11 is attached to the bonding head 12. The bonding head 12 is connected to a vacuum pump 14 that sucks the semiconductor chip 4, and the heater block 11 is connected to a temperature control device 13 that controls the temperature of the bonding head 12.

A camera 20a that performs image recognition of the tape substrate 1 and the semiconductor chip 4 is provided above the tape substrate 1, and the bonding head 12 determines the position in the XY direction and the XY plane based on the image recognition result by the camera 20a. The rotation angle θ is controlled.
A bonding stage 16 for fixing the semiconductor chip mounting area 2 of the tape substrate 1 is provided below the tape substrate 1. Here, a push-up portion 18 that can push up the inside of the tape substrate 1 is inserted in the central portion of the bonding stage 16, and a suction groove 17 that sucks the tape substrate 1 is provided around the push-up portion 18. ing. Instead of the suction groove 17, a suction hole may be arranged on the bonding stage 16, or a suction groove and a suction hole may be provided in a mixed manner.

Here, the end of the push-up portion 18 can be configured to correspond to the end position of the semiconductor chip 4. For example, the outer periphery of the push-up portion 18 can be arranged corresponding to the outer periphery of the semiconductor chip 4. it can. Note that the end portion of the push-up portion 18 may be disposed in a region between the bump electrode provided on the semiconductor chip 4 and the end portion position of the semiconductor chip 4.
The bonding stage 16 is connected to a vacuum pump 18 that sucks the inside of the suction groove 17, and a heater block 15 is attached to the bonding stage 16. The heater block 15 controls the temperature of the bonding stage 16. It is connected to the device 19.

A camera 20b that performs image recognition of the tape substrate 1 is provided below the tape substrate 1, and the bonding stage 16 rotates in the XY direction and in the XY plane based on the image recognition result by the camera 20b. The angle θ is controlled.
Further, tape pressing frames 21 a and 21 b for clamping the tape substrate 1 by sandwiching the periphery of the semiconductor chip mounting region 2 from above and below are respectively provided above and below the tape substrate 1.

FIG. 2 is a flowchart showing a method for manufacturing a semiconductor device according to the second embodiment of the present invention.
2, the heater block 11 of FIG. 1 is turned on, the temperature of the bonding head 12 is adjusted by the temperature control device 13, the vacuum pump 14 is turned on, and the semiconductor chip 4 is sucked and held by the bonding head 12. . The heater block 15 is turned on, and the temperature of the bonding stage 16 is adjusted by the temperature control device 19.

When the tape substrate 1 is conveyed onto the bonding stage 16, the tape holding frame 21a is lowered and the tape holding frame 21b is raised to sandwich the periphery of the semiconductor chip mounting region 2 from above and below. Is clamped (step S1).
Here, by clamping the tape substrate 1 using the tape holding frames 21a and 21b, the semiconductor chip mounting region 2 of the tape substrate 1 can be fixed flat without supporting the tape substrate 1 with the bonding stage 16. It becomes.

For this reason, it is possible to perform image recognition of the tape substrate 1 with high accuracy, to perform alignment of the bonding stage 16 with high accuracy, and to be able to move the bonding stage 16 also in the θ direction. It is possible to cope with the positional deviation of the tape substrate 1 in the θ direction.
Next, when the alignment of the bonding stage 16 is completed, the bonding stage 16 is raised while the push-up portion 18 is housed in the bonding stage 16, and the bonding stage 16 is pressed against the back surface of the tape substrate 1. When the bonding stage 16 is pressed against the back surface of the tape substrate 1, the vacuum pump 18 is turned on and the tape substrate 1 is sucked through the suction groove 17 (step S4).

Here, the tape substrate 1 can be pressed onto the suction groove 17 by raising the bonding stage 16 while the push-up portion 18 is housed in the bonding stage 16, and the tape substrate 1 can be stably placed on the bonding stage 16. And can be adsorbed.
Next, the camera 20a is moved into the frame of the tape pressing frame 21a, and image recognition of the tape substrate 1 and the semiconductor chip 4 is performed using the camera 20a (steps S5 and S6). Then, based on the image recognition results of the tape substrate 1 and the semiconductor chip 4, the bonding head 12 is aligned in the X, Y, and θ directions.

Next, when the alignment of the bonding head 12 is completed, the bonding head 12 is lowered and the semiconductor chip 4 sucked and held by the bonding head 12 is mounted on the tape substrate 1 (step S7).
Next, when the semiconductor chip 4 is mounted on the tape substrate 1, while the suction controller 17 raises the push-up portion 18 while sucking the periphery of the semiconductor chip mounting region 2 through the suction groove 17, the push-up is performed. The bonding head 12 is raised by the rise of the portion 18 (step S8).

Here, by arranging the end portion of the push-up portion 18 so as to correspond to the end portion position of the semiconductor chip 4, the tape substrate 1 can be lifted with the end portion of the semiconductor chip 4 as a boundary.
Therefore, the tape substrate 1 can be bent so that the outer peripheral portion of the tape substrate 1 moves away from the end of the semiconductor chip 1, and the end of the semiconductor chip 1 and the tape are maintained while maintaining the mounting accuracy of the semiconductor chip 4. The clearance between the substrate 1 and the inner lead 3 can be increased. As a result, it is possible to reduce the height of the bump electrodes, thereby reducing the cost and improving the uniformity of the height between the bump electrodes, so that the semiconductor chip 4 and the tape substrate 1 can be reduced. It is possible to improve the connection reliability.

  Further, by raising the push-up portion 18 while sucking the periphery of the semiconductor chip mounting area 2, the periphery of the semiconductor chip mounting area 2 of the tape substrate 1 is fixed on the bonding stage 16 and the semiconductor chip mounting area 2 is lifted up. Can be made. For this reason, it is possible to accurately define the bending position of the tape substrate 1, and it is possible to stably secure a clearance between the end portion of the semiconductor chip 1 and the inner lead 3 of the tape substrate 1.

  Further, the semiconductor chip 4 can be prevented from being displaced when the semiconductor chip mounting area 2 is lifted by raising the push-up portion 18 while pressing the semiconductor chip 4 onto the tape substrate 1 with the bonding head 12. Thus, it is possible to move the outer peripheral portion of the tape substrate 1 away from the end portion of the semiconductor chip 1 while suppressing deterioration of the mounting accuracy of the semiconductor chip 4.

Next, the tape substrate 1 is formed by using radiant heat radiated from the bonding head 12, and an inclined portion disposed around the semiconductor chip mounting region 2 is formed on the tape substrate 1 (step S9).
Here, by forming an inclined portion around the semiconductor chip mounting region 2 of the tape substrate 1, the tape substrate 1 is moved away from the end of the semiconductor chip 4 when the semiconductor chip 4 is mounted on the tape substrate 1. Thus, the clearance between the end of the semiconductor chip 4 and the tape substrate 1 can be increased.

Further, by using the radiant heat radiated from the bonding head 12, the boundary portion of the semiconductor chip mounting region 2 can be efficiently softened, and the deformation of the entire tape substrate 1 due to heat can be suppressed, and the semiconductor chip 4 It becomes possible to suppress the deterioration of the mounting accuracy.
Next, when the forming of the tape substrate 1 is completed, the bonding head 12 is raised (step S10). Then, the push-up portion 18 is lowered to house the push-up portion 18 in the bonding head 12 and the suction of the tape substrate 1 is released (step S11). Further, the bonding stage 16 is lowered (step S12), the clamp of the tape substrate 1 is released (step S13), and the tape substrate 1 is transported (step S14).

  When the semiconductor chip 4 is mounted on the tape substrate 1, for example, an ACF (Anisotropic Conductive Film) junction, an NCF (Nonconductive Film Paste) junction, an ACP (Anisotropic Conductive Paste) junction, an NCP (Nonconductive junction) junction, or the like. Alternatively, metal bonding such as solder bonding or alloy bonding may be used.

3 to 5 are sectional views showing a method for manufacturing a semiconductor device according to the third embodiment of the present invention.
3A, a Cu wiring layer 32 is formed as an inner lead on the tape substrate 31, and the periphery of the Cu wiring layer 32 is covered with a protective film 33, and an exposed portion of the Cu wiring layer 32 is an Au plating layer. 34.

For example, a polyimide film or the like can be used as the tape substrate 31, and a solder resist or the like can be used as the protective film 33, for example.
On the other hand, the semiconductor chip 35 is provided with a pad electrode 36, the periphery of the pad electrode 36 is covered with a protective film 37, and an Au bump electrode 38 having a height H 1 is formed on the pad electrode 36.

  As the pad electrode 36, for example, Al can be used, and as the protective film 37, for example, a silicon oxide film or a silicon nitride film can be used. Further, instead of the Au bump electrode 38, a Cu bump electrode, a Ni bump electrode, or a solder bump subjected to a coating process such as Au plating or solder plating may be used.

When the tape substrate 31 is transported, the tape holding frame 21a is lowered and the tape holding frame 21b is raised to clamp the tape substrate 31.
Here, by clamping the tape substrate 21 using the tape holding frames 21 a and 21 b, it becomes possible to fix the tape substrate 21 flat without supporting the tape substrate 21 by the bonding stage 16. It is possible to align with the tape substrate 31 with high accuracy.

Then, as shown in FIG. 3B, the bonding stage 16 is raised while the push-up portion 18 is housed in the bonding stage 16, and the bonding stage 16 is pressed against the back surface of the tape substrate 31. Then, the vacuum pump 18 is turned on and the tape substrate 31 is sucked through the suction groove 17.
Here, the upper surface of the bonding stage 16 can be kept flat by raising the bonding stage 16 while the push-up portion 18 is housed in the bonding stage 16. For this reason, the tape substrate 41 can be pressed onto the suction groove 17, and the tape substrate 31 can be stably adsorbed onto the bonding stage 16.

Next, as shown in FIG. 4A, the semiconductor chip 35 sucked and held by the bonding head 12 is transferred onto the tape substrate 31. Then, the Au bump electrode 38 and the Au plating layer 34 are pressed by pressing the Au bump electrode 38 on the Cu wiring layer 32 covered with the Au plating layer 34 while sucking the tape substrate 31 through the suction groove 17. Join.
In addition, the semiconductor chip 35 is mounted on the tape substrate 31 while keeping the tape substrate 31 flat by disposing the semiconductor chip 35 on the tape substrate 31 while the push-up portion 18 is housed in the bonding stage 16. Therefore, it is possible to prevent the tape substrate 31 from being deformed when the semiconductor chip 35 is mounted, and to prevent the mounting position accuracy of the semiconductor chip 35 from being deteriorated.

Next, as shown in FIG. 4B, the push-up portion 18 is lifted while sucking the tape substrate 31 through the suction groove 17, and the bonding head 12 is lifted by the lift of the push-up portion 18. The semiconductor chip mounting area of the tape substrate 31 is pushed upward.
Here, by arranging the end portion of the push-up portion 18 so as to correspond to the end portion position of the semiconductor chip 35, the inclined surface 31a can be formed on the tape substrate 31 with the end portion of the semiconductor chip 35 as a boundary. The clearance CL1 between the end portion 35a of the chip 35 and the tape substrate 31 can be increased.

Further, by raising the push-up portion 18 while pressing the semiconductor chip 35 onto the tape substrate 31 with the bonding head 12, it is possible to prevent the semiconductor chip 35 from being displaced when the semiconductor chip mounting area is lifted. The inclined surface 31 a can be formed on the tape substrate 31 while suppressing the deterioration of the mounting accuracy of the semiconductor chip 35.
Then, as shown in FIG. 5A, when the inclined surface 31a is formed on the tape substrate 31, the push-up portion 18 is lowered and the suction of the tape substrate 31 is released. Then, the bonding head 12 and the bonding stage 16 are removed, and the clamps by the tape pressing frames 21a and 21b are released.

Then, as shown in FIG. 5B, the semiconductor chip 35 is sealed by injecting a resin 39 around the semiconductor chip 35 mounted on the tape substrate 31.
As a result, the semiconductor chip 35 can be mounted on the tape substrate 31 while the semiconductor chip mounting area of the tape substrate 31 is fixed on the bonding stage 16, and the position of the end portion 35a of the semiconductor chip 35 can be adjusted. As a boundary, the inclined surface 31a can be accurately formed on the tape substrate 31.

Therefore, the semiconductor chip 35 and the tape substrate can be mounted on the tape substrate 31 with high accuracy while the height H1 of the Au bump electrode 38 can be reduced, and the cost can be reduced. In addition to improving the connection reliability with the semiconductor chip 31, it is possible to reduce the contact failure of the semiconductor chip 35.
In the above-described embodiment, the method of causing the end portion of the push-up portion 18 to correspond to the position of the end portion 35a of the semiconductor chip 35 has been described, but the end portion of the push-up portion 18 is not necessarily the end portion of the end portion 35a of the semiconductor chip 35. It is not necessary to exactly match the position, and the end portion of the push-up portion 18 may be disposed in a region between the Au bump electrode 38 and the end portion position of the semiconductor chip 35.

In the above-described embodiment, the method of raising the push-up portion 18 after pressing the semiconductor chip 35 onto the tape substrate 31 has been described. However, before the semiconductor chip 35 is pushed onto the tape substrate 31, the push-up portion 18 is moved. You may make it raise.
In this case, after raising the push-up portion 18, image recognition of the tape substrate 1 and the semiconductor chip 4 is performed using the camera 20a of FIG. 1 (steps S5 and S6 in FIG. 2), and the X, Y, and Position alignment in the θ direction can be performed. Then, the aligned bonding head 12 is lowered, and the semiconductor chip 4 attracted and held by the bonding head 12 can be mounted on the tape substrate 1.

6 and 7 are cross-sectional views illustrating a method of manufacturing a semiconductor device according to the fourth embodiment of the present invention.
6A, a Cu wiring layer 42 is formed as an inner lead on the tape substrate 41, the periphery of the Cu wiring layer 42 is covered with a protective film 43, and an exposed portion of the Cu wiring layer 42 is an Au plating layer. 44.

On the other hand, a pad electrode 46 is provided on the semiconductor chip 45, the pad electrode 46 is covered with a protective film 47, and an Au bump electrode 48 is formed on the pad electrode 46.
Then, when the tape substrate 41 is conveyed, the sealing resin 49 is disposed in the semiconductor chip mounting region of the tape substrate 41. Here, the sealing resin 49 disposed in the semiconductor chip mounting region may be in a paste form or on a film. Then, the tape holding frame 21a is lowered and the tape holding frame 21b is raised to clamp the tape substrate 41.

Next, as shown in FIG. 6B, the bonding stage 16 is raised while the push-up portion 18 is housed in the bonding stage 16, and the bonding stage 16 is pressed against the back surface of the tape substrate 41. Then, the vacuum pump 18 is turned on to suck the tape substrate 1 through the suction groove 17.
Here, it is possible to keep the upper surface of the bonding stage 16 flat by raising the bonding stage 16 while the push-up portion 18 is housed in the bonding stage 16. For this reason, the tape substrate 41 can be pressed onto the suction groove 17, and the tape substrate 41 can be stably adsorbed onto the bonding stage 16.

  Next, as shown in FIG. 7A, the semiconductor chip 45 sucked and held by the bonding head 12 is transferred onto the tape substrate 41. The Au bump electrode 48 and the Au plating layer 44 are pressed by pressing the Au bump electrode 48 on the Cu wiring layer 42 covered with the Au plating layer 44 while sucking the tape substrate 41 through the suction groove 17. At the same time, the periphery of the semiconductor chip 45 mounted on the tape substrate 41 is sealed with a sealing resin 49.

Next, as shown in FIG. 7B, while the tape substrate 41 is sucked through the suction groove 17, the push-up portion 18 is raised, and the push-up portion 18 is raised by the rise amount. Then, the semiconductor chip mounting area of the tape substrate 41 is pushed upward.
Here, by arranging the end portion of the push-up portion 18 so as to correspond to the end portion position of the semiconductor chip 45, the inclined surface 41a can be formed on the tape substrate 41 with the end portion of the semiconductor chip 45 as a boundary. The clearance between the end 45a of the chip 45 and the tape substrate 41 can be increased.

Further, by raising the push-up portion 18 while pressing the semiconductor chip 45 onto the tape substrate 41 with the bonding head 12, it is possible to prevent the semiconductor chip 45 from being displaced when the semiconductor chip mounting area is lifted. The inclined surface 41 a can be formed on the tape substrate 41 while suppressing the deterioration of the mounting accuracy of the semiconductor chip 45.
Then, as shown in FIG. 7C, when the inclined surface 41a is formed on the tape substrate 41, the push-up portion 18 is lowered and the suction of the tape substrate 41 is released. Then, the bonding head 12 and the bonding stage 16 are removed, and the clamps by the tape pressing frames 21a and 21b are released.

As a result, the semiconductor chip 45 can be mounted on the tape substrate 41 in a state where the semiconductor chip mounting region of the tape substrate 41 is fixed on the bonding stage 16, and the position of the end 45a of the semiconductor chip 45 is determined. As a boundary, the inclined surface 41a can be accurately formed on the tape substrate 41.
Further, by applying the sealing resin 49 on the tape substrate 41 and then mounting the semiconductor chip 45 on the tape substrate 41, the semiconductor chip 45 is bonded when the Au bump electrode 48 and the Au plating layer 44 are joined. Can be sealed with the sealing resin 49.

  For this reason, after mounting the semiconductor chip 45 on the tape substrate 41, it is not necessary to seal the semiconductor chip 45 with a sealing resin, and it is possible to mount the semiconductor chip 45 on the tape substrate 41 with high accuracy. The height of the Au bump electrode 48 can be reduced, the manufacturing process can be simplified, and the connection reliability between the semiconductor chip 45 and the tape substrate 41 can be improved. It becomes possible to reduce the contact failure of the chip 45.

  Further, the forming formed on the tape substrate 41 can be fixed by curing the sealing resin 49 in a state where the push-up portion 18 is raised. For this reason, even when the push-up portion 18 is lowered, the inclined surface 41a formed on the tape substrate 41 can be maintained as it is, and the shape of the inclined surface 41a can be stabilized. The clearance between the end 45a and the tape substrate 41 can be kept stable.

The perspective view which shows schematic structure of the bonding apparatus which concerns on 1st Embodiment. 9 is a flowchart showing a method for manufacturing a semiconductor device according to a second embodiment. Sectional drawing which shows the manufacturing method of the semiconductor device which concerns on 3rd Embodiment. Sectional drawing which shows the manufacturing method of the semiconductor device which concerns on 3rd Embodiment. Sectional drawing which shows the manufacturing method of the semiconductor device which concerns on 3rd Embodiment. Sectional drawing which shows the manufacturing method of the semiconductor device which concerns on 4th Embodiment. Sectional drawing which shows the manufacturing method of the semiconductor device which concerns on 4th Embodiment. Sectional drawing which shows the manufacturing method of the conventional semiconductor device.

Explanation of symbols

  1, 31, 41 Tape substrate, 2 Semiconductor chip mounting area, 3 Inner lead, 4, 35, 45 Semiconductor chip, 11, 15 Heater block, 12 Bonding head, 13, 22 Temperature controller, 14, 23 Vacuum pump, 16 Bonding stage, 17 Suction groove, 18 Push-up part, 20a, 20b Camera, 21a, 21b Tape holding frame, 24 Lift control device, 32, 42 Cu wiring layer, 33, 37, 43, 47 Protective film, 34, 44 Au plating Layer, 36, 46 Pad electrode, 38, 48 Au bump electrode, 31a, 41a Inclined part, 39, 49 Sealing resin

Claims (1)

A bonding stage that supports the tape substrate;
A push-up portion inserted into the bonding stage and capable of pushing up the inside of the tape substrate;
A suction part provided on the bonding stage and disposed around the push-up part;
Mounting means for mounting a semiconductor chip on the tape substrate;
With
The end of the push-up portion is disposed outside the bump electrode provided on the semiconductor chip and inside the end of the semiconductor chip,
The bonding apparatus according to claim 1, wherein an outer periphery of the push-up portion is disposed corresponding to an outer periphery of the semiconductor chip.

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