JP4289308B2 - Spindle motor control device, spindle motor control method, program thereof, and disk device - Google Patents

Description

  The present invention relates to a control device that controls a spindle motor that rotates a disk-shaped recording medium on which data is recorded, a control method thereof, a program thereof, and a disk device.

  In an optical disk, particularly a read-only optical disk such as a CD-ROM or DVD-ROM, the rotation of the spindle motor is controlled using data obtained from the reproduction signal. There are various methods for controlling the rotation of the spindle motor. The methods using the frame synchronization pattern recorded on the optical disc can be roughly divided into the following two types.

  One is a method of performing synchronization protection by detecting a frame synchronization pattern by pattern matching from a bit data string obtained by sampling an RF signal by applying a PLL (Phase Locked Loop) based on the reproduced RF signal.

  The other is that the RF signal is sampled with a fixed clock without applying a PLL, and from the data string, for example, the longest T (T is a clock cycle for reading a pit on the optical disk) is considered to be a frame synchronization pattern. There is a method of detecting the longest pattern and performing synchronization protection as necessary (for example, see paragraph [0004] of Patent Document 1). However, in this method, if the rotation of the disk fluctuates, if a data pattern having a long T is erroneously detected as a frame synchronization pattern, the synchronization protection performance is deteriorated and the stability of the spindle control is deteriorated. there were.

Therefore, in order to solve such a problem, there is a synchronization protection circuit that predicts a synchronization signal interval (time interval) and generates a detection window based on the predicted value (see, for example, paragraph [0014] of Patent Document 1). ). As a result, when the interval between the synchronization signals is not constant, specifically, for example, even when data recorded by the CLV (Constant Linear Velocity) method is reproduced by the CAV method, the synchronization signal can be detected.
JP 2000-187946 A (FIG. 2)

  However, even in the circuit described in Patent Document 1, if a frame synchronization pattern is erroneously detected due to a disturbance or the like within a period in which the detection window is generated, synchronization protection cannot be achieved. In order to always accurately grasp the linear velocity due to the rotation of the disk, it is required that the synchronization pattern can be reliably detected even if there is such a disturbance.

  In view of the circumstances as described above, an object of the present invention is to provide a spindle motor control device, a spindle motor control method, a program therefor, and a disk device that can reliably detect a synchronization pattern.

  In order to achieve the above object, a spindle motor control device according to the present invention is a spindle motor for rotating a disk-shaped recording medium on which a signal pattern including a plurality of synchronization signals provided at a constant first interval is recorded. A control unit that generates a clock, counts the number of generated clocks, reproduces the signal pattern as an RF signal, and samples the reproduced RF signal using the clock; Generating means for generating a bit string of a signal pattern; storage means for storing a first count value of the number of clocks corresponding to a constant second interval longer than the first interval; and the stored first A first setting means for setting a first threshold value of the pattern length of the signal pattern within the second interval according to the count value; Detecting means for detecting the synchronization signal within the second interval based on the first threshold while the first setting means is updating the first threshold every second interval; And a control means for controlling the spindle motor based on the synchronization signal.

  In the present invention, the synchronization signal is detected based on the first threshold within a second interval longer than the first interval, which is the interval between the synchronization signals. The clock has a predetermined frequency and is generated by, for example, a PLL. In the present invention, even when the PLL is unlocked due to disturbance or the like, the signal pattern is monitored at every second interval of a certain length, so that the synchronization signal can be detected with high accuracy. For example, when the detection unit detects a signal pattern exceeding the first threshold value, it may be used as a synchronization signal.

  The first interval is the length between the patterns of the synchronization signal actually recorded on the recording medium. The second interval is preferably sufficiently longer than the first interval. However, the present invention can be realized if the length is such that at least two true synchronization signals exist within the second interval.

  The spindle motor is a CLV (Constant Linear Velocity) type, but is not limited to this, and may be a CAV (Constant Angular Velocity), ZCLV (Zoned CLV), or the like.

  The signal pattern refers to a mark, pit, or space on the disk, or a combination of them as one unit. The pattern length refers to the total number of samples (count value) when the pattern is sampled with the sampling clock when the PLL is not in the locked state.

  Examples of the disk-shaped recording medium include an optical disk, a magneto-optical disk, and a magnetic disk.

  According to an aspect of the present invention, the spindle motor control device calculates the pattern length of the synchronization signal based on a second count value of the number of clocks corresponding to the first interval sampled by the generation unit. And a second setting unit that sets a second threshold value of the pattern length based on the calculated pattern length, and the detection unit is configured to perform the first setting by the second setting unit. The synchronization signal is detected based on both the first and second thresholds while updating the threshold of 2 at each first interval. In the present invention, since two threshold values are set, it is possible to detect the synchronization signal with high accuracy. For example, when the detection unit detects a data pattern exceeding both the first and second thresholds, it may be used as a synchronization signal.

  According to an aspect of the present invention, the spindle motor control device further includes detection window generation means for generating a detection window signal for each of the first intervals based on the second count value, and the detection The means detects the synchronization signal based on the second threshold within a period in which the detection window signal is generated. In the present invention, in addition to the two threshold values, erroneous detection is further eliminated by the detection window, so that it is possible to detect the synchronization signal with higher accuracy.

  According to an aspect of the present invention, the detection unit detects the detection for a predetermined period when the signal pattern exceeding the first threshold is not detected within a period during which the detection window signal is generated. The synchronization signal is detected using the first threshold without using the window and the second threshold. Thereby, even if the synchronization protection is not established, the synchronization signal can be detected based on the first threshold value. The predetermined period is, for example, that at least one signal pattern exceeding the first threshold is detected after the detection window (the detection window when the signal pattern exceeding the first threshold is not detected) is closed. This is the period between However, the predetermined period is not limited to this.

  According to an aspect of the present invention, the first setting means sets the first threshold based on a synchronization signal having a maximum pattern length among the synchronization signals detected within the second interval. To do. The first threshold value set in this way is used, for example, within the next second interval. That is, the synchronization signal is detected while the first threshold value is successively updated by the detection means.

  The spindle motor control method according to the present invention includes a plurality of synchronization signals provided at fixed first intervals, recorded on a disk-shaped recording medium, counting the number of clocks generated by generating a clock. A signal pattern is reproduced as an RF signal, and the reproduced RF signal is sampled using the generated clock, thereby generating a bit string of the signal pattern, and a constant second longer than the first interval. A first count value of the number of clocks corresponding to the interval is stored, and a first threshold value of the pattern length of the signal pattern is set within the second interval according to the stored first count value And detecting the synchronization signal within the second interval based on the first threshold while at least updating the first threshold every second interval. Based on the synchronization signal, it controls the spindle motor for rotating the recording medium.

  The program according to the present invention includes a step of generating a clock and counting the number of generated clocks, and the signal including a plurality of synchronization signals recorded on a disc-shaped recording medium and provided at a constant first interval Regenerating a pattern as an RF signal, sampling the regenerated RF signal using the generated clock to generate a bit string of the signal pattern, and a constant longer than the first interval Storing a first count value of the number of clocks corresponding to a second interval; and a pattern length of the signal pattern within the second interval according to the stored first count value. Setting a threshold value of 1, and at least updating the first threshold value at the second interval while updating the second threshold based on the first threshold value. Detecting said synchronization signal in the inner, based on the detected synchronization signal, and a step of controlling a spindle motor for rotating the recording medium.

  A disk apparatus according to the present invention includes a spindle motor that rotates a disk-shaped recording medium on which a signal pattern including a plurality of synchronization signals provided at a constant first interval is recorded, a clock, and the generated clock Clock means for counting the number, generating means for generating the bit string of the signal pattern by reproducing the signal pattern as an RF signal, and sampling the reproduced RF signal using the clock, and the first Storage means for storing a first count value of the number of clocks corresponding to a constant second interval longer than the interval, and within the second interval according to the stored first count value, First setting means for setting a first threshold value of the pattern length of the signal pattern, and at least the first threshold value is set to the second interval by the first setting means. And detecting means for detecting the synchronization signal within the second interval based on the first threshold, and control means for controlling the spindle motor based on the detected synchronization signal. .

  The disk device is a device capable of reproducing data from a recording medium such as an optical disk, a magneto-optical disk, or a magnetic disk.

  As described above, according to the present invention, for example, even when the PLL is unlocked due to a disturbance or the like, the synchronization pattern can be reliably detected, and the spindle motor can be stably controlled.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

  FIG. 1 is a block diagram showing an optical disc apparatus according to an embodiment of the present invention.

  The optical disc apparatus 101 includes a spindle motor 103 that rotates and drives an optical disc 102 such as a DVD ± R / RW, a CD-R / RW, and a Blu-ray disc, a PD (photo detector) (not shown) and an optical pickup 104 that has a laser light source, A feed motor 105 that moves the optical pickup 104 in the radial direction of the optical disk 102 is provided.

  The optical disc apparatus 101 is mounted on a spindle controller 103, an optical pickup 104 and a servo controller 106 that controls driving of the feed motor 105, an entire apparatus, a system controller 107 that performs individual control such as signal processing and servo control, and the optical pickup 104. RF reproduction unit 109 that reproduces a focus error signal, a tracking error signal, and a signal output from the optical pickup 104 as an RF signal based on various signals output from the received PD, and the RF signal as shown in FIG. A slice is generated at a slice level (SL), and a clock is generated from the RF signal reproduced by the RF sampling unit 110 and the RF reproducing unit 109 that binarizes the RF signal using the sampling clock, and this is used as a sampling clock to generate an RF sample. PL supplied to the unit 110 Unit 116, signal modulation / demodulation and addition of ECC, signal modulator / demodulator & ECC unit 111 for performing error correction processing based on ECC, buffer memory 112 for temporarily storing modulated / demodulated data and error-corrected data, video A video / audio processing unit 113 for decoding audio data and the like, and a D / A converter 114 for analog output.

  Further, the optical disc apparatus 101 uses an interface 115 for connecting an external computer 130 that holds data to be written on the optical disc 102, and a laser based on data modulated by adding an error correction code by the signal modulator / demodulator & ECC unit 111. The laser control unit 108 generates pulses and drives the laser light source.

  Specifically, the RF reproduction unit 109 includes, for example, an RF amplifier, a filter, an AGC (auto gain controller), a waveform equalizer, and the like (not shown).

  The PLL unit 116 includes a phase comparator (not shown), a crystal oscillator, a VCO (Voltage Controlled Oscillator), a loop filter, and the like.

  The RF sample unit 110 normally performs binarization processing using a sampling clock supplied in a locked state by the PLL unit 116. However, when the spindle motor control device (described later) according to the present embodiment operates. As the sampling clock, a clock that is not synchronized with the RF signal, that is, the PLL unit 116 is not locked is used. That is, the spindle motor control device according to the present embodiment is intended to stably control the spindle motor 103 even when the PLL is unlocked due to some cause, for example, disturbance. As the clock condition, since it is necessary to obtain the pattern length (pattern length) from the RF signal, the average frequency needs to be known, and it is desirable that the frequency variation is small.

  A pattern refers to a mark, pit, space on the disk, or a combination of these to form one unit. The pattern length refers to the total number of samples (clock count value) when the pattern is sampled with the sampling clock in a state where the PLL is not locked.

  A recording / reproducing operation of the optical disc apparatus 101 configured as described above will be described.

  At the time of data recording, the digital data input from the external computer 130 to the interface 115 is modulated by adding an error correction code by the signal modulator / demodulator & ECC unit 111. A pulse is generated by the laser control unit 108 based on the modulated data, and the optical disk 102 is irradiated with the laser light via the optical pickup 104, whereby the data is recorded. During data recording, servo control is appropriately performed by the servo control unit 106.

  On the other hand, at the time of data reproduction, when the optical disc 102 is irradiated with laser light, the return reflected light is detected by a PD (not shown). The reflected light detected by the PD is amplified and waveform equalized by the RF reproducing unit 109 to reproduce the RF signal, and the RF sample unit 110 generates a bit string in which the RF signal is binarized. The generated bit string is subjected to signal demodulation and error correction by the signal modulation / demodulation & ECC unit 111. The demodulated signal is separated into video data and audio data by the video / audio processing unit 113, subjected to D / A conversion, and analog output. During data reproduction, servo control is appropriately performed by the servo control unit 106.

  FIG. 3 is a block diagram showing a spindle motor control apparatus according to an embodiment of the present invention.

  The spindle motor control device 10 functions as a part of the servo control unit 106 shown in FIG. The spindle motor control device 10 includes an UP detection unit (HUNT) 1, an UP detection unit (SYNC) 2, an UP detection result selector 3, an UP interval counter & synchronization protection unit 4, and a spindle control & motor driver 5.

  The UP detection unit (HUNT) 1 receives the bit string data 31 binarized by the RF sample unit 110, and from the input bit string data 31, UP (unique pattern (this is a synchronization signal) in the frame synchronization pattern in the HUNT state. )) Is detected. The UP detection unit (HUNT) 1 outputs an UP detection timing signal 34 to the UP detection result selector 3 at the timing when UP is detected.

  The UP detection unit (SYNC) 2 similarly receives the bit string data 31 and detects the UP in the synchronization pattern in the SYNC state from the input bit string data 31. The UP detection unit (SYNC) 2 outputs an UP detection timing signal 35 to the UP detection result selector 3 at the timing when UP is detected.

  As will be described later, the HUNT state refers to a state in which the UP detection unit (HUNT) 1 detects UP in a state where synchronization protection is not applied. The SYNC state refers to a state in which the UP detection unit (SYNC) 2 detects UP while synchronization protection is applied. The synchronization protection here is an operation of synchronization protection which is one of the processes of the UP interval counter & synchronization protection unit 4 and is different from the synchronization state by the PLL. Originally, if the PLL is in a locked state (synchronized state), the linear velocity can be grasped from the number of clocks in the UP interval and the clock frequency.

  Here, the difference between the UP detection unit (HUNT) 1 and the UP detection unit (SYNC) 2 is whether or not a detection window is used for UP detection as described later. The UP detection unit (HUNT) 1 does not use the detection window because the detected UP is still untrustworthy, that is, the UP is always detected and UP synchronization protection is drawn. Since the UP protection unit (SYNC) 2 has already been protected against synchronization, it is assumed that the detected UP can be trusted, and a detection window is generated based on the UP interval count value 38, thereby reducing erroneous UP detection.

  The UP detection result selector 3 selects either the UP detection unit (HUNT) 1 or the UP detection unit (SYNC) 2 depending on whether the UP interval counter & synchronization protection unit 4 is in the synchronization protection state or not in the synchronization protection state. Select. That is, the UP detection result selector 3 selects the detection result of the UP detection unit (HUNT) 1 when the synchronization protection state of the UP interval counter & synchronization protection unit 4 is in the HUNT state, and the synchronization protection state is in the SYNC state. In this case, the detection result of the UP detection unit (SYNC) 2 is selected. The UP detection result selector 3 outputs the detection result signal 36, that is, the selected UP detection timing signal 36 to the UP interval counter & synchronization protection unit 4. The UP interval is the length between UPs actually recorded on the disc 102.

  The UP interval counter & synchronization protection unit 4 is a synchronization protection function using the UP interval counter that counts the UP interval with the sampling clock, and the count value and the UP detection timing signal 36 (the one selected from the signals 34 and 36). And have. For example, here, the synchronization protection unit has a state machine of two states. They are the HUNT state and the SYNC state, respectively. The UP interval counter & synchronization protection unit 4 uses the UP detection timing signal 36 selected by the UP detection result selector 3 and tries to establish synchronization because the synchronization is not established if the state is the HUNT state. When synchronization is established, the state enters the SYNC state, and the UP interval counter & synchronization protection unit 4 executes the synchronization protection operation. The UP interval counter & synchronization protection unit 4 supplies this synchronization protection state 39 (whether or not it is in a synchronization protection operation state) to the UP detection result selector 3.

  The UP interval counter & synchronization protection unit 4 outputs the UP interval count value 38 to the UP detection unit (SYNC) 2 as described above. Further, the UP interval counter & synchronization protection unit 4 generates an UP timing signal 37 from the UP interval counter and outputs it to the spindle control & motor driver 5. The UP timing is a signal that complements the timing when the synchronization protection is established and the UP cannot be detected due to disturbance, and outputs the timing stably for each frame synchronization pattern, and is suitable as an input for spindle control. is there.

  The spindle control & motor driver 5 inputs the UP timing 37 from the UP interval counter & synchronization protection unit 4 and also receives the rotation timing signal 33 from the spindle motor 103 and controls the spindle motor 103 using them. Then, the disk is rotated so that the linear velocity is appropriate for the reproduction process of the RF reproduction unit 109.

  FIG. 4 is a block diagram showing a configuration of the UP detection unit (SYNC) 2.

  The UP detection unit (SYNC) 2 includes a unit interval & pattern threshold setting register 11, a maximum pattern length measurement holding unit 13, a first offset amount setting register 12, and a first UP detection threshold determination unit 14.

  The unit interval & pattern threshold setting register 11 holds a unit interval of a predetermined length set in advance and maximum and minimum thresholds of a preset pattern length. The unit interval is independent from the UP interval and is longer than the UP interval. The maximum and minimum threshold values of the pattern length are given to the maximum pattern length measurement holding unit 13 in order to detect UP from the pattern length measured and held by the maximum pattern length measurement holding unit 13. The maximum pattern length measurement holding unit 13 detects and holds the maximum pattern length in the unit interval from the RF bit string 31 using the maximum and minimum threshold values given from the unit interval & pattern threshold setting register 11. The reason for setting the minimum threshold is to deal with an error caused by a defect on the disk 102, for example, and the minimum threshold is also set for the lower limit of the pattern length. The first offset amount setting register 12 holds an offset amount in the pattern length direction in advance. The first UP detection threshold value determination unit 14 determines a threshold value for UP detection based on the offset amount and the maximum pattern length at the unit interval held by the maximum pattern length measurement holding unit 13.

  The UP detection unit (SYNC) 2 includes an UP interval holding unit 22, an UP length calculation unit 21, a second UP detection threshold value determination unit 18, a second offset amount setting register 19, an UP detection window width setting register 24, An UP detection window generator 23 is provided.

  The UP interval holding unit 22 holds the count value 38 of the UP interval described above. The UP length calculation unit 21 calculates the UP length based on the count value held by the UP interval holding unit 22. The UP length calculation unit 21 can obtain the UP length by calculation because the UP interval and the UP length have a substantially proportional relationship. The second offset amount setting register 19 holds an offset amount in the pattern length direction in advance. The second UP detection threshold value determination unit 18 determines a threshold value for UP detection in consideration of the offset amount from the UP length calculated by the UP length calculation unit 21. The UP detection window width setting register 24 holds a preset detection window width for UP detection. The UP detection window generator 23 generates a detection window according to the detection window width held by the UP detection window width setting register 24 and the UP interval held by the UP interval holding unit 22.

  The offset amount, the maximum pattern length, the threshold value, and the like may be held by the count value of the lock range clock of the PLL unit 116 or the count value of the fixed clock of the crystal oscillator.

  The UP detection unit (SYNC) 2 includes a first fake UP exclusion unit 15, a second fake UP exclusion unit 16, and a third fake UP exclusion unit 17.

  The first false UP exclusion unit 15 excludes the false UP from the bit string data 31 using the threshold (second threshold) determined by the second UP detection threshold determination unit 18. A fake UP is a pattern that is not a UP and has a high possibility of being erroneously detected as a UP. The second false UP exclusion unit 16 excludes the false UP using the threshold (first threshold) determined by the first UP detection threshold determination unit 14. The third false UP exclusion unit 17 further eliminates false UPs using the detection window generated by the UP detection window generation unit 23.

  FIG. 5 is a block diagram showing a configuration of the UP detection unit (HUNT) 1. The UP detection unit (HUNT) 1 includes a unit interval & pattern threshold setting register 41, a maximum pattern length measurement holding unit 43, a third offset amount setting register 42, a third UP detection threshold determination unit 44, and a fourth fake UP. An exclusion unit 46 is provided. Each of these units includes a unit interval & pattern threshold value setting register 11, a maximum pattern length measurement holding unit 13, a first offset amount setting register 12, and a first UP detection threshold value of the UP detection unit (SYNC) 2 shown in FIG. Since the determination unit 14 and the second fake UP exclusion unit 16 have the same functions, description thereof will be omitted.

  The operation of the spindle motor control device 10 configured as described above will be described. 6, 7 and 8 are diagrams for explaining the operation.

  In FIG. 6, the vertical axis of the upper graph indicates the pattern lengths of all patterns detected from the RF bit string data 31. A pattern indicated by a thick black solid line is true UP (= UP1, UP2, UP3,...), And a pattern indicated by gray is data other than UP. The horizontal axis indicates time. Symbol F indicates the change in the rotational speed of the disk 102. In this figure, the pattern length is shifted so as to become longer with time (the inclination of F is not relevant now).

  Here, FIG. 6 illustrates a state in which the UP length is increased with time. This is a state in which the linear velocity of the disk 102 is gradually decreasing. Normally, when the PLL unit 116 is locked, even if the linear velocity is gradually decreasing, the PLL unit 116 tries to follow this, so the clock frequency output from the PLL unit 116 is also descend. Therefore, the UP lengths UP1, UP2, UP3,... In FIG. 6 are normally constant because they are the same number of clocks. However, in a state where the PLL is unlocked for some reason, the clock frequency does not attempt to follow, so an RF signal is observed at a certain clock frequency, for example. As a result, the UP length apparently changes. FIG. 6 shows how the UP length changes apparently.

  Symbol D (= D1, D2, D3,...) Is a threshold value determined by the second UP detection threshold value determination unit 18 of the UP detection unit (SYNC) 2. This threshold value D (= D1, D2, D3,...) Is, for example, an offset amount UPoff set by the second offset amount setting register 19 from the previous UP length calculated by the UP length calculation unit 21. It is the subtracted value. For example, when the UP length of UP1 is calculated, a value obtained by subtracting the offset amount UPoff from the UP length is D1. Since the UP length increases with time, the threshold value D increases accordingly.

  On the other hand, the symbol W (= W1, W2, W3,...) Is a detection window generated by the UP detection window generation unit 23. The detection window W is generated based on the UP interval Y (= Y1, Y2, Y3,...) Held by the UP interval holding unit 22. This will be specifically described. For example, when attention is paid to the detection window W2, the timing at which the same interval as the interval Y1 between UP1 and UP2 as the previous UP interval elapses from the timing at which the previous UP2 was detected is the median value W2c of the period of the detection window W2. Thus, the detection window W2 is generated. The detection window width at this time is preset by the UP detection window width setting register 24.

  As described above, by generating the threshold value D and the detection window W, it is possible to accurately detect the UP length that changes. For example, when the threshold value D2 is set based on the UP length of UP2 and the interval X2, which is the detection window generation timing, is set from the UP interval Y1, the threshold value D2 is exceeded within the period in which the detection window W2 is generated. The pattern, that is, UP3 is estimated to be true UP. This is processed by the first fake UP exclusion unit 15 and the third fake UP exclusion unit 17 shown in FIG. Thereby, true UP is detected with high accuracy. The operation by the second false UP exclusion unit 16 will be described later.

  FIG. 7 is a diagram illustrating a state in which a pseudo lock occurs when a false UP is excluded by the first false UP exclusion unit 15 and the third false UP exclusion unit 17. This will be described below.

  For example, true UP2 is detected by an operation similar to the operation of FIG. When the true UP2 is detected, D2 is set from the UP length of the UP2 as in the operation of FIG. 6, and the detection window W2 is generated based on the interval X2 which is the same interval as the previous UP interval Y1. . As a result, a false UPf1, which is a pattern exceeding the threshold D2, may be detected within the period in which the detection window W2 is generated. When the false UPf1 is detected in this way, the false UP interval Yf2 is set at the timing when the false UPf1 is detected, and an incorrect threshold Df3 is set. Based on the false UP interval Yf2, Detection window Wf3 is generated. As a result, true UP3 is not detected. In this case, the pseudo lock state (synchronization protection state) continues based on the fake UP, and as a result, data cannot be properly reproduced from the disk 102.

  Therefore, in the present embodiment, the second fake UP exclusion unit 16 excludes the fake UP. FIG. 8 shows such a state.

  In FIG. 8, symbol A (A 1, A 2, A 3,...) Indicates a unit interval of a fixed length set by the unit interval & pattern threshold setting register 11. Symbol C (C1, C2, C3,...) Is a pattern length threshold set for each unit interval A. In FIG. 8, the interval is set to include two true UPs. However, the true UP included in the unit interval A may be larger, and is preferably sufficiently longer than the UP interval Y. As described above, this unit interval A is independent of the UP interval Y.

  For example, as in the case shown in FIG. 7, for example, when false UPf1 is detected after true UP1 and UP2 are detected, an erroneous detection window Wf3 is generated by the UP detection window generator 23, The second UP detection threshold value determination unit 18 sets an incorrect threshold value Df3. Therefore, fake UPf2 is detected in this state. However, the maximum pattern length measurement holding unit 13 holds the UP length of UP2, which is the maximum pattern length in the previous unit interval A1. Therefore, since the first UP detection threshold value determination unit 14 sets the threshold value C2 using the UP length of the UP2, the UP timing until a pattern exceeding the threshold value C within the unit interval A2, that is, the true UP4 appears. Is not output.

  When UP 4 is detected by the UP detection unit (SYNC) 2, that is, when UP is detected without a detection window, the UP interval counter & synchronization protection unit 4 indicates to the UP detection result selector 3 that it is in the HUNT state. Tell. Then, the UP detection result selector 3 shifts to the HUNT state by selecting the input of the UP detection timing signal 34 from the UP detection unit (HUNT) 1.

  In the HUNT state, the UP detection unit (HUNT) 1 uses only the threshold C in the unit interval A as shown in FIG. Returning to FIG. 8, specifically, in the HUNT state, after the unit interval A2 ends after UP4 is detected, a new threshold C3 is set in the next unit interval A3, and a true UP5 exceeding the threshold C3 is set. Is detected. In this way, establishment of synchronization protection is attempted in the HUNT state.

  When the true UP5 is detected by the threshold C3, the UP detection timing 34 of the true UP5 is input to the UP detection result selector 3, and the selected UP detection timing signal 36 at that timing is the UP interval counter & Input to the synchronization protection unit 4. The UP detection result selector 3 selects the input of the UP detection timing signal 35 from the UP detection unit (SYNC) 2 when true UP5 is detected, and thereafter, UP detection in the SYNC state is performed. Will continue. In other words, in the HUNT state, for example, when two UPs of UP4 and UP5 are detected, the SYNC state is entered. However, the present invention is not limited to the case where the UP is detected twice as described above, and the HUNT state may be continued until a large number of UPs are detected twice or more.

  In the HUNT state, the UP interval counter & synchronization protection unit 4 outputs the detected interval Z1 between UP4 and UP5 to the UP detection unit (SYNC) 2 as the UP interval count value 38. Then, after shifting to the SYNC state, the UP detection unit (SYNC) 2 generates the detection window W4 using the count value Z1 (= X3), and continues the processing in the SYNC state as described above.

  Here, in FIG. 8, if UPf2 is detected exceeding the threshold value C2, it is detected within the detection window Wf3 and does not shift to the HUNT state. However, the maximum pattern length (for example, UP4) is always searched in the unit interval A2, which is an absolute section, and the threshold C3 is set based on the maximum pattern length in the next unit interval A3. Thereby, true UP can be detected reliably.

  Based on the true UP detected in this way, the UP interval counter & synchronization protector 4 generates an UP timing signal 37 (see FIG. 3) shown in the lower part of FIG. 8 and sends it to the spindle control & motor driver 5. Output. The spindle control & motor driver 5 uses the UP timing 37 to control the spindle motor 103, thereby rotating the disk so as to achieve an appropriate linear velocity.

  As described above, in the present embodiment, the threshold value C is set within the unit interval A having a fixed length that is an absolute interval longer than each UP interval Y, and the threshold value C is updated while the threshold value C is updated for each unit interval A. A synchronization signal is detected based on As a result, even when the PLL is unlocked due to a disturbance or the like, the synchronization signal can be detected with high accuracy.

  In addition, according to the present embodiment, it is possible to avoid the continuation of the pseudo lock as described with reference to FIG. 7, to prevent the deterioration of the accuracy of the linear velocity estimation, and to expect an improvement in the stability of the spindle control. .

  The present invention is not limited to the embodiment described above, and various modifications are possible.

  For example, instead of using the first and third false UP exclusion units 15 and 17, only the second false UP exclusion unit 16 using the threshold C in the unit interval A may be used.

  In the above description, in FIG. 7, the threshold value C is set by an offset from the maximum pattern length in the previous unit interval. However, the threshold value C may be an average value of a plurality of true UP lengths, or may be a median value (a median value of all UP lengths).

1 is a block diagram showing an optical disc apparatus according to an embodiment of the present invention. It is a figure which shows operation | movement of the RF sample part which binarizes an RF signal. It is a block diagram which shows the spindle motor control apparatus which concerns on one embodiment of this invention. It is a block diagram which shows the structure of UP detection part (SYNC). It is a block diagram which shows the structure of UP detection part (HUNT). FIG. 5 is a diagram showing an operation of UP detection using the first and third false UP exclusion units shown in FIG. 4. FIG. 7 is a diagram illustrating a case where a pseudo lock occurs in the operation of FIG. 6. It is a figure which shows the operation | movement of UP detection using the 1st, 2nd and 3rd false UP exclusion part. It is a figure which shows the operation | movement of UP detection in a HUNT state.

Explanation of symbols

C, D ... Threshold W ... Detection window Y ... UP interval A ... Unit interval 1 ... UP detection unit (HUNT)
2 ... UP detector (SYNC)
3 ... UP detection result selector 4 ... UP interval counter & synchronization protection unit 5 ... Motor driver 10 ... Spindle motor controller 11, 41 ... Unit interval & pattern threshold setting register 12 ... First offset amount setting register 13, 43 ... Maximum Pattern length measurement holding unit 14... First UP detection threshold value determination unit 14... First detection threshold value determination unit 18... Second UP detection threshold value determination unit 19. Second offset amount setting register 21 ... UP length calculation unit 22 ... UP interval holding unit 23 ... UP detection window generation unit 24 ... UP detection window width setting register 38 ... UP interval count value 42 ... Third offset amount setting register 44 ... third UP detection threshold value determination unit 46 ... fourth false UP exclusion unit 101 ... optical disc apparatus 102 ... optical disc 103 ... spindle motor

Claims (7)

A spindle motor control device for rotating a disk-shaped recording medium on which a signal pattern including a plurality of synchronization signals provided at a constant first interval is recorded,
A clock means for generating a clock and counting the number of generated clocks;
Generating means for reproducing the signal pattern as an RF signal, sampling the reproduced RF signal using the clock, and generating a bit string of the signal pattern;
Storage means for storing a first count value of the number of clocks corresponding to a constant second interval including at least two of the synchronization signals ;
Among the synchronization signals detected in the immediately preceding second interval, which is a threshold value of the pattern length of the signal pattern within the second interval according to the stored first count value First setting means for setting the first threshold based on a synchronization signal having a maximum pattern length ;
Detecting means for detecting the synchronization signal within the second interval based on the first threshold while at least updating the first threshold every second interval by the first setting means;
The detected absence pins dollars motor controller to and control means for controlling the spindle motor on the basis of the sync signal. The spindle motor control device according to claim 1,
Calculation means for calculating a pattern length of the synchronization signal based on a second count value of the number of clocks corresponding to the first interval sampled by the generation means;
A second setting means for setting a second threshold of the pattern length based on the calculated pattern length;
Said detecting means, said while updating the second threshold for each of the first interval by the second setting means, based on both of the first and second thresholds, Luz detect the synchronization signal Pindle motor control device. The spindle motor control device according to claim 2,
Further comprising detection window generating means for generating a detection window signal for each of the first intervals based on the second count value;
It said detection means, said detection window signal based on the second threshold value within a period that is generated to detect the synchronization signal Angeles pins dollars motor controller. The spindle motor control device according to claim 3,
The detection means does not use the detection window and the second threshold for a predetermined period when the signal pattern exceeding the first threshold is not detected within a period in which the detection window signal is generated. detection to Luz pin dollars motor controller the synchronization signal by using the first threshold value. Count the number of clocks generated by generating the clock,
Reproducing the signal pattern including a plurality of synchronization signals provided at a constant first interval recorded on a disk-shaped recording medium as an RF signal,
By sampling the reproduced RF signal using the generated clock, a bit string of the signal pattern is generated,
Storing a first count value of the number of clocks corresponding to a constant second interval including at least two of the synchronization signals ;
Among the synchronization signals detected in the immediately preceding second interval, which is a threshold value of the pattern length of the signal pattern within the second interval according to the stored first count value , Setting the first threshold based on the synchronization signal of the maximum pattern length ,
Detecting the synchronization signal within the second interval based on the first threshold while at least updating the first threshold every second interval;
The detected on the basis of the sync signal, the control spindle motor for rotating the recording medium away pins dollars motor control method. Generating a clock and counting the number of generated clocks;
Reproducing the signal pattern recorded on the disc-shaped recording medium and including a plurality of synchronization signals provided at constant first intervals as an RF signal;
Sampling the regenerated RF signal using the generated clock to generate a bit string of the signal pattern;
Storing a first count value of the number of clocks corresponding to a constant second interval including at least two of the synchronization signals ;
Among the synchronization signals detected in the immediately preceding second interval, which is a threshold value of the pattern length of the signal pattern within the second interval according to the stored first count value Setting the first threshold based on a synchronization signal having a maximum pattern length ;
Detecting the synchronization signal within the second interval based on the first threshold while updating the first threshold at least every second interval;
And a step of controlling a spindle motor that rotates the recording medium based on the detected synchronization signal. A spindle motor for rotating a disk-shaped recording medium on which a signal pattern including a plurality of synchronization signals provided at a constant first interval is recorded;
A clock means for generating a clock and counting the number of generated clocks;
Generating means for reproducing the signal pattern as an RF signal and generating the bit string of the signal pattern by sampling the reproduced RF signal using the clock;
Storage means for storing a first count value of the number of clocks corresponding to a constant second interval including at least two of the synchronization signals ;
Among the synchronization signals detected in the immediately preceding second interval, which is a threshold value of the pattern length of the signal pattern within the second interval according to the stored first count value First setting means for setting the first threshold based on a synchronization signal having a maximum pattern length ;
Detecting means for detecting the synchronization signal within the second interval based on the first threshold while at least updating the first threshold every second interval by the first setting means;
The detected provided to Lud disk device and control means for controlling the spindle motor on the basis of the sync signal.