JP4192941B2 - Recording medium, recording apparatus, and recording method - Google Patents

Description

The present invention relates to a recording medium, a recording apparatus and a recording method such as an optical disc.

As a technique for recording / reproducing digital data, optical disks (including magneto-optical disks) such as CD (Compact Disk), MD (Mini-Disk), and DVD (Digital Versatile Disk) are used as recording media. There is data recording technology. An optical disk is a generic term for recording media that irradiate laser light onto a disk in which a thin metal plate is protected with plastic, and read signals by changes in reflected light.
The optical disc includes, for example, a read-only type as known as CD, CD-ROM, DVD-ROM, MD, CD-R, CD-RW, DVD-R, DVD-RW, DVD + RW, DVD -There is a type in which user data can be recorded as known in RAM and the like. In the recordable type, data can be recorded by using a magneto-optical recording method, a phase change recording method, a dye film change recording method, or the like. The dye film change recording method is also called a write-once recording method, and can be recorded only once and cannot be rewritten. On the other hand, the magneto-optical recording method and the phase change recording method can rewrite data and are used for various purposes such as recording of various content data such as music, video, games, application programs and the like.
In recent years, a high-density optical disk called DVR (Data & Video Recording) has been developed, and the capacity has been significantly increased.

In order to record data on a recordable disc such as a magneto-optical recording method, a dye film change recording method, a phase change recording method, etc., a guide means for tracking the data track is required. Grooves (grooves) are formed in advance as pregrooves, and the grooves or lands (cross-section plateau-like portions sandwiched between the grooves and the grooves) are used as data tracks.
Further, it is necessary to record address information so that data can be recorded at a predetermined position on the data track, but this address information may be recorded by wobbling (meandering) the groove.

That is, a track for recording data is formed in advance as a pregroup, for example, and the side wall of this pregroup is wobbled corresponding to the address information.
In this way, the address can be read from the wobbling information obtained as reflected light information at the time of recording or reproduction. For example, even if pit data indicating the address is not formed on the track in advance, the desired position can be read. Data can be recorded and reproduced.
By adding address information as a wobbling groove in this way, for example, it becomes unnecessary to provide an address area discretely on a track and record an address as, for example, pit data. Recording capacity can be increased.
The absolute time (address) information expressed by such a wobbling groove is called ATIP (Absolute Time In Pregroove) or ADIP (Adress In Pregroove).

By the way, especially for rewritable discs, in addition to address information and information recorded / reproduced by the user (user data), additional information such as disc attributes and numerical values used for control, recording / reproduction power, pulse conditions, etc. Like the address information, it must be recorded on the disk in advance. Such additional information is required to have high reliability.
The reason why high reliability is required is that, for example, unless additional information for attributes and control is obtained accurately, control operations such as obtaining optimum recording conditions cannot be performed correctly on the user side device. It is.

As a method for previously recording such information on a disc, it is known to form embossed pits on the disc.
However, in consideration of high-density recording / reproducing on an optical disc, the pre-recording method using embossed pits is inconvenient.
In the case of recording / reproducing with high density on an optical disc, it is necessary to reduce the depth of the groove. In a disc in which grooves and embossed pits are produced simultaneously by a stamper, it is very difficult to make the depths of grooves and embossed pits different. For this reason, the depth of the embossed pits must be the same as the depth of the grooves.
However, when the depth of the emboss pit becomes shallow, there is a problem that a signal with good quality cannot be obtained from the emboss pit.

For example, a laser diode with a wavelength of 405 nm and an objective lens with NA = 0.85 are used as an optical system, and a track pitch is 0.32 μm and a linear density is 0.12 μm / bit on a disk with a cover (substrate) thickness of 0.1 mm. By recording and reproducing the phase change mark (phase change mark), it is possible to record and reproduce a capacity of 23 GB (gigabytes) on an optical disk having a diameter of 12 cm.
In this case, the phase change mark is recorded / reproduced on a groove formed in a spiral shape on the disc. However, in order to suppress media noise for higher density, the groove depth is about 20 nm, that is, Λ / 13 to λ / 12 is preferable for the wavelength λ.
On the other hand, in order to obtain a good quality embossed pit signal, the depth of the embossed pit is preferably λ / 8 to λ / 4. Was not obtained.
Under such circumstances, a method for pre-recording necessary additional information in place of the emboss pit has been demanded. In addition, the additional information is required to be recorded with high reliability.

  In view of these circumstances, an object of the present invention is to perform appropriate recording as additional information recorded in advance together with address information and to improve reliability.

For this reason, the recording medium of the present invention is a recording medium on which the first data is recorded by a rewritable or additionally writable recording method, and has a groove in which the second data is recorded in a continuous wobble, The second data is composed of a first block including address information and a part of the additional information, and the additional information included in the predetermined number of the first blocks is the second error correction method. The first block is encoded by the second error correction method, and the address unit is synthesized by combining the first block and at least the synchronization information. is configured, the first data, along with being recorded in units of integral multiples of the address unit, recorded for the recording area in units that correspond to three of the address unit, the upper The address information includes a layer number, an address for the unit, and information for specifying one of the three address units included in the unit. The first error correction method is more than the second error correction method. Is also configured to have a high error correction capability .

The recording apparatus of the present invention is a recording apparatus that records first data on a recording medium by a rewritable or additionally writable recording method, and the recording medium records the second data in a continuous wobble. The second data is composed of a first block including address information and a part of the additional information, and the additional information included in a predetermined number of the first blocks is the first block. It is encoded so as to constitute a second block of an error correction method, the first block is encoded by a second error correction method, and is based on the first block and at least synchronization information address unit is configured, the serial to the first data and records in units of integral multiples of the address unit, with respect to the recording area in units that correspond to three of the address unit And a recording means which is, the address information, layer number, address for the unit includes information specifying one of the three address units contained in the unit, the first error correction scheme The error correction capability is higher than that of the second error correction method .

The recording method of the present invention is a recording method for recording first data on a recording medium by a rewritable or additionally writable recording method, in which the second data is recorded in continuous wobble. The second data is composed of a first block including address information and a part of the additional information, and the additional information included in a predetermined number of the first blocks is the first block. It is encoded so as to constitute a second block of an error correction method, the first block is encoded by a second error correction method, and is based on the first block and at least synchronization information An address unit is configured, and at least one first block included in the reproduced address unit is reproduced. Based on the address information included in the first block, the first And records in units of integral multiples of the address unit data, the recording area recorded with respect to a unit corresponding to three of the address unit, the address information, layer number, address for the unit, in the unit Including information specifying one of the three included address units, the first error correction method has a higher error correction capability than the second error correction method .

That is, according to the present invention, when the additional information is recorded in advance on a large-capacity write-once or rewritable recording medium , it is recorded by wobbling the groove together with the address information. Further, the additional information is encoded by the first error correction method, and the groove is wobbled by the second data obtained by encoding the encoded additional information and the address information by the second error correction method. Then, an address unit is formed by combining the first block encoded by the second error correction method and at least the synchronization information, and the first data is an integer multiple of the address block. It is configured to be recorded.

As can be understood from the above description, the recording medium of the present invention is a recording medium on which the first data is recorded by a rewritable or additionally writable recording method , and the second data is recorded in a continuous wobble. have been and grooves, said second data is composed of a first block including a part of the address information and the additional information, the additional information included in the predetermined number of the first block first are encoded to form a second block of the error correction method, the first block is encoded according to the second error correction scheme, and the first block and at least synchronization information An address unit is configured by combining the first data, and the first data is recorded in units of an integral multiple of the address unit .
That is, the additional information such as the attribute of the recording medium is recorded together with the address information by the wobbling groove, and the recording of the suitable additional information can be executed by the high-density recording medium because the recording by the emboss pit is not used. Since the error correction coding is doubly performed by the second error correction method, it is possible to obtain highly reliable information.

  In addition, the first error correction method used for the additional information is encoded and recorded by the same error correction method as the first data which is the main data, so that the error correction code employed in the main data has a very high correction capability. As a result, the reliability of the additional information can be improved. Further, in the disk drive device, the error correction encoding / decoding unit corresponding to the first error correction method is made to function as an error correction decoding unit (additional information decoding means) of additional information, and the first recorded and reproduced. It is possible to function as an error correction encoding / decoding unit for the data. That is, hardware for performing error correction / encoding processing can be shared, and the configuration can be simplified and the cost can be reduced.

For the additional information recorded on the recording medium , (mn) dummy data is added to the additional information in units of m smaller than the code length n at the time of error correction encoding of the first data. Thus, the error correction encoding similar to the first data can be used by performing error correction encoding with the code length n, and the dummy data is added at the time of error correction encoding and error correction decoding, so that the recording medium can be used. The number of symbols recorded above can be reduced. Thereby, the recording linear density can be increased and the reliability can be improved. Or you can record a lot of capacity.

Then from the above, the present invention together with suitable as a recording apparatus of a recording medium and the recording medium of large capacity, large effect that the recording and reproducing performance of the disc drive device is also improved can be obtained.

Hereinafter, an optical disk as an embodiment of the present invention will be described, and a disk drive apparatus (recording / reproducing apparatus) that performs recording / reproduction corresponding to the optical disk and a mastering apparatus for manufacturing the optical disk will be described. The description will be given in the following order.

1. 1. Disk wobbling method 1-1. Overall description of the wobbling method 1-2. MSK modulation 1-3. HWM modulation 1-4. Summary 2. Example of application to DVR 2-1. Physical characteristics of DVR disc 2-2. ECC format of data 2-3. Address format 2-3-1. Relationship between recording / reproduction data and address 2-3-2. Sync part 2-3-3. Data part 2-3-4. Content of address information 2-4. 2. Address demodulation circuit 3. ECC format of disc information 4. Disk drive device Disc manufacturing method

1. 1. Disk wobbling method 1-1. Overall description of the wobbling method

As shown in FIG. 1, the optical disk 1 according to the embodiment of the present invention is formed with a groove GV serving as a recording track. The groove GV is formed in a spiral shape from the inner peripheral side to the outer peripheral side. Therefore, when the cut surface in the radial direction of the optical disc 1 is viewed, as shown in FIG. 2, convex lands L and concave grooves GV are alternately formed.

  As shown in FIG. 2, the groove GV of the optical disc 1 is formed to meander in the tangential direction. The meandering shape of the groove GV is a shape corresponding to the wobble signal. Therefore, in the optical disk drive, both edge positions of the groove GV are detected from the reflected light of the laser spot LS irradiated to the groove GV, and the positions of both edge positions when the laser spot LS is moved along the recording track are detected. By extracting the fluctuation component with respect to the disk radial direction, the wobble signal can be reproduced.

  In this wobble signal, address information (physical address, other additional information, etc.) of the recording track at the recording position is modulated. Therefore, in the optical disk drive, address control or the like at the time of data recording or reproduction can be performed by demodulating address information or the like from the wobble signal.

  In the embodiment of the present invention, an optical disk on which groove recording is performed will be described. However, the present invention is not limited to such an optical disk of groove recording, but is applied to an optical disk that performs land recording for recording data on a land. It is also possible to apply to a land-groove recording optical disk for recording data in the groove and land.

  Here, in the optical disc 1 of the present embodiment, the address information is modulated with respect to the wobble signal by using two modulation methods. One is an MSK (Minimum Shift Keying) modulation method. The other is a method of modulating by adding an even-order harmonic signal to a sine wave carrier signal and changing the polarity of the harmonic signal in accordance with the sign of the modulated data. Hereinafter, a modulation system that modulates by adding an even-order harmonic signal to a sine wave carrier signal and changing the polarity of the harmonic signal according to the sign of the modulated data is referred to as HMW (HarMonic This is called wave modulation.

  In the optical disc 1 of the present embodiment, as shown in FIG. 3, a block in which a reference carrier signal waveform of a sine wave of a predetermined frequency is continuous for a predetermined period is configured, and MSK-modulated address information is inserted into this block. Generating a wobble signal provided with an MSK modulation unit and an HMW modulation unit into which HMW-modulated address information is inserted. That is, MSK-modulated address information and HMW-modulated address information are inserted at different positions in the block. Further, one of the two sine wave carrier signals used in MSK modulation and the carrier signal of HMW modulation are used as the reference carrier signal. Also, the MSK modulation unit and the HMW modulation unit are arranged at different positions in the block, respectively, and a reference carrier signal of one cycle or more is arranged between the MSK modulation unit and the HMW modulation unit. Yes.

A portion where no data is modulated and only the frequency component of the reference carrier signal appears is hereinafter referred to as monotone wobble. In the following, it is assumed that the sine wave signal used as the reference carrier signal is Cos (ωt). One period of the reference carrier signal is referred to as one wobble period. The frequency of the reference carrier signal is constant from the inner periphery to the outer periphery of the optical disc 1 and is determined according to the relationship with the linear velocity when the laser spot moves along the recording track.

1-2. MSK modulation

Hereinafter, modulation methods of MSK modulation and HMW modulation will be described in more detail. Here, first, an address information modulation method using the MSK modulation method will be described.
The MSK modulation has a modulation index of 0.5 among FSK (Frequency Shift Keying) modulation in which phases are continuous. FSK modulation is a method of modulating two carrier signals of frequency f1 and frequency f2 by associating “0” and “1” of the code of modulated data with each other. In other words, if the modulated data is “0”, a sine wave waveform of frequency f1 is output, and if the modulated data is “1”, a sine wave waveform of frequency f1 is output. Further, in the case of FSK modulation with continuous phases, the phases of the two carrier signals are continuous at the timing of switching the code of the modulated data.

In this FSK modulation, a modulation index m is defined. This modulation index m is
m = | f1-f2 | T
Defined by Here, T is the transmission rate of modulated data (1 / the time of the shortest code length). The phase continuous FSK modulation when m is 0.5 is referred to as MSK modulation.

  In the optical disc 1, the shortest code length L of the modulated data subjected to MSK modulation is set to two wobble cycles as shown in FIGS. 4 (A) and 4 (B). The shortest code length L of the modulated data may be any length as long as it is not less than twice the wobble period and an integer multiple. One of the two frequencies used for MSK modulation is the same frequency as the reference carrier signal, and the other is 1.5 times the frequency of the reference carrier signal. That is, one of the signal waveforms used for MSK modulation is Cos (ωt) or -Cos (ωt), and the other is Cos (1.5ωt) or -Cos (1.5ωt).

  When the modulated data is inserted into the wobble signal of the optical disc 1 by the MSK modulation method, first, as shown in FIG. 4C, the data stream of the modulated data is differentially expressed in clock units corresponding to the wobble period. Perform the encoding process. That is, the difference calculation is performed on the modulated data stream and the delayed data delayed by one period of the reference carrier signal. The data that has been subjected to the differential encoding processing is referred to as pre-coded data.

  Subsequently, the precoded data is MSK modulated to generate an MSK stream. As shown in FIG. 4 (D), the signal waveform of this MSK stream is a waveform having the same frequency as the reference carrier (Cos (ωt)) or its inverted waveform (−Cos (ωt) when the precoded data is “0”. When the pre-coded data is “1”, a waveform (Cos (1.5ωt)) having a frequency 1.5 times that of the reference carrier or its inverted waveform (−Cos (1.5ωt)) is obtained. Therefore, for example, when the data string of the modulated data has a pattern of “010” as shown in FIG. 4B, the signal waveform of the MSK stream is 1 as shown in FIG. For each wobble period, a waveform such as Cos (wt), Cos (wt), Cos (1.5 wt), -Cos (wt), -Cos (1.5 wt), and Cos (wt) is obtained.

In the optical disc 1, the address information is modulated into the wobble signal by making the wobble signal into the MSK stream as described above.
Here, when the modulated data is differentially encoded and subjected to MSK modulation as described above, synchronous detection of the modulated data becomes possible. The reason why synchronous detection can be performed in this way is as follows.

  In the differentially encoded data (precode data), a bit is set at the sign change point of the modulated data (becomes “1”). Since the code length of the modulated data is at least twice the wobble period, the reference carrier signal (Cos (ωt)) or its inverted signal (−Cos (ωt) is always included in the latter half of the code length of the modulated data. )) Will be inserted. When the bit of the precode data is “1”, a waveform having a frequency 1.5 times that of the reference carrier signal is inserted, and the waveform is connected in phase at the sign switching point. Therefore, the signal waveform inserted in the latter half of the code length of the modulated data is always the reference carrier signal waveform (Cos (ωt)) if the modulated data is “0”, and the modulated data is “1”. If so, the inverted signal waveform (-Cos (ωt)) is always obtained. The synchronous detection output has a positive value if the phase is in phase with the carrier signal, and a negative value if the phase is inverted. Therefore, the above MSK modulated signal is used as the reference carrier. If synchronous detection is performed using a signal, the modulated data can be demodulated.

  In MSK modulation, modulation is performed with the phase being matched at the code switching position, so that a delay occurs until the level of the synchronous detection signal is inverted. Therefore, when demodulating the MSK-modulated signal as described above, for example, an accurate detection output can be obtained by delaying the integration detection output window by ½ wobble period.

FIG. 5 shows an MSK demodulation circuit that demodulates modulated data from the above MSK stream.
As shown in FIG. 5, the MSK demodulation circuit 10 includes a PLL circuit 11, a timing generator (TG) 12, a multiplier 13, an integrator 14, a sample / hold (SH) circuit 15, and a slice circuit 16. It has.

  A wobble signal (MSK modulated stream) is input to the PLL circuit 11. The PLL circuit 11 detects an edge component from the input wobble signal, and generates a wobble clock synchronized with the reference carrier signal (Cos (ωt)). The generated wobble clock is supplied to the timing generator 12.

  The timing generator 12 generates a reference carrier signal (Cos (ωt)) synchronized with the input wobble signal. The timing generator 12 generates a clear signal (CLR) and a hold signal (HOLD) from the wobble clock. The clear signal (CLR) is a signal generated at a timing delayed by ½ wobble period from the start edge of the data clock of the modulated data having the minimum code length in two wobble periods. The hold signal (HOLD) is a signal generated at a timing delayed by a 1/2 wobble cycle from the end edge of the data clock of the modulated data. The reference carrier signal (Cos (ωt)) generated by the timing generator 12 is supplied to the multiplier 13. The generated clear signal (CLR) is supplied to the integrator 14. The generated hold signal (HOLD) is supplied to the sample / hold circuit 15.

The multiplier 13 multiplies the input wobble signal by the reference carrier signal (Cos (ωt)) to perform synchronous detection processing. The synchronously detected output signal is supplied to the integrator 14.
The integrator 14 performs an integration process on the signal synchronously detected by the multiplier 13. The accumulator 14 clears the accumulated value to 0 at the generation timing of the clear signal (CLR) generated by the timing generator 12.
The sample / hold circuit 15 samples the integrated output value of the integrator 14 at the generation timing of the hold signal (HOLD) generated by the timing generator 12 and samples it until the next hold signal (HOLD) is generated. Hold the value.
The slice circuit 16 binarizes the value held by the sample / hold circuit 15 with the origin (0) as a threshold value, inverts the sign of the value, and outputs the result.
The output signal from the slicing circuit 16 becomes demodulated modulated data.

  6 and 7, the wobble signal (MSK stream) generated by performing the above-described MSK modulation on the modulated data of the data string “0100”, and the wobble signal are input to the MSK demodulation circuit 10. The output signal waveform from each circuit in the case of The horizontal axis (n) in FIGS. 6 and 7 indicates the cycle number of the wobble cycle. FIG. 6 shows an input wobble signal (MSK stream) and a synchronous detection output signal (MSK × Cos (ωt)) of the wobble signal. FIG. 7 shows the integrated output value of the synchronous detection output signal, the hold value of this integrated output value, and the demodulated modulated data output from the slice circuit 16. Note that the demodulated modulated data output from the slice circuit 16 is delayed because of the processing delay of the integrator 14.

As described above, when the modulated data is differentially encoded and subjected to MSK modulation as described above, synchronous detection of the modulated data becomes possible.
In the optical disc 1, the address information subjected to MSK modulation as described above is included in the wobble signal. In this way, the address information is MSK modulated and included in the wobble signal, so that the high frequency component included in the wobble signal is reduced. Accordingly, accurate address detection can be performed. Further, since the MSK-modulated address information is inserted into the monotone wobble, crosstalk applied to adjacent tracks can be reduced, and S / N can be improved. Further, in the present optical disc 1, since data subjected to MSK modulation can be synchronously detected and demodulated, it is possible to accurately and easily demodulate the wobble signal.

1-3. HWM modulation

Next, an address information modulation method using the HMW modulation method will be described.
In HMW modulation, an even-order harmonic signal is added to a sinusoidal carrier signal as described above, and the digital code is modulated by changing the polarity of the harmonic signal in accordance with the code of the modulated data. Modulation method.

In the optical disc 1, the carrier signal of HMW modulation is a signal having the same frequency and phase as the reference carrier signal (Cos (ωt)) that is the carrier signal of MSK modulation. The even-order harmonic signals to be added are Sin (2ωt) and −Sin (2ωt), which are the second-order harmonics of the reference carrier signal (Cos (ωt)), and the amplitude thereof is relative to the amplitude of the reference carrier signal. The amplitude is −12 dB. The minimum code length of the modulated data is set to twice the wobble period (period of the reference carrier signal).
When the code of the modulated data is “1”, Sin (2ωt) is added to the carrier signal, and when it is “0”, modulation is performed by adding −Sin (2ωt) to the carrier signal.

  FIG. 8 shows a signal waveform when the wobble signal is modulated by the above method. FIG. 8A shows the signal waveform of the reference carrier signal (Cos (ωt)). FIG. 8B shows a signal waveform obtained by adding Sin (2ωt) to the reference carrier signal (Cos (ωt)), that is, a signal waveform when the modulated data is “1”. FIG. 8C shows a signal waveform in which −Sin (2ωt) is added to the reference carrier signal (Cos (ωt)), that is, a signal waveform when the modulated data is “0”.

  In the optical disc 1, the harmonic signal added to the carrier signal is a second harmonic, but not limited to the second harmonic, any signal may be added as long as it is an even harmonic. Further, in the optical disc 1, only the second harmonic is added, but a plurality of harmonic signals may be added simultaneously such that both the second harmonic and the fourth harmonic are added simultaneously.

  Here, when positive and negative even harmonic signals are added to the reference carrier signal in this way, from the characteristics of the generated waveform, synchronous detection is performed using this harmonic signal, and the code length of the modulated data is By integrating the synchronous detection output over time, the modulated data can be demodulated.

FIG. 9 shows an HMW demodulating circuit for demodulating modulated data from a wobble signal subjected to HMW modulation as described above.
As shown in FIG. 9, the HMW demodulation circuit 20 includes a PLL circuit 21, a timing generator (TG) 22, a multiplier 23, an integrator 24, a sample / hold (SH) circuit 25, and a slice circuit 26. It has.

  The PLL circuit 21 receives a wobble signal (HMW modulated stream). The PLL circuit 21 detects an edge component from the input wobble signal, and generates a wobble clock synchronized with the reference carrier signal (Cos (ωt)). The generated wobble clock is supplied to the timing generator 22.

  The timing generator 22 generates a second harmonic signal (Sin (2ωt)) synchronized with the input wobble signal. The timing generator 22 generates a clear signal (CLR) and a hold signal (HOLD) from the wobble clock. The clear signal (CLR) is a signal that is generated at the timing of the start edge of the data clock of the modulated data that has the minimum code length of two wobble periods. The hold signal (HOLD) is a signal generated at the timing of the end edge of the data clock of the modulated data. The second harmonic signal (Sin (2ωt)) generated by the timing generator 22 is supplied to the multiplier 23. The generated clear signal (CLR) is supplied to the integrator 24. The generated hold signal (HOLD) is supplied to the sample / hold circuit 25.

The multiplier 23 multiplies the input wobble signal and the second harmonic signal (Sin (2ωt)) to perform synchronous detection processing. The synchronously detected output signal is supplied to the integrator 24.
The integrator 24 performs integration processing on the signal synchronously detected by the multiplier 23. The accumulator 24 clears the accumulated value to 0 at the generation timing of the clear signal (CLR) generated by the timing generator 22.
The sample / hold circuit 25 samples the integrated output value of the integrator 24 at the generation timing of the hold signal (HOLD) generated by the timing generator 22 and samples it until the next hold signal (HOLD) is generated. Hold the value.
The slice circuit 26 binarizes the value held by the sample / hold circuit 25 with the origin (0) as a threshold value, and outputs the sign of the value.
The output signal from the slicing circuit 26 becomes demodulated modulated data.

  10, 11, and 12, the signal waveform used when the above-described HMW modulation is performed on the modulated data of the data string “1010”, the wobble signal generated by the HMW modulation, and the wobble An output signal waveform from each circuit when a signal is input to the HMW demodulation circuit 20 is shown. 10 to 12, the horizontal axis (n) indicates the cycle number of the wobble cycle. FIG. 10 shows a reference carrier signal (Cos (ωt)), modulated data in a data string “1010”, and second harmonic signal waveforms (± Sin (2ωt), −12 dB). FIG. 11 shows the generated wobble signal (HMW stream). FIG. 12A shows the synchronous detection output signal (HMW × Sin (2ωt)) of the wobble signal. FIG. 12B shows the integrated output value of the synchronous detection output signal, the hold value of this integrated output value, and the demodulated modulated data output from the slicing circuit 26. The demodulated modulated data output from the slicing circuit 26 is delayed because of the primary delay of the integrator 14.

As described above, when modulated data is differentially encoded and subjected to HMW modulation as described above, synchronous detection of the modulated data becomes possible.
In the optical disc 1, address information subjected to HMW modulation as described above is included in the wobble signal. As described above, the address information is subjected to HMW modulation and included in the wobble signal, so that the frequency component can be limited and the high frequency component can be reduced. For this reason, the S / N of the demodulated output of the wobble signal can be improved, and accurate address detection can be performed. Also, the modulation circuit can be constituted by a carrier signal generation circuit, a harmonic component generation circuit thereof, and an addition circuit of these output signals, which is very simple. Further, since the high-frequency component of the wobble signal is reduced, mastering at the time of molding the optical disk is facilitated.

Further, since this HMW-modulated address information is inserted into a monotone wobble, crosstalk applied to adjacent tracks can be reduced, and S / N can be improved. Further, in the present optical disc 1, since data subjected to HMW modulation can be synchronously detected and demodulated, it is possible to accurately and easily demodulate the wobble signal.

1-4. Summary

As described above, in the optical disc 1 of the present embodiment, the MSK modulation method and the HMW modulation method are adopted as the address information modulation method for the wobble signal. In the optical disc 1, one frequency used in the MSK modulation method and the carrier frequency used in the HMW modulation are sine wave signals (Cos (ωt)) having the same frequency. Further, a monotone wobble in which only the carrier signal (Cos (ωt)) in which no data is modulated is included in the wobble signal is provided between the modulated signals.

In the optical disc 1 of this example as described above, the frequency signal used in the MSK modulation and the harmonic signal used in the HMW modulation do not interfere with each other. Not affected. Therefore, it is possible to reliably detect the address information recorded by the two modulation methods. Accordingly, it is possible to improve the accuracy of control of the track position during recording / reproduction of the optical disc.
Further, if the address information recorded by the MSK modulation and the address information recorded by the HMW modulation have the same data contents, the address information can be detected more reliably.

Further, in the optical disc 1 of this example, one frequency used in the MSK modulation method and the carrier frequency used in the HMW modulation are sine wave signals (Cos (ωt)) having the same frequency, and further, MSK modulation and HMW modulation. Therefore, at the time of modulation, for example, the harmonic signal may be added to the wobble position where the HMW modulation is performed with respect to the wobble signal after the MSK modulation. One modulation can be performed. Further, by performing MSK modulation and HMW modulation on different parts in the wobble signal and further including at least one period of monotone wobble between them, the disc can be manufactured more accurately. The address can be reliably demodulated.

2. Example of application to DVR 2-1. Physical characteristics of DVR disc

Next, an application example of the above address format for a high density optical disk called so-called DVR (Data & Video Recording) will be described.

  First, an example of a physical parameter of a DVR disk to which this address format is applied will be described. Note that this physical parameter is an example, and the wobble format described below can be applied to an optical disc having other physical characteristics.

  The optical disc used as the DVR disc of this example is an optical disc for recording data by the phase change method, and the disc size is 120 mm. The disc thickness is 1.2 mm. In other words, these are the same as CD (Compact Disc) type discs and DVD (Digital Versatile Disc) type discs in terms of external appearance.

The laser wavelength for recording / reproducing is 405 nm, and so-called blue laser is used. The NA of the optical system is 0.85.
The track pitch of the track on which the phase change mark (phase change mark) is recorded is 0.32 μm and the linear density is 0.12 μm. A 64 KB data block is used as one recording / playback unit, the format efficiency is about 82%, and a user data capacity of 23.3 Gbytes is realized on a disk with a diameter of 12 cm.
As described above, data recording is a groove recording method.

FIG. 13 shows the layout (area configuration) of the entire disc.
As an area on the disc, a lead-in zone, a data zone, and a lead-out zone are arranged from the inner peripheral side.
If you look at the area structure related to recording and playback. The inner circumference side of the lead-in zone is a PB zone (reproduction-only area), and the outer circumference side of the lead-in zone to the lead-out zone is an RW zone (recording / reproduction area).

The lead-in zone is located inside a radius of 24 mm. A radius of 21 to 22.2 mm is a BCA (Burst Cutting Area). This BCA records a unique ID unique to a disk recording medium by a recording method that burns out a recording layer. That is, by forming the recording marks so as to be arranged concentrically, barcode-shaped recording data is formed.
A radius of 22.2 to 23.1 mm is a prerecorded data zone.
The pre-recorded data zone records disc information such as recording / playback power conditions and information used for copy protection (pre-recorded information) in advance by wobbling a spiral groove on the disc. It is.
These are reproduction-only information that cannot be rewritten, that is, the BCA and the pre-recorded data zone become the PB zone (reproduction-only area).

For example, copy protection information is included as prerecorded information in the prerecorded data zone. For example, the following is performed using this copy protection information.
In the optical disc system according to this example, registered drive device manufacturers and disc manufacturers can conduct business, and have a media key or a drive key indicating that the registration has been performed.
When hacked, the drive key or media key is recorded as copy protection information. With this information, the medium or drive having the media key and the drive key can be made unrecordable.

In the lead-in zone, a test write area OPC and a defect management area DMA are provided at a radius of 23.1 to 24 mm.
The test write area OPC is used for trial writing when setting recording / reproducing conditions of phase change marks such as laser power during recording / reproducing.
The defect management area DMA records and reproduces information for managing defect information on the disc.

A radius of 24.0 to 58.0 mm is a data zone. The data zone is an area where user data is actually recorded and reproduced by phase change marks.
A radius of 58.0 to 58.5 mm is a lead-out zone. The lead-out zone is provided with a defect management area similar to the lead-in zone, and is used as a buffer area so that overrun may occur during seek.
A radius of 23.1 mm, that is, from the test write area to the lead-out zone is an RW zone (recording / reproducing area) where the phase change mark is recorded / reproduced.

  FIG. 14 shows the state of tracks in the RW zone and the PB zone. FIG. 14A shows groove wobbling in the RW zone, and FIG. 14B shows groove wobbling in the pre-recorded zone of the PB zone.

In the RW zone, address information (ADIP) is previously formed by wobbling a groove formed in a spiral shape on the disk in order to perform tracking.
Information is recorded / reproduced by a phase change mark in the groove in which the address information is formed.
As shown in FIG. 14A, a groove in the RW zone, that is, a groove track on which ADIP address information is formed has a track pitch TP = 0.32 μm.
A recording mark by a phase change mark is recorded on this track. The phase change mark is an RLL (1, 7) PP modulation method (RLL: Run Length Limited, PP: Parity preserve / Prohibit rmtr (repeated minimum transition runlength)). ) Etc., the linear density is 0.12 μm / bit and 0.08 μm / ch bit.
If the 1ch bit is 1T, the mark length is 2T to 8T, and the shortest mark length is 2T.
The address information has a wobbling period of 69T and a wobbling amplitude WA of about 20 nm (pp).

The address information and the phase change mark are configured so that their frequency bands do not overlap with each other, thereby preventing each detection from being affected.
The CNR (carrier noise ratio) of wobbling of address information is 30 dB after recording when the bandwidth is 30 KHz, and the address error rate is 1 × 10 ⁻ including the effect of movement (disk skew, defocus, disturbance, etc.). ³ or less.

On the other hand, the track by the groove in the PB zone in FIG. 14B has a wider track pitch and a larger wobbling amplitude than the track by the groove in the RW zone in FIG.
That is, the track pitch TP = 0.35 μm, the wobbling period is 36 T, and the wobbling amplitude WA is approximately 40 nm (pp). A wobbling period of 36T means that the recording linear density of pre-recorded information is higher than the recording linear density of ADIP information. Further, since the phase change mark is 2T at the shortest, the recording linear density of the prerecorded information is lower than the recording linear density of the phase change mark.

No phase change mark is recorded on this PB zone track.
The wobbling waveform is formed in a sine wave shape in the RW zone, but can be recorded in a sine wave shape or a rectangular wave shape in the PB zone.

If the signal quality is about CNR 50 dB when the bandwidth is 30 KHz, the phase change mark can be recorded / reproduced with ECC (error correction code) added to the data so that the symbol error rate after error correction is 1 × 10 ⁻¹⁶ or less It is known that it can be used for data recording and reproduction.
The wobble CNR for the ADIP address information is 35 dB when the phase change mark is not recorded when the bandwidth is 30 KHz.
As address information, this level of signal quality is sufficient by performing interpolation protection based on so-called continuity discrimination, etc., but for pre-recorded information recorded in the PB zone, CNR 50 dB or more equivalent to the phase change mark I want to ensure the signal quality. For this reason, as shown in FIG. 14B, in the PB zone, a groove physically different from the groove in the RW zone is formed.

First, by widening the track pitch, crosstalk from the adjacent track can be suppressed, and CNR can be improved by +6 dB by doubling the wobble amplitude.
Furthermore, CNR can be improved by +2 dB by using a rectangular wave as a wobble waveform.
In addition, the CNR is 43 dB.
The difference between the wobble recording bands of the phase change mark and the prerecorded data zone is wobble 18T (18T is half of 36T); phase change mark 2T, and 9.5 dB is obtained in this respect.
Therefore, the CNR as prerecorded information is equivalent to 52.5 dB, and even if -2 dB is estimated as crosstalk from the adjacent track, it is equivalent to CNR 50.5 dB. That is, the signal quality is substantially the same as that of the phase change mark, and it is sufficiently appropriate to use the wobbling signal for recording / reproducing prerecorded information.

FIG. 15 shows a modulation method of prerecorded information for forming a wobbling groove in the prerecorded data zone.
The modulation uses FM codes.
FIG. 15A shows the data bits, FIG. 15B shows the channel clock, FIG. 15C shows the FM code, and FIG. 15D shows the wobble waveform vertically.
1 bit of data is 2ch (2 channel clock), and when the bit information is “1”, the FM code has a frequency of 1.2 of the channel clock.
When the bit information is “0”, the FM code is represented by a frequency that is ½ of the bit information “1”.
As the wobble waveform, the FM code may be directly recorded as a rectangular wave, but may be recorded as a sinusoidal waveform as shown in FIG.

  Note that the FM code and the wobble waveform may be patterns opposite in polarity to those shown in FIGS. 15C and 15D and patterns shown in FIGS. 15E and 15F.

In the FM code modulation rule as described above, the FM code waveform and the wobble waveform (sinusoidal waveform) when the data bit stream is “10110010” as shown in FIG. 15G are shown in FIG. As shown in (i).
When the patterns shown in FIGS. 15 (e) and 15 (f) are supported, the patterns are as shown in FIGS. 15 (j) and 15 (k).

2-2. ECC format of data

The ECC format for the phase change mark and the prerecorded information will be described with reference to FIGS.
First, FIG. 16 shows an ECC format for main data (user data) to be recorded / reproduced with a phase change mark.

  There are two types of ECC (Error Correction Code): LDC (long distance code) for main data 64 KB (= 2048 bytes × 32 sectors of 1 sector) and BIS (Burst indicator subcode).

  The main data 64 KB shown in FIG. 16A is ECC-encoded as shown in FIG. That is, the main data adds 4B EDC (error detection code) for one sector 2048B, and encodes LDC for 32 sectors. LDC is an RS (reed solomon) code of RS (248, 216, 33), code length 248, data 216, and distance 33. There are 304 code words.

  On the other hand, BIS is ECC-encoded as shown in FIG. 16D with respect to 720B data shown in FIG. That is, the RS (62, 30, 33), code length 62, data 30, and distance 33 RS (reed solomon) code. There are 24 codewords.

FIG. 18A shows a frame structure for main data in the RW zone.
The LDC data and the BIS constitute the frame structure shown in the figure. That is, for each frame, data (38B), BIS (1B), data (38B), BIS (1B), and data (38B) are arranged to form a 155B structure. That is, one frame is configured by inserting 38B × 4 152B data and 1B of BIS for each 38B.
A frame sync FS (frame synchronization signal) is arranged at the head of one frame 155B. There are 496 frames in one block.
In the LDC data, even-numbered codewords 0, 2,... Are located in even-numbered frames 0, 2,. Located in odd-numbered frames 1, 3,.

The BIS uses a code having a much better correction capability than the LDC code, and almost all are corrected. That is, a code having a distance of 33 with respect to the code length 62 is used.
Therefore, the BIS symbol in which an error is detected can be used as follows.
When decoding ECC, BIS is decoded first. In the frame structure of FIG. 18A, when two adjacent BISs or frame sync FSs are in error, the data 38B sandwiched between them is regarded as a burst error. An error pointer is added to each data 38B. The LDC uses this error pointer to correct the pointer erasure.
As a result, the correction capability can be improved as compared with correction using only LDC.
The BIS includes address information and the like. This address is used when there is no address information by a wobbling groove on a ROM type disk or the like.

Next, FIG. 17 shows an ECC format for pre-recorded information.
In this case, there are two ECCs, LDC (long distance code) and BIS (Burst indicator subcode) for main data 4 KB (1 sector 2048 B × 2 sectors).

  The data 4 KB as the prerecorded information shown in FIG. 17A is ECC encoded as shown in FIG. That is, the main data adds 4B EDC (error detection code) for one sector 2048B, and encodes LDC for two sectors. LDC is an RS (reed solomon) code of RS (248, 216, 33), code length 248, data 216, and distance 33. There are 19 code words.

  On the other hand, the BIS is ECC-encoded as shown in FIG. 17D with respect to the 120B data shown in FIG. That is, the RS (62, 30, 33), code length 62, data 30, and distance 33 RS (reed solomon) code. There are four code words.

FIG. 18B shows a frame structure for prerecorded information in the PB zone.
The LDC data and the BIS constitute the frame structure shown in the figure. That is, for each frame, the frame sync FS (1B), data (10B), BIS (1B), and data (9B) are arranged to form a 21B structure. That is, one frame is configured by inserting 19B data and 1B BIS.
A frame sync FS (frame synchronization signal) is arranged at the head of one frame. There are 248 frames in one block.

Also in this case, the BIS uses a code having a much better correction capability than the LDC code, and almost all are corrected. Therefore, the BIS symbol in which an error is detected can be used as follows.
When decoding ECC, BIS is decoded first. When two adjacent BISs or frame sync FSs are in error, the data 10B or 9B sandwiched between them is regarded as a burst error. An error pointer is added to each of the data 10B or 9B. The LDC uses this error pointer to correct the pointer erasure.
As a result, the correction capability can be improved rather than the correction only by the LDC.

  The BIS includes address information and the like. In the prerecorded data zone, prerecorded information is recorded by the wobbling groove, and therefore there is no address information by the wobbling groove, so the address in this BIS is used for access.

As can be seen from FIGS. 16 and 17, the data and the pre-recorded information by the phase change mark adopt the same code and structure as the ECC format.
This means that ECC decoding processing of pre-recorded information can be executed by a circuit system that performs ECC decoding processing at the time of data reproduction by phase change marks, and the disk drive device can improve the efficiency of the hardware configuration. To do.

2-3. Address format 2-3-1. Relationship between recording / playback data and address

The recording / playback unit of the DVR disc of this example is a recording of a total of 498 frames generated by adding a link area for one PLL or the like before and after the ECC block of 156 symbols × 496 frames shown in FIG. It becomes a reproduction cluster. This recording / reproducing cluster is called a RUB (Recording Unit Block).
In the address format of the disk 1 of this example, as shown in FIG. 19A, one RUB (498 frames) is managed by three address units (ADIP_1, ADIP_2, ADIP_3) recorded as wobble. That is, one RUB is recorded for these three address units.

In this address format, one address unit is composed of a total of 83 bits including an 8-bit sync part and a 75-bit data part. In this address format, the reference carrier signal of the wobble signal to be recorded in the pregroove is the cosine signal (Cos (ωt)), and one bit of the wobble signal is represented by this reference carrier signal as shown in FIG. It consists of 56 cycles. Therefore, the length of one cycle (one wobble cycle) of the reference carrier signal is 69 times the one channel length of the phase change. Hereinafter, 56 periods of the reference carrier signal constituting one bit are referred to as a bit block.

2-3-2. Sync part

FIG. 20 shows the bit configuration of the sync part in the address unit. The sync part is a part for identifying the head of the address unit. The first to fourth four sync blocks (sync block “1”, sync block “2”, sync block “3”, sync block “4”) "). Each sync block is composed of two bit blocks of a monotone bit and a sync bit.

  In the signal waveform of the monotone bit, as shown in FIG. 21A, the 1st to 3rd wobbles of the bit block composed of 56 wobbles are the bit synchronization marks BM, and 4 to 56 after the bit synchronization mark BM. A monotone wobble (signal waveform of the reference carrier signal (Cos (ωt))) is formed up to the wobble.

  The bit synchronization mark BM is a signal waveform generated by MSK modulation of modulated data having a predetermined code pattern for identifying the head of a bit block. That is, the bit synchronization mark BM is a signal waveform generated by differentially encoding modulated data having a predetermined code pattern and assigning a frequency according to the code of the differentially encoded data. Note that the minimum code length L of the modulated data is two wobble periods. In this example, a signal waveform obtained by MSK modulation of modulated data that is 1 bit (2 wobble periods) “1” is recorded as a bit synchronization mark BM. That is, the bit synchronization mark BM has a signal waveform that is continuous with “Cos (1.5ωt), −Cos (ωt), −Cos (1.5ωt)” in units of wobble periods.

  Therefore, as shown in FIG. 21B, the monotone bit is generated by generating modulated data (code length is 2 wobble cycles) such as “10000... 00” and MSK-modulating this. be able to.

  The bit synchronization mark BM is inserted not only at the monotone bit of the sync part but also at the head of all bit blocks described below. Therefore, at the time of recording / reproducing, by detecting this bit synchronization mark BM and applying synchronization, it is possible to synchronize bit blocks in the wobble signal (that is, synchronization of 56 wobble cycles). Further, the bit synchronization mark BM can be used as a reference for specifying the insertion position in the bit block of various modulation signals described below.

  As shown in FIG. 22A, the signal waveform of the sync bit (sync “0” bit) of the first sync block indicates that the 1st to 3rd wobbles of the bit block composed of 56 wobbles are the bit sync mark BM. The 17th to 19th wobbles and the 27th to 29th wobbles are MSK modulation marks MM, and the remaining wobble waveforms are all monotone wobbles.

  As shown in FIG. 23A, the signal waveform of the sync bit (sync “1” bit) of the second sync block is such that the first to third wobbles of the bit block composed of 56 wobbles are the bit synchronization mark BM. The 19th to 21st wobbles and the 29th to 31st wobbles are MSK modulation marks MM, and the remaining wobble waveforms are all monotone wobbles.

  As shown in FIG. 24A, the signal waveform of the sync bit (sync “2” bit) of the third sync block is such that the first to third wobbles of the bit block composed of 56 wobbles are the bit synchronization mark BM. The 21st to 23rd wobbles and the 31st to 33rd wobbles are MSK modulation marks MM, and the remaining wobble waveforms are all monotone wobbles.

  As shown in FIG. 25A, the signal waveform of the sync bit (sync “3” bit) of the fourth sync block is such that the first to third wobbles of the bit block composed of 56 wobbles are the bit synchronization mark BM. The 23rd to 25th wobbles and the 33rd to 35th wobbles are MSK modulation marks MM, and the remaining wobble waveforms are all monotone wobbles.

  Similar to the bit synchronization mark BM, the MSK synchronization mark is a signal waveform generated by MSK modulation of modulated data having a predetermined code pattern. That is, the MSK synchronization mark is a signal waveform generated by differentially encoding modulated data having a predetermined code pattern and assigning a frequency according to the code of the differentially encoded data. Note that the minimum code length L of the modulated data is two wobble periods. In this example, a signal waveform obtained by MSK-modulating the modulated data for 1 bit (2 wobble periods) “1” is recorded as an MSK synchronization mark. That is, the MSK synchronization mark has a signal waveform that is continuous with “Cos (1.5ωt), −Cos (ωt), −Cos (1.5ωt)” in units of wobble periods.

  Therefore, the sync bit (sync “0” bit) of the first sync block is generated if a data stream (code length is 2 wobble periods) as shown in FIG. 22B is generated and MSK modulated. be able to. Similarly, the sync bit (sync “1” bit) of the second second sync block is a data stream as shown in FIG. 23B, and the sync bit (sync “2” bit) of the third sync block is If the data stream as shown in FIG. 24B and the sync bit (sync “2” bit) of the fourth sync block are respectively generated as shown in FIG. 25B and these are MSK modulated, Can be generated.

In the sync bit, the insertion pattern of the two MSK modulation marks MM with respect to the bit block is unique from the insertion pattern of the MSK modulation mark MM of another bit block. Therefore, at the time of recording / reproduction, the wobble signal is MSK demodulated, the insertion pattern of the MSK modulation mark MM in the bit block is determined, and at least one sync bit among the four sync bits is identified, thereby synchronizing the address unit. The data part can be demodulated and decoded as described below.

2-3-3. Data part

FIG. 26 shows the bit configuration of the data part in the address unit. The data part is a part in which actual data of the address information is stored, and is composed of first to fifteenth 15 ADIP blocks (ADIP block “1” to ADIP block “15”). Each ADIP block is composed of one monotone bit and four ADIP bits.
The signal waveform of the monotone bit is the same as that shown in FIG.
The ADIP bit represents one bit of actual data, and the signal waveform changes depending on the code content.

  When the code content represented by the ADIP bit is “1”, as shown in FIG. 27A, the first to third wobbles of the bit block composed of 56 wobbles are the bit synchronization marks BM, and 13 to 15 The wobble is the MSK modulation mark MM, the 19th to 55th wobbles are the modulation part of HMW “1” obtained by adding Sin (2ωt) to the reference carrier signal (Cos (ωt)), and the remaining wobble waveform is all monotone It is wobbled. That is, the ADIP bit whose code content is “1” generates modulated data (code length is 2 wobble cycles) such as “100000100... 00” as shown in FIG. Can be generated by adding Sin (2ωt) having an amplitude of −12 dB to the 19th to 55th wobbles of the signal waveform after the MSK modulation as shown in FIG. 27 (C).

  When the code content represented by the ADIP bit is “0”, as shown in FIG. 28A, the 1st to 3rd wobbles of the bit block composed of 56 wobbles are the bit synchronization marks BM. The wobble is the MSK modulation mark MM, the 19th to 55th wobbles are the modulation part of HMW “0” in which −Sin (2ωt) is added to the reference carrier signal (Cos (ωt)), and the remaining wobble waveforms are all It is a monotone wobble. That is, the ADIP bit whose code content is “0” generates modulated data (code length is 2 wobble cycles) such as “100000000010... 00” as shown in FIG. Can be generated by adding -Sin (2ωt) having an amplitude of −12 dB to the 19th to 55th wobbles of the signal waveform after the MSK modulation as shown in FIG.

  As described above, the bit contents of the ADIP bit are distinguished according to the insertion position of the MSK modulation mark MM. That is, if the MSK modulation mark MM is inserted in the 13th to 15th wobbles, the bit “1” is represented. If the MSK modulation mark MM is inserted in the 15th to 17th wobbles, the bit “0” is represented. Further, the ADIP bit represents the same bit content as the bit content represented by the insertion position of the MSK modulation mark MM by HMW modulation. Therefore, since the ADIP bit represents the same bit content in two different modulation schemes, data can be reliably decoded.

FIG. 29 shows the format of the address unit expressed by combining the sync part and the data part as described above.
In the address format of the optical disc 1 of this example, as shown in FIG. 29, the bit synchronization mark BM, the MSK modulation mark MM, and the HMW modulation unit are discretely arranged in one address unit. A monotone wobble having at least one wobble period is arranged between the modulated signal portions. Therefore, there is no interference between the modulated signals, and each signal can be demodulated with certainty.

2-3-4. Content of address information

The address format as ADIP information recorded as described above is as shown in FIG.
ADIP address information has 36 bits, and a parity of 24 bits is added thereto.
36-bit ADIP address information consists of 3 bits for layer recording (layer no.bit 0 to layer no.bit2) and 19 bits for RUB (recording unit block) (RUB no.bit 0 to layer no.bit 18). 2 bits (address no.bit 0, address no.bit1) are used for three address blocks for one RUB.
In addition, 12 bits are prepared as AUX data such as disc ID in which recording conditions such as recording / reproducing laser power are recorded.
This AUX data is used for data recording as disc information described later.

The ECC unit as address data is thus a unit of 60 bits in total, and is composed of 15 nibbles (1 nibble = 4 bits) of Nibble0 to Nibble14 as shown.
The error correction method is a nibble-based Reed-Solomon code RS (15, 9, 7) with 4 bits as one symbol. That is, the code length is 15 nibbles, the data is 9 nibbles, and the parity is 6 nibbles.

2-4. Address demodulation circuit

Next, an address demodulating circuit that demodulates address information from the DVR disc having the address format described above will be described.
FIG. 31 shows a block diagram of the address demodulation circuit.
As shown in FIG. 31, the address demodulation circuit 30 includes a PLL circuit 31, an MSK timing generator 32, an MSK multiplier 33, an MSK multiplier 34, an MSK sample / hold circuit 35, and an MSK. Slice circuit 36, Sync decoder 37, MSK address decoder 38, HMW timing generator 42, HMW multiplier 43, HMW integrator 44, HMW sample / hold circuit 45, and HMW slice circuit 46 and an HMW address decoder 47.

  The PLL circuit 31 receives a wobble signal reproduced from the DVR disc. The PLL circuit 31 detects an edge component from the input wobble signal, and generates a wobble clock synchronized with the reference carrier signal (Cos (ωt)). The generated wobble clock is supplied to the MSK timing generator 32 and the HMW timing generator 42.

  The MSK timing generator 32 generates a reference carrier signal (Cos (ωt)) synchronized with the input wobble signal. The MSK timing generator 32 generates a clear signal (CLR) and a hold signal (HOLD) from the wobble clock. The clear signal (CLR) is a signal generated at a timing delayed by ½ wobble period from the start edge of the data clock of the modulated data having the minimum code length in two wobble periods. The hold signal (HOLD) is a signal generated at a timing delayed by a 1/2 wobble cycle from the end edge of the data clock of the modulated data. The reference carrier signal (Cos (ωt)) generated by the MSK timing generator 32 is supplied to the MSK multiplier 33. The generated clear signal (CLR) is supplied to the MSK integrator 34. The generated hold signal (HOLD) is supplied to the MSK sample / hold circuit 35.

The MSK multiplier 33 multiplies the input wobble signal and the reference carrier signal (Cos (ωt)) to perform synchronous detection processing. The synchronously detected output signal is supplied to the MSK integrator 34.
The MSK integrator 34 performs integration processing on the signal synchronously detected by the MSK multiplier 33. The MSK integrator 34 clears the integrated value to 0 at the generation timing of the clear signal (CLR) generated by the MSK timing generator 42.

The MSK sample / hold circuit 35 samples the integrated output value of the MSK integrator 34 at the generation timing of the hold signal (HOLD) generated by the MSK timing generator 32, and generates the next hold signal (HOLD). Hold the sampled value until it occurs.
The MSK slice circuit 36 binarizes the value held by the MSK sample / hold circuit 35 with the origin (0) as a threshold value, inverts the sign of the value, and outputs the result.
The output signal from the MSK slice circuit 36 becomes a data stream demodulated by MSK.

  The Sync decoder 37 detects sync bits in the sync part from the bit pattern of the demodulated data output from the MSK slice circuit 36. The Sync decoder 37 synchronizes the address unit from the detected sync bit. The Sync decoder 37 is based on the synchronization timing of the address unit. The MSK detection window indicating the wobble position of the MSK modulated data in the ADIP bit of the data part, and the HMW modulated data in the ADIP bit of the data part. And an HMW detection window indicating the wobble position. FIG. 32A shows the synchronization position timing of the address unit detected from the sync bits, FIG. 32B shows the timing of the MSK detection window, and FIG. 32C shows the timing of the HMW detection window. Show.

  The Sync decoder 37 supplies the MSK detection window to the MSK address decoder 38 and supplies the HMW detection window to the HMW timing generator 42.

  The MSK address decoder 38 receives the demodulated stream output from the MSK slice circuit 36, detects the insertion position of the MSK modulation mark MM in the ADIP bit of the demodulated data stream based on the MSK detection window, and the ADIP bit is The content of the code being represented is determined. That is, if the insertion pattern of the MSK modulation mark of the ADIP bit is a pattern as shown in FIG. 27, the code content is determined as “1”, and the insertion pattern of the MSK modulation mark of the ADIP bit is as shown in FIG. If the pattern is an incorrect pattern, the code content is determined to be “0”. Then, the bit string obtained from the determination result is output as MSK address information.

  The HMW timing generator 42 generates a second harmonic signal (Sin (2ωt)) synchronized with the input wobble signal from the wobble clock. The HMW timing generator 42 generates a clear signal (CLR) and a hold signal (HOLD) from the HMW detection window. The clear signal (CLR) is a signal generated at the timing of the start edge of the HMW detection window. The hold signal (HOLD) is a signal generated at the timing of the end edge of the HMW detection window. The second harmonic signal (Sin (2ωt)) generated by the HMW timing generator 42 is supplied to the HMW multiplier 43. The generated clear signal (CLR) is supplied to the HMW integrator 44. The generated hold signal (HOLD) is supplied to the HMW sample / hold circuit 45.

The HMW multiplier 43 multiplies the input wobble signal and the second harmonic signal (Sin (2ωt)) to perform synchronous detection processing. The synchronously detected output signal is supplied to the HMW integrator 44.
The HMW integrator 44 performs integration processing on the signal synchronously detected by the HMW multiplier 43. The HMW integrator 44 clears the integrated value to 0 at the generation timing of the clear signal (CLR) generated by the HMW timing generator 42.

  The HMW sample / hold circuit 45 samples the integrated output value of the HMW integrator 44 at the generation timing of the hold signal (HOLD) generated by the HMW timing generator 42, and generates the next hold signal (HOLD). Hold the sampled value until it occurs. That is, since the data subjected to HMW modulation is 37 wobbles in one bit block, the clear signal (HOLD) is n = 0 (n indicates the number of wobbles) as shown in FIG. ), The HMW sample / hold circuit 45 samples the integrated value at n = 36 as shown in FIG.

The HMW slice circuit 46 binarizes the value held by the HMW sample / hold circuit 45 with the origin (0) as a threshold value, and outputs the sign of the value.
The output signal from the HMW slice circuit 46 becomes a demodulated data stream.
The HMW address decoder 47 determines the code content represented by each ADIP bit from the demodulated data stream. Then, the bit string obtained from the determination result is output as HMW address information.

  FIG. 33 shows signal waveforms when the address demodulating circuit 30 performs HMW demodulation on the ADIP bit whose code content is “1”. Note that the horizontal axis (n) in FIG. 33 indicates the cycle number of the wobble cycle. FIG. 33A shows a reference carrier signal (Cos (ωt)), modulated data whose code content is “1”, and a second harmonic signal waveform (Sin (2ωt) generated according to the modulated data. ), −12 dB). FIG. 33B shows the generated wobble signal. FIG. 33C shows the synchronous detection output signal (HMW × Sin (2ωt)) of the wobble signal, the integrated output value of the synchronous detection output signal, the hold value of the integrated output value, and the slice circuit 26. The demodulated modulated data is shown.

FIG. 34 shows signal waveforms when the address demodulating circuit 30 performs HMW demodulation on the ADIP bit whose code content is “0”. Note that the horizontal axis (n) in FIG. 34 indicates the cycle number of the wobble cycle. FIG. 34A shows a reference carrier signal (Cos (ωt)), modulated data whose code content is “1”, and a second harmonic signal waveform (−Sin () generated in accordance with the modulated data. 2ωt), −12 dB).
FIG. 34 (B) shows the generated wobble signal. FIG. 34C shows the synchronous detection output signal (HMW × Sin (2ωt)) of the wobble signal, the integrated output value of the synchronous detection output signal, the hold value of the integrated output value, and the slice circuit 26. The demodulated modulated data is shown.

As described above, the address demodulation circuit 30 can detect the synchronization information of the address unit recorded by MSK modulation, and perform MSK demodulation and HMW demodulation based on the detection timing.

3. ECC format of disc information

In the disc of this example, data as disc information as additional information is recorded in advance by a wobbling groove together with absolute address information as an ADIP address.
That is, in the address format in ECC units as ADIP information described with reference to FIG. 30, 12-bit AUX data (reserve bit 0 to reserve bit 12) is included, but these 12 bits are used as disc information.
The disc information is composed of, for example, 112 bytes formed by collecting 12 bits of the ECC block of ADIP information, and includes disc attributes and control information as described below.

The contents of the disc information recorded on the disc in advance using AUX data (reserve bit 0 to reserve bit 12) in the ADIP information will be described with reference to FIG.
FIG. 35 shows the contents of disc information composed of 112 bytes, and the contents (contents) are shown for each byte position (byte number) of 112 bytes. In addition, the number of bytes as the data size of each content is shown.

In two bytes of byte numbers 0 and 1, a code “DI” is recorded as a disc information identifier.
One byte of the byte number 2 indicates the version of the disc information format.
One byte of the byte number 4 indicates the number of frames in the disc information block.
One byte of the byte number 5 indicates the frame number in the disc information block.
One byte of the byte number 6 indicates the number of bytes used in the frame of the disc information block.

In three bytes of byte numbers 8 to 10, a code indicating a disk type such as a rewritable / ROM type is recorded.
In one byte of the byte number 11, a disk diameter such as 120 mm is indicated as a disk size, and a format version is indicated.
One byte of the byte number 12 indicates the number of layers of the multi-layer disc as the disc structure.
One byte of the byte number 13 indicates the channel density, that is, the capacity.
One byte of the byte number 16 indicates the presence or absence of BCA.
One byte of the byte number 17 indicates the maximum transfer rate of the application.

8 bytes of byte numbers 24 to 31 indicate the last address of the user data area.
The recording speed is indicated in 4 bytes of byte numbers 32 to 35.
In 4 bytes of byte numbers 36 to 39, the maximum DC reproduction power is indicated.
Four bytes of byte numbers 40 to 43 indicate the maximum reproduction power in the case of high frequency modulation.
The 8 bytes of byte numbers 48 to 55 indicate the recording power at the recording speed at the nominal time.
The 8 bytes of byte numbers 56 to 63 indicate the recording power at the maximum recording speed.
The 8 bytes of byte numbers 64 to 71 indicate the recording power at the minimum recording speed.

In one byte of the byte number 72, a recording multi-pulse width is indicated.
The first recording pulse width is indicated in 3 bytes of byte numbers 73-75.
Three bytes of byte numbers 76 to 78 indicate the first recording pulse position at the nominal recording speed.
Three bytes of byte numbers 79 to 81 indicate the first recording pulse position at the maximum recording speed.
Three bytes of byte numbers 82 to 84 indicate the first recording pulse position at the minimum recording speed.

In one byte of the byte number 88, the erase multi-pulse width is indicated.
Three bytes of byte numbers 89 to 91 indicate the first erase pulse position at the nominal recording speed.
Three bytes of byte numbers 92 to 94 indicate the first erase pulse position at the maximum recording speed.
Three bytes of byte numbers 95 to 97 indicate the first erase pulse position at the minimum recording speed.
In one byte of the byte number 98, a flag bit representing the polarity of the erase pulse is recorded.
Other than the above byte numbers are reserved.

Such disc information is recorded at least in the RW zone in the lead-in zone described with reference to FIG.
As described above, as the lead-in zone, prerecorded data is recorded with the inner circumference side being a PB zone, but following the PB zone, an RW zone capable of recording and reproducing data by the phase change recording method is formed. Recording of an absolute address as ADIP information (recording by a wobbling groove) is started from the head of the RW zone. The disc information is recorded using AUX data (reserve bit 0 to reserve bit 12) in the ADIP information together with the ADIP address.
Since the lead-in zone is an area that the disk drive device accesses first when the disc is loaded, at least the disc information is recorded in the lead-in zone, so that the disc drive device reads each piece of information shown in FIG. It is suitable for.

  Since ADIP information is similarly recorded in the data zone, disc information can also be recorded in the data zone using bits as AUX data. That is, the disc information having the above-described configuration may be repeatedly recorded over the entire RW zone.

As described in the ECC block format in FIG. 30, the ADIP information uses nibble-based Reed-Solomon code RS (15, 9, 7) with 4 bits as one symbol as an error correction method.
As address information, it is recorded continuously on the disc, and it is sufficient that only such an error correction coding method is sufficient for the theory that even if an error occurs to some extent, it does not cause much problem. It is.
On the other hand, disc information is required to be more advanced than address information as an error correction method because it includes information that serves as a reference when recording / reproducing data on the disc 1.
Therefore, in this example, the disc information is assigned to the ADIP format as AUX data (reserve bit 0 to reserve bit 12) after performing more advanced error correction coding (coding by the first error correction method). ing. Therefore, the disc information recorded as ADIP data is encoded by the first error correction method, and further nibble-based Reed-Solomon code RS (15, 9) so as to be an ECC block of 60-bit ADIP information. , 7) is encoded by the second error correction method, and double error correction encoding is performed.

  In this example, the error correction encoding for the disc information is performed in the same way as the error correction encoding of the user data recorded / reproduced by the phase change recording method, so that a higher error correction capability can be obtained. I am trying to do it.

In FIG. 16, the error correction coding method for user data (main data) has been described. That is, for user data 64 KB, LDC uses RS (248, 216, 33), code length 248, data 216, and distance 33 RS (reed solomon) code.
FIG. 36 shows this as 216 bytes of data as 248 bytes of 1 ECC codeword and 32 bytes of parity.
Similarly for the disc information, the LDC uses RS (248, 216, 33), code length 248, data 216, and distance 33 RS (reed solomon) code. FIG. 37 shows the ECC format of the disc information.

The AUX data has 12 bits, that is, 1.5 bytes in one ADIP word (format shown in FIG. 30).
The disc information frame (DI frame) is formed of 96 ADIP, that is, 144 bytes.
As shown in FIG. 35, the information amount of disk information of 1 DI frame is 112 bytes.
To this 112 bytes, 104 bytes of data “FFh (= 11111111)” are added as dummy data to form 216 bytes.
FIG. 37 shows an ECC format in which a parity of 32 bytes is added to the 216 bytes of data.
In this case, the RS code has a code length 248, data 216, distance 33, and parity 32.
That is, the ECC format is the same LDC (long distance code) as the user data described in FIG.

By doing so, the disc information becomes data having a high error correction capability like the user data, and the reliability is improved.
In addition, it is read-only data that is incorporated into ADIP information and recorded by a wobbling groove, but is not recorded by embossed pits, and is therefore suitable for a high-density disk such as this example.
Further, in the disk drive device, it is not necessary to provide a new circuit system for error correction processing when reproducing the disk information. That is, it is possible to share a circuit unit that performs error correction processing of user data.

The dummy data need not be recorded on the disk 1. That is, 104 bytes may be added as dummy data “FFh” per ECC codeword during error correction encoding and error correction processing during reproduction.
Therefore, the number of symbols to be recorded on the disk 1 can be reduced, the recording linear density can be increased, the reliability can be improved, or the capacity can be increased.

4). Disk drive device

Next, a disk drive device capable of recording / reproducing corresponding to the disk 1 will be described.
FIG. 38 shows the configuration of the disk drive device.

The disk 1 is loaded on a turntable (not shown) and is driven to rotate at a constant linear velocity (CLV) by a spindle motor 52 during a recording / reproducing operation.
Then, ADIP information (address and disk information) embedded as wobbling of the groove track in the RW zone on the disk 1 is read by the optical pickup (optical head) 51. Further, pre-recorded information embedded as wobbling of the groove track in the PB zone is read out.
At the time of recording, user data is recorded as a phase change mark on the track in the RW zone by the optical pickup, and at the time of reproduction, the phase change mark recorded by the optical pickup is read out.

In the pickup 51, a laser diode serving as a laser light source, a photodetector for detecting reflected light, an objective lens serving as an output end of the laser light, and a laser recording light are irradiated onto the disk recording surface via the objective lens. An optical system (not shown) for guiding the reflected light to the photodetector is formed.
The laser diode outputs a so-called blue laser having a wavelength of 405 nm. The NA by the optical system is 0.85.

The objective lens is held in the pickup 51 so as to be movable in the tracking direction and the focus direction by a biaxial mechanism.
The entire pickup 51 can be moved in the radial direction of the disk by a thread mechanism 53.
The laser diode in the pickup 51 is driven to emit laser light by a drive signal (drive current) from the laser driver 63.

Reflected light information from the disk 1 is detected by a photo detector, converted into an electric signal corresponding to the amount of received light, and supplied to the matrix circuit 54.
The matrix circuit 54 includes a current-voltage conversion circuit, a matrix calculation / amplification circuit, and the like corresponding to output currents from a plurality of light receiving elements as photodetectors, and generates necessary signals by matrix calculation processing.
For example, a high frequency signal (reproduction data signal) corresponding to reproduction data, a focus error signal for servo control, a tracking error signal, and the like are generated.
Further, a push-pull signal is generated as a signal related to groove wobbling, that is, a signal for detecting wobbling.

  The reproduction data signal output from the matrix circuit 54 is supplied to the reader / writer circuit 55, the focus error signal and tracking error signal are supplied to the servo circuit 61, and the push-pull signal is supplied to the wobble circuit 58.

The reader / writer circuit 55 performs binarization processing on the reproduction data signal, reproduction clock generation processing by PLL, etc., reproduces the data read out as the phase change mark, and supplies it to the modulation / demodulation circuit 56.
The modem circuit 56 includes a functional part as a decoder at the time of reproduction and a functional part as an encoder at the time of recording.
At the time of reproduction, as a decoding process, a run-length limited code is demodulated based on the reproduction clock.
The ECC encoder / decoder 57 performs an ECC encoding process for adding an error correction code at the time of recording and an ECC decoding process for correcting an error at the time of reproduction.
At the time of reproduction, the data demodulated by the modulation / demodulation circuit 56 is taken into an internal memory, and error detection / correction processing and deinterleaving processing are performed to obtain reproduction data.
The ECC encoding process and the ECC decoding process in the ECC encoder / decoder 57 correspond to the ECC format using the RS (248, 216, 33), the code length 248, the data 216, and the distance 33 RS (reed solomon) code. It becomes processing to do.

  The data decoded to the reproduction data by the ECC encoder / decoder 57 is read out and transferred to an AV (Audio-Visual) system 120 based on an instruction from the system controller 60.

The push-pull signal output from the matrix circuit 54 as a signal related to groove wobbling is processed in the wobble circuit 58. The push-pull signal as ADIP information is MSK demodulated and HMW demodulated in the wobble circuit 58, demodulated into a data stream constituting an ADIP address, and supplied to the address decoder 59.
The address decoder 9 decodes the supplied data, obtains an address value, and supplies it to the system controller 10.
The address decoder 9 generates a clock by PLL processing using the wobble signal supplied from the wobble circuit 8, and supplies it to each unit as an encode clock at the time of recording, for example.
The wobble circuit 58 and address decoder 59 have the configuration shown in FIG. 31, for example.

In the address decoder 59, an error correction process using a nibble-based Reed-Solomon code RS (15, 9, 7) is performed corresponding to the ECC format shown in FIG.
As described above, the address value supplied to the system controller 60 has undergone this error correction processing.
On the other hand, the disc information recorded using the AUX data is extracted from the 1 ECC block (ADIP word) by 12 bits by the address decoder 59 and supplied to the ECC encoder / decoder 57.
The ECC encoder / decoder 57 generates 1 ECC code word by adding dummy data of 104 bytes to 144B of the 96 ADIP word shown in FIG. 27, and generates RS (248, 216, 33), that is, code length 248, data 216, By performing ECC decoding using an RS (reed solomon) code with a distance of 33, disk information subjected to error correction processing can be obtained and supplied to the system controller 60.

Further, as a push-pull signal output from the matrix circuit 54 as a signal related to the wobbling of the groove, a push-pull signal as pre-recorded information from the PB zone is subjected to band-pass filter processing in the wobble circuit 58 and read / read This is supplied to the writer circuit 55. Then, as in the case of the phase change mark, it is binarized and made into a data bit stream, and then ECC decoded and deinterleaved by the ECC encoder / decoder 57 to extract data as prerecorded information. The extracted prerecorded information is supplied to the system controller 60.
The system controller 60 can perform various setting processes and copy protection processes based on the read prerecorded information.

At the time of recording, recording data is transferred from the AV system 120. The recording data is sent to a memory in the ECC encoder / decoder 57 and buffered.
In this case, the ECC encoder / decoder 57 performs error correction code addition, interleaving, subcode addition, and the like as encoding processing of the buffered recording data.
The ECC-encoded data is subjected to RLL (1-7) PP modulation in the modulation / demodulation circuit 56 and supplied to the reader / writer circuit 55.
As described above, the clock generated from the wobble signal is used as the reference clock for the encoding process during recording.

The recording data generated by the encoding process is subjected to recording compensation processing by the reader / writer circuit 55, and fine adjustment of the optimum recording power and adjustment of the laser drive pulse waveform with respect to recording layer characteristics, laser beam spot shape, recording linear velocity, etc. Etc. are sent to the laser driver 63 as a laser drive pulse.
The laser driver 63 applies the supplied laser drive pulse to the laser diode in the pickup 51 to perform laser emission driving. As a result, pits (phase change marks) corresponding to the recording data are formed on the disc 1.

  The laser driver 63 includes a so-called APC circuit (Auto Power Control), and the laser output is not dependent on the temperature or the like while monitoring the laser output power by the output of the laser power monitoring detector provided in the pickup 51. Control to be constant. The target value of the laser output at the time of recording and reproduction is given from the system controller 60, and the laser output level is controlled to be the target value at the time of recording and reproduction.

The servo circuit 61 generates various servo drive signals for focus, tracking, and thread from the focus error signal and tracking error signal from the matrix circuit 54, and executes the servo operation.
That is, a focus drive signal and a tracking drive signal are generated according to the focus error signal and tracking error signal, and the focus coil and tracking coil of the biaxial mechanism in the pickup 51 are driven. Thus, a pickup 51, a matrix circuit 54, a servo circuit 61, a tracking servo loop and a focus servo loop by a biaxial mechanism are formed.

  The servo circuit 61 turns off the tracking servo loop and outputs a jump drive signal in response to a track jump command from the system controller 60, thereby executing a track jump operation.

  The servo circuit 61 generates a thread drive signal based on a thread error signal obtained as a low frequency component of the tracking error signal, access execution control from the system controller 60, and the like, and drives the thread mechanism 53. Although not shown, the sled mechanism 53 has a mechanism including a main shaft that holds the pickup 51, a sled motor, a transmission gear, and the like, and by driving the sled motor according to a sled drive signal, a required slide of the pick-up 51 is obtained. Movement is performed.

The spindle servo circuit 62 performs control to rotate the spindle motor 2 at CLV.
The spindle servo circuit 62 obtains the clock generated by the PLL processing for the wobble signal as the current rotational speed information of the spindle motor 52 and compares it with predetermined CLV reference speed information to generate a spindle error signal. .
At the time of data reproduction, the reproduction clock (clock serving as a reference for decoding processing) generated by the PLL in the reader / writer circuit 55 becomes the current rotational speed information of the spindle motor 52, and this is used as a predetermined CLV. A spindle error signal can also be generated by comparing with the reference speed information.
The spindle servo circuit 62 outputs a spindle drive signal generated according to the spindle error signal, and causes the spindle motor 62 to perform CLV rotation.
The spindle servo circuit 62 generates a spindle drive signal in response to a spindle kick / brake control signal from the system controller 60, and executes operations such as starting, stopping, acceleration, and deceleration of the spindle motor 2.

Various operations of the servo system and the recording / reproducing system as described above are controlled by a system controller 60 formed by a microcomputer.
The system controller 60 executes various processes according to commands from the AV system 120.

  For example, when a write command (write command) is issued from the AV system 120, the system controller 60 first moves the pickup 51 to the address to be written. Then, the ECC encoder / decoder 57 and the modulation / demodulation circuit 56 execute the encoding process as described above on the data transferred from the AV system 120 (for example, video data of various systems such as MPEG2 or audio data). Then, recording is executed by supplying the laser drive pulse from the reader / writer circuit 55 to the laser driver 63 as described above.

For example, when a read command for transferring certain data (MPEG2 video data or the like) recorded on the disk 1 is supplied from the AV system 120, seek operation control is first performed for the instructed address. That is, a command is issued to the servo circuit 61 to cause the pickup 51 to access the address specified by the seek command.
Thereafter, operation control necessary for transferring the data in the designated data section to the AV system 120 is performed. That is, data reading from the disk 1 is performed, decoding / buffering and the like in the reader / writer circuit 55, the modem circuit 56, and the ECC encoder / decoder 57 are executed, and the requested data is transferred.

  When recording / reproducing data using these phase change marks, the system controller 60 controls access and recording / reproducing operations using the ADIP addresses detected by the wobble circuit 58 and the address decoder 59.

Further, at a predetermined time such as when the disc 1 is loaded, the system controller 60 has a unique ID recorded in the BCA of the disc 1 and prerecorded information recorded as a wobbling groove in the prerecorded data zone PR. Is read out.
In that case, seek operation control is first performed for the purpose of BCA and pre-recorded data zone PR. That is, a command is issued to the servo circuit 61 to cause the pickup 51 to access the innermost circumference of the disk.
Thereafter, a reproduction trace by the pickup 51 is executed to obtain a push-pull signal as reflected light information, a decoding process is executed by the wobble circuit 58, the reader / writer circuit 55, and the ECC encoder / decoder 57, and BCA information and pre-recorded are obtained. Reproduction data as information is obtained.
The system controller 60 performs laser power setting, copy protection processing, and the like based on the BCA information and prerecorded information read out in this way.

  At the time of reproducing pre-recorded information, the system controller 60 controls access and reproduction operations using the address information included in the BIS cluster as the read pre-recorded information.

  Further, after reading the pre-recorded information, it is possible to read the disc information recorded in the ADIP information in the RW zone section in the lead-in zone and perform necessary processing.

In the example of FIG. 40, the disk drive device connected to the AV system 120 is used. However, the disk drive device of the present invention may be connected to, for example, a personal computer.
Furthermore, there may be a form that is not connected to other devices. In that case, an operation unit and a display unit are provided, and the configuration of an interface part for data input / output is different from that in FIG. That is, it is only necessary that recording and reproduction are performed in accordance with a user operation and a terminal unit for inputting / outputting various data is formed.
Of course, there are various other configuration examples. For example, examples of a recording-only device and a reproduction-only device are also possible.

5. Disc manufacturing method

Then, the manufacturing method of the disk 1 of this example mentioned above is demonstrated.
The disc manufacturing process is roughly divided into a so-called master process (mastering process) and a disc forming process (replication process). The master process is a process until the completion of a metal master (stamper) used in the disc making process, and the disc making process is a process for mass-producing an optical disc as a duplicate using the stamper.

Specifically, in the master process, so-called mastering is performed, in which a photoresist is applied to a polished glass substrate, and pits and grooves are formed on the photosensitive film by exposure with a laser beam.
In the case of this example, groove mastering by wobbling based on pre-recorded information is performed in the portion corresponding to the PB zone on the innermost circumference side of the disc, and in the portion corresponding to the RW zone, the ADIP address and disc information are stored. The mastering of the groove by the wobbling based on it is performed.

Prerecorded information and disc information to be recorded are prepared in a preparation process called premastering.
When the mastering is completed, after performing a predetermined process such as development, information is transferred onto the metal surface by, for example, electroforming, and a stamper necessary for copying the disk is created.
Next, using this stamper, the information is transferred onto a resin substrate by, for example, an injection method, and after a reflective film is formed thereon, processing such as processing into a required disk form is performed to obtain a final product. Complete.

  For example, as shown in FIG. 39, the mastering device includes a prerecorded information generating unit 71, a prerecorded ECC encoding unit 72, a switching unit 73, a mastering unit 74, a disc information generating unit 75, an address generating unit 76, and disc information. A ECC encoding unit 77, a combining unit 78, an ECC encoding unit 79 for addresses, and a controller 70.

  The prerecorded information generating unit 71 outputs prerecorded information prepared in the premastering process. The output prerecorded information is subjected to error correction coding processing by the prerecorded ECC encoder 72. For example, like the disc information, ECC encoding using RS (248, 216, 33), that is, code length 248, data 216, and distance 33 RS (reed solomon) code may be performed.

  The disc information generator 75 generates 112 bytes of information having the contents described with reference to FIG. The generated 112-byte disk information is added with 104-byte dummy data and added with 32-byte parity in the disk information ECC encoding section 77 as described with reference to FIG. 37 (RS (248, 216, 33)). That is, ECC encoding is performed using an RS (reed solomon) code having a code length 248, data 216, and distance 33.

The address generator 72 sequentially outputs values as absolute addresses.
The synthesizer 78 synthesizes the address value output from the address generator 76 and the disk information ECC-encoded in the disk information ECC encoder 77. That is, 9 nibble (36 bits) data of the ADIP word in the format of FIG. 30 is generated. That is, ECC encoded disk information is incorporated as AUX data in the ADIP word. Note that the dummy data portion shown in FIG. 37 added by the disk information ECC encoding unit 77 may not be incorporated as AUX data.
Then, the address ECC encoding unit 79 performs error correction encoding using a nibble-based Reed-Solomon code RS (15, 9, 7) to form an ECC block in the format shown in FIG.

  The mastering unit 74 includes an optical unit (82, 83, 84) that performs laser beaming on the glass substrate 101 that has been subjected to photo-resisting, and a substrate rotation / transfer unit 85 that rotationally drives and slides the glass substrate 101. It is possible to determine whether the mastering position is the PB zone or the RW zone from the position of the signal processing unit 81 that converts input data into recording data and supplies it to the optical unit and the position of the substrate rotation / transfer unit 85 It has a sensor 86.

As the optical unit, for example, a laser light source 82 composed of a He—Cd laser, a modulation unit 83 that modulates light emitted from the laser light source 82 based on recording data, and a modulated beam from the modulation unit 83 is condensed. A mastering head portion 84 for irradiating the photoresist surface of the glass substrate 101 is provided.
The modulation unit 83 includes an acousto-optic type optical modulator (AOM) that turns on and off the light emitted from the laser light source 82, and an acousto-optic type that deflects the light emitted from the laser light source 82 based on the wobble generation signal. An optical deflector (AOD) is provided.

  The substrate rotation / transfer unit 85 includes a rotation motor that rotates the glass substrate 101, a detection unit (FG) that detects the rotation speed of the rotation motor, and a slide motor that slides the glass substrate 101 in the radial direction. And a servo controller for controlling the rotation speed of the rotary motor and slide motor, tracking of the mastering head portion 84, and the like.

For example, the signal processing unit 81 performs a predetermined arithmetic process on prerecorded information supplied via the switching unit 73 and ADIP information including disk information and address information to form a modulation signal. I do.
Based on the modulation signal, drive processing for driving the optical modulator and the optical deflector of the modulator 83 is also performed.

In the mastering unit 74, during mastering, the substrate rotation / transfer unit 85 drives the glass substrate 101 to rotate at a constant linear velocity, and a spiral track is formed at a predetermined track pitch while the glass substrate 71 is rotated. Slide as you go.
At the same time, the light emitted from the laser light source 82 is converted into a modulated beam based on the modulation signal from the signal processing unit 81 via the modulation unit 83 and irradiated from the mastering head unit 84 to the photoresist surface of the glass substrate 71. As a result, the photoresist is exposed based on data and grooves.

The controller 70 controls the mastering operation of the mastering unit 74 and monitors the signal from the sensor 86 while prerecorded information generating unit 71, disc information generating unit 75, address generating unit 76, and switching. The unit 73 is controlled.
At the start of mastering, the controller 70 sets the slide position of the substrate rotation / transfer unit 85 to the initial position so that the mastering head unit 84 starts laser irradiation from the innermost side with respect to the mastering unit 74. Then, CLV rotation driving of the glass substrate 101 and slide transfer for forming a groove with a track pitch of 0.35 μm are started.
In this state, pre-recorded information is output from the pre-recorded information generating unit 71 and supplied to the signal processing unit 81 via the switching unit 73. Further, the laser output from the laser light source 82 is started, and the modulation unit 83 modulates the laser beam based on the modulation signal from the signal processing unit 81, that is, the FM code modulation signal of the pre-recorded information, and outputs the laser beam to the glass substrate 101. Perform groove mastering.
As a result, the above-described groove mastering as shown in FIG. 14B is performed in an area corresponding to the PB zone.

Thereafter, when the controller 70 detects from the signal from the sensor 86 that the mastering operation has proceeded to a position corresponding to the PB zone, the controller 70 switches the switching unit 73 to the address ECC encoding unit 79 side, and from the address generating unit 72 to the address value. Are sequentially generated, and the disk information generating unit 75 is instructed to generate disk information.
In addition, the slide transfer speed is reduced in the substrate rotation / transfer section 85 so as to form grooves with a track pitch of 0.32 μm.

As a result, the address ECC encoding unit 79 supplies the ADIP information including the address information and the disc information to the signal processing unit 81 via the switching unit 73. The laser light from the laser light source 82 is modulated by the modulation unit 83 based on the modulation signal from the signal processing unit 81, that is, MSK modulation and HMW modulation, and groove mastering to the glass substrate 101 is executed by the modulated laser light. The
Thereby, the mastering of the groove as shown in FIG. 14A is performed in the area corresponding to the RW zone.
When the controller 70 detects from the signal from the sensor 86 that the mastering operation has reached the end of the lead-out zone, the controller 70 ends the mastering operation.

By such an operation, exposure portions corresponding to the wobbling grooves as the PB zone and the RW zone are formed on the glass substrate 101.
Thereafter, development, electroforming, and the like are performed to produce a stamper, and the above-described disk 1 is produced using the stamper.
As described above, the generated disc 1 is a disc in which ADIP information including disc information is recorded by the wobbling groove in the RW zone.

  The disk of the embodiment, the disk drive device corresponding to the disk, and the disk manufacturing method have been described above, but the present invention is not limited to these examples, and various modifications can be considered within the scope of the gist. It is.

  In the above example, the user data is recorded as the phase change mark. However, the user data recording method may be any method that can be rewritten or additionally written. For example, the present invention can also be applied to a disk or a disk drive device that supports a recording system such as a magneto-optical recording system or a dye change system.

FIG. 4 is an explanatory diagram of a disk groove according to the embodiment of this invention. It is explanatory drawing of the wobbling of the groove | channel of the disk of embodiment. It is explanatory drawing of the wobble signal which performed the MSK modulation and HMW modulation of embodiment. It is explanatory drawing of MSK modulation of embodiment. It is a block diagram of the MSK demodulation circuit which demodulates the MSK modulation wobble signal of the embodiment. It is a wave form diagram of the input wobble signal and synchronous detection output signal of embodiment. FIG. 6 is a waveform diagram of an integrated output value of a synchronous detection output signal of an MSK stream, a hold value of the integrated output value, and modulated data subjected to MSK demodulation according to an embodiment. It is explanatory drawing of the HMW modulation of embodiment. It is a block diagram of the HMW demodulation circuit which demodulates the HMW modulation wobble signal of an embodiment. It is a wave form diagram of the 2nd harmonic signal waveform generated according to the reference carrier signal, modulated data, and modulated data of an embodiment. It is a wave form diagram of the generated HMW stream of an embodiment. FIG. 6 is a waveform diagram of a synchronous detection output signal of an HMW stream, an integrated output value of the synchronous detection output signal, a hold value of the integrated output value, and HMW demodulated modulated data according to the embodiment. It is explanatory drawing of the disk layout of embodiment. It is explanatory drawing of the wobbling of the PB zone and RW zone of embodiment. It is explanatory drawing of the modulation system of the prerecorded information of embodiment. It is explanatory drawing of the ECC structure of the phase change mark of embodiment. It is explanatory drawing of the ECC structure of the prerecorded information of embodiment. It is explanatory drawing of the frame structure of the phase change mark and pre-recorded information of embodiment. It is explanatory drawing of the bit block which comprises the relationship between RUB of the disc of an embodiment, and an address unit, and an address unit. It is explanatory drawing of the sync part of the address unit of embodiment. It is explanatory drawing of the monotone bit and the modulated data in the sync part of embodiment. It is explanatory drawing of the signal waveform and modulated data of the 1st sync bit in the sync part of embodiment. It is explanatory drawing of the signal waveform and modulated data of the 2nd sync bit in the sync part of embodiment. It is explanatory drawing of the signal waveform and modulated data of the 3rd sync bit in the sync part of embodiment. It is explanatory drawing of the signal waveform and modulated data of the 4th sync bit in the sync part of embodiment. It is explanatory drawing of the bit structure of the data part in the address unit of embodiment. It is explanatory drawing of the signal waveform and modulated data of the ADIP bit showing bit "1" of the data part of embodiment. It is explanatory drawing of the signal waveform of the ADIP bit showing bit "0" of the data part of embodiment, and modulated data. It is explanatory drawing of the address format of embodiment. It is explanatory drawing of the address information content by the ADIP bit of embodiment. It is a block diagram of an address demodulation circuit of an embodiment. It is explanatory drawing of the control timing of the address demodulation circuit of embodiment. It is a wave form diagram of a signal at the time of performing HMW demodulation with the address demodulation circuit of an embodiment. It is a wave form diagram of a signal at the time of performing HMW demodulation with the address demodulation circuit of an embodiment. It is explanatory drawing of the disc information of embodiment. It is explanatory drawing of the ECC format of the main data of embodiment. It is explanatory drawing of ECC format of the disc information of embodiment. 1 is a block diagram of a disk drive device according to an embodiment. It is a block diagram of the mastering apparatus of an embodiment.

Explanation of symbols

1 disk, 51 pickup, 52 spindle motor, 53 thread mechanism, 54 matrix circuit, 55 reader / writer circuit, 56 modulation / demodulation circuit, 57 ECC encoder / decoder, 58 wobble circuit, 59 address decoder, 60 system controller, 61 servo circuit, 62 spindle servo circuit, 63 laser driver, 120 AV system

Claims (3)

A recording medium on which the first data is recorded by a rewritable or additionally writable recording method,
The second data has a groove recorded in a continuous wobble;
The second data is composed of a first block including address information and a part of additional information,
The additional information included in the predetermined number of the first blocks is encoded to form the second block of the first error correction method,
The first block is encoded by the second error correction method,
An address unit is configured by combining the first block and at least the synchronization information,
The first data is recorded in a unit that is an integral multiple of the address unit, and is recorded in the recording area in units corresponding to the three address units.
The address information includes a layer number, an address for the unit, and information for specifying one of three address units included in the unit.
The recording medium according to claim 1, wherein the first error correction method has a higher error correction capability than the second error correction method . A recording apparatus for recording first data on a recording medium by a rewritable or additionally writable recording method,
The recording medium is
The second data has a groove recorded in continuous wobble, and the second data is composed of a first block including address information and part of additional information, and a predetermined number of the first data The additional information included in the block is encoded so as to constitute the second block of the first error correction method, the first block is encoded by the second error correction method, An address unit is composed of the first block and at least the synchronization information,
Recording means for recording the first data in units of an integral multiple of the address unit and recording the recording area in units corresponding to the three address units ;
The address information includes a layer number, an address for the unit, and information for specifying one of three address units included in the unit.
The recording apparatus according to claim 1, wherein the first error correction method has a higher error correction capability than the second error correction method . A recording method for recording first data on a recording medium by a rewritable or recordable recording method,
The recording medium has a groove in which the second data is recorded in a continuous wobble,
The second data is composed of a first block including address information and a part of the additional information, and the additional information included in the predetermined number of the first blocks is the second error correction method. The first block is encoded by the second error correction method, and an address unit is configured by the first block and at least the synchronization information. ,
Playing back at least one first block included in the played address unit;
Based on the address information of the first block, the first data is recorded in an integral multiple of the address unit, and is recorded in the recording area in units corresponding to the three address units.
The address information includes a layer number, an address for the unit, and information for specifying one of three address units included in the unit.
The recording method according to claim 1, wherein the first error correction method is a method having a higher error correction capability than the second error correction method.

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