JP4174446B2 - Substrate processing apparatus and substrate processing method - Google Patents

Description

  The present invention relates to a substrate processing apparatus and a substrate processing method, and more particularly to a technique for roughening the surface of a polycrystalline silicon substrate for solar cells.

  In a photoelectric conversion element such as a solar cell, it is essential for efficient performance to capture light efficiently. For this purpose, a technique of giving fine irregularities on the substrate surface is used. Thereby, compared with the case where the surface is flat, the incident light is reflected by the unevenness a plurality of times, so that more light is absorbed.

  In a solar cell using a single crystal silicon substrate, fine irregularities are given to the surface by wet etching using a chemical solution to form a so-called textured structure having a pyramid shape. However, since the polycrystalline silicon substrate does not have the same crystal axis orientation, a texture structure can be produced only partially by wet etching using the above chemical solution.

  In view of this, Patent Document 1 and the like have proposed a method of forming irregularities uniformly on the surface of a polycrystalline silicon substrate by etching using photolithography instead of wet etching using a conventional chemical solution. In FIG. 4 of Patent Document 1, the substrate 1 and the counter electrode 17 are immersed in an electrolytic solution 16 in which fine particles for mask are dispersed in an electrolytic bath 18 and connected to a pulse power source 19. Here, the substrate 1 is used as a negative electrode or a positive electrode, respectively, depending on whether the mask fine particles in the electrolytic solution 16 have a positive or negative charge. Then, by applying a predetermined DC voltage for a predetermined time, the mask fine particles are attached (electrodeposited) to the substrate 1 by electrophoresis. The substrate 1 on which the mask fine particles are electrodeposited is once taken out from the electrolytic solution 16 and etched using a separate wet etching apparatus or dry etching apparatus. Further, after the etching is finished, the remaining fine particles for masking are removed to obtain a roughened polycrystalline silicon substrate.

JP 2000-261008 A (5th page, FIG. 4)

  In the above method, the substrate 1 is removed from the electrolytic cell 18 after the mask fine particles are attached in the electrolytic solution 16, and is separately provided in a chemical solution bath for wet etching or RIE for dry etching. Etched in (Reactive Ion Etching) apparatus. That is, since the step of attaching the fine particles and the step of performing etching using the fine particles as a mask are performed in separate apparatuses, the processing becomes complicated. Therefore, there is a problem that the cost and time required for processing increase.

  The present invention has been made to solve the above problems, and an object of the present invention is to provide a substrate processing apparatus and a substrate processing method capable of reducing costs and time required for processing.

In order to solve the above problems, a substrate processing apparatus according to the present invention is a substrate processing apparatus that etches the substrate surface with a processing liquid using fine particles attached to the substrate surface to be processed as a mask. A treatment tank in which a solution containing OH ⁻ ions mixed with the fine particles charged to a potential is placed and the substrate and the counter electrode disposed opposite to the substrate are immersed in the solution, and a voltage that changes positively and negatively with time Is provided between the substrate and the counter electrode.

The substrate processing apparatus according to the present invention is a substrate processing apparatus that etches the substrate surface with a processing liquid using fine particles attached to the surface of the substrate to be processed as a mask, and includes the fine particles charged to a positive potential. A treatment tank in which a solution containing OH ⁻ ions is placed and the substrate and the counter electrode disposed opposite to the substrate are immersed in the solution, and a voltage that changes positively and negatively with respect to time is applied between the substrate and the counter electrode. And a power supply provided between them. Accordingly, it is possible to perform adhesion of fine particles and etching of the polycrystalline silicon substrate using the fine particles as a mask in a state where the polycrystalline silicon substrate is immersed in the solution contained in the treatment tank. Therefore, it is not necessary to separately use an apparatus for etching the polycrystalline silicon substrate, and the processing can be easily performed, so that the cost and time required for the processing can be reduced.

<Embodiment 1>
FIG. 1 is a schematic diagram showing a substrate processing apparatus 100 according to the first embodiment. The substrate processing apparatus 100 is for roughening the surface of a wafer 1 which is a substrate for solar cells made of polycrystalline silicon (polysilicon) by providing fine irregularities.

In FIG. 1, the wafer 1 and the counter electrode 2 are immersed in a solution 5 contained in a processing tank 4. A part or most of the solution 5 is ionized with a hydroxyl group OH ⁻ , and fine particles 6 serving as an etching mask are mixed therein. A pulse voltage is applied to the wafer 1 by a pulse power source 7 between the counter electrode 2 and the counter electrode 2 arranged opposite to each other in the solution 5. The voltage applied to the wafer 1 is controlled by the control power supply 8 using the reference electrode 3.

FIG. 2 is a schematic diagram showing how the fine particles 6 serving as an etching mask adhere to the surface of the wafer 1 and the wafer 1 is etched, which is realized by the substrate processing apparatus 100. FIG. 2A shows a state where fine particles 6 are attached to the surface of the wafer 1. FIG. 2B shows the state of etching of the wafer 1 that proceeds simultaneously with the adhesion of the fine particles 6. FIG. 2 (b) shows the OH ⁻ ions 11 in the solution 5 and the etched surface 12 of the wafer 1 where the etching has progressed.

Here, the fine particles 6 only need to be positively charged in the solution 5 and are made of oxide ceramics such as alumina and silicon oxide, insulators such as polystyrene and glass, or metals such as aluminum and copper. May be. The particle size of the fine particles 6 is selected to be 0.1 to several hundred μm depending on the size of the unevenness of the etching surface 12 to be formed. The solution 5 is selected from pure water, preferably an aqueous solution in which an electrolyte such as NaOH, NH ₃ , NH ₄ OH or the like that is alkaline is dissolved. As a result, the solution 5 is partially or mostly ionized to the hydroxyl group OH ⁻ . Further, in order to charge the surface of the fine particles 6 to a positive potential in the solution 5, the pH of the solution is adjusted, or a cationic surfactant is added.

  FIG. 3 is a graph for explaining the voltage applied to the wafer 1 in the substrate processing apparatus 100. In FIG. 3A, the horizontal axis represents time, the vertical axis represents voltage, and the dotted line represents voltage 0. That is, the upper side of the dotted line is a positive voltage, and the lower side of the dotted line is a negative voltage. As shown in FIG. 3A, this voltage has a pulse shape, and a positive voltage period 32 and a negative voltage period 31 are applied alternately. Further, the period 32 in FIG. 3A is actually set by comb-like repetition of a short positive pulse 33 and a short negative pulse 34 as shown in FIG. 3B.

  Next, a substrate processing method using the substrate processing apparatus 100 according to the present embodiment will be described.

  First, the period 31 representing a negative voltage in FIG. 3 will be described.

When a negative voltage is applied to the wafer 1, the fine particles 6 mixed in the solution 5 are charged to a positive potential in advance as described above, and are attracted to the wafer 1 and adhere to the surface thereof. The fine particles 6 once adhered maintain an adsorbed state by van der Waals force acting between the surface of the wafer 1. At this time, since the respective fine particles 6 in the solution 5 have the same kind of electric charge, they are present in a dispersed state in which aggregation is suppressed by the electric repulsive force. To do. Thereby, as shown in FIG. 2A, the fine particles 6 are dispersed and adhered on the surface of the wafer 1 at almost equal intervals. Accordingly, the fine particles 6 can be attached as an etching mask suitable for forming a uniform uneven texture structure on the surface of the wafer 1. At this time, since the OH ⁻ ions 11 in the solution 5 have the same kind of charge as the wafer 1, they do not impact the wafer 1.

  Next, the period 32 representing a positive voltage in FIG. 3 will be described.

When a positive voltage is applied to the wafer 1, the OH ⁻ ions 11 in the solution 5 have a different charge from that of the wafer 1, and are attracted to the wafer 1 and impact its surface. Thereby, etching is performed. Further, the fine particles 6 once adhered to the surface of the wafer 1 have the same kind of charge as the wafer 1 when a positive voltage is applied to the wafer 1, so that they repel and try to leave the wafer 1. However, as shown in FIG. 3B, when the period 32 is set by comb-like repetition of a short positive pulse 33 and a short negative pulse 34, the pulse width of the pulse 33 is less than a predetermined value. By reducing the size, it is possible to maintain a state in which the fine particles 6 are adsorbed on the surface of the wafer 1. That is, when the pulse width is smaller than a predetermined value, the fine particle 6 cannot follow the change of the pulse 33 because of its mass, and the wafer 1 becomes a negative voltage before leaving. 6 adsorption state is maintained. On the other hand, since the OH ⁻ ion 11 in the solution 5 can follow the change of the pulse 33 because of its small mass, the wafer 1 is impacted and etched. That is, by setting the pulse width of the pulse 33 to a range in which the OH ⁻ ions 11 can follow but the fine particles 6 cannot follow, the etching of the wafer 1 by the OH ⁻ ions 11 is performed without detaching the fine particles 6. Is possible. 3B shows the case where the pulse width of the pulse 34 is the same over the period 32, the pulse width of the pulse 34 may be variable.

By repeatedly applying the negative voltage having the period 31 and the positive voltage having the period 32 as described above for a predetermined time, isotropic wet etching with the OH ⁻ ions 11 can be performed using the fine particles 6 as a mask. it can. Thereby, the etching surface 12 having a shape as shown in FIG. 2B can be finally obtained. Further, as shown in FIG. 3A, by making the positive period 32 shorter than the negative period 31 in one cycle that changes between positive and negative, more isotropic wet etching can be performed.

  When the etching is completed, the wafer 1 is taken out of the processing tank 4 and the fine particles 6 are removed using a wet etching apparatus or a dry etching apparatus provided separately. As a result, a polysilicon wafer having a texture structure in which the uneven etching surface 12 is formed is obtained.

  As described above, in the substrate processing apparatus 100 and the substrate processing method using the same according to the present embodiment, the pulse voltage that changes positively and negatively with respect to time is applied to the wafer 1 to be contained in the processing tank 4. With the wafer 1 immersed in the solution 5, the adhesion of the fine particles 6 and the etching of the wafer 1 using the fine particles 6 as a mask are performed. Therefore, it is not necessary to separately use an apparatus for etching the wafer 1, and processing can be easily performed. Therefore, the cost and time required for processing can be reduced.

  Hereinafter, the present embodiment will be described in detail using specific examples.

  Alumina fine particles having a particle diameter of 10 μm were added to an aqueous solution in which 0.1% ammonia was added to 1 liter of water to prepare a treatment solution. The pH in the treatment tank containing this solution was about 9, and the alumina fine particles were charged to a positive potential. Furthermore, a cationic surfactant was added to the solution in order to increase the positive charge amount of the fine particles. In the treatment tank, a 15 cm square polysilicon wafer and a counter electrode having the same size as that of the wafer 1 were immersed at intervals of several cm, and each was connected to a pulse power source. As the voltage shown in FIG. 3, a pulse voltage in which the negative voltage changes to −several tens of volts and the positive voltage changes to + several volts is applied to the wafer. The period for applying the negative voltage (period 31) was set to about several seconds, and the period for applying the positive voltage (pulse 33) was set to about several hundred msec. The above voltage was applied for several minutes to adhere fine particles and etch the wafer, and then lifted the wafer. The pulled wafer was subjected to a predetermined treatment to remove fine particles, and an uneven etching surface was formed on the wafer surface to obtain a texture structure. The reflectance of the obtained wafer at a wavelength of 628 nm was 17%.

<Embodiment 2>
In the first embodiment, a pulse voltage from the pulse power supply 7 is used, but an AC voltage from a high frequency power supply may be used instead of the pulse voltage.

  FIG. 4 is a schematic diagram showing a substrate processing apparatus 200 according to the second embodiment. FIG. 4 shows that a high frequency power supply 41 and a capacitor 42 are installed in place of the pulse power supply 7 in FIG. 4, elements similar to those in FIG. 1 are denoted by the same reference numerals, and detailed description thereof will be omitted here. Also, in the following description of the operation, detailed description of the same operation as in the first embodiment is omitted.

  FIG. 5 is a graph for explaining the voltage applied to the wafer 1 in the substrate processing apparatus 200. In FIG. 5, the horizontal axis represents time, the vertical axis represents voltage, and the dotted line represents voltage 0. That is, the upper side of the dotted line is a positive voltage, and the lower side of the dotted line is a negative voltage. As shown in FIG. 5, this voltage is a trigonometric function in which the voltage changes positively and negatively with time, and is negatively biased for the following reason.

That is, in the solution 5, for example, positively charged fine particles 6 in addition to NH ₄ ⁺ positive ions and OH ⁻ ions 11 are electrically neutral. When a high frequency voltage is applied to the wafer 1 in this state, the heavy fine particles 6 do not follow the high frequency voltage and do not move, but the light OH ⁻ ions 11 and NH ₄ ⁺ ions correspond to the positive and negative electric fields of the high frequency voltage. To gather. However, the NH ₄ ⁺ ions in solution 5 OH ^- for less than the ion 11, the wafer 1 surface OH ^- so that ions 11 gather more. As a result, the potential on the surface of the wafer 1 is negatively biased.

  Next, a substrate processing method using the substrate processing apparatus 200 according to the present embodiment will be described.

  First, the period 51 representing a negative voltage in FIG. 5 will be described.

  When a negative voltage is applied to the wafer 1, the fine particles 6 mixed in the solution 5 are charged to a positive potential in advance as described above, so that they are attracted to the wafer 1 as in the first embodiment. Adhere to the surface.

  Here, as shown in FIG. 5, a self-bias voltage 53 is generated on the wafer 1 to shift the voltage in the negative direction. Therefore, even the fine particles 6 having a large mass that does not follow the change of one cycle of the high frequency voltage can be adhered to the surface of the wafer 1 by applying the high frequency voltage for a predetermined time. Further, since the capacitor 42 operates as a so-called blocking capacitor that cuts the DC component and passes only the AC component, the self-bias voltage 53 can prevent current from flowing to the wafer 1.

  Next, the period 52 representing a positive voltage in FIG. 5 will be described.

When a positive voltage is applied to the wafer 1, the OH ⁻ ions 11 in the solution 5 have a different charge from that of the wafer 1, and therefore are attracted to the wafer 1 and its surface as in the first embodiment. Shock. Thereby, etching is performed. Further, the fine particles 6 once adhered to the surface of the wafer 1 have the same kind of charge as the wafer 1 when a positive voltage is applied to the wafer 1, so that they repel and try to leave the wafer 1. Here, by making the frequency of the high frequency voltage as shown in FIG. 5 smaller than a predetermined value, it is possible to maintain the state in which the fine particles 6 are adsorbed on the surface of the wafer 1. That is, when the period 52 is smaller than a predetermined value, the fine particles 6 cannot follow the change of the high-frequency voltage because of the size of the mass, and the wafer 1 becomes a negative voltage before leaving. 6 adsorption state is maintained. On the other hand, the OH ^- ions 11 in the solution 5 can follow the change of the high-frequency voltage because of its small mass, so that the wafer 1 is impacted and etched. That is, the frequency of the high-frequency voltage, OH ^- ions 11 by can follow fine particles 6 is set to a range that can not be followed, as in the first embodiment, OH without disengaging the fine particles 6 ^- by Ion 11 The wafer 1 can be etched.

  As described above, in the substrate processing apparatus 200 and the substrate processing method according to the present embodiment, the self-bias voltage is obtained by using the AC voltage from the high frequency power supply 41 instead of the pulse voltage from the pulse power supply 7 and through the capacitor 42. 53 direct current components are cut. Therefore, since it is possible to prevent a current due to a direct current component from flowing through the wafer 1, in addition to the effect of the first embodiment, there is an effect that damage to the wafer 1 can be reduced.

  Hereinafter, the present embodiment will be described in detail using specific examples.

  A high frequency voltage having an amplitude of several tens of volts and a frequency of 10 MHz was applied to the wafer using a high frequency power source. The above high frequency voltage was applied for several minutes to adhere fine particles and etch the wafer, and then lifted the wafer. The pulled wafer was subjected to a predetermined treatment to remove fine particles, and an uneven etching surface was formed on the wafer surface to obtain a texture structure. The reflectance of the obtained polysilicon wafer at a wavelength of 628 nm was 18%.

<Embodiment 3>
Although the wafer 1 according to the first and second embodiments is made of polycrystalline silicon, the surface thereof may be covered with a metal layer.

FIG. 6 is a cross-sectional view showing wafer 1a according to the third embodiment. Wafer 1a covers the surface of wafer 1 made of polycrystalline silicon with metal layer 61 made of aluminum, tungsten, or the like and having a thickness of about 10 nm. It is a thing. Since the surface potential of the wafer 1a can be made uniform by covering it with the highly conductive metal layer 61, the fine particles 6 for the etching mask can be uniformly dispersed and adhered to the surface of the wafer 1a. In the etching using OH ⁻ ions 11 as described in the first and second embodiments, first, the metal layer 61 is removed by the OH ⁻ ions 11, and then the underlying polycrystalline silicon is etched.

  As described above, in the wafer 1a according to the present embodiment, the surface potential can be made uniform by covering with the highly conductive metal layer 61. Therefore, the fine particles 6 for the etching mask are more uniformly dispersed. It can be attached. Therefore, by using this wafer 1a, it is possible to obtain a polysilicon wafer having a textured structure in which the uneven etching surface 12 is more uniformly formed.

  In the above description, the wafer 1 made of polycrystalline silicon has been described as an example. However, the wafer 1 is not limited to polycrystalline silicon but may be made of other materials.

  In the above description, it has been explained that the removal of the fine particles 6 from the wafers 1 and 1a after completion of etching is performed by using a wet etching apparatus or a dry etching apparatus provided separately. It is also possible to remove the fine particles 6 without using them. That is, after the etching is completed, the fine particles 6 can be detached by the repulsive force by applying a positive voltage to the wafers 1 and 1a for a long time in the processing tank 4. Further, by pulling up the wafers 1, 1 a from the processing tank 4 with this positive voltage applied, it is possible to prevent reattachment of the fine particles 6.

  By performing such a process, the process tank 4 is used to remove the fine particles 6 in addition to the step of attaching the fine particles 6 and the step of etching using the fine particles 6 as a mask without using an etching apparatus. Can be done. Therefore, it is not necessary to separately use a device for separating the fine particles 6, and the processing can be performed more easily. Therefore, the cost and time required for processing can be further reduced.

  Hereinafter, the present embodiment will be described in detail using specific examples.

  The wafer that has been etched by the process described in the specific example according to the first embodiment was then applied with a positive voltage + several tens of volts for several minutes, and then pulled up from the process tank with the voltage applied. As a result, the fine particles serving as the mask were completely detached and removed from the wafer surface without reattachment.

1 is a schematic diagram illustrating a substrate processing apparatus according to a first embodiment. FIG. 3 is a schematic diagram showing adhesion and etching by the substrate processing apparatus according to the first embodiment. 4 is a graph showing a voltage applied to a wafer in the substrate processing apparatus according to the first embodiment. FIG. 6 is a schematic diagram showing a substrate processing apparatus according to a second embodiment. 6 is a graph showing a voltage applied to a wafer in the substrate processing apparatus according to the second embodiment. FIG. 6 is a cross-sectional view showing a wafer according to a third embodiment.

Explanation of symbols

1, 1a wafer, 2 counter electrode, 3 reference electrode, 4 treatment tank, 5 solution, 6 fine particles, 7 pulse power supply, 8 control power supply, 11 OH ^- ion, 12 etching surface, 31, 32, 51, 52 period, 33 , 34 pulse, 41 high frequency power supply, 42 capacitor, 53 self-bias voltage, 61 metal layer, 100, 200 substrate processing apparatus.

Claims (10)

A substrate processing apparatus that etches the substrate surface with a processing liquid using fine particles adhered to the substrate surface to be processed as a mask,
A treatment tank in which a solution containing OH ⁻ ions mixed with the fine particles charged at a positive potential is placed and the substrate and the counter electrode disposed opposite to the substrate are immersed in the solution;
A substrate processing apparatus, comprising: a power source that applies a voltage that changes positively and negatively between the substrate and the counter electrode. The substrate processing apparatus according to claim 1,
The substrate processing apparatus, wherein a voltage applied to the substrate changes in a positive and negative manner in a pulse shape. The substrate processing apparatus according to claim 2,
In one cycle in which a voltage applied to the substrate changes between positive and negative, a positive period is shorter than a negative period in a voltage applied to the substrate. The substrate processing apparatus according to claim 3, wherein
A substrate processing apparatus, wherein a short positive pulse voltage and a short negative pulse voltage repeated in a comb shape are applied to the substrate during a period in which a voltage applied to the substrate is positive. The substrate processing apparatus according to claim 4,
The substrate processing apparatus, wherein a pulse width of the short negative pulse voltage is variable during a period in which a voltage applied to the substrate is positive. The substrate processing apparatus according to claim 1,
A substrate processing apparatus, wherein a voltage from the power source is applied to the substrate through a blocking capacitor. A substrate processing apparatus according to any one of claims 1 to 6,
A substrate processing apparatus, wherein the substrate is a polycrystalline silicon substrate. A substrate processing apparatus according to any one of claims 1 to 6,
A substrate processing apparatus, wherein the substrate has a metal layer on a surface thereof. Immersing the substrate and the counter electrode in a solution in which fine particles charged with a positive potential and containing OH ⁻ ions are mixed;
Attaching the fine particles to the substrate by applying a negative voltage to the substrate;
And a step of etching the substrate with the OH ^- ions using the fine particles as a mask by applying a positive voltage to the substrate. The substrate processing method according to claim 9, comprising:
The substrate processing method further comprising the step of taking out the substrate from the solution while applying a positive voltage to the substrate after the etching step.

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