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JP4078993B2 - Semiconductor device - Google Patents

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Publication number
JP4078993B2
JP4078993B2 JP2003017003A JP2003017003A JP4078993B2 JP 4078993 B2 JP4078993 B2 JP 4078993B2 JP 2003017003 A JP2003017003 A JP 2003017003A JP 2003017003 A JP2003017003 A JP 2003017003A JP 4078993 B2 JP4078993 B2 JP 4078993B2
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Japan
Prior art keywords
lead electrode
semiconductor device
electrode end
solder
lead
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JP2003017003A
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JP2004228461A (en
Inventor
進吾 須藤
良裕 加柴
浩明 前田
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Mitsubishi Electric Corp
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Mitsubishi Electric Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/0601—Structure
    • H01L2224/0603—Bonding areas having different sizes, e.g. different heights or widths
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/401—Disposition
    • H01L2224/40135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/40137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/45124—Aluminium (Al) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49111—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73221—Strap and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H01L2924/13055—Insulated gate bipolar transistor [IGBT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/35—Mechanical effects
    • H01L2924/351—Thermal stress

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Die Bonding (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To realize a semiconductor apparatus having a proper connection between a semiconductor device and a lead out electrode (an inner lead), and at the same time, a structure which will not form "a solder reservoir", and superior electrical reliability. <P>SOLUTION: The semiconductor apparatus includes a semiconductor device 5 providing an external electrode end part 5A on the surface thereof; an electrically conductive joint component 7 formed on the external electrode end part 5A; a lead out electrode end 10, that is arranged facing to the external electrode end part 5A and bonded to the external electrode end part 5A via the joint component 7, which is a lead out electrode wiring part 9 that is arranged on a position facing the lead out electrode end 10 and transmits the electrical signal of the semiconductor device 5; and an electrode-coupling member 12 for lead out coupling the lead out electrode end 10 and the lead out electrode wiring part 9 so as to possess an air gap. <P>COPYRIGHT: (C)2004,JPO&amp;NCIPI

Description

【０００１】
【発明の属する技術分野】
この発明は、半導体装置に関し、ことに電力用半導体装置を構成する半導体素子の引き出し電極部（インナーリード部）の接合において高信頼性を備えた半導体装置に関するものである。
【０００２】
【従来の技術】
半導体装置を構成する半導体素子の引き出し電極（インナーリード）は、半導体素子の導通電流を外部に取り出すために必要不可欠なものであり、信頼性・安定性・コスト等の観点から、その構造については種々の提案がなされてきている。その１つとして、引き出し電極に半導体素子との接合部となる凸部を設け、この凸部と半導体素子側の電極端部（外部電極端部）との間に半田層を挟む構成とすることにより、引き出し電極の凸部とやわらかい半田層により、半導体素子の電極端部に対する引き出し電極からの応力の緩和が図られた構造が提案されている（例えば、特許文献１参照）。
【０００３】
【特許文献１】
特開２０００−２３６０５６号公報（第３頁、第１図）
【０００４】
【発明が解決しようとする課題】
しかしながら、従来の半導体装置においては、電流が多く流れる部分の発熱が大きいため、引き出し電極端部が半導体素子の中央部直上に設けられていると、半導体素子の中央部の温度が上昇しやすく、また半導体素子側の電極端部に対する引き出し電極からの応力の緩和を図るために設けられた引き出し電極の凸部の側面において、溶融した半田により「半田溜り部」が形成される。引き出し電極の凸部側面に「半田溜り部」が形成されると、所望の接合面において半田厚さが確保できなかったり、溶融した半田や半田付けの際に用いられるフラックスの半導体素子周縁部への放散等を引き起こし、半導体素子の電気的信頼性を低下させる等の問題が生じる。
【０００５】
この発明に係る半導体装置は、半導体素子中心における温度集中を効率的に抑制するとともに、半導体素子と引き出し電極（インナーリード）との接続が良好で、かつ、「半田溜り部」が形成されない構造を有し、電気的信頼性に優れた半導体装置を実現するものである。
【０００６】
【課題を解決するための手段】
表面に外部電極端部を備えた半導体素子と、前記外部電極端部の上に形成された導電性の接合部材と、前記外部電極端部に相対して設けられ、前記接合部材を介して前記外部電極端部に接合された一対の引き出し電極端部と、この引き出し電極端部と相対する位置に設けられ、前記半導体素子の導通電流を外部に導出するための引き出し電極配線部と、前記引き出し電極端部と前記引き出し電極配線部との間に空隙を有するように連結する引き出し電極連結部とを備え、前記一対の引き出し電極端部が、前記引き出し電極配線部側に対し凹面となる曲面を持ち、かつ前記引き出し電極連結部に対して前記空隙側に配置されたものである。
【０００７】
【発明の実施の形態】
実施の形態１
図１は本発明にかかる半導体装置の構成を説明する斜視図である。
かかる半導体装置は、例えば、厚さ４ｍｍのＣｕ製のベース板１の上に、厚さ２００μｍの半田層２（図示せず）を介して絶縁基板３が設けられている。この絶縁基板３はＡｌＮなどの絶縁体である厚さ０．６ｍｍのセラミック板の表裏面に厚さ２５０μｍのＣｕ配線パターンが形成されたものである。絶縁基板３の上には、厚さ２００μｍの半田層４（図示せず）を介して、電力用半導体素子である、厚さ２５０μｍ、主面の大きさが１５ｍｍ角のＩＧＢＴ５、および、ほぼ同一の厚さと大きさを有するダイオード６が設けられている。ＩＧＢＴ５およびダイオード６の表面には、引き出し電極端部１０および１１と電気的に接続するための、厚さ２００μｍの金属電極（外部電極端部）５Ａおよび６Ａが、各々形成されている。金属電極５Ａおよび６Ａは、各々、厚さ１００μｍの半田層７および８を介して引き出し電極端部１０および１１と電気的に接続されている。また、引き出し電極端部１０および１１は、各々、その中央部にて連結部（引き出し電極連結部）１２および１３を介して引き出し電極配線部（インナーリード部）９と連結されている（図１においては、連結部１２、１３は引き出し電極配線部９に隠れているため見えていない）。なお、ＩＧＢＴ５の表面には、この他、ＩＧＢＴの動作を制御するための信号配線のために、直径４００μｍのアルミニウムワイヤ１４が超音波接合によって接合されている。このアルミニウムワイヤ１４は、図示しない装置外部の端子に電気的に繋がる電極と接続されている。また、ベース板１は例えばＡｌ製のヒートシンクなどに熱伝導グリースなどを介してネジ止めされ、ＩＧＢＴ５やダイオード６が発生する熱を放熱する役目を果たしている。
【０００８】
なお、図１ではＩＧＢＴ５およびダイオード６が、絶縁基板３に１対のみ形成された場合を示したが、通常、絶縁基板３上には配線パターン（Ｃｕ）が形成され、複数の電力用半導体素子（ＩＧＢＴやダイオード等）によって回路が構成されるため、引き出し電極端部１０および１１は半導体素子の数に対応した数だけ形成されることになる。なお、引き出し電極端部１０および１１は、半田の濡れ性の観点からは、Ｃｕで構成されることが望ましいが、半田が濡れるようにＮｉメッキ、Ｓｎメッキ、Ａｇメッキ、はんだメッキなどの表面処理が施されていれば、ＣｕやＣｕ合金の他、４２Ａｌｌｏｙ、ＫＯＶＡＲ等のＦｅベースの合金にて構成しても構わない。
【０００９】
図２は本発明にかかる半導体装置の構成の詳細を説明する断面図で、図１におけるＩＧＢＴ５が設置された部分を右側側面から見た図である。上述したように、ベース基板１の上には半田層２を介して絶縁基板３が接続されている。この絶縁基板３の表裏面にはＣｕ配線パターン３Ａ、３Ｂが形成されている。また、絶縁基板３の上には半田層４を介してＩＧＢＴ５が形成されており、ＩＧＢＴ５の裏面には裏面電極５Ｂが形成され、表面には金属電極５Ａが形成されている。さらに、金属電極５Ａの上には半田層７を介して引き出し電極端部１０が接続されており、この引き出し電極端部１０は連結部１２を介して引き出し電極配線部９と連結されている。なお、図示したように、引き出し電極端部１０と引き出し電極配線部９は、引き出し電極端部１０のほぼ中央に設けられた連結部１２を介して、中空状態、即ち、間に空隙を隔てて対向するように形成されている。また、ベース基板１、絶縁基板３、ＩＧＢＴ５、引き出し電極端部１０、連結部１２および引き出し電極配線部９は樹脂層１５により封着されている。
【００１０】
かかる構成においては、図示したように、半田層７を形成する半田が溶融した場合に、溶融半田は容易に引き出し電極端部１０の上面には塗れ広がらないことが判明した。この現象は以下のように理解されている。すなわち、引き出し電極端部１０の下面と接した溶融半田は、引き出し電極端部１０の側面の上部端までは表面張力により濡れ広がるが、引き出し電極端部１０の側面と上面を隔てるエッジ部分（角の部分）が、溶融半田が表面張力のみで引き出し電極端部１０の上面に濡れ広がることに対し、乗り越えることが困難な壁となる、すなわち、溶融半田の表面張力に対しては変曲点となるためであると考えられる。一方、従来の電力用半導体装置においては、配線部に凸部を設け、電極端部としていたために、半田層を構成する半田が溶融し、表面張力により塗れ広がろうとする際に、上述したような、半田の濡れ広がりに対する壁（引き出し電極端部１０の側面と上面を隔てるエッジ部に相当する部分）が存在せず、配線部の凸部に接した半田が溶融すると、凸部の側面を伝わり、配線部の裏面側にまで塗れ広がるため、容易に半田溜り部を形成することになる。
以上のような理由から、本実施の形態にかかる半導体装置においては、ＩＧＢＴ５と引き出し電極配線部９間には、直ちに、はんだ溜り部が形成されることはない。
【００１１】
図３は本発明にかかる半導体装置の全体構成を説明する断面図で、図１における半導体装置を正面側から見た図である。ＩＧＢＴ５およびダイオード６は、引き出し電極端部１０、１１および連結部１２、１３を介して引き出し電極配線部９に連結され、引き出し電極配線部９は外部電源からの導通電流を流入させるための配線材１６上に構成された内部電極１６Ａと、例えば、常法の超音波接合にて接続される。この部分の接続方法に関しては、ＩＧＢＴ５やダイオード６と直接接続される部分ではないため、超音波接合のみならず、半田付、ろう付、エネルギービーム溶接、カシメなどあらゆる手段を用いることができる。また、ＩＧＢＴ５の表面右側にはアルミワイヤ１４が接続されており、配線材１７上に構成された内部電極１７Ａと、例えば、超音波接合にて接続されている。このアルミワイヤ１４はゲート電極の配線や温度モニターのための配線であり、引き出し電極配線部９のような大電力を流出入させるものではない。従って、アルミワイヤ１４とＩＧＢＴ５との接合は、常法の超音波接合が用いられている。なお、その他の構造は図２にて説明したものと同じであるので説明は省略する。最後に、装置全体が例えばトランスファモールド法によって樹脂１５により封止され、筐体が形成される。この時、配線材１６および１７の一端が装置外部に露出し外部端子１６Ｂおよび１７Ｂを構成し、半導体装置外部の配線と、各々電気的に接続されることになる。
【００１２】
次に、かかる構成を採用し、半田溜り部の形成を抑制した理由を説明する。従来の半導体装置においては、引き出し電極と半導体素子を半田付けにて接続する時、特許文献１に開示されたように、溶融半田は引き出し電極の凸部側に濡れ広がると共に、引き出し電極の凸部の裏面角部に半田溜り部を形成する。上述の特許文献１に開示された従来の半導体装置は、引き出し電極と半導体素子間の応力を緩和させることを目的とし、この半田溜り部を積極的に形成している。しかしながら、半田溜り部が形成されると、溶融した半田が半田溜り部に表面張力によって凝集することによって、接合界面での半田厚さが不足したり、接合界面において半田接合の強度が不足する等の問題が発生し、装置の信頼性、電気特性に影響を及ぼすことがある。
【００１３】
また、半田溜り部が形成されると、半田付けに用いられたフラックスが半導体素子周縁部に拡散する恐れが生じる。特に、半導体素子表面と半田溜まり部との間隙が小さい部分では洗浄後のフラックス残渣によって、長期的に半導体装置を使用すると、耐電圧劣化等の絶縁性能の低下を生じる場合がある。このように、半導体素子に引き出し電極を半田付けする場合には、上述した半田溜り部の形成は好ましくない。そこで、本発明にかかる半導体素子においては、引き出し電極に連結部により中空状態に保持された電極端部を設け、溶融半田が、引き出し電極の配線部裏面にて半田溜り部を形成することのない構成を採用することにより、半導体素子の電気的な信頼性、半田付け時の安定性の向上を図ったものである。すなわち、本発明にかかる半導体装置においては、引き出し電極配線部９に連結部１２、１３により中空状態にて保持された引き出し電極端部１０、１１を設け、この引き出し電極端部１０、１１とＩＧＢＴ５およびダイオード６を半田付けにて接続することとしたため、上述した理由により、ＩＧＢＴ５およびダイオード６の表面と引き出し電極配線部９の裏面間に、直ちに、半田溜り部が形成されることがない。その結果、電気的絶縁性において、信頼性の高い半導体装置が容易に実現されることになる。
また、従来の半導体装置の課題である、半導体素子に対する応力緩和は、本願発明においては、引き出し電極端部と引き出し電極配線部間に設けられた連結部および引き出し電極端部と半導体素子間に形成される半田層がその役割を担うため、半田溜り部を形成する必要はない。
【００１４】
なお、かかる引き出し電極配線部と引き出し電極端部が連結部にて中空状態に保持された構造体は、例えば、常法の射出成型により容易に作成することが可能である。
【００１５】
また、上記実施の形態においては、接合材としては半田を用いた場合について説明したが、半田の代わりに、高融点のろう材や銀ペーストのような高分子材料を用いた場合であっても、半田同様にぬれ現象によって部材を接合するプロセスであるため、同様の効果を有する。
【００１６】
以上、本発明にかかる半導体装置によれば、引き出し電極端部と引き出し電極配線部とを連結部により空隙を有するように連結したことにより、半導体素子と引き出し電極端部を半田付けする際に半田溜り部を形成することが無く、電気的信頼性に優れた引き出し電極構造を有した半導体装置が実現される。
【００１７】
実施の形態２
図４は、本発明にかかる半導体装置の、他の実施の形態の構成を説明する斜視図である。本実施の形態にかかる半導体装置においては、連結部１２、１３が引き出し電極配線部９の側面に設けられ、Ｕ字型に略１８０度折り曲げられることにより、引き出し電極端部１０、１１を引き出し電極配線部９の直下に中空保持している点にて実施の形態１にて示した半導体装置と異なるものである。
【００１８】
図５は、本発明にかかる半導体装置の構成を説明する断面図で、図４におけるＩＧＢＴ５が設置された部分を右側側面から見た図である。このように、引き出し電極配線部９と引き出し電極端部１０は、引き出し電極配線部９の側面に設けられ、Ｕ字型に略１８０度折り曲げられた連結部１２にて連結されている。また、本実施の形態の半導体装置においては、実施の形態１にて示した半導体装置と異なり、ＩＧＢＴ５の表面には、中央部に半田の濡れ性が高い金属電極（外部電極端部）５Ａを設けると共に、周縁部には、チップ表裏電極の沿面放電を回避するのに十分な絶縁距離を確保するためのガードリング５Ｃに、保護膜としてＳｉＯ２やガラスなどの皮膜が施されている。かかる構成とすることで、ＩＧＢＴ５の表面に半田層７を形成する際に、溶融した半田が半導体素子周縁部へ回り込むことがなく、半田の濡れ性が高い金属電極５Ａにのみ安定に半田層７が形成されることになる。なお、その他の構成は図２と同じであるため、説明は省略する。
【００１９】
このように、本実施の形態にかかる半導体装置においては、ＩＧＢＴ５の表面には、中央部にはんだの濡れ性が高い金属電極５Ａを設けると共に、周縁部には、ガラス被膜やＳｉＯ２被膜が表面に形成された部分（ガードリング）５Ｃが設けられている。そのため、金属電極５Ａに形成された半田層７が、加熱され溶融した場合にも、表面張力のみでは半導体素子周縁部へ回り込む恐れは小さい。しかしながら、半導体素子の表面にガードリングを設けても、引き出し電極の配線部の裏面にはんだ溜り部が形成されると、溶融半田が過剰に存在した場合、溶融した半田がガードリングを乗り越えることにより半導体素子の周縁部と引き出し電極の配線部が短絡する恐れが生じる。そのため、半導体素子の電気的な信頼性が低下する。そのような場合においても、本発明にかかる半導体装置の構成を用いることで、はんだ溜り部の形成が抑制されるため、かかる半導体素子の電気的な信頼性が低下することはない。すなわち、半導体素子の表面に溶融半田の拡散を防止するガードリング部を設け、引き出し電極端部が連結部によって引き出し電極配線部と中空状態に保持されることにより、半導体素子と引き出し電極間にはんだ溜り部が形成されにくく、より電気的信頼性の高い半導体装置が実現される。
【００２０】
また、本実施の形態における半導体装置においては、引き出し電極端部１０の周縁部のうち、連結部１２と接続する部分は湾曲形状を有しているため、実施の形態１にて説明したような溶融半田の濡れ広がりに対するエッジの効果は有していない。しかしながら、図５に示された形状から分かるように、連結部１２がＵ字型に略１８０度折り曲げられて引き出し配線部９と連結されているため、この部分においては従来のような、半導体素子の周縁部にオーバーハングするような半田溜り部が形成されることはなく、従来の半導体装置にて生じたような問題は発生しない。
なお、本発明にかかる半導体装置の構成を、実施の形態１にて示したような、表面に上述したガードリング部を有しない半導体素子に適用しても同様の効果が得られることはいうまでもない。
【００２１】
図６（ａ）、（ｂ）は、本発明にかかる半導体装置の引き出し電極配線部、連結部および引き出し電極端部の構成と作成方法を説明する図である。かかる引き出し電極配線部９、連結部１２、１３および引き出し電極端部１０、１１は、図６（ａ）に示されたように構成され、連結部１２、１３および引き出し電極端部１０、１１が引き出し電極配線部９の側面から突出した形状を有している。図６（ｂ）は連結部１２、１３をＵ字型に略１８０度折り曲げた状態を示している。このように、連結部１２、１３および引き出し電極端部１０、１１が引き出し電極配線部９の側面から突出した形状とし、連結部１２、１３をＵ字型に略１８０度折り曲げるだけで、引き出し電極配線部９と引き出し電極端部１０、１１とが中空状態に保持された構造が容易に得られ、コストが低減され、好適である。
【００２２】
以上、本発明のこの実施の形態にかかる半導体装置によれば、連結部および引き出し電極端部が引き出し電極配線部の側面から突出した形状とし、連結部をＵ字型に略１８０度折り曲げることにより、引き出し電極端部と引き出し電極配線部とを連結部により空隙を有するように連結した構成が容易に得られ、半導体素子と引き出し電極端部を半田付けする際にはんだ溜り部を形成することが無く、電気的信頼性に優れた引き出し電極構造を有した半導体装置が低コストにて実現される。
【００２３】
実施の形態３
図７は、本発明にかかる半導体装置の、他の実施の形態の構成を説明する断面図である。かかる半導体装置は、引き出し電極配線部９と引き出し電極端部１０を別部材にて構成した点を除けば、実施の形態２にて説明した半導体装置と構成は同じである。
すなわち、図７に示すように、引き出し電極配線部９の一部に引き出し電極端部１０を形成する別部材を、引き出し電極配線部９と引き出し電極端部１０間に空隙を有するように固着する。固着する方法としては、超音波接合、ろう付、エネルギービーム溶接などで可能であり、図７の構造においても本発明による所望の形状となり、半田が金属膜電５Ａからはみ出さない形状が得られ、実施の形態２にて示した半導体装置同様の効果が得られる。
【００２４】
本実施の形態にかかる半導体装置によれば、引き出し電極配線部９と引き出し電極端部１０が別部材にて構成されるため、例えば、引き出し電極配線部９をＣｕ、引き出し電極端部１０をＩＧＢＴ５と熱膨張係数の差が小さい材料とすることができ、半田層７に加わる熱応力を緩和することが可能となり、引き出し電極端部１０とＩＧＢＴ５間の接合における熱疲労に対する信頼性が向上する。
また、引き出し電極配線部９と引き出し電極端部１０が別部材にて構成されるため、引き出し電極端部１０の任意形状への加工が容易となる効果も併せ持つ。
【００２５】
以上、本発明のこの実施の形態にかかる半導体装置によれば、実施の形態２にて示した構成において、引き出し電極配線部９と引き出し電極端部１０を別部材にて構成したことにより、実施の形態２で得られた効果に加え、引き出し電極端部と引き出し電極配線部の設計裕度の高い半導体装置が得られ、好適である。
【００２６】
実施の形態４
図８は、本発明にかかる半導体装置の、他の実施の形態の構成を説明する断面図、図９（ａ）、（ｂ）は、図８に示した半導体装置の引き出し電極配線部、連結部および引き出し電極端部の構成と作成方法を説明する図である。かかる半導体装置は、引き出し電極配線部９を厚く、引き出し電極端部１０を薄く構成した点を除けば、実施の形態２にて説明した半導体装置と構成は同じである。
このように接合部を薄くすることによって、例えば、引き出し電極配線部９がＣｕで構成されている場合には、半導体装置全体の温度が変化することによって発生する、引き出し電極端部１０とＩＧＢＴ５間、および、ダイオード６と接合材である半田層７間にて生ずる熱ひずみを薄い引き出し電極端部１０によって抑制でき、実施の形態２で得られた効果に加え、引き出し電極配線部９の電気抵抗の増加を抑制しつつ、動作中の熱サイクルに対する信頼性が向上する効果が得られる。
【００２７】
また、引き出し電極端部１０を、２０ＧＰａ程度のヤング率を有したエポキシ系の樹脂など、従来のシリコン系のゲル（ヤング率：＜１ＭＰａ）等に比べて剛性のある樹脂によって封止してもよい。この場合には、半導体装置が温度サイクルを受けた時に発生する引き出し電極端部１０の変形が抑制され、各半導体素子と引き出し電極端部１０を接合する半田７に発生する熱応力、ひずみが軽減されることにより、半導体装置の長期信頼性が向上する。また、本実施の形態においては、引き出し電極端部１０と引き出し電極配線部９の空隙には封止樹脂７が充填されている例を示したが、引き出し電極端部１０と引き出し電極配線部９の空隙は、金属、無機物などにて充填しておいても構わない。
【００２８】
以上、本発明のこの実施の形態にかかる半導体装置によれば、連結部および引き出し電極端部が引き出し電極配線部の側面から突出した形状とし、連結部を略１８０度折り曲げることにより、引き出し電極端部と引き出し電極配線部とを連結部により空隙を有するように連結した構成において、連結部の厚みを薄くしたので、実施の形態２にて示した効果に加え、引き出し電極配線部の電気抵抗の増加を抑制しつつ、動作中の熱サイクルに対する信頼性が向上する効果が得られる。
【００２９】
実施の形態５
図１０は、本発明にかかる半導体装置の、他の実施の形態の構成を説明する断面図、図１１（ａ）、（ｂ）は、図１０に示した半導体装置の引き出し電極配線部、連結部および引き出し電極端部の構成と作成方法を説明する図である。かかる半導体装置は、引き出し電極端部１０、１１に貫通穴を設けた点を除けば、実施の形態２にて説明した半導体装置と構成は同じである。
【００３０】
図１１（ａ）に示した通り、引き出し電極端部１０、１１には貫通孔１０’、１１’が形成されており、曲げ成型することによって、図１０に示されたように引き出し電極端部１０、１１が形成され、貫通孔１０’、１１’がＩＧＢＴ５およびダイオード６上に配置される。
以上のような構成とすることによって、図１０に示したように、例えばＩＧＢＴ５と引き出し電極端部１０を接合する場合に、過剰な半田が供給された時、接合とは無関係な溶融半田は貫通孔１０’内に上昇し、引き出し電極端部１０の裏面もしくは引き出し電極配線部９に濡れを生じ、ＩＧＢＴ５の電極領域外へ溶融半田がはみ出したり、引き出し電極配線部９とＩＧＢＴ５間に半田溜り部を形成する恐れが軽減される。この際、貫通孔１０’内面にもＮｉメッキ、Ａｇメッキ、Ａｕメッキ、Ｓｎメッキ、はんだメッキ、Ｐｄメッキなど半田の濡れ性が良好な表面処理を施しておくと、余分な半田を効率よく貫通孔１０’から空隙部内面へと塗れ広がらせることが可能となる。
【００３１】
また、図１０に示すように、半田層７が引き出し電極端部１０と引き出し電極配線部９間にブリッジを形成することにより引き出し電極端部１０と引き出し電極配線部９間を直接接合したとしても、空隙部の存在により溶融半田は空隙部内面へと塗れ広がるため、引き出し電極端部１０から溶融半田が容易にあふれ出ることはない。
【００３２】
また、貫通孔１０’を設けておくと、半田付時のフラックス、接合部５Ａと溶融した半田材が接触する時に巻き込んだ周囲の雰囲気ガスおよび接合部材と濡れを生じない半田の酸化被膜などを排出でき、好適である。その他、貫通孔１０’を流れる半田の流れにより溶融半田の流動が促進され、半田接合部に存在する酸化膜を破壊することにより、半田接合部に不規則に発生するボイドを抑制することができ、接合プロセスの安定性、接合信頼性が向上する。
【００３３】
なお、上記実施の形態においては、引き出し電極端部１０、１１に貫通穴１０’、１１’を設けたが、引き出し電極端部１０、１１にはかかる貫通穴に代えて溝を設けてもよい。図１２は、引き出し電極端部１０、１１に溝１０’’、１１’’を設けた場合の構成説明図である。また、本実施の形態においては、各引き出し電極端部１０、１１に穴もしくは溝を１つ設けた構成につき説明したが、穴もしくは溝は複数設けてもよい。例えば、図１２に示した１つの溝１０’’、１１’’に代えて、櫛状の複数の溝を設けてもよい。
【００３４】
引き出し電極端部１０、１１に溝を設けることにより、上述したように、半田付プロセスの際に形成される半田のボイドも内部電極の間隙に排出することが可能となるので、引き出し電極端部１０、１１の接合面内では低ボイドの高品質接合を実現出来るという効果が生じる。
【００３５】
また、引き出し電極端部１０、１１に溝を複数個設けることにより、引き出し電極端部１０、１１が複数個に分割されることになり、半田に発生する熱応力が分散されるため、半田ひずみが軽減され、熱サイクルによる半田接合部の疲労に対する寿命が向上する効果も併せ持つ。
【００３６】
さらに、引き出し電極端部１０、１１に溝を複数個設けた場合には、通常のフラックスを有する半田を用いた接合に代えて、低酸素領域で液状フラックスを用いずに接合するフラックスレス接合を用いることが望ましい。その理由は以下の通りである。
引き出し電極端部１０、１１に溝を複数個設けた場合には、複数の溝を介して半田が濡れ広がるために、通常のフラックスを有する半田を用いた接合の場合には、フラックスの拡散により、溶融した半田が、引き出し電極端部１０、１１および引き出し電極配線部９の広い範囲にまで濡れ広がる。そのため、半田溜り部の形成を抑制する効果が大きいが、このことは、逆に不要な半田領域を広範囲に形成することを意味する。かかる不要な半田領域の形成は、半田使用量の増加および電気的信頼性の観点からは本来好ましくない。
【００３７】
一方、フラックスレス接合では、半田の濡れ拡がりは接合母材と溶融半田の濡れ現象に依存するため、引き出し電極端部１０、１１に溝を複数個設けた場合においても、溶融した半田は引き出し電極端部１０、１１の裏面にまでは濡れ拡がらない。そのため、不要な半田領域が広範囲に形成されることはなく、半田溜り部の形成を抑制するとともに、半田使用量の増加が抑制され、電気的信頼性に優れた接合が低コストにて実現されることになる。
【００３８】
以上、本発明のこの実施の形態にかかる半導体装置によれば、引き出し電極端部と引き出し電極配線部とを連結部により空隙を有するように連結した構成において、引き出し電極端部に貫通穴もしくは溝を設けたため、半導体素子と引き出し電極端部を半田付けする際に、過剰な溶融半田が生じた場合においても、引き出し電極端部に設けられた貫通穴もしくは溝を通って、引き出し電極端部の裏面に溶融半田が流れるため、半田溜り部の形成がさらに抑制され、実施の形態２にて得られた効果に加え、さらに優れた電気的信頼性を有する引き出し電極構造を有した半導体装置が低コストにて実現される。
【００３９】
実施の形態６
図１３は、本発明にかかる半導体装置の、他の実施の形態の構成を説明する断面図、図１４（ａ）、（ｂ）は、図１３に示した半導体装置の引き出し電極配線部、連結部および引き出し電極端部の構成と作成方法を説明する図である。かかる半導体装置は、引き出し電極配線部９の両側面に連結部１２Ａ、１２Ｂ、１３Ａ、１３Ｂを設け、ＩＧＢＴ５、ダイオード６に対する引き出し電極端部を、各々２つ設けた点（１０Ａ、１０Ｂ及び１１Ａ、１１Ｂ）を除けば、実施の形態２にて説明した半導体装置と構成が同じである。
図１４（ａ）に示した通り、引き出し電極配線部９には左右の側面に連結部１２Ａ、１２Ｂが設けられ、連結部１２Ａ、１２Ｂに連結された引き出し電極端部１０Ａ、１０Ｂが引き出し電極配線部９の直下に、中空状態、即ち、間に空隙を隔てて対向して保持されている。かかる引き出し電極部は以下のようにして作成される。すなわち、図１４（ｂ）に示されたように、引き出し電極配線部９の両側面に設けられた連結部１２Ａ、１２Ｂ、１３Ａ、１３Ｂが、Ｕ字型に略１８０度折り曲げられることによって引き出し電極端部１０Ａ、１０Ｂ、１１Ａ、１１Ｂが形成されることになる。なお、溶融半田の流れを考慮すると、両電極は曲げ成型後に重なり合うことのないように隙間を持って成型されることが望ましい。
【００４０】
かかる構成とすることにより、図１３に示したように、複数個所の接合部によって半田溜まりが分散されるようになり、半田が接合領域からあふれ出すことに起因する耐電圧低下による装置の不良発生を抑制することが可能となる。
【００４１】
また、半導体素子においては、電流が多く流れる部分の発熱が大きいため、引き出し電極端部が半導体素子の中央部直上に設けられていると、半導体素子の中央部の温度が上昇しやすい。しかし、本実施の形態においては、引き出し電極端部が半導体素子の中央部から外れた２点に分離配置されるため、半導体素子における発熱の中心部（引き出し電極端部と相対する部分）が、半導体素子の中央部から離れた２点に分散されることになり、半導体素子中心における温度集中が、効率的に抑制されることになる。具体的には、中央部に連結部を有する構造にて、半導体素子中心温度が約１２５℃になるような動作条件において、両側に連結部を有する構造では、半導体素子中心温度が約１２０℃に抑制されることが判明している。なお、半導体素子の温度が５℃程度抑制されると、製品寿命としては約２倍延びることが実験的に確認されており、半導体装置の信頼性は大幅に向上することになる。
【００４２】
以上、本発明のこの実施の形態にかかる半導体装置によれば、引き出し電極端部と引き出し電極配線部とを連結部により空隙を有するように連結した構成において、１つの半導体素子に接続される引き出し電極端部を２つの部分に分離したため、半田溜り部の形成がさらに抑制され、かつ、半導体素子の最大温度を抑制することが可能となり、実施の形態２にて得られた効果に加え、さらに優れた電気的信頼性を有する引き出し電極構造を有した半導体装置が実現される。
【００４３】
実施の形態７
図１５は、本発明にかかる半導体装置の、他の実施の形態の構成を説明する断面図である。かかる半導体装置は、引き出し電極配線部９の上部に第２の引き出し電極配線部１８を設けた点を除けば、実施の形態６にて説明した半導体装置と構成が同じである。
図１５に示した通り、引き出し電極配線部９の上部には第２の引き出し電極配線部１８が設けられている。この第２の引き出し電極配線部１８は、Ｃｕなどの良導体にて形成されている。また、引き出し電極配線部９、連結部１２Ａ、１２Ｂ、引き出し電極端部１０Ａ、１０Ｂは、Ｍｏ若しくは４２Ａｌｌｏｙ、ＫＯＶＡＲなどのＦｅ系合金若しくは前記材料とＣｕのクラッド材のような、電気抵抗は増大するが、低熱膨張である材料にて構成されている。
【００４４】
第２の引き出し電極配線部１８と引き出し電極配線部９との接合は高温はんだ付、ろう付、カシメなど電気的接触を得られるものであれば特に限定されることなく、使用可能である。
【００４５】
かかる構成とすることにより、装置全体の温度変化、半導体素子動作時の発熱による温度変化に起因して発生するＩＧＢＴ５の主材料であるＳｉと引き出し電極端部１０Ａ、１０Ｂを構成する材料との線膨張係数差によって発生する半田層７に対する応力、ひずみを軽減することが可能となり、半導体装置の熱疲労に対する信頼性を向上させることができる。
【００４６】
本実施の形態にては、第２の引き出し電極配線部と引き出し電極配線部、連結部、引き出し電極端部とを別部材によって構成している。そのため、引き出し電極端部を、所望の形状に構成しやすいという利点がある。なお、第２の引き出し電極配線部の材料としては低熱膨張部材を挙げたが、引き出し電極配線部、連結部、引き出し電極端部と同じであるＣｕであっても構わない。
【００４７】
以上、本発明のこの実施の形態にかかる半導体装置によれば、引き出し電極端部と引き出し電極配線部とを連結部により空隙を有するように連結した構成において、引き出し配線部上に良導体にて構成された第２の引き出し電極配線部を設けたため、装置全体の温度変化、半導体素子動作時の発熱による温度変化に起因して発生する半導体素子と引き出し電極端部との線膨張係数差によって発生する半田層に対する応力、ひずみを軽減することが可能となり、半導体装置の熱疲労に対する信頼性を向上させることができ、実施の形態６にて得られた効果に加え、さらに優れた電気的信頼性を有する引き出し電極構造を有した半導体装置が実現される。
【００４８】
【発明の効果】
以上、本発明にかかる半導体装置によれば、表面に外部電極端部を備えた半導体素子と、前記外部電極端部の上に形成された導電性の接合部材と、前記外部電極端部に相対して設けられ、前記接合部材を介して前記外部電極端部に接合された一対の引き出し電極端部と、この引き出し電極端部と相対する位置に設けられ、前記半導体素子の導通電流を外部に導出するための引き出し電極配線部と、前記引き出し電極端部と前記引き出し電極配線部との間に空隙を有するように連結する引き出し電極連結部とを備え、前記一対の引き出し電極端部が、前記引き出し電極配線部側に対し凹面となる曲面を持ち、かつ前記引き出し電極連結部に対して前記空隙側に配置したので、引き出し電極端部が半導体素子の中央部から外れた２点に分離配置され、半導体素子における発熱の中心部（引き出し電極端部と相対する部分）が、半導体素子の中央部から離れた２点に分散されることになり、半導体素子中心における温度集中が、効率的に抑制されるとともに、半導体素子と引き出し電極端部を半田付けする際に半田溜り部を形成することが無く、電気的信頼性に優れた引き出し電極構造を有した半導体装置が実現される。
【図面の簡単な説明】
【図１】 本発明にかかる半導体装置の構成を説明する斜視図である。
【図２】 本発明にかかる半導体装置の構成を説明する断面図である。
【図３】 本発明にかかる半導体装置の構成を説明する断面図である。
【図４】 本発明にかかる半導体装置の構成を説明する斜視図である。
【図５】 本発明にかかる半導体装置の構成を説明する断面図である。
【図６】 本発明にかかる半導体装置の引き出し電極部の構成を説明する斜視図である。
【図７】 本発明にかかる半導体装置の構成を説明する断面図である。
【図８】 本発明にかかる半導体装置の構成を説明する断面図である。
【図９】 本発明にかかる半導体装置の引き出し電極部の構成を説明する斜視図である。
【図１０】 本発明にかかる半導体装置の構成を説明する断面図である。
【図１１】 本発明にかかる半導体装置の引き出し電極部の構成を説明する斜視図である。
【図１２】 本発明にかかる半導体装置の引き出し電極部の構成を説明する斜視図である。
【図１３】 本発明にかかる半導体装置の構成を説明する断面図である。
【図１４】 本発明にかかる半導体装置の引き出し電極部の構成を説明する斜視図である。
【図１５】 本発明にかかる半導体装置の構成を説明する断面図である。
【符号の説明】
１ ベース板、２ 半田層、３ 絶縁基板、３Ａ Ｃｕ配線パターン、
３Ｂ Ｃｕ配線パターン、、４ 半田層、５ ＩＧＢＴ、５Ａ 金属電極、
５Ｂ 金属電極、５Ｃ ガードリング、６ ダイオード、６Ａ 金属電極、
７ 半田層、８ 半田層、９ 引き出し電極配線部、１０ 引き出し電極端部、
１０’ 貫通穴、１０’’ 溝、１１ 引き出し電極端部、１１’ 貫通穴、
１１’’ 溝、１２ 連結部、１３ 連結部、１４ アルミニウムワイヤ、
１５ 封止樹脂、１６ 配線材、１６Ａ 内部電極、１６Ｂ 外部電極、
１７ 配線材、１７Ａ 内部電極、１７Ｂ 外部電極、
１８ 第２の引き出し電極配線部。[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device, and more particularly to a semiconductor device having high reliability in bonding of lead electrode portions (inner lead portions) of semiconductor elements constituting a power semiconductor device.
[0002]
[Prior art]
The lead electrode (inner lead) of the semiconductor element constituting the semiconductor device is indispensable for taking out the conduction current of the semiconductor element to the outside. From the viewpoint of reliability, stability, cost, etc. Various proposals have been made. As one of them, the lead electrode is provided with a convex portion that becomes a joint portion with the semiconductor element, and a solder layer is sandwiched between the convex portion and the electrode end portion (external electrode end portion) on the semiconductor element side. Therefore, a structure has been proposed in which the stress from the extraction electrode to the electrode end portion of the semiconductor element is relaxed by the protruding portion of the extraction electrode and a soft solder layer (see, for example, Patent Document 1).
[0003]
[Patent Document 1]
JP 2000-236056 A (3rd page, FIG. 1)
[0004]
[Problems to be solved by the invention]
However, in conventional semiconductor devices, Since the heat generation in the portion where a large amount of current flows is large, if the end of the extraction electrode is provided immediately above the center of the semiconductor element, the temperature at the center of the semiconductor element is likely to rise, A “solder reservoir” is formed of molten solder on the side surface of the convex portion of the extraction electrode provided to relieve stress from the extraction electrode with respect to the electrode end on the semiconductor element side. If a “solder reservoir” is formed on the side surface of the protruding portion of the extraction electrode, the solder thickness cannot be secured at the desired joint surface, or the molten solder or the flux used for soldering to the periphery of the semiconductor element This causes problems such as diffusion of the semiconductor element and lowering the electrical reliability of the semiconductor element.
[0005]
The semiconductor device according to the present invention is While efficiently suppressing temperature concentration at the center of the semiconductor element, The semiconductor device has a structure in which the connection between the semiconductor element and the lead electrode (inner lead) is good and the “solder reservoir” is not formed, and the electrical reliability is excellent.
[0006]
[Means for Solving the Problems]
A semiconductor element having an external electrode end on the surface; a conductive bonding member formed on the external electrode end; and provided to face the external electrode end; Bonded to end of external electrode A pair of A lead electrode end portion, a lead electrode wiring portion provided at a position opposite to the lead electrode end portion, for leading a conduction current of the semiconductor element to the outside, the lead electrode end portion and the lead electrode wiring portion; A lead electrode connecting portion that is connected so as to have a gap between The pair of lead electrode end portions have a curved surface that is concave with respect to the lead electrode wiring portion side, and is disposed on the gap side with respect to the lead electrode connecting portion. Is.
[0007]
DETAILED DESCRIPTION OF THE INVENTION
Embodiment 1
FIG. 1 is a perspective view illustrating the configuration of a semiconductor device according to the present invention.
In such a semiconductor device, for example, an insulating substrate 3 is provided on a Cu base plate 1 having a thickness of 4 mm via a solder layer 2 (not shown) having a thickness of 200 μm. This insulating substrate 3 is obtained by forming a Cu wiring pattern having a thickness of 250 μm on the front and back surfaces of a ceramic plate having a thickness of 0.6 mm which is an insulator such as AlN. On the insulating substrate 3, through a solder layer 4 (not shown) having a thickness of 200 μm, an IGBT 5 having a thickness of 250 μm and a main surface of 15 mm square, which is a power semiconductor element, and substantially the same A diode 6 having the following thickness and size is provided. On the surfaces of the IGBT 5 and the diode 6, metal electrodes (external electrode end portions) 5A and 6A having a thickness of 200 μm for electrically connecting to the extraction electrode end portions 10 and 11 are formed, respectively. Metal electrodes 5A and 6A are electrically connected to lead electrode end portions 10 and 11 through solder layers 7 and 8 having a thickness of 100 μm, respectively. The lead electrode end portions 10 and 11 are connected to lead electrode wiring portions (inner lead portions) 9 via connecting portions (lead electrode connecting portions) 12 and 13 at the central portions thereof (FIG. 1). In FIG. 5, the connecting portions 12 and 13 are not visible because they are hidden behind the lead electrode wiring portion 9). In addition, an aluminum wire 14 having a diameter of 400 μm is bonded to the surface of the IGBT 5 by ultrasonic bonding for signal wiring for controlling the operation of the IGBT. The aluminum wire 14 is connected to an electrode that is electrically connected to a terminal outside the device (not shown). Further, the base plate 1 is screwed to a heat sink made of, for example, Al via heat conductive grease or the like, and serves to radiate heat generated by the IGBT 5 and the diode 6.
[0008]
Although FIG. 1 shows a case where only one pair of IGBT 5 and diode 6 is formed on the insulating substrate 3, a wiring pattern (Cu) is usually formed on the insulating substrate 3, and a plurality of power semiconductor elements are formed. Since the circuit is constituted by (IGBT, diode, etc.), the lead electrode end portions 10 and 11 are formed in a number corresponding to the number of semiconductor elements. The lead electrode end portions 10 and 11 are preferably made of Cu from the viewpoint of solder wettability. However, surface treatment such as Ni plating, Sn plating, Ag plating, or solder plating is performed so that the solder gets wet. If it is applied, it may be made of an alloy of Fe base such as 42 Alloy or KOVAR in addition to Cu or Cu alloy.
[0009]
FIG. 2 is a cross-sectional view illustrating details of the configuration of the semiconductor device according to the present invention, and is a view of a portion where the IGBT 5 is installed in FIG. As described above, the insulating substrate 3 is connected to the base substrate 1 via the solder layer 2. Cu wiring patterns 3A and 3B are formed on the front and back surfaces of the insulating substrate 3. Further, an IGBT 5 is formed on the insulating substrate 3 via a solder layer 4, a back electrode 5B is formed on the back surface of the IGBT 5, and a metal electrode 5A is formed on the surface. Further, an extraction electrode end portion 10 is connected to the metal electrode 5A through a solder layer 7, and the extraction electrode end portion 10 is connected to the extraction electrode wiring portion 9 through a connecting portion 12. As shown in the figure, the extraction electrode end portion 10 and the extraction electrode wiring portion 9 are in a hollow state, that is, with a gap between them, via a connecting portion 12 provided substantially at the center of the extraction electrode end portion 10. It is formed so as to face each other. The base substrate 1, the insulating substrate 3, the IGBT 5, the lead electrode end portion 10, the connecting portion 12, and the lead electrode wiring portion 9 are sealed with a resin layer 15.
[0010]
In such a configuration, as shown in the figure, it has been found that when the solder forming the solder layer 7 is melted, the molten solder is not easily spread and spreads on the upper surface of the lead electrode end portion 10. This phenomenon is understood as follows. That is, the molten solder in contact with the lower surface of the extraction electrode end portion 10 spreads by surface tension up to the upper end of the side surface of the extraction electrode end portion 10, but the edge portion (corner) separating the side surface and the upper surface of the extraction electrode end portion 10. ) Is a wall that is difficult to get over while the molten solder wets and spreads on the upper surface of the extraction electrode end portion 10 only by surface tension, that is, an inflection point with respect to the surface tension of the molten solder. It is thought that it is to become. On the other hand, in the conventional power semiconductor device, since the wiring portion is provided with a convex portion and used as an electrode end portion, when the solder constituting the solder layer is melted and spreads due to surface tension, the above-mentioned is described. When the solder in contact with the convex portion of the wiring portion melts without the presence of such a wall against the solder spreading (the portion corresponding to the edge portion separating the side surface and the upper surface of the lead electrode end portion 10), the side surface of the convex portion Therefore, the solder pool portion can be easily formed.
For the reasons described above, in the semiconductor device according to the present embodiment, no solder reservoir is immediately formed between the IGBT 5 and the lead electrode wiring portion 9.
[0011]
FIG. 3 is a cross-sectional view illustrating the entire configuration of the semiconductor device according to the present invention, and is a view of the semiconductor device in FIG. 1 as viewed from the front side. The IGBT 5 and the diode 6 are connected to the lead electrode wiring portion 9 via the lead electrode end portions 10 and 11 and the connecting portions 12 and 13, and the lead electrode wiring portion 9 is a wiring material for allowing a conduction current from an external power source to flow in. 16 is connected to the internal electrode 16A formed on 16 by, for example, conventional ultrasonic bonding. Regarding the connection method of this portion, since it is not a portion directly connected to the IGBT 5 or the diode 6, not only ultrasonic bonding but also any means such as soldering, brazing, energy beam welding, and caulking can be used. An aluminum wire 14 is connected to the right side of the surface of the IGBT 5 and is connected to the internal electrode 17A formed on the wiring member 17 by, for example, ultrasonic bonding. This aluminum wire 14 is a wiring for a gate electrode and a temperature monitor, and does not allow large power to flow in and out like the extraction electrode wiring portion 9. Therefore, a conventional ultrasonic bonding is used for bonding the aluminum wire 14 and the IGBT 5. The other structure is the same as that described with reference to FIG. Finally, the entire apparatus is sealed with the resin 15 by, for example, a transfer mold method, and a housing is formed. At this time, one end of the wiring members 16 and 17 is exposed to the outside of the device to constitute the external terminals 16B and 17B, and is electrically connected to the wiring outside the semiconductor device.
[0012]
Next, the reason for adopting such a configuration and suppressing the formation of the solder reservoir will be described. In the conventional semiconductor device, when the lead electrode and the semiconductor element are connected by soldering, as disclosed in Patent Document 1, the molten solder spreads wet on the convex portion side of the lead electrode and the convex portion of the lead electrode. A solder reservoir is formed at the back corner of the substrate. The conventional semiconductor device disclosed in Patent Document 1 described above actively forms the solder pool for the purpose of relaxing the stress between the extraction electrode and the semiconductor element. However, when the solder pool is formed, the molten solder aggregates in the solder pool due to surface tension, so that the solder thickness at the bonding interface is insufficient, or the strength of solder bonding is insufficient at the bonding interface, etc. Problems may occur, affecting the reliability and electrical characteristics of the device.
[0013]
Further, when the solder pool portion is formed, the flux used for soldering may be diffused to the peripheral edge portion of the semiconductor element. In particular, in a portion where the gap between the semiconductor element surface and the solder pool portion is small, when the semiconductor device is used over a long period of time due to the flux residue after cleaning, the insulation performance may be deteriorated such as withstand voltage degradation. As described above, when the extraction electrode is soldered to the semiconductor element, the above-described formation of the solder reservoir is not preferable. Therefore, in the semiconductor element according to the present invention, the lead electrode is provided with an electrode end portion that is held in a hollow state by the connecting portion, and the molten solder does not form a solder reservoir portion on the back surface of the lead electrode wiring portion. By adopting the configuration, the electrical reliability of the semiconductor element and the stability during soldering are improved. That is, in the semiconductor device according to the present invention, the extraction electrode wiring portions 9 are provided with the extraction electrode end portions 10 and 11 held in the hollow state by the coupling portions 12 and 13, and the extraction electrode end portions 10 and 11 and the IGBT 5 are provided. Since the diode 6 is connected by soldering, a solder reservoir is not immediately formed between the front surface of the IGBT 5 and the diode 6 and the back surface of the lead electrode wiring portion 9 for the reason described above. As a result, a highly reliable semiconductor device can be easily realized in electrical insulation.
In the present invention, stress relaxation for a semiconductor element, which is a problem of a conventional semiconductor device, is formed between a connection portion provided between the lead electrode end portion and the lead electrode wiring portion and between the lead electrode end portion and the semiconductor element. Since the solder layer to be played plays the role, it is not necessary to form a solder reservoir.
[0014]
Note that a structure in which the lead electrode wiring part and the lead electrode end part are held in a hollow state at the connecting part can be easily produced by, for example, a conventional injection molding.
[0015]
Further, in the above embodiment, the case where solder is used as the bonding material has been described, but even when a high melting point brazing material or a polymer material such as silver paste is used instead of solder, Since this is a process of joining members by a wetting phenomenon like solder, it has the same effect.
[0016]
As described above, according to the semiconductor device of the present invention, the lead electrode end portion and the lead electrode wiring portion are connected to each other so as to have a gap by the connecting portion, so that when the semiconductor element and the lead electrode end portion are soldered, soldering is performed. A semiconductor device having a lead electrode structure with excellent electrical reliability without forming a reservoir is realized.
[0017]
Embodiment 2
FIG. 4 is a perspective view for explaining the configuration of another embodiment of the semiconductor device according to the present invention. In the semiconductor device according to the present embodiment, the connecting portions 12 and 13 are provided on the side surface of the lead electrode wiring portion 9 and bent into a U shape by approximately 180 degrees, whereby the lead electrode end portions 10 and 11 are connected to the lead electrode. This is different from the semiconductor device shown in the first embodiment in that it is held hollow directly under the wiring portion 9.
[0018]
FIG. 5 is a cross-sectional view illustrating the configuration of the semiconductor device according to the present invention, and is a view of the portion where the IGBT 5 is installed in FIG. 4 as viewed from the right side surface. In this manner, the lead electrode wiring portion 9 and the lead electrode end portion 10 are provided on the side surface of the lead electrode wiring portion 9 and are connected by the connecting portion 12 bent in a U-shape by approximately 180 degrees. Further, in the semiconductor device of the present embodiment, unlike the semiconductor device shown in the first embodiment, a metal electrode (external electrode end portion) 5A having high solder wettability is provided at the center on the surface of the IGBT 5. At the periphery, a coating such as SiO 2 or glass is applied as a protective film to the guard ring 5C for securing a sufficient insulation distance to avoid creeping discharge of the chip front and back electrodes. With this configuration, when the solder layer 7 is formed on the surface of the IGBT 5, the molten solder does not enter the periphery of the semiconductor element, and the solder layer 7 can be stably provided only on the metal electrode 5 </ b> A having high solder wettability. Will be formed. Since other configurations are the same as those in FIG. 2, description thereof is omitted.
[0019]
As described above, in the semiconductor device according to the present embodiment, the surface of the IGBT 5 is provided with the metal electrode 5A having high solder wettability at the center portion, and the glass coating or SiO2 coating is provided on the peripheral portion. A formed portion (guard ring) 5C is provided. Therefore, even when the solder layer 7 formed on the metal electrode 5A is heated and melted, the surface tension alone is less likely to go around to the peripheral edge of the semiconductor element. However, even if a guard ring is provided on the front surface of the semiconductor element, if a solder reservoir is formed on the back surface of the wiring portion of the lead electrode, if the molten solder is excessive, the molten solder gets over the guard ring. There is a risk that the peripheral portion of the semiconductor element and the wiring portion of the extraction electrode are short-circuited. Therefore, the electrical reliability of the semiconductor element is reduced. Even in such a case, by using the configuration of the semiconductor device according to the present invention, the formation of the solder reservoir is suppressed, so that the electrical reliability of the semiconductor element does not deteriorate. That is, a guard ring portion for preventing the diffusion of molten solder is provided on the surface of the semiconductor element, and the end portion of the lead electrode is held in a hollow state with the lead electrode wiring portion by the connecting portion, so that the solder between the semiconductor element and the lead electrode is provided. A reservoir is hardly formed, and a semiconductor device with higher electrical reliability is realized.
[0020]
Further, in the semiconductor device according to the present embodiment, since the portion connected to the connecting portion 12 in the peripheral portion of the lead electrode end portion 10 has a curved shape, as described in the first embodiment. It has no edge effect on the spread of wet solder. However, as can be seen from the shape shown in FIG. 5, the connecting portion 12 is bent into a U-shape by approximately 180 degrees and connected to the lead-out wiring portion 9. A solder reservoir that overhangs at the peripheral edge of the semiconductor device is not formed, and the problem that occurs in the conventional semiconductor device does not occur.
It should be noted that the same effect can be obtained even when the configuration of the semiconductor device according to the present invention is applied to a semiconductor element that does not have the above-described guard ring portion on the surface as shown in the first embodiment. Nor.
[0021]
FIGS. 6A and 6B are diagrams for explaining the configuration and creation method of the lead electrode wiring portion, the connecting portion, and the lead electrode end portion of the semiconductor device according to the present invention. The lead electrode wiring part 9, the connecting parts 12 and 13, and the lead electrode end parts 10 and 11 are configured as shown in FIG. 6A, and the joint parts 12 and 13 and the lead electrode end parts 10 and 11 are configured as shown in FIG. The lead electrode wiring part 9 has a shape protruding from the side surface. FIG. 6B shows a state in which the connecting portions 12 and 13 are bent into a U shape by approximately 180 degrees. In this way, the connecting portions 12 and 13 and the lead electrode end portions 10 and 11 are shaped so as to protrude from the side surface of the lead electrode wiring portion 9, and the lead electrodes are simply bent by approximately 180 degrees into the U-shape. A structure in which the wiring portion 9 and the extraction electrode end portions 10 and 11 are held in a hollow state can be easily obtained, and the cost is reduced, which is preferable.
[0022]
As described above, according to the semiconductor device according to this embodiment of the present invention, the connecting portion and the lead electrode end portion protrude from the side surface of the lead electrode wiring portion, and the connecting portion is bent into a U shape by approximately 180 degrees. The structure in which the lead electrode end portion and the lead electrode wiring portion are connected so as to have a gap by the connecting portion can be easily obtained, and the solder reservoir portion can be formed when soldering the semiconductor element and the lead electrode end portion. In addition, a semiconductor device having a lead electrode structure with excellent electrical reliability can be realized at low cost.
[0023]
Embodiment 3
FIG. 7 is a cross-sectional view illustrating the configuration of another embodiment of the semiconductor device according to the present invention. Such a semiconductor device has the same configuration as that of the semiconductor device described in the second embodiment except that the extraction electrode wiring portion 9 and the extraction electrode end portion 10 are formed of different members.
That is, as shown in FIG. 7, another member for forming the extraction electrode end portion 10 is fixed to a part of the extraction electrode wiring portion 9 so as to have a gap between the extraction electrode wiring portion 9 and the extraction electrode end portion 10. . As a method of fixing, ultrasonic bonding, brazing, energy beam welding, and the like are possible. Even in the structure of FIG. 7, a desired shape according to the present invention is obtained, and a shape in which the solder does not protrude from the metal film electricity 5A is obtained. The same effects as those of the semiconductor device shown in the second embodiment can be obtained.
[0024]
According to the semiconductor device according to the present embodiment, since the lead electrode wiring portion 9 and the lead electrode end portion 10 are formed of separate members, for example, the lead electrode wiring portion 9 is made of Cu and the lead electrode end portion 10 is made of an IGBT 5. Therefore, the thermal stress applied to the solder layer 7 can be relaxed, and the reliability against thermal fatigue at the junction between the lead electrode end 10 and the IGBT 5 is improved.
In addition, since the lead electrode wiring portion 9 and the lead electrode end portion 10 are formed of separate members, the lead electrode end portion 10 can be easily processed into an arbitrary shape.
[0025]
As described above, according to the semiconductor device according to this embodiment of the present invention, in the configuration shown in the second embodiment, the lead electrode wiring portion 9 and the lead electrode end portion 10 are configured as separate members. In addition to the effect obtained in the second aspect, a semiconductor device having a high design margin for the lead electrode end portion and the lead electrode wiring portion is obtained, which is preferable.
[0026]
Embodiment 4
FIG. 8 is a cross-sectional view illustrating the configuration of another embodiment of the semiconductor device according to the present invention. FIGS. 9A and 9B are diagrams illustrating lead electrode wiring portions and connections of the semiconductor device shown in FIG. It is a figure explaining the structure and preparation method of a part and an extraction electrode edge part. Such a semiconductor device has the same configuration as the semiconductor device described in the second embodiment except that the lead electrode wiring portion 9 is thick and the lead electrode end portion 10 is thin.
By thinning the junction portion in this way, for example, when the lead electrode wiring portion 9 is made of Cu, the lead electrode end portion 10 and the IGBT 5 are generated when the temperature of the entire semiconductor device changes. In addition to the effects obtained in the second embodiment, the electrical resistance of the extraction electrode wiring portion 9 can be suppressed by the thin extraction electrode end portion 10. The effect of improving the reliability with respect to the thermal cycle during operation can be obtained while suppressing the increase in the temperature.
[0027]
Further, the lead electrode end portion 10 may be sealed with a resin that is more rigid than a conventional silicon gel (Young's modulus: <1 MPa), such as an epoxy resin having a Young's modulus of about 20 GPa. Good. In this case, deformation of the lead electrode end 10 that occurs when the semiconductor device undergoes a temperature cycle is suppressed, and thermal stress and strain generated in the solder 7 that joins each semiconductor element and the lead electrode end 10 are reduced. As a result, the long-term reliability of the semiconductor device is improved. In the present embodiment, the gap between the extraction electrode end portion 10 and the extraction electrode wiring portion 9 is filled with the sealing resin 7. However, the extraction electrode end portion 10 and the extraction electrode wiring portion 9 are illustrated. These voids may be filled with a metal, an inorganic substance, or the like.
[0028]
As described above, according to the semiconductor device of this embodiment of the present invention, the connecting portion and the lead electrode end portion are projected from the side surface of the lead electrode wiring portion, and the lead electrode end portion is bent by approximately 180 degrees. In the configuration in which the connecting portion and the lead electrode wiring portion are connected so as to have a gap by the connecting portion, the thickness of the connecting portion is reduced. Therefore, in addition to the effect shown in the second embodiment, the electrical resistance of the lead electrode wiring portion is reduced. While suppressing the increase, the effect of improving the reliability with respect to the thermal cycle during operation can be obtained.
[0029]
Embodiment 5
FIG. 10 is a cross-sectional view for explaining the configuration of another embodiment of the semiconductor device according to the present invention. FIGS. 11A and 11B show the lead electrode wiring portion and connection of the semiconductor device shown in FIG. It is a figure explaining the structure and preparation method of a part and an extraction electrode edge part. Such a semiconductor device has the same configuration as the semiconductor device described in the second embodiment except that through-holes are provided in the lead electrode end portions 10 and 11.
[0030]
As shown in FIG. 11A, through-electrodes 10 ′ and 11 ′ are formed in the extraction electrode end portions 10 and 11, and the extraction electrode end portion is bent as shown in FIG. 10 and 11 are formed, and the through holes 10 ′ and 11 ′ are arranged on the IGBT 5 and the diode 6.
With the above configuration, as shown in FIG. 10, for example, when joining the IGBT 5 and the lead electrode end portion 10, when excessive solder is supplied, molten solder unrelated to the bonding penetrates. Ascends into the hole 10 ′, wets the back surface of the extraction electrode end 10 or the extraction electrode wiring portion 9, and melted solder protrudes outside the electrode region of the IGBT 5, or a solder pool portion between the extraction electrode wiring portion 9 and the IGBT 5. The risk of forming is reduced. At this time, if surface treatment with good solder wettability such as Ni plating, Ag plating, Au plating, Sn plating, solder plating, and Pd plating is applied to the inner surface of the through hole 10 ', excess solder can be efficiently penetrated. It becomes possible to spread and spread from the hole 10 ′ to the inner surface of the gap.
[0031]
Further, as shown in FIG. 10, even when the solder layer 7 forms a bridge between the extraction electrode end portion 10 and the extraction electrode wiring portion 9, the extraction electrode end portion 10 and the extraction electrode wiring portion 9 are directly joined. Since the molten solder is applied and spreads on the inner surface of the void due to the presence of the void, the molten solder does not easily overflow from the lead electrode end portion 10.
[0032]
Further, if the through hole 10 ′ is provided, a soldering flux, a surrounding atmosphere gas entrained when the joined portion 5A comes into contact with the molten solder material, and an oxide film of solder that does not wet the joining member are provided. It can be discharged and is preferable. In addition, the flow of the molten solder is promoted by the flow of the solder flowing through the through hole 10 ′, and voids generated irregularly in the solder joint can be suppressed by destroying the oxide film present in the solder joint. , Stability of bonding process and bonding reliability are improved.
[0033]
In the above embodiment, the through-holes 10 ′ and 11 ′ are provided in the extraction electrode end portions 10 and 11. However, the extraction electrode end portions 10 and 11 may be provided with grooves instead of the through-holes. . FIG. 12 is an explanatory diagram of the configuration when the grooves 10 ″ and 11 ″ are provided in the lead electrode end portions 10 and 11, respectively. In the present embodiment, the configuration in which one hole or groove is provided in each of the extraction electrode end portions 10 and 11 has been described, but a plurality of holes or grooves may be provided. For example, a plurality of comb-like grooves may be provided instead of the single grooves 10 ″ and 11 ″ shown in FIG.
[0034]
By providing grooves in the lead electrode end portions 10 and 11, as described above, the solder void formed during the soldering process can be discharged into the gap between the internal electrodes. The effect of being able to realize high-quality bonding with low voids in the bonding surfaces 10 and 11 occurs.
[0035]
Further, by providing a plurality of grooves in the extraction electrode end portions 10 and 11, the extraction electrode end portions 10 and 11 are divided into a plurality of portions, and the thermal stress generated in the solder is dispersed. This has the effect of improving the life against the fatigue of the solder joint due to thermal cycling.
[0036]
Further, in the case where a plurality of grooves are provided in the lead electrode end portions 10 and 11, a fluxless joining that joins without using a liquid flux in a low oxygen region, instead of joining using a solder having a normal flux. It is desirable to use it. The reason is as follows.
When a plurality of grooves are provided in the lead electrode end portions 10 and 11, the solder spreads through the plurality of grooves. Therefore, in the case of joining using a solder having a normal flux, the diffusion of the flux The melted solder wets and spreads over a wide range of the extraction electrode end portions 10 and 11 and the extraction electrode wiring portion 9. Therefore, the effect of suppressing the formation of the solder pool portion is great, but this means that an unnecessary solder region is formed over a wide range. The formation of such an unnecessary solder region is inherently undesirable from the viewpoint of increasing the amount of solder used and electrical reliability.
[0037]
On the other hand, in the fluxless joining, since the solder wetting and spreading depends on the wetting phenomenon between the joining base material and the molten solder, even when a plurality of grooves are provided in the extraction electrode end portions 10 and 11, the molten solder is not extracted. It does not spread to the back of the extreme parts 10 and 11. As a result, unnecessary solder areas are not formed over a wide area, and the formation of solder reservoirs is suppressed, and the increase in the amount of solder used is suppressed, and bonding with excellent electrical reliability is realized at low cost. Will be.
[0038]
As described above, according to the semiconductor device according to this embodiment of the present invention, in the configuration in which the lead electrode end portion and the lead electrode wiring portion are connected so as to have a gap by the connecting portion, the lead electrode end portion has a through hole or groove. Therefore, even when excessive molten solder is generated when soldering the semiconductor element and the lead electrode end, the lead electrode end is passed through the through hole or groove provided in the lead electrode end. Since the molten solder flows on the back surface, the formation of the solder reservoir is further suppressed, and in addition to the effects obtained in the second embodiment, the semiconductor device having a lead electrode structure having further excellent electrical reliability is low. Realized at cost.
[0039]
Embodiment 6
FIG. 13 is a cross-sectional view illustrating the configuration of another embodiment of the semiconductor device according to the present invention. FIGS. 14A and 14B are diagrams illustrating lead electrode wiring portions and connections of the semiconductor device shown in FIG. It is a figure explaining the structure and preparation method of a part and an extraction electrode edge part. This semiconductor device is provided with connecting portions 12A, 12B, 13A, and 13B on both side surfaces of the lead electrode wiring portion 9, and two lead electrode end portions for the IGBT 5 and the diode 6 (10A, 10B, and 11A, respectively). Except 11B), the configuration is the same as that of the semiconductor device described in the second embodiment.
As shown in FIG. 14A, the lead electrode wiring portion 9 is provided with connecting portions 12A and 12B on the left and right side surfaces, and lead electrode end portions 10A and 10B connected to the connecting portions 12A and 12B are lead electrode wirings. It is held directly below the portion 9 in a hollow state, that is, opposed to each other with a gap therebetween. Such an extraction electrode portion is formed as follows. That is, as shown in FIG. 14B, the connecting portions 12A, 12B, 13A, and 13B provided on the both side surfaces of the lead electrode wiring portion 9 are bent into a U-shape by approximately 180 degrees to thereby draw lead current. The extreme portions 10A, 10B, 11A, and 11B are formed. In consideration of the flow of molten solder, it is desirable that the two electrodes are molded with a gap so that they do not overlap after bending.
[0040]
By adopting such a configuration, as shown in FIG. 13, solder pools are dispersed by a plurality of joints, and the occurrence of a device failure due to a decrease in withstand voltage caused by the solder overflowing from the joint region. Can be suppressed.
[0041]
Further, in a semiconductor element, since heat generation is large in a portion where a large amount of current flows, if the end portion of the extraction electrode is provided immediately above the center portion of the semiconductor element, the temperature of the center portion of the semiconductor element tends to increase. However, in the present embodiment, the lead electrode end portion is separated and arranged at two points off the central portion of the semiconductor element, so that the heat generation center portion (portion opposite to the lead electrode end portion) in the semiconductor element is Dispersion is made at two points away from the central portion of the semiconductor element, and temperature concentration at the center of the semiconductor element is efficiently suppressed. Specifically, in a structure having a connecting portion at the center and an operating condition in which the semiconductor element central temperature is about 125 ° C., the structure having the connecting portion on both sides is about 120 ° C. It has been found to be suppressed. It has been experimentally confirmed that when the temperature of the semiconductor element is suppressed by about 5 ° C., the product life is extended about twice, and the reliability of the semiconductor device is greatly improved.
[0042]
As described above, according to the semiconductor device according to this embodiment of the present invention, the lead electrode connected to one semiconductor element in the configuration in which the lead electrode end portion and the lead electrode wiring portion are connected by the connecting portion so as to have a gap. Since the electrode end is separated into two parts, the formation of the solder reservoir is further suppressed, and the maximum temperature of the semiconductor element can be suppressed. In addition to the effects obtained in the second embodiment, A semiconductor device having an extraction electrode structure having excellent electrical reliability is realized.
[0043]
Embodiment 7
FIG. 15 is a cross-sectional view illustrating the configuration of another embodiment of the semiconductor device according to the present invention. Such a semiconductor device has the same configuration as that of the semiconductor device described in the sixth embodiment except that the second lead electrode wiring portion 18 is provided above the lead electrode wiring portion 9.
As shown in FIG. 15, a second lead electrode wiring portion 18 is provided above the lead electrode wiring portion 9. The second lead electrode wiring portion 18 is formed of a good conductor such as Cu. Further, the lead electrode wiring portion 9, the connecting portions 12A and 12B, and the lead electrode end portions 10A and 10B have an increased electrical resistance, such as Mo or 42 Alloy, Fe alloy such as KOVAR, or a clad material of the material and Cu. Is made of a material having low thermal expansion.
[0044]
The joining of the second lead electrode wiring part 18 and the lead electrode wiring part 9 is not particularly limited as long as electrical contact such as high temperature soldering, brazing, caulking, etc. can be obtained.
[0045]
With such a configuration, a line between Si, which is the main material of the IGBT 5, which is generated due to a temperature change of the entire device and a temperature change due to heat generation during operation of the semiconductor element, and a material constituting the extraction electrode end portions 10A, 10B. It is possible to reduce the stress and strain on the solder layer 7 generated by the difference in expansion coefficient, and the reliability of the semiconductor device against thermal fatigue can be improved.
[0046]
In the present embodiment, the second lead electrode wiring portion, the lead electrode wiring portion, the connecting portion, and the lead electrode end portion are constituted by separate members. Therefore, there is an advantage that the lead electrode end portion can be easily formed into a desired shape. In addition, although the low thermal expansion member was mentioned as a material of the 2nd extraction electrode wiring part, you may be the same Cu as an extraction electrode wiring part, a connection part, and an extraction electrode edge part.
[0047]
As described above, according to the semiconductor device according to this embodiment of the present invention, in the configuration in which the lead electrode end portion and the lead electrode wiring portion are connected so as to have a gap by the connecting portion, the lead wire portion is configured with a good conductor. Due to the provision of the second lead electrode wiring portion, the difference is caused by the difference in linear expansion coefficient between the semiconductor element and the lead electrode end portion caused by the temperature change of the entire device and the temperature change due to the heat generated during the operation of the semiconductor element. It is possible to reduce stress and strain on the solder layer, and to improve the reliability against thermal fatigue of the semiconductor device. In addition to the effect obtained in the sixth embodiment, further excellent electrical reliability is achieved. A semiconductor device having a lead electrode structure is realized.
[0048]
【The invention's effect】
As described above, according to the semiconductor device of the present invention, the semiconductor element having the external electrode end on the surface, the conductive bonding member formed on the external electrode end, and the external electrode end And is joined to the end of the external electrode via the joining member. A pair of A lead electrode end portion, a lead electrode wiring portion provided at a position opposite to the lead electrode end portion, for leading a conduction current of the semiconductor element to the outside, the lead electrode end portion and the lead electrode wiring portion; A lead electrode connecting portion that is connected so as to have a gap between Since the pair of lead electrode ends have a curved surface that is concave with respect to the lead electrode wiring portion side and is disposed on the gap side with respect to the lead electrode connection portion, the lead electrode end portions are arranged at the center of the semiconductor element. The central portion of heat generation in the semiconductor element (the portion facing the lead electrode end) is dispersed at two points away from the central portion of the semiconductor element. The temperature concentration at the center is effectively suppressed, A solder reservoir is not formed when the semiconductor element and the lead electrode end are soldered, and a semiconductor device having a lead electrode structure excellent in electrical reliability is realized.
[Brief description of the drawings]
FIG. 1 is a perspective view illustrating a configuration of a semiconductor device according to the present invention.
FIG. 2 is a cross-sectional view illustrating a configuration of a semiconductor device according to the present invention.
FIG. 3 is a cross-sectional view illustrating a configuration of a semiconductor device according to the invention.
FIG. 4 is a perspective view illustrating a configuration of a semiconductor device according to the present invention.
FIG. 5 is a cross-sectional view illustrating a configuration of a semiconductor device according to the invention.
FIG. 6 is a perspective view illustrating a configuration of an extraction electrode portion of the semiconductor device according to the present invention.
FIG. 7 is a cross-sectional view illustrating a configuration of a semiconductor device according to the present invention.
FIG. 8 is a cross-sectional view illustrating a configuration of a semiconductor device according to the invention.
FIG. 9 is a perspective view illustrating a configuration of an extraction electrode portion of the semiconductor device according to the present invention.
FIG. 10 is a cross-sectional view illustrating a configuration of a semiconductor device according to the invention.
FIG. 11 is a perspective view illustrating a configuration of an extraction electrode portion of the semiconductor device according to the present invention.
FIG. 12 is a perspective view illustrating a configuration of an extraction electrode portion of the semiconductor device according to the present invention.
FIG. 13 is a cross-sectional view illustrating a configuration of a semiconductor device according to the invention.
FIG. 14 is a perspective view illustrating a configuration of an extraction electrode portion of the semiconductor device according to the present invention.
FIG. 15 is a cross-sectional view illustrating a configuration of a semiconductor device according to the invention.
[Explanation of symbols]
1 base plate, 2 solder layer, 3 insulating substrate, 3A Cu wiring pattern,
3B Cu wiring pattern, 4 solder layer, 5 IGBT, 5A metal electrode,
5B metal electrode, 5C guard ring, 6 diode, 6A metal electrode,
7 Solder layer, 8 Solder layer, 9 Lead electrode wiring part, 10 Lead electrode end part,
10 'through hole, 10 "groove, 11 lead electrode end, 11' through hole,
11 '' groove, 12 connecting part, 13 connecting part, 14 aluminum wire,
15 sealing resin, 16 wiring material, 16A internal electrode, 16B external electrode,
17 wiring material, 17A internal electrode, 17B external electrode,
18 Second lead electrode wiring portion.

Claims (3)

表面に外部電極端部を備えた半導体素子と、
前記外部電極端部の上に形成された導電性の接合部材と、
前記外部電極端部に相対して設けられ、前記接合部材を介して前記外部電極端部に接合された一対の引き出し電極端部と、
この引き出し電極端部と相対する位置に設けられ、前記半導体素子の導通電流を外部に導出するための引き出し電極配線部と、
前記引き出し電極端部と前記引き出し電極配線部との間に空隙を有するように連結する引き出し電極連結部とを備え、
前記一対の引き出し電極端部が、前記引き出し電極配線部側に対し凹面となる曲面を持ち、かつ前記引き出し電極連結部に対して前記空隙側に配置されてなる半導体装置。A semiconductor element having external electrode ends on the surface;
A conductive bonding member formed on the end portion of the external electrode;
A pair of lead electrode ends provided relative to the external electrode ends and joined to the external electrode ends via the joining member;
An extraction electrode wiring portion provided at a position opposite to the extraction electrode end, and for extracting the conduction current of the semiconductor element to the outside;
A lead electrode connecting portion for connecting the lead electrode end portion and the lead electrode wiring portion so as to have a gap;
The semiconductor device in which the pair of lead electrode end portions have a curved surface that is concave with respect to the lead electrode wiring portion side, and is disposed on the gap side with respect to the lead electrode connecting portion . 前記引き出し電極連結部が前記引き出し電極配線部の側面に設けられ、折り曲げられて、前記引き出し電極端部と連結してなる請求項１に記載の半導体装置。  The semiconductor device according to claim 1, wherein the lead electrode connecting portion is provided on a side surface of the lead electrode wiring portion, and is bent and connected to the lead electrode end portion. 前記半導体素子と、前記接合部材と、前記引き出し電極端部と、前記引き出し電極配線部と、前記引き出し電極連結部とを封止する樹脂層とをさらに備えてなる請求項１または２のいずれかに記載の半導体装置。3. The resin layer for sealing the semiconductor element, the bonding member, the lead electrode end portion, the lead electrode wiring portion, and the lead electrode connecting portion. A semiconductor device according to 1.
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