JP3899109B2 - Charge / discharge protection circuit - Google Patents

Description

  The present invention relates to a charge / discharge circuit for a secondary battery, and in particular, an overcharge state of a secondary battery during charge control, an overdischarge state of a secondary battery during discharge control for supplying a load current, or during charge / discharge control. The present invention relates to a charge / discharge protection circuit that detects an overcurrent state of a secondary battery and protects the secondary battery from an overcharge state, an overdischarge state, or an overcurrent state.

  FIG. 9 is a circuit block diagram for explaining a conventional charge / discharge control circuit. Conventionally, as this type of charge / discharge protection circuit and a battery pack using the same, for example, Japanese Patent Laid-Open No. 7-131938 (Title of Invention: Charge / Discharge Control Circuit and Rechargeable Power Supply Device, Applicant: Seiko Electronics Corporation Application date: October 26, 1993, see FIG. 9).

That is, the charge / discharge protection circuit (charge / discharge control circuit) operates by receiving power supply from the secondary battery as a power source, and detects charge / discharge control for the secondary battery. The voltage dividing circuit 1, the overcharge voltage detection circuit 2, the overdischarge voltage detection circuit 3, and the control circuit 4 are connected in parallel to the secondary battery. Here, the control circuit 4 detects the state of the secondary battery from the overcharge voltage detection circuit 2 and the overdischarge voltage detection circuit 3 and controls the power supply to the external device or the charging by the external power supply. Vs was output. Further, the control circuit 4 controls the switch element 5 provided in series with the voltage dividing circuit 1 to reduce the current flowing through the voltage dividing circuit 1.

  According to the charge / discharge protection circuit having such a circuit configuration, the secondary battery can be protected from overcharge, overdischarge and overcurrent by detecting overcharge, overdischarge and overcurrent of the secondary battery. Is described.

  On the other hand, the charge / discharge protection circuit (charge / discharge control circuit) shown in FIG. 9 also has a function of avoiding a phenomenon in which the CMOSIC malfunctions due to latch-up when the power supply is reversely connected.

  FIG. 10 is a circuit diagram for explaining the rechargeable power supply device used in the charge / discharge control circuit of FIG.

  That is, as shown in FIG. 10, the charge / discharge control circuit A102 and the overcurrent detection circuit A105 for controlling the switch circuit A103 are provided in parallel.

  The overcurrent detection circuit A105 includes a reference voltage circuit A106, a pull-down high resistance A111, a current sensing resistor A104, a comparator A21, a transistor (n-channel MOSFET) A107, a comparator A22 with a latch function, a constant current source A108, and a capacitor A109. Had.

  In the circuit having the charge / discharge control circuit A102 and the overcurrent detection circuit A105, the charge / discharge control circuit A102, the secondary battery A101 and the reference voltage circuit A106 are connected in parallel to the external terminals -V0 and + V0, and the charge / discharge control is performed. A pull-down high resistance A111 is connected between the circuit A102 and the external terminal -V0, and a current sensing resistor A104 and a switch circuit A103 connected in series are connected in parallel to the pull-down high resistance A111 and are used for pulldown. The common input point of the high resistance A111 and the current sensing resistor A104 is connected to the negative input terminal of the comparator A21, the reference voltage from the reference voltage circuit A106 is connected to the positive input terminal of the comparator A21, and the comparator A21 The output is the gate of a transistor (n-channel MOSFET) A107 and A constant current source A108 and a capacitor A109 connected in series to the input terminal of the gate circuit (logic element NOT) of the comparator A22 with a latch function are connected between the ground side of the charge / discharge control circuit A102 and the external terminal -V0. The output of the comparator A22 with a latch function is output to the switch circuit A103.

  The comparator A22 with a latch function is composed of the above-described gate circuit (logic element NOT) and the logic element NOT constituting the feedback loop.

  When the comparator A22 with a latch function having such a circuit configuration detects a predetermined current value, the output changes from the logic value H to the logic value L, and the transistor (n-channel MOSFET) A107 is inactivated (that is, turned off). . As a result, the constant current source A108 charges the capacitor A109.

  When the charging potential of the capacitor A109 becomes higher than the voltage value VREF of the reference voltage A106, the output of the comparator A22 with a latch function transitions from the logical value H to the logical value L, thereby inactivating the switch circuit A103. At this time, the comparator A22 with a latch function can hold the logical value L at this time using a built-in latch function. This holding state of the logical value L is canceled by the output of the comparator A21.

  FIG. 11 is a circuit diagram for explaining an internal circuit configuration of the comparator circuit with a latch function of FIG.

  When the potential of the negative input terminal A314 becomes higher than that of the positive input terminal A313, the potential of the output terminal A315 transitions to the logical value L. At this time, the output of the inverter circuit A317 transitions to the logical value H, and the negative input transitions to the logical value H. As a result, the output of the comparator A22 with a latch function can be latched to the logical value L even if the potential at the plus input terminal varies somewhat.

  Since the switch circuit A103 is inactivated while the load is connected, the minus side input terminal of the comparator A21 is pulled up to + V0 by being connected to the load, and the overcurrent state is maintained. . Thereafter, when the load is removed, the minus side input terminal of the comparator A21 is changed to the logical value L by the pull-down high resistance A111, and the output of the comparator A21 is changed to the logical value H. Using this logic value H, the latch release terminal A316 of the comparator A22 with latch function transitions to the logic value H. As a result, the output of the comparator A22 with latch function transitions to the logic value H and the latch function is released. .

By providing such a latch function, the overcurrent detection circuit A105 can prevent the overcurrent to the power source by controlling the switch circuit A103 when the overcurrent is detected, and the power source is reversely connected. Further, there is described an effect that a phenomenon in which the CMOSIC malfunctions due to latch-up can be avoided.
Japanese Patent Laid-Open No. 7-131938

  However, in such a conventional charge / discharge protection circuit (charge / discharge control circuit), a secondary battery as a power source is used to detect that the charger is connected and to execute a charge / discharge control function for the secondary battery. When it is necessary to receive power supply and the battery voltage of the secondary battery falls below the operable voltage of the charge / discharge protection circuit (charge / discharge control circuit), it is difficult to execute a normal charge / discharge control function. There was a technical problem.

  Similarly, the overcurrent detection circuit A105 has a charge / discharge control function that prevents the overcurrent to the power source by controlling the switch circuit A103 when an overcurrent is detected. Even when the power source is reversely connected, the CMOS IC is latched up. In order to execute a charge / discharge control function that avoids a malfunctioning phenomenon, it is necessary to receive power from a secondary battery as a power source, and the battery voltage of the secondary battery determines the operable voltage of the overcurrent detection circuit A105. There is a technical problem that it is difficult to execute a normal charge / discharge control function when the number is lower.

  In addition, in order to execute the above-described latch function in the rechargeable power supply device, it is necessary to add an extra comparator A22 with a latch function in the overcurrent detection circuit A105. As a result, the circuit scale of the rechargeable power supply device is large. As a result, there is a problem that the chip area increases.

  Furthermore, the power consumption of the device increases with the addition of the circuit, and as a result, there is a problem that the secondary battery may be consumed quickly.

  First, it detects the overcharge state of the secondary battery during charge control, the overdischarge state of the secondary battery during discharge control for supplying load current, or the overcurrent state of the secondary battery during charge / discharge control. In the charge / discharge protection circuit that protects the secondary battery from the overcharged state, overdischarged state, or overcurrent state, connected to the charging potential of the charger that charges the secondary battery, and monitors the discharged state of the secondary battery; Overdischarge detection circuit that generates an overdischarge detection signal when an overdischarge condition is detected, and monitors the potential of the charger ground potential connected to the charger ground potential, and detects an overcurrent when an overcurrent condition is detected An overcurrent detection circuit that generates a signal and a hysteresis inverter circuit that has a hysteresis inverter circuit and a delay signal for setting a delay time for detecting the overdischarge state in the secondary battery according to the overdischarge detection signal A delay circuit that generates a delay signal through a hysteresis inverter circuit for setting a delay time that is generated through an inverter circuit and sets a delay time for detecting an overcurrent state in the secondary battery according to the overcurrent detection signal; A short-circuit detection circuit comprising a hysteresis inverter circuit connected to a charger ground potential, the hysteresis inverter circuit monitoring the potential of the charger ground potential and generating a short-circuit detection signal when a short-circuit state is detected And a charging potential of a charger that charges the secondary battery, shifts the battery ground potential to the charger ground potential, generates a charge control signal, and charges between the charger ground potential and the charger charge / discharge potential. And a level shift circuit that also functions as a charger connection detection circuit that detects that the charger is connected and generates a charge control signal. The function to execute normal charge / discharge control by connecting the charger even when the battery voltage of the secondary battery falls below the operable voltage, and the oscillation prevention function at the time of overcurrent detection Furthermore, the charge / discharge control function and the oscillation prevention function can be realized with a simple circuit configuration as compared with the comparator with a latch function, the circuit scale is compact, the chip area is small, the power consumption is small, and 2 It is an object to realize a charge / discharge protection circuit that can reduce the consumption of the secondary battery.

  Secondly, in addition to the charge / discharge protection circuit, a delay signal indicates a battery cell as a secondary battery, and a conduction state of a discharge current connected in series between the load and the battery cell and supplied from the battery cell to the load during discharge control. The discharge transistor is controlled in accordance with the logical value of the battery, and the battery is connected in series between the charger and the battery cell, and the charge current supplied from the charger to the battery cell during charge control is changed to the logical value of the charge control signal. A charging transistor that is controlled accordingly, and a delay that is connected to the battery ground potential and generates a charge / discharge signal for setting a delay time for detecting the overcharge state in the battery cell and transmits it to the overcharge detection circuit Even if the battery voltage of the secondary battery has fallen below the operable voltage due to the configuration having the capacitor, A function to execute normal charge / discharge control by connecting an electric appliance and an oscillation prevention function at the time of overcurrent detection can be realized. In addition, such a charge / discharge control function and an oscillation prevention function are simpler than a comparator with a latch function. It is an object of the present invention to realize a battery pack that can be realized by a configuration, has a compact circuit scale, a small chip area, low power consumption, and can reduce the consumption of a secondary battery.

  According to the first aspect of the present invention, the overcharged state of the secondary battery 12 during charge control, the overdischarged state of the secondary battery 12 during discharge control for supplying load current, or the secondary battery 12 during charge / discharge control. In the charge / discharge protection circuit 20 that detects the overcurrent state of the secondary battery 12 and protects the secondary battery 12 from the overcharged state, overdischarged state, or overcurrent state, it is connected to the charging potential of the charger 14 that charges the secondary battery 12. The discharge state of the secondary battery 12 is monitored, and an overdischarge detection circuit 27 that generates an overdischarge detection signal 27a when an overdischarge state is detected, and the charger ground potential V− are connected to the charger ground. An overcurrent detection circuit 25 that monitors the potential V− and generates an overcurrent detection signal 25a when an overcurrent state is detected, and detects an overdischarge state in the secondary battery according to the overdischarge detection signal. Depending on the timing A delay circuit for generating a delay signal for setting an delay time or for generating a delay signal for setting a timing for detecting an overcurrent state in the secondary battery 12 according to the overcurrent detection signal 26 and a hysteresis inverter circuit Q31 connected to the charger ground potential V-, and when the hysteresis inverter circuit Q31 monitors the potential of the charger ground potential V- and detects a short-circuit state, it detects a short circuit. The charge / discharge protection circuit 20 includes a short circuit detection circuit 24 configured to generate a signal 24a and prevent current from flowing instantaneously to the secondary battery.

  According to the first aspect of the present invention, the overdischarge detection circuit 27 is provided so that the overdischarge detection signal 27a can be generated when the discharge state of the secondary battery 12 is monitored and the overdischarge state is detected. Become. Further, by providing the overcurrent detection circuit 25, the overcurrent detection signal 25a can be generated when the overcurrent state is detected by monitoring the potential of the charger ground potential V−. Further, by providing the short circuit detection circuit 24 having the hysteresis inverter circuit Q31, the potential of the charger ground potential V- can be input to the hysteresis inverter circuit Q31. As a result, the input voltage threshold level VtH at the time of the increase and the decrease It is possible to generate the short circuit detection signal 24a having a hysteresis characteristic that can be specified by the input voltage threshold level VtL at the time. By giving such a hysteresis characteristic to the short-circuit detection signal 24a, it becomes possible to realize an oscillation prevention function at the time of overcurrent detection in the short-circuit detection state, and control for the discharge current using the short-circuit detection signal 24a. An oscillation prevention function can be realized when overcurrent is detected in the short-circuit detection state of the transistor Q1. Further, by providing the hysteresis inverter circuit Q31, the circuit configuration is simpler than that of the comparator A22 with a latch function, and the compact circuit scale, the small chip area, and the low power consumption that reduces the consumption of the secondary battery 12 are obtained. It is possible to realize the short circuit detection circuit 24 having a proper oscillation prevention function.

  The charge / discharge protection circuit 20 according to claim 1, wherein the charge control signal 23a is generated by detecting that the charger 14 is connected between the charger ground potential V- and the charger charge / discharge potential VDD. The charge / discharge protection circuit 20 having a configuration including the detector connection detection circuit 23 may be used.

  According to this, in addition to the effect of the first aspect, since the charge / discharge protection circuit 20 is connected to the charging potential of the charger 14, the charger 14 is connected when the charger 14 is connected to the charging potential. It becomes possible to operate upon receiving the supply of power from the charging control signal 23a. That is, the level shift circuit 23 can be operated if the charger 14 is connected to the charging potential even if the ability to supply the secondary battery 12 with enough power to operate the charge / discharge protection circuit 20 is lost. A function for generating a charge control signal 23a in a state and performing reliable charge control by connecting the charger 14 even when the battery voltage of the secondary battery 12 falls below the operable voltage Can be realized. As a result, the charging transistor Q2 is controlled by using the charging control signal 23a, so that the charging control of the secondary battery 12 can be performed, and the ability to supply power sufficient to operate the charge / discharge protection circuit 20 is provided. 12 can be restored. Further, by providing the hysteresis inverter circuit Q26, the circuit configuration is simpler than that of the comparator A22 with a latch function, and the circuit size is small, the chip area is small, and the consumption of the secondary battery 12 is reduced. The charge / discharge protection circuit 20 having a proper charge control function can be realized.

  In the charge / discharge protection circuit 20, the charger connection detection circuit 23 includes a drain of the depletion type n-channel transistor Q4 operating as a constant current source with a source and a gate being saturated and an enhancement type p. The drain of the channel transistor Q3 is connected in series, the source of the depletion type n channel transistor Q4 is connected to the charger ground potential V-, and the source of the enhancement type p channel transistor Q3 is set to the charge / discharge potential VDD. The charge / discharge protection circuit 20 having a connected circuit configuration may be used.

  According to this, the source of the enhancement type p-channel transistor Q3 suitable for low power consumption with reduced compact circuit scale, small chip area, and reduced consumption of the secondary battery 12 is the charging potential of the charger 14. Since it is connected to the discharge potential VDD, it can be activated simply by inputting a logic L signal to the gate. On the other hand, the depletion type n-channel transistor Q4 suitable for low power consumption with reduced compact circuit scale, small chip area, and reduced consumption of the secondary battery 12 is saturated and is always in an active state. As a result of being able to be in an operable state, even when the charger 14 is connected to a charging potential, it can operate upon receiving power from the charger 14 and can generate the charge control signal 23a. That is, the level shift circuit 23 can be operated if the charger 14 is connected to the charging potential even if the ability to supply the secondary battery 12 with enough power to operate the charge / discharge protection circuit 20 is lost. A function for generating a charge control signal 23a in a state and performing reliable charge control by connecting the charger 14 even when the battery voltage of the secondary battery 12 falls below the operable voltage Can be realized. As a result, the charging transistor Q2 is controlled by using the charging control signal 23a, so that the charging control of the secondary battery 12 can be performed, and the ability to supply power sufficient to operate the charge / discharge protection circuit 20 is provided. 12 can be restored.

  According to the first aspect of the present invention, by providing the overdischarge detection circuit, the overdischarge detection signal can be generated when the overdischarge state is detected by monitoring the discharge state of the secondary battery. Further, by providing an overcurrent detection circuit, it is possible to generate an overcurrent detection signal when an overcurrent state is detected by monitoring the potential of the charger ground potential. In addition, by providing a short-circuit detection circuit having a hysteresis inverter circuit, the potential of the charger ground potential can be input to the hysteresis inverter circuit. As a result, the input voltage threshold level when rising and the input voltage threshold level when falling It is possible to generate a short circuit detection signal having a hysteresis characteristic that can be specified as follows. By giving such a hysteresis characteristic to the short circuit detection signal, it becomes possible to realize an oscillation prevention function at the time of overcurrent detection in the short circuit detection state, and the discharge transistor that controls the discharge current using the short circuit detection signal can be realized. An oscillation prevention function at the time of overcurrent detection in the short circuit detection state can be realized. Furthermore, by providing a hysteresis inverter circuit, it is possible to prevent such oscillation with a simple circuit configuration compared to a comparator with a latch function, and with a compact circuit scale, small chip area, and low power consumption that reduces consumption of secondary batteries. A short-circuit detection circuit having a function can be realized.

  Hereinafter, various embodiments of the present invention will be described with reference to the drawings.

  First, an embodiment of a charge / discharge protection circuit of the present invention will be described with reference to the drawings.

  FIG. 1 is a functional block diagram for explaining the configuration of a charge / discharge protection circuit 20 for a secondary battery 12 and a battery pack 10 using the same according to the present invention.

  The charge / discharge protection circuit 20 shown in FIG. 1 includes an overcharged state of the secondary battery 12 during charge control, an overdischarged state of the secondary battery 12 during discharge control for supplying load current, or a secondary during charge / discharge control. The battery 12 has a function of detecting an overcurrent state of the battery 12 to protect the secondary battery 12 from an overcharged state, an overdischarged state, or an overcurrent state. Even when the battery voltage is lower than the operable voltage, it is characterized in that it has a function of performing reliable charge control by connecting the charger 14.

  Such a charge / discharge protection circuit 20 is used when the battery voltage of the hysteresis inverter circuit 30 and the secondary battery 12 that play a central role in realizing the oscillation prevention function at the time of overcurrent detection falls below the operable voltage. Even so, a level shift circuit (charger connection detection circuit) that plays a central role in realizing the function of executing reliable charge control by connecting the charger 14 and other charge control functions and discharge control functions are realized. An overcharge detection circuit 22, a level shift circuit 23, a short circuit detection circuit 24, an overcurrent detection circuit 25, a delay circuit 26, and an overdischarge detection circuit 27, which play a central role to perform, Usually, it is formed into a chip and incorporated in the apparatus. When incorporated in the apparatus in this way, it is normal to receive power from a battery in the apparatus. In the following description, the charge / discharge protection circuit 20 is referred to as a charge / discharge protection IC 20.

  Here, as the secondary battery 12, the lithium ion battery 12 is representative, and therefore, in the following description, the description will be made using the lithium ion battery 12.

  The charge / discharge protection IC 20 is used in the form of an IC chip built in the battery pack 10 and is used by being mounted on various portable devices such as a mobile terminal, a mobile phone, and a radio using the lithium ion battery 12. Case is normal. In the following description, the load 14 is represented by the mobile phone 14.

  FIG. 2 is a circuit diagram for explaining a circuit configuration of the hysteresis inverter circuit 30 (Q26, Q31).

  As shown in FIG. 2, a hysteresis inverter circuit 30 (specifically, Q26 and Q31 described later) having a hysteresis characteristic in the threshold level of the input voltage has a first-stage inverter circuit, a subsequent-stage inverter circuit, and a rising hysteresis circuit (Q41, Q45) and a falling hysteresis circuit (Q44, Q46).

  Such a hysteresis inverter circuit 30 (specifically, Q26 and Q31, which will be described later), is a detection output signal due to battery voltage fluctuations when an overcurrent is detected in the charge / discharge protection circuit 20 described later and the battery pack 10 incorporating the same. Is preferably provided in the overcurrent detection circuit 25 so as not to oscillate.

  As shown in FIG. 2, the first-stage inverter circuit (Q42, Q43) includes a first p-channel MOSFET Q42 connected to the charge / discharge potential VDD (power supply potential VDD) and a first n connected to the battery ground potential Vss (ground potential Vss). The channel MOSFET Q43 has a circuit configuration in which the gate is a common input and the drain is a common output connected in series.

  In the first stage inverter circuit (Q42, Q43), as shown in FIG. 2, the rising hysteresis circuit (Q41, Q45) is connected in parallel between the source of the first p-channel MOSFET Q42 and the charge / discharge potential VDD, and the first n-channel MOSFET Q43 is connected. A falling hysteresis circuit (Q44, Q46) is connected in parallel between the source of the first n-channel MOSFET Q43 and the battery ground potential Vss between the source of the first and the battery ground potential Vss.

  According to such a circuit configuration, the resistance value of the rising hysteresis resistance element Q41 is set to be sufficiently large compared to the ON resistance value of the p-channel MOSFET Q45, thereby increasing the circuit scale and power consumption without increasing the circuit scale. There is an effect that a rising hysteresis circuit (Q41, Q45) suitable for integration capable of setting the threshold level VtH can be realized. For the same purpose, by setting the resistance value of the falling hysteresis resistance element Q44 to be sufficiently larger than the ON resistance value of the n-channel MOSFET Q46, the threshold level VtL at the time of falling can be set without increasing the circuit scale or power consumption. There is an effect that a falling hysteresis circuit (Q44, Q46) suitable for integration that can be set can be realized.

  In such a circuit, as shown in FIG. 2, the p-channel of the rising hysteresis circuit (Q41, Q45) activated in response to the rising of the voltage of the logical value input to the first stage inverter circuit (Q42, Q43). The first p-channel MOSFET Q42 is connected to the charging / discharging potential VDD via the MOSFET Q45, and the n-channel MOSFET Q46 of the falling hysteresis circuit (Q44, Q46) according to the rise of the voltage of the logical value input to the first stage inverter circuit (Q42, Q43). In a circuit configuration in which the first n-channel MOSFET Q43 is connected to the battery ground potential Vss through the falling hysteresis resistance element Q44 in a state where is inactivated.

  Accordingly, by providing a post-stage inverter circuit, which is rarely accompanied by an increase in circuit scale and power consumption, at the output stage of the hysteresis inverter circuit 30 (Q26, Q31), it is input to the first-stage inverter circuit (Q42, Q43). The hysteresis inverter circuit maintains the logic value of the signal input to the first stage inverter circuit (Q42, Q43) by matching the logic value of the signal to be output and the logic value of the output signal of the hysteresis inverter circuit 30 (Q26, Q31). 30 (Q26, Q31) can be output.

  As shown in FIG. 2, the second-stage inverter circuit (Q47, Q48) includes a second p-channel MOSFET Q47 connected to the charge / discharge potential VDD and a second n-channel MOSFET Q48 connected to the battery ground potential Vss with the gate as a common input. Are connected in series as a common output.

  Further, as shown in FIG. 2, the rising hysteresis circuit (Q41, Q45) is connected between the charge / discharge potential VDD and the first p-channel MOSFET Q42, and sets the input voltage threshold level VtH when the input voltage of the first-stage inverter circuit rises. The circuit configuration is set.

  Here, the threshold level VtH when the input voltage rises in the rising hysteresis circuit (Q41, Q45) is preferably set based on the threshold level pVth of the p-channel MOSFET Q42.

  Accordingly, the hysteresis suitable for integration can set the threshold level VtH of the first-stage inverter circuit when the input voltage is increased based on only the threshold level pVth of the p-channel MOSFET Q42 without increasing the circuit scale or increasing the power consumption. There is an effect that the inverter circuit 30 (Q26, Q31) can be realized.

  The rising hysteresis circuit (Q41, Q45) has a circuit configuration in which a p-channel MOSFET Q45 and a rising hysteresis resistance element Q41 are connected in parallel. In the present embodiment, in such a circuit configuration, the resistance value of the rising hysteresis resistance element Q41 is set to be sufficiently larger than the ON resistance value of the p-channel MOSFET Q45, which rarely accompanies an increase in circuit scale or power consumption. Is desirable.

Accordingly, when the input voltage of the first-stage inverter circuit (Q42, Q43) is increased, when the first p-channel MOSFET Q42 is connected to the charge / discharge potential VDD via the activated rising hysteresis circuit (Q41, Q45), p channel MOSFET Q42 threshold level p
There is an effect that it is possible to realize a circuit suitable for integration in which the threshold level VtH of the first-stage inverter circuit when the input voltage rises based only on Vth can be set without increasing the circuit scale or power consumption. .

  In addition, as shown in FIG. 2, the common input of the rear inverter circuit (Q47, Q48) is connected to the common output of the first inverter circuit (Q42, Q43), and the common output of the rear inverter circuit (Q47, Q48) is the rising hysteresis. A logical value obtained by inverting the logical value output from the first stage inverter circuit (Q42, Q43) connected to the gate of the p-channel MOSFET Q45 of the circuit (Q41, Q45) and the gate of the n-channel MOSFET Q46 of the falling hysteresis circuit (Q44, Q46). Is output from the subsequent inverter circuit (Q47, Q48).

  The falling hysteresis circuits (Q44, Q46) are connected between the battery ground potential Vss and the first n-channel MOSFET Q43, and have a circuit configuration for setting the input voltage threshold level VtL when the input voltage of the first-stage inverter circuit drops. .

  Here, the threshold level VtL when the input voltage drops in the falling hysteresis circuit (Q44, Q46) is preferably set based on the sum of the threshold level nVth of the n-channel MOSFET Q43 and the battery ground potential Vss.

  Accordingly, since the battery ground potential Vss is a constant potential, the threshold level VtL of the first-stage inverter circuit when the input voltage is lowered based on only the threshold level nVth of the first n-channel MOSFET Q43 is increased in circuit scale or power consumption. The hysteresis inverter circuit 30 (Q26, Q31) suitable for integration that can be set without accompanying is realized.

  The falling hysteresis circuit (Q44, Q46) has a circuit configuration in which an n-channel MOSFET Q46 and a falling hysteresis resistance element Q44 are connected in parallel.

  In the present embodiment, in such a circuit configuration, the resistance value of the falling hysteresis resistance element Q44 is set to be sufficiently larger than the ON resistance value of the n-channel MOSFET Q46, which rarely accompanies an increase in circuit scale or power consumption. Is desirable.

  Accordingly, when the first n-channel MOSFET Q43 is connected to the battery ground potential Vss through the activated hysteresis circuit (Q44, Q46) when the input voltage of the first-stage inverter circuit is lowered, the first n-channel MOSFET Q43 is connected. It is possible to realize a circuit suitable for integration in which the threshold level VtL of the first-stage inverter circuit when the input voltage is lowered can be set without increasing the circuit scale or power consumption based on only the threshold level nVth. There is an effect.

  More specifically, the operation of the hysteresis inverter circuit 30 (Q26, Q31) will be described.

  When the input In is a logical value L, the output Out also transitions to a logical value L. At this time, the p-channel MOSFET Q45 is activated and the n-channel MOSFET Q46 is deactivated.

  If the activation resistance of the p-channel MOSFET Q45 is made sufficiently smaller than the rising hysteresis resistance element Q41 and the activation resistance of the n-channel MOSFET Q46 is made sufficiently smaller than the falling hysteresis resistance element Q44, the first-stage inverter circuit (Q42, Q43) is p The channel MOSFETs Q45 and 42, the n-channel MOSFET Q43, and the falling hysteresis resistance element Q44 are included, and the threshold level is substantially equal to Vth of the p-channel MOSFET Q42.

  Similarly, when In is a logic value H, Out is a logic value H, the p-channel MOSFET Q45 is inactivated, and the n-channel MOSFET Q46 is activated, so that the first-stage inverter circuit (Q42, Q43) has a rising hysteresis. The resistor element Q41, the p-channel MOSFET Q42, and the n-channel MOSFETs Q43 and 46 are configured, and the threshold level substantially matches the value of VtH of the n-channel MOSFET Q43.

  Therefore, the threshold voltages VtH and VtL of the hysteresis inverter circuit 30 (Q26, Q31) shown in FIG. Thus, the hysteresis width (difference between VtH and VtL) can be sufficiently obtained, and the hysteresis inverter circuit 30 (Q26, Q31) effective for preventing oscillation can be configured. Of course, the hysteresis inverter circuit 30 (Q26, Q31) having another circuit configuration can be used.

  FIG. 3 is a graph for explaining the operation of setting the input voltage threshold level VtH when the input voltage of the first-stage inverter circuit is increased in the hysteresis inverter circuit 30 (Q26, Q31).

In the overcurrent detection circuit 25, when an overcurrent flows and the charger ground potential V- becomes higher than Vref, the comparator Q21 is inverted. As a result, the capacitor C2 in the delay circuit 26 is charged with the constant current I from the constant current source Q24, and when the potential at the node a in FIG. 3 gradually increases and reaches the threshold level of the hysteresis inverter Q26, the hysteresis inverter The output of Q26 is inverted, and the discharge signal output terminal Dout becomes the logic value L.

  As shown in FIG. 3, the hysteresis inverter circuit 30 (Q26, Q31) passes through the rising hysteresis circuit (Q41, Q45) activated (ON) when the input voltage of the first stage inverter circuit (Q42, Q43) rises. At the same time as the first p-channel MOSFET Q42 is connected to the charge / discharge potential VDD, the first n-channel MOSFET Q43 is grounded via the inactivated (OFF) falling hysteresis circuits (Q44, Q46) and the falling hysteresis resistance element Q44. The circuit configuration is connected to the potential Vss.

  The operation of the hysteresis inverter circuit 30 (Q26, Q31) will be described in more detail.

The charge / discharge potential VDD is a voltage of the battery cell 12, and when an overcurrent flows, the charge / discharge potential VDD voltage decreases as shown in FIG. 3 due to the internal impedance of the battery cell 12. At this moment, a charging current begins to flow through a capacitor C2 (see FIG. 5) described later, and the node a rises as shown in FIG.

As shown in FIG. 3, when the threshold value VtH of the hysteresis inverter circuit 30 (Q26, Q31) is reached, the discharge signal output terminal Dout transitions to the logic value L, and the discharge transistor Q1 in FIG. 1 is inactivated. Therefore, the discharge current stops flowing and the charge / discharge potential VDD voltage rises rapidly.

At this time, as shown in FIG. 3, when an inverter having a threshold level of 1 is used instead of the hysteresis inverter circuit 30 (Q26, Q31), the threshold level is increased when the charge / discharge potential VDD rises rapidly as shown in FIG. Since VtH also rises, the voltage at the node a again falls below the threshold VtH, the discharge signal output terminal Dout again becomes the logic value H, the discharge current flows, and the charge / discharge potential VDD falls. Repeating this will cause oscillation.

By using the hysteresis inverter circuit 30 (Q26, Q31), the threshold level shifts from VtH to VtL when the discharge signal output terminal Dout transitions to the logic value L and the charge / discharge potential VDD rises. Is surely higher than the threshold level VtL, and the discharge signal output terminal Dout is stabilized at the logical value L. The same applies when the short-circuit detection circuit 24 operates.

  According to such a circuit configuration, when the input voltage of the first-stage inverter circuit (Q42, Q43) rises, the first p-channel MOSFET Q42 is connected to the charge / discharge potential VDD via the activated rising hysteresis circuit (Q41, Q45). As a result, the threshold level VtH of the first stage inverter circuit (Q42, Q43) when the input voltage rises can be set based on only the threshold level pVth of the p-channel MOSFET Q42 without increasing the circuit scale or increasing the power consumption. There is an effect that a circuit suitable for integration can be realized.

  FIG. 4 is a graph for explaining the relationship between the threshold level and the charger ground potential V− when a short circuit is detected.

  When the input voltage of the first-stage inverter circuit (Q42, Q43) is lowered, as shown in FIG. 4, the charge / discharge potential VDD is set via the deactivated rising hysteresis circuit (Q41, Q45) and the rising hysteresis resistance element Q41. At the same time as the first p-channel MOSFET Q42 is connected, the circuit configuration is such that the first n-channel MOSFET Q43 is connected to the battery ground potential Vss via the activated falling hysteresis circuits (Q44, Q46).

  The operation of the hysteresis inverter circuit 30 (Q26, Q31) will be described in more detail.

  When the charger ground potential V-level exceeds the threshold level of the hysteresis inverter Q36 of the short circuit detection circuit 24 of FIG. 3, the discharge signal output terminal Dout is instantaneously set to the logic value L so that no current flows.

  The voltage waveform at this time is shown in FIG. When the load is short-circuited, the level of the charger ground potential V- rises as shown in FIG. 4, and at the same time, the charge / discharge potential VDD suddenly falls.

  When the charger ground potential V- reaches the threshold VtH of the hysteresis inverter Q36, the discharge signal output terminal Dout transitions to the logic value L, and the charge / discharge potential VDD voltage rises. However, the threshold level of the hysteresis inverter Q36 becomes VtL. Similarly, oscillation does not occur.

  According to such a circuit configuration, the first n-channel MOSFET Q43 is connected to the battery ground potential Vss through the activated falling hysteresis circuit (Q44, Q46) when the input voltage of the first stage inverter circuit (Q42, Q43) is lowered. As a result, based on only the threshold level nVth of the first n-channel MOSFET Q43, the threshold level VtL of the first-stage inverter circuit when the input voltage drops can be set without increasing the circuit scale and power consumption. There is an effect that a suitable circuit can be realized.

  As described above, the hysteresis inverter circuit 30 (Q26, Q31) has a simple circuit configuration as compared with the comparator A22 with a latch function, a compact circuit scale, a small chip area, and low power consumption. The hysteresis inverter circuit 30 (Q26, Q31) can be realized by using the rising hysteresis circuit (Q41, Q45) and the falling hysteresis circuit (Q44, Q46) that can reduce the consumption of the lithium ion battery 12.

  The overdischarge detection circuit 27 is connected to the charging potential of the charger 14 that charges the lithium ion battery 12, and monitors the discharge state of the lithium ion battery 12, and at the same time detects an overdischarge detection signal 27a ( It has a function of generating a logical value L) at the time of overdischarge detection.

  By providing such an overdischarge detection circuit 27, the overdischarge detection signal 27a can be generated when the discharge state of the lithium ion battery 12 is monitored and the overdischarge state is detected.

  As shown in FIG. 6, the level shift circuit 23 is connected to the charging potential of the charger 14 that charges the lithium ion battery 12, shifts the battery ground potential Vss to the charger ground potential V-, and outputs the charge control signal 23a. It has a function to generate.

  As described above, since the level shift circuit 23 is connected to the charging potential of the charger 14, when the charger 14 is connected to the charging potential, the level shift circuit 23 becomes operable by receiving power supply from the charger 14. 23a can be generated. That is, the level shift circuit 23 is operable when the charger 14 is connected to the charging potential even when the ability to supply the lithium ion battery 12 with enough power to operate the charge / discharge protection IC 20 is lost. The charge control signal 23a can be generated, and even when the battery voltage of the lithium ion battery 12 falls below the operable voltage, the function of performing reliable charge control by connecting the charger 14 is provided. Can be realized. As a result, the charging transistor Q2 can be controlled using the charging control signal 23a to control the charging of the lithium ion battery 12, and the ability to supply power sufficient to operate the charge / discharge protection IC 20 can be provided. There is an effect that it is possible to return at the time. Further, by providing the hysteresis inverter circuit Q26, the circuit configuration is simpler than that of the comparator A22 with a latch function, and a compact circuit scale, a small chip area, and less power consumption with reduced consumption of the lithium ion battery 12 are obtained. Thus, the level shift circuit 23 having a proper charge control function can be realized.

  Further, as shown in FIG. 6, the level shift circuit 23 includes a drain of a depletion-type n-channel transistor Q4 and a drain of an enhancement-type p-channel transistor Q3 operating as a constant current source with the source and gate being saturated. Are connected in series, the source of the depletion type n-channel transistor Q4 is connected to the charger ground potential V-, and the source of the enhancement type p-channel transistor Q3 is connected to the charge / discharge potential VDD which is the charge / discharge potential VDD. Circuit configuration.

  According to such a circuit configuration, the source of the enhancement type p-channel transistor Q3 suitable for low power consumption with reduced compact circuit scale, small chip area and reduced consumption of the lithium ion battery 12 is the charging potential of the charger 14. Since it is connected to a certain charge / discharge potential VDD, it can be activated simply by inputting a signal of logical value L to the gate. On the other hand, the depletion type n-channel transistor Q4 suitable for compact circuit scale, small chip area, and low power consumption with reduced consumption of the lithium ion battery 12 is saturated and is always in an active state. As a result of being able to be in an operable state, even when the charger 14 is connected to a charging potential, it can operate upon receiving power from the charger 14 and can generate the charge control signal 23a. That is, the level shift circuit 23 is operable when the charger 14 is connected to the charging potential even when the ability to supply the lithium ion battery 12 with enough power to operate the charge / discharge protection IC 20 is lost. The charge control signal 23a can be generated, and even when the battery voltage of the lithium ion battery 12 falls below the operable voltage, the function of performing reliable charge control by connecting the charger 14 is provided. Can be realized. As a result, the charging transistor Q2 can be controlled using the charging control signal 23a to control the charging of the lithium ion battery 12, and the ability to supply power sufficient to operate the charge / discharge protection IC 20 can be provided. There is an effect that it is possible to return at the time.

  The overdischarge detection circuit 27 has a pull-up transistor (not shown) that connects the charger ground potential V− to the charge / discharge potential VDD when activated according to the overdischarge state of the lithium ion battery 12. Yes.

  Accordingly, when the lithium ion battery 12 becomes lower than the overdischarge detection voltage, the discharge transistor Q1 is deactivated, and when the mobile phone 14 is connected, the mobile phone 14 is connected, and the mobile phone 14 is connected. Even if it is not connected, the charger ground potential V- can be raised to the charge / discharge potential VDD by the pull-up transistor. As a result, the hysteresis inverter of the short-circuit detection circuit 24 is inverted to enter a short-circuit detection state, and the short-circuit detection signal 24a is generated. At the same time, the entire circuit of the charge / discharge protection IC 20 is stopped using the short-circuit detection signal 24a. It is possible to add a standby function to the overdischarge detection circuit 27. As a result, it is possible to further reduce the circuit scale and chip area and reduce the consumption of the lithium ion battery 12.

  Thus, by providing the delay circuit 26 having the hysteresis inverter circuit Q26, the overdischarge detection signal 27a can be input to the above-described hysteresis inverter circuit Q26, and as a result, the input voltage threshold level VtH at the time of the rise and the fall It becomes possible to generate the delay signal 26a having a hysteresis characteristic that can be specified by the input voltage threshold level VtL at the time. By providing such a hysteresis characteristic to the delay signal 26a, it becomes possible to realize an oscillation prevention function at the time of overcurrent detection, and the overcurrent detection of the discharge transistor Q1 that controls the discharge current using the delay signal 26a. Oscillation prevention function can be realized. Further, by providing the hysteresis inverter circuit Q26, the circuit configuration is simpler than that of the comparator A22 with a latch function, and a compact circuit scale, a small chip area, and less power consumption with reduced consumption of the lithium ion battery 12 are obtained. Thus, the delay circuit 26 having a proper oscillation preventing function can be realized.

  The overcharge detection circuit 22 is connected to the battery ground potential Vss of the charger 14 that charges the lithium ion battery 12, and monitors the charge state of the lithium ion battery 12 and simultaneously detects an overcharge detection signal when the overcharge state is detected. 22a (logical value H when charging is possible). The overcharge detection circuit 22 has a pull-down transistor (not shown) that connects the charger ground potential V− to the battery ground potential Vss when activated according to the chargeable state of the lithium ion battery 12. It may be. By using such an overcharge detection circuit 22, it becomes possible to distinguish and detect the chargeable state and the overcharge state of the lithium ion battery 12.

  FIG. 5 is a circuit diagram for explaining the circuit configuration of the short circuit detection circuit 24, the overcurrent detection circuit 25, and the delay 26 of FIG.

  As shown in FIG. 5, the short-circuit detection circuit 24 includes a hysteresis inverter circuit Q31 connected to the charger ground potential V−. The hysteresis inverter circuit Q31 monitors the potential of the charger ground potential V− and at the same time the short-circuit state. Has a function of generating a short-circuit detection signal 24a when the signal is detected.

  Thus, by providing the short-circuit detection circuit 24 having the hysteresis inverter circuit Q31, the potential of the charger ground potential V− can be input to the above-described hysteresis inverter circuit Q31. It becomes possible to generate the short circuit detection signal 24a having a hysteresis characteristic that can be specified by the threshold level VtH and the input voltage threshold level VtL at the time of falling. By giving such a hysteresis characteristic to the short-circuit detection signal 24a, it becomes possible to realize an oscillation prevention function at the time of overcurrent detection in the short-circuit detection state, and control for the discharge current using the short-circuit detection signal 24a. An oscillation prevention function can be realized when overcurrent is detected in the short-circuit detection state of the transistor Q1. Further, by providing the hysteresis inverter circuit Q31, the circuit configuration is simpler than that of the comparator A22 with a latch function, and a compact circuit scale, a small chip area, and low power consumption with reduced consumption of the lithium ion battery 12 are obtained. It is possible to realize the short circuit detection circuit 24 having a proper oscillation prevention function.

  The short circuit detection circuit 24 instructs a standby operation to stop all circuits in accordance with the charger ground potential V− when the pull-up transistor is activated according to the overdischarge state of the lithium ion battery 12. 24a is generated by the hysteresis inverter circuit Q31.

  Specifically, when the battery cell 12 becomes equal to or lower than the overdischarge detection voltage, the discharge transistor Q1 is deactivated, and the charger ground potential V-level is equal to the load when the load is connected. Even if they are not connected, they are raised to the charge / discharge potential VDD level by the pull-up transistor. As a result, the hysteresis inverter Q31 of the short-circuit detection circuit 24 is inverted to enter the short-circuit detection state, but at the same time, all the circuits are stopped and the node g, which is a signal for reducing the consumption current, becomes the logical value H. That is, the short circuit detection circuit 24 also serves as a standby circuit that stops all the circuits.

  According to such a circuit configuration, the short-circuit detection signal 24a for instructing the standby operation using the hysteresis inverter circuit Q31 having the hysteresis characteristic that can be specified by the input voltage threshold level VtH at the rising time and the input voltage threshold level VtL at the falling time. , The oscillation prevention function at the time of overcurrent detection in the short circuit detection state can be realized, and the overcurrent detection in the short circuit detection state of the discharge transistor Q1 that controls the discharge current using the short circuit detection signal 24a. Oscillation prevention function can be realized. Further, by providing the hysteresis inverter circuit Q31, the circuit configuration is simpler than that of the comparator A22 with a latch function, and a compact circuit scale, a small chip area, and low power consumption with reduced consumption of the lithium ion battery 12 are obtained. It is possible to realize the short circuit detection circuit 24 having a proper oscillation prevention function.

  The short circuit detection circuit 24 is in standby when the charger 14 is connected between the charger ground potential V- and the charge / discharge potential VDD and the charger ground potential V- falls below the threshold level VtL of the hysteresis inverter circuit Q31. The hysteresis inverter circuit Q31 generates a short circuit detection signal 24a for returning from the operation to the start of the operation of all the circuits.

  Accordingly, after the lithium ion battery 12 detects overdischarge, all the circuits are stopped, and even if the consumption current is zero, all the circuits are made to operate again by connecting the charger 14. The charge / discharge protection IC 20 can be realized.

  Specifically, when the charger ground potential V− level falls below VtL of the hysteresis inverter Q31 of the short circuit detection circuit 24, the node g transitions to the logical value L, all the circuits operate, and the standby state changes from the standby state to the operating state. Become. Since the inside of the hysteresis inverter Q31 is shown in FIG. 2, there is no path for consuming current. Therefore, it is possible to simply configure a circuit for detecting that the charger 14 is connected even when the current consumption is 0 in the standby state and bringing it into an operating state.

That is, the short-circuit detection signal 24a for returning to the start of the operation of all the circuits is generated by using the hysteresis inverter circuit Q31 having hysteresis characteristics that can be specified by the input voltage threshold level VtH when rising and the input voltage threshold level VtL when falling. Thus, an oscillation prevention function at the time of overcurrent detection in the short circuit detection state can be realized, and oscillation prevention at the time of overcurrent detection in the short circuit detection state of the discharge transistor Q1 that controls the discharge current using the short circuit detection signal 24a. Functions can be realized. Further, by providing the hysteresis inverter circuit Q31, the circuit configuration is simpler than that of the comparator A22 with a latch function, and a compact circuit scale, a small chip area, and low power consumption with reduced consumption of the lithium ion battery 12 are obtained. It is possible to realize the short circuit detection circuit 24 having a proper oscillation prevention function. As shown in FIG. 5, the overcurrent detection circuit 25 is connected to the charger ground potential V− and monitors the potential of the charger ground potential V−. At the same time, the overcurrent detection signal 25a is detected when an overcurrent state is detected. It has the function to generate.

  In the overcurrent detection circuit 25, when an overcurrent flows and the charger ground potential V- becomes higher than Vref, the comparator Q21 is inverted. As a result, the capacitor C2 in the delay circuit 26 is charged with the constant current I from the constant current source Q24, and when the potential at the node a gradually rises and reaches the threshold level of the hysteresis inverter Q26, the output of the hysteresis inverter Q26 is output. Is inverted, and the discharge signal output terminal Dout becomes the logic value L.

  The delay circuit 26 has a hysteresis inverter circuit Q26. The delay circuit 26 sets a delay signal 26a for setting a delay time for detecting the overdischarge state in the lithium ion battery 12 according to the overdischarge detection signal 27a. And a delay signal 26a for setting a delay time for the timing of detecting an overcurrent state in the lithium ion battery 12 according to the overcurrent detection signal 25a via the hysteresis inverter circuit Q26. have.

FIG. 6 is a circuit diagram for explaining the charger connection detection circuit 23 that can reliably output the logical value H to the charge signal output terminal Cout by connecting the charger 14 even when the battery voltage becomes 0V. is there.

  As shown in FIG. 6, the charger connection detection circuit 23 detects that the charger 14 is connected between the charger ground potential V- and the charger charge / discharge potential VDD, and generates a charge control signal 23a. It has a function to do.

  Accordingly, after the lithium ion battery 12 detects overdischarge, all the circuits are stopped, and even if the consumption current is zero, all the circuits are made to operate again by connecting the charger 14. The charge / discharge protection IC 20 can be realized. That is, since the level shift circuit 23 is connected to the charging potential of the charger 14, when the charger 14 is connected to the charging potential, the level shift circuit 23 can be operated by receiving power from the charger 14, and the charge control signal 23a is transmitted. Can be generated. That is, the level shift circuit 23 is operable when the charger 14 is connected to the charging potential even when the ability to supply the lithium ion battery 12 with enough power to operate the charge / discharge protection IC 20 is lost. The charge control signal 23a can be generated, and even when the battery voltage of the lithium ion battery 12 falls below the operable voltage, the function of performing reliable charge control by connecting the charger 14 is provided. Can be realized. As a result, the charging transistor Q2 can be controlled using the charging control signal 23a to control the charging of the lithium ion battery 12, and the ability to supply power sufficient to operate the charge / discharge protection IC 20 can be provided. There is an effect that it is possible to return at the time. Further, by providing the hysteresis inverter circuit Q26, the circuit configuration is simpler than that of the comparator A22 with a latch function, and a compact circuit scale, a small chip area, and less power consumption with reduced consumption of the lithium ion battery 12 are obtained. The charge / discharge protection IC 20 having a proper charge control function can be realized.

  Further, a circuit configuration in which such a charge control function is shared with the above-described level shift circuit 23 is possible, and it is easy to reduce the circuit scale and chip area and reduce the consumption of the lithium ion battery 12. it can.

  Further, as shown in FIG. 4, the charger connection detection circuit 23 is the level shift circuit 23 itself of the output of the charge signal output terminal Cout, and can share the circuit with the level shift circuit 23. In this case, the drain of the depletion type n-channel transistor Q4, which operates as a constant current source with the source and gate being saturated, is connected in series with the drain of the enhancement type p-channel transistor Q3. It is desirable to have a circuit configuration in which the source of the n-type transistor Q4 of the type is connected to the charger ground potential V- and the source of the enhancement type p-channel transistor Q3 is connected to the charge / discharge potential VDD.

  Accordingly, by using a circuit configuration in which a depletion type n-channel transistor Q4 and an enhancement type p-channel transistor Q3 are connected in series by saturation connection, the level shift circuit 23, the charger connection detection circuit 23, However, a circuit configuration in which the same circuit is shared is possible, and the circuit scale and chip area can be reduced, and the consumption of the lithium ion battery 12 can be easily reduced.

  As shown in FIG. 6, the charger connection detection circuit 23 includes a drain of a depletion type n-channel transistor Q4 operating as a constant current source with a source and a gate being saturated and an enhancement type p-channel transistor Q3. A circuit configuration in which the drain is connected in series, the source of the depletion type n-channel transistor Q4 is connected to the charger ground potential V-, and the source of the enhancement type p-channel transistor Q3 is connected to the charge / discharge potential VDD. It has become.

  According to such a circuit configuration, the source of the enhancement type p-channel transistor Q3 suitable for low power consumption with reduced compact circuit scale, small chip area and reduced consumption of the lithium ion battery 12 is the charging potential of the charger 14. Since it is connected to a certain charge / discharge potential VDD, it can be activated simply by inputting a signal of logical value L to the gate. On the other hand, the depletion type n-channel transistor Q4 suitable for compact circuit scale, small chip area, and low power consumption with reduced consumption of the lithium ion battery 12 is saturated and is always in an active state. As a result of being able to be in an operable state, even when the charger 14 is connected to a charging potential, it can operate upon receiving power from the charger 14 and can generate the charge control signal 23a. That is, the level shift circuit 23 is operable when the charger 14 is connected to the charging potential even when the ability to supply the lithium ion battery 12 with enough power to operate the charge / discharge protection IC 20 is lost. The charge control signal 23a can be generated, and even when the battery voltage of the lithium ion battery 12 falls below the operable voltage, the function of performing reliable charge control by connecting the charger 14 is provided. Can be realized. As a result, the charging transistor Q2 can be controlled using the charging control signal 23a to control the charging of the lithium ion battery 12, and the ability to supply power sufficient to operate the charge / discharge protection IC 20 can be provided. There is an effect that it is possible to return at the time.

  In addition, a circuit configuration in which such a charge control function is shared with the above-described level shift circuit 23 is possible, and it is easy to reduce the circuit scale and chip area and reduce the consumption of the lithium ion battery 12. it can.

  Further, as shown in FIG. 6, the charger connection detection circuit 23 has an enhancement-type p-channel transistor Q3 when the charger 14 is connected between the charger ground potential V- and the charger charge / discharge potential VDD. At the same time as the deactivation, the depletion type n-channel transistor Q4 is activated to have a determination circuit Q3, Q4 that generates the charge control signal 23a.

According to such a circuit configuration, by providing the determination circuits Q3 and Q4, when the charger 14 is connected between the charger ground potential V- and the charger charge / discharge potential VDD, an enhancement type p-channel is provided. The charge control signal 23a (logic value L) that is deactivated by the transistor Q3 and activated by the depletion type n-channel transistor Q4 can be generated. Therefore, if the signal of the charge control signal 23a (logical value L) is input to the gate of the enhancement type p-channel transistor Q3 whose source is connected to the charge / discharge potential VDD which is the charge potential of the charger 14, the enhancement type p The channel transistor Q3 can be activated. As described above, the enhancement type p-channel transistor Q3 in the active state and the depletion type n-channel transistor Q4 in the normally active state can lead the level shift circuit 23 to the operable state. Even when the charger 14 is connected to the charging potential, it can operate upon receiving power from the charger 14 and can generate the charging control signal 23a. That is, the level shift circuit 23 is operable when the charger 14 is connected to the charging potential even when the ability to supply the lithium ion battery 12 with enough power to operate the charge / discharge protection IC 20 is lost. The charge control signal 23a can be generated, and even when the battery voltage of the lithium ion battery 12 falls below the operable voltage, the function of performing reliable charge control by connecting the charger 14 is provided. Can be realized. As a result, the charging transistor Q2 can be controlled using the charging control signal 23a to control the charging of the lithium ion battery 12, and the ability to supply power sufficient to operate the charge / discharge protection IC 20 can be provided. There is an effect that it is possible to return at the time.

  The charger connection detection circuit 23 includes a p-channel MOSFET Q5 (Q7, Q9) whose source is connected to the charge / discharge potential VDD and an n-channel MOSFET Q6 (Q8, Q10) whose source is connected to the charger ground potential V-. An inverter circuit 234 which is connected in series with a gate as a common input and a drain as a common output and is activated when the charger 14 is connected between the charger ground potential V- and the charge / discharge potential VDD is a charge control signal 23a. The gate circuits 234,..., 234 cascaded in a predetermined number of stages according to the logic level are cascaded downstream of the determination circuits Q3, Q4.

  More specifically, the operation of the charger connection detection circuit 23 will be described.

  In FIG. 6, the fact that the battery voltage becomes 0V means that the voltage between the charge / discharge potential VDD and the battery ground potential Vss becomes 0V.

  At this time, when the charger 14 is connected, in the case of a lithium ion battery, a voltage such as 4.1 V or 4.2 V is applied between the charge / discharge potential VDD−charger ground potential V−. Since the voltage between the charge / discharge potential VDD and the battery ground potential Vss is 0V, the node b is almost at the charge / discharge potential VDD level, the gate-source voltage of the p-channel MOSFET Q3 is 0V, and the p-channel MOSFET Q3 is inactive. It has become.

  Since the voltage of the charger 14 is applied between the charge / discharge potential VDD-charger ground potential V-, all the transistors in the level shift circuit 23 can operate.

  At this time, the p-channel MOSFET Q3 is inactive, and the depletion n-channel MOSFET 30 is saturated and thus activated with a constant current. Therefore, the node c has a logic L level (charger ground potential V-level). As a result, the charge signal output terminal Cout outputs a logic value H with respect to the charger ground potential V-level, and can reliably flow a charging current.

  According to such a circuit configuration, a gate circuit that is less likely to increase the circuit scale and power consumption is provided at the output stage of the charger connection detection circuit 23, so that the input to the first stage of the charger connection detection circuit 23 is performed. Thus, the logic level of the charge control signal 23a and the logic level of the charge control signal 23a output from the output stage of the charger connection detection circuit 23 can be matched.

  FIG. 7 is a circuit diagram for explaining the charger connection detection circuit 23 having a circuit configuration in which the inverter circuit 233 (Q51, Q52) and the inverter circuit 234 (Q5, Q6) are removed from the circuit of FIG.

  In the charger connection detection circuit 23, as shown in FIG. 7, the p-channel MOSFET Q51 whose source is connected to the charge / discharge potential VDD and the n-channel MOSFET Q52 whose source is connected to the battery ground potential Vss have the gate as a common input. An inverter circuit having a drain connected in series with a common output is cascaded in front of the determination circuits Q3 and Q4. The inverter circuit has a difference between the charge / discharge potential VDD and the battery ground potential Vss that is the threshold level nVth of the n-channel MOSFET Q52. The circuit configuration is such that the enhancement-type p-channel transistor Q3 of the charger connection detection circuit 23 is activated when the value exceeds.

  In such a circuit, the phase of the output with respect to the input is not changed. In order to cause the charging signal output terminal Cout to transition to the logic value H and flow the charging current, the node d must fall below the threshold level pVth of the p-channel MOSFET Q3 and the logic value H must be output to the node e.

  When the battery voltage, that is, the voltage between the charge / discharge potential VDD and the battery ground potential Vss is lower than the threshold level nVth of the n-channel MOSFET Q52, the node d becomes the charge / discharge potential VDD level or high impedance. It cannot be activated.

  That is, FIG. 7 shows a circuit in which the charging current cannot flow even when the charger 14 is connected when the battery voltage is equal to or lower than VtL of the n-channel MOSFET Q3.

  According to such a circuit configuration, the difference voltage between the charge / discharge potential VDD through which the charging current can flow and the battery ground potential Vss can be freely set by the threshold level nVth of the n-channel MOSFET Q52. Further, by changing the input voltage threshold level VtL at the time of falling in the n-channel MOSFET Q52, it is possible to freely set a battery voltage at which a charging current cannot flow.

  FIG. 8 is a circuit diagram for explaining a charger connection detection circuit 23 having a circuit configuration in which another n-channel MOSFET Q53 is cascode-connected below the n-channel MOSFET Q52 of FIG.

  As shown in FIG. 8, the charge / discharge protection IC 20 includes at least one n-channel MOSFET Q53 connected in cascode between the source of the n-channel MOSFET Q52 of the inverter circuit and the battery ground potential Vss. Enhancement of the charger connection detection circuit 23 when the sum of the threshold level nVth of the n-channel MOSFET Q52 of the inverter circuit and the threshold level nVth of the cascode-connected n-channel MOSFET Q53 is smaller than the difference between the charge / discharge potential VDD and the battery ground potential Vss. A circuit configuration for activating the p-channel transistor Q3 of the type may be used.

  With such a cascode structure, the voltage of the charge / discharge potential VDD-battery ground potential Vss at which the charging current can flow with the node f set to the logical value L is the sum of the threshold levels nVth of the n-channel MOSFETs Q52 and Q53.

  In this way, the battery voltage at which no charging current can flow can be freely set by cascode-connecting n-channel MOSFETs in multiple stages or by changing the Vth of the n-channel MOSFET.

  According to such a circuit configuration, the difference voltage between the charge / discharge potential VDD through which the charging current can flow and the battery ground potential Vss can be freely determined by the sum of the threshold levels nVth of the n-channel MOSFET Q53 connected in cascode by a predetermined number of stages. It becomes possible to set. Further, by changing the input voltage threshold level VtL at the time of falling in the n-channel MOSFET Q53 that is cascode-connected by a predetermined number of stages, it is possible to freely set a battery voltage at which a charging current cannot flow.

  Next, an embodiment of the battery pack of the present invention will be described based on the drawings.

  The battery pack 10 in which the above-described charge / discharge protection IC 20 is incorporated into an IC can perform charge / discharge of the lithium ion battery 12 using the charge / discharge protection IC 20. Such a battery pack 10 is usually used by being mounted on various portable devices such as a mobile terminal, a mobile phone, and a wireless device using the lithium ion battery 12.

  FIG. 1 is a functional block diagram for explaining the configuration of the battery pack 10 of the present invention.

  As shown in FIG. 1, in addition to the charge / discharge protection IC 20, the battery pack 10 is composed mainly of a battery cell 12, which is a lithium ion battery 12, a discharge transistor Q1, a charge transistor Q2, and a delay capacitor C1. It is desirable that

  The charge / discharge protection circuit 20 has six terminals, a terminal to which the charge / discharge potential VDD is connected, a terminal to which the battery ground potential Vss is connected, a terminal to which the delay capacitor CT is connected, and a terminal Dout to which the discharge signal output is connected. , A terminal Cout to which a charging signal output is connected, and a terminal to which a charger ground potential V- is connected.

  Here, when the battery cell 12 is, for example, a lithium ion battery, the overcharge detection voltage is, for example, 4.25V or 4.35V.

  The delay capacitor C1 is connected to the battery ground potential Vss, generates a charge / discharge signal 12a for setting a delay time for detecting the overcharge state in the battery cell 12, and supplies the terminal CT to the overcharge detection circuit 22 described above. The circuit configuration is such that data is transmitted via

  The discharge transistor Q1 is connected in series between the mobile phone 14 and the battery cell 12, and controls the energization state of the discharge current supplied from the battery cell 12 to the mobile phone 14 during discharge control according to the logical value of the delay signal 26a. Circuit configuration.

  Further, the discharging transistor Q1 has a discharge current supplied from the battery cell 12 to the mobile phone 14 in accordance with the logical value of the discharge signal 26b, which is the logical product of the logical value of the delay signal 26a and the logical value of the short circuit detection signal 24a. The circuit configuration controls the energized state.

  According to such a circuit configuration, the logical operation of the discharge signal 26b that is the logical product of the logical value of the delay signal 26a and the logical value of the short circuit detection signal 24a is executed, and the battery cell 12 is operated according to the logical value of the operation result. Thus, it is possible to control the energization state of the discharge current supplied to the mobile phone 14 by using the discharge transistor Q1 while monitoring the overdischarge state and the short circuit state.

  The charging transistor Q2 is connected in series between the charger 14 and the battery cell 12, and the energization state of the charging current supplied from the charger 14 to the battery cell 12 at the time of charging control is determined according to the logical value of the charging control signal 23a. The circuit configuration is controlled.

  In this case, the level shift circuit 23 has a circuit configuration for generating a charge control signal 23a having a logical value for activating the charging transistor Q2 when activated in accordance with the charger ground potential V-.

  According to such a circuit configuration, by providing such a level shift circuit 23 in the above-described charge / discharge protection IC 20, charging is performed even when the battery voltage of the lithium ion battery 12 falls below the operable voltage. The connection of the charger 14 realizes the above-described oscillation prevention function at the time of overcurrent detection, and at the same time, can generate the charge control signal 23a for realizing the function of executing the reliable charge control using the charging transistor Q2. The effect that becomes. Further, such a level shift circuit 23 has a simple circuit configuration as compared with the comparator A22 with a latch function, and has a compact circuit scale, a small chip area, and low power consumption that reduces the consumption of the lithium ion battery 12. This contributes to the realization of the battery pack 10 having a proper charge / discharge control function and oscillation prevention function.

As described above, according to the battery pack 10, the hysteresis inverters Q 26 and Q 36 are used to prevent oscillation at the time of overcurrent detection, thereby reducing the number of circuit elements and constructing a small battery pack 10. can do. Furthermore, by providing the above-described charge / discharge protection IC 20, even when the battery voltage of the lithium ion battery 12 is lower than the operable voltage, the charger 14 can be connected to provide an oscillation prevention function when an overcurrent is detected. A function that can be realized and a function of executing a reliable discharge control using the discharging transistor Q1 and a function of executing a charging control for reliably supplying a charging current even when the battery voltage becomes 0V using the charging transistor Q2. There is an effect that can be realized. In addition, by using the level shift circuit 23 for the overcharge detection signal, a small battery pack 10 can be configured without adding a circuit. Further, when the battery voltage falls below a certain set voltage, a circuit that cannot reliably charge current can be reduced without adding a circuit by diverting the level shift circuit 23 of the overcharge detection signal. The battery pack 10 can be configured. In addition, after detecting overdischarge, even if the current consumption is set to 0, the hysteresis inverters Q26 and Q31 of the short-circuit detection circuit 24 are diverted to detect the connection of the charger 14 and bring it into an operating state. Thus, a small battery pack 10 can be configured without adding a circuit. Furthermore, by providing such a charge / discharge protection IC 20, a simple circuit configuration as compared with the comparator A22 with a latch function, a compact circuit scale, a small chip area, and low power consumption that reduces consumption of the lithium ion battery 12. Thus, the battery pack 10 having such a charge / discharge control function and an oscillation prevention function can be realized.

It is a functional block diagram for demonstrating the structure of the charging / discharging protection circuit 20 of the secondary battery of this invention, and the battery pack 10 using the same. It is a circuit diagram for demonstrating the circuit structure of a hysteresis inverter circuit. It is a graph for demonstrating the operation | movement which sets the input voltage threshold level at the time of the raise of the input voltage of the first stage inverter circuit in a hysteresis inverter circuit. It is a graph for demonstrating the relationship between a threshold level and charger ground potential at the time of short circuit detection. FIG. 2 is a circuit diagram for explaining circuit configurations of a short circuit detection circuit, an overcurrent detection circuit, and a delay circuit in FIG. 1. FIG. 6 is a circuit diagram for explaining a charger connection detection circuit that can reliably output a logical value H to a charge signal output terminal by connecting a charger even when the battery voltage becomes 0V. It is a circuit diagram for demonstrating the charger connection detection circuit which has a circuit structure which remove | eliminated the inverter circuit and the inverter circuit from the circuit of FIG. FIG. 8 is a circuit diagram for explaining a charger connection detection circuit having a circuit configuration in which another n-channel MOSFET is cascode-connected below the n-channel MOSFET of FIG. 7. It is a circuit block diagram for demonstrating the conventional charge / discharge control circuit. It is a circuit diagram for demonstrating the rechargeable power supply device used for the charging / discharging control circuit of FIG. FIG. 11 is a circuit diagram for explaining an internal circuit configuration of the comparator circuit with a latch function of FIG. 10.

Explanation of symbols

10 ... Battery pack 12 ... Secondary battery (battery cell, lithium ion battery)
12a ... charge / discharge signal 14 ... charger (load)
DESCRIPTION OF SYMBOLS 20 ... Charge / discharge protection circuit 22 ... Overcharge detection circuit 22a ... Overcharge detection signal 23 ... Level shift circuit (charger connection detection circuit)
23a ... charge control signal 24 ... short circuit detection circuit 24a ... short circuit detection signal 25 ... overcurrent detection circuit 25a ... overcurrent detection signal 26 ... delay circuit 26a ... delay signal 26b ... discharge signal 27 ... overdischarge detection circuit 27a ... overdischarge detection Signal 30 ... Hysteresis inverter circuit C1 ... Delay capacitor C1
Cout: Charge signal output terminal Dout: Discharge signal output terminal nVth: Threshold level of n-channel MOSFET of falling hysteresis circuit pVth: Threshold level of p-channel MOSFET of rising hysteresis circuit Q1: Discharge transistor Q2: Charging transistor Q3: Enhancement type P-channel transistor (determination circuit)
Q4: Depletion type n-channel transistor (judgment circuit)
Q26 ... Hysteresis inverter circuit Q31 ... Hysteresis inverter circuit Q41 ... Rising hysteresis resistance element Q42 ... First p-channel MOSFET
Q43 ... 1st n-channel MOSFET
Q44 ... Falling hysteresis resistance element Q45 ... P-channel MOSFET of rising hysteresis circuit
Q46 ... n-channel MOSFET of falling hysteresis circuit
Q47 ... Second p-channel MOSFET
Q48 ... 2nd n-channel MOSFET
V -... Charger ground potential VDD ... Charge / discharge potential Vss ... Battery ground potential Vth ... Threshold level VtH ... Rising input voltage threshold level VtL ... Falling input voltage threshold level

Claims (1)

The secondary battery is detected by detecting the overcharge state of the secondary battery during charge control, the overdischarge state of the secondary battery during discharge control for supplying load current, or the overcurrent state of the secondary battery during charge / discharge control. In the charge / discharge protection circuit that protects against overcharge, overdischarge, or overcurrent conditions,
An overdischarge detection circuit that is connected to a charging potential of a charger that charges the secondary battery, monitors the discharge state of the secondary battery, and generates an overdischarge detection signal when the overdischarge state is detected;
An overcurrent detection circuit connected to the charger ground potential, monitoring the potential of the charger ground potential, and generating an overcurrent detection signal when an overcurrent state is detected;
In response to the overdischarge detection signal, a delay signal is generated for setting a delay time for detecting the overdischarge state in the secondary battery, or in the secondary battery in response to the overcurrent detection signal. A delay circuit for generating a delay signal for setting a delay time required for detecting the timing,
A hysteresis inverter circuit connected to the charger ground potential, the hysteresis inverter circuit monitors the potential of the charger ground potential, and generates a short-circuit detection signal when a short-circuit state is detected, thereby generating a secondary battery; And a short circuit detection circuit configured to prevent current from flowing instantaneously to the charge / discharge protection circuit.

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