JP3880374B2 - Method for driving solid-state imaging device and imaging apparatus - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a driving method and an imaging apparatus for a solid-state imaging device used in an imaging apparatus such as a digital camera or a movie camera.
[0002]
[Prior art]
In recent years, in image pickup apparatuses such as so-called electronic still cameras and movie cameras, an image pickup device for both still images and moving images is often used instead of a conventional image pickup device dedicated to moving images. Such a still image / moving image pickup device is a so-called multi-pixel image pickup device in which the number of pixels is set to be significantly larger than a conventional moving image dedicated image pickup device for the purpose of photographing a still image with extremely high definition. It is used.
[0003]
Therefore, when a still image is shot with such a multi-pixel image sensor, it is sufficiently dense and high-quality, for example, printed in A4 size, compared to a still image shot with a conventional moving image-dedicated image sensor. High-quality images that can be enjoyed for viewing can be obtained. On the other hand, when a moving image is captured as it is with such a multi-pixel imaging device, the number of pixels is too large, so that it takes a long time to read out the image for one frame constituting the moving image, and a smooth moving image can be obtained. It becomes difficult. In this regard, a configuration is conceivable in which the operation speed of the image pickup device itself and the operation speed of the peripheral circuits of the image pickup device are increased to cope with this problem.
[0004]
Therefore, in general, when a multi-pixel image sensor is used, the pixel signals of all the pixels are read out individually when capturing a still image, but a configuration is adopted in which signals of some pixels are read out when capturing a moving image. . When a so-called CCD, which is a multi-pixel CCD (charge coupled device) image sensor, that is, a CCD image sensor, is used as a solid-state image sensor, basically, a vertical method, Currently, a method of thinning out horizontal lines at a specific rate is generally used.
[0005]
Here, in the CCD, photodiodes constituting pixels are arranged in a two-dimensional lattice to form an imaging surface, and an image formed by an optical system on the imaging surface is changed to the intensity of light for each pixel. Accordingly, this is an image pickup device that takes out the amount of charge accumulated in each photodiode as a signal. Then, the signal charges are sequentially sent to the output circuit inside the CCD one pixel at a time, and the charge signal amount is converted into a voltage change signal by one charge voltage converter, and then output to the outside of the CCD. Is done. The operation for guiding the signal charge of each pixel to the output circuit in this way is called transfer. A method generally used as a method of sequentially transferring signal charges of pixels arranged in a two-dimensional rectangular shape to an output circuit is a method in which so-called vertical transfer and horizontal transfer are combined. Here, when the vertical direction of the imaging screen is vertical and the horizontal direction is horizontal, the vertical transfer is an operation in which the signal charges of all the pixels are transferred simultaneously in the vertical direction and in the above output circuit direction. Transfer refers to the signal charge for one horizontal line in the vertical end sent to the horizontal transfer path by the vertical transfer for one stage, that is, the portion closest to the output circuit in the horizontal direction and the above. This is an operation for transferring all of the output circuits in the same direction. At this time, the signal charge for one pixel located at the end of the horizontal transfer path, that is, the portion closest to the output circuit is sent to the charge-voltage converter. As described above, when the horizontal transfer is repeated, all signal charges in the horizontal transfer path are subjected to charge-voltage conversion, and when the output ends and the horizontal transfer path becomes empty, the vertical transfer is performed again. Then, the signal charges for one horizontal line at the next vertical end are sent again to the horizontal transfer path, and are similarly sent to the output circuit in order by horizontal transfer. In this way, when all the pixels are output by sequentially repeating the simultaneous vertical transfer of the signal charges of all the pixels and the simultaneous horizontal transfer of the signal charges on the horizontal transfer path, the output of the pixel signals for one screen is completed. As a result, an electronic image can be formed and restored.
[0006]
Further, in the operation of transferring the signal charge of each pixel, the vertical transfer is usually the positive transfer for transferring the signal charge in the horizontal transfer path direction, that is, in the positive direction as described above. The transfer can be performed in the reverse direction to the horizontal transfer path, that is, reverse transfer (vertical reverse transfer). However, in recent years, with the trend toward pixel miniaturization and low power consumption due to the increase in the number of pixels, the CCD has been lowered in transfer drive voltage, and easily and efficiently performs vertical transfer as in the past. It has become difficult. Against this background, some multi-pixel CCDs have been designed in pursuit of the efficiency of vertical transfer in the positive direction, and as a result, CCDs with significantly reduced transfer efficiency in reverse transfer are also used. Yes.
[0007]
Of the various types of CCDs, the one that is usually used as the above-mentioned multi-pixel CCD is a CCD called an interline type. This interline type CCD is further of an interlace scan type by a scan type. It is roughly classified into a CCD (hereinafter referred to as interlaced CCD) and a progressive scan type CCD (hereinafter referred to as progressive CCD). Interlaced CCDs currently have the best balance between cost and performance, and are widely used as structures suitable for multi-pixel imaging devices. In this interlaced CCD, the number of horizontal lines of charges (also referred to as pixel signal charges, signal charges, and pixel charges) that can be held in the vertical transfer path is half the number of horizontal lines of a photodiode that is a photoelectric conversion unit and constitutes one pixel. For this reason, in order to read out all the pixels independently, one frame is divided into two fields, and even-numbered lines and odd-numbered lines are read out alternately, that is, interlaced twice. Therefore, two systems for even lines and odd lines are prepared for charge readout electrodes (also called signal charge readout electrodes and charge readout gate electrodes) to the vertical transfer path of charges on the photodiode. In an interlaced CCD, for example, by increasing the number of charge readout electrodes from two to four, only some lines are selectively read out and all combinations of color filters are read out to the vertical transfer path in one field. Further, it is possible to adopt a configuration that gives selectivity to line reading such that the rest is not read, and the line thinning function is easily realized. In addition, vertical transfer of such a multi-pixel interlaced CCD is generally performed by four-phase driving. In order to realize the line thinning function, for example, four lines of charge readout electrodes are included in the electrodes of the vertical transfer path. The number of conventional 4 systems is 6 systems.
[0008]
On the other hand, in contrast to such an interlaced CCD, a progressive CCD can hold charges in the vertical transfer path by the number of photodiode lines, so that all the lines in one frame can be read in order from the top. Therefore, if the thinning is not performed, the charge readout electrode can be constituted by one system. However, in order to perform the thinning readout, one system of the charge readout electrode is further added in order to realize the selectivity of the readout line. . Therefore, if the vertical transfer of the progressive CCD includes a total of two charge readout electrodes, the number of electrodes on the vertical transfer path is four in the case of four-phase driving, and five in the case of three-phase driving. The conventional 3 systems become 4 systems.
[0009]
Such a multi-system charge readout electrode structure is less expensive than the conventional one, although there are negative aspects such as the complexity of the internal wiring of the CCD and the increase in the number of external CCD driving circuits by the increase in the electrode structure. There is no other alternative method, and it is adopted in most multi-pixel CCDs.
[0010]
In addition, for the above-described general line thinning readout, various horizontal line thinning and line addition readout methods have been proposed for progressive CCDs as disclosed in, for example, Japanese Patent Laid-Open No. 10-136244. Yes. These methods can be broadly classified as follows: (1) a method of reading only n lines in m lines (m> n, m ≧ 3), and (2) a method of adding and reading charges of n lines in m lines (m> n) and (3) three methods of adding and outputting pixel signals of q lines continuous in the vertical direction are shown. In contrast to a configuration in which unnecessary lines are simply thinned out, a configuration in which the frame rate is improved while adding charges between a plurality of lines is shown.
[0011]
That is, according to the method of selectively reading out only a specific line and thinning out the rest as in the conventional case, the frame rate can be improved, but there is a serious problem in reproducing the vertical spatial frequency of the captured image. May occur. That is, in the state where the line is thinned out, the MTF (modulation transfer function) of the photographing lens remains the same even though the spatial sampling frequency and the aperture ratio in the vertical direction are reduced accordingly. Significant folding distortion occurs. This phenomenon is called moire, and is a phenomenon in which a fine-striped subject appears as a thick, coarse-striped stripe different from the actual one, which is undesirable for an imaging apparatus.
[0012]
In order to alleviate this phenomenon, it is possible to incorporate line addition as disclosed in Japanese Patent Laid-Open No. 10-136244, instead of simply thinning out lines for the purpose of improving the frame rate. Even if the MTF of the photographic lens is high on the spatial sampling frequency after line thinning, the aperture ratio increases when the line addition is performed, and the high frequency spatial frequency component is reduced, so that the same effect as the spatial filter processing is obtained. It is done. In order to maximize this effect, for example, in order to increase the frame rate by 5 times, 4/5 lines are not thinned out to read out 1/5 lines, but 5 lines are color-filtered. By adding and reading between the same colors of each other, all pixels are eventually read out at a frame rate of 5 times, the effect of the spatial filter is maximum, and the pixel charge of all the pixels contributes to imaging. The rate is exactly the same as when taking a still image.
[0013]
However, Japanese Patent Laid-Open No. 10-136244 has not proposed a method for reading out all pixel charges by adding a plurality of lines of the same color as described above. Although a method for reading out all pixels by adding the charges of successive lines on the vertical transfer path or adding them on the horizontal transfer path is mentioned, in this method, in the case of a color CCD other than the vertical stripe filter array, In addition, color mixing occurs, causing serious adverse effects on color reproducibility, and depending on the combination of color mixing, there is a problem that the original color cannot be reproduced. Here, although not shown in the above-mentioned Japanese Patent Laid-Open No. 10-136244, if all pixels are read out by adding a plurality of lines of the same color with the configuration described in this publication, for example, the above-mentioned 5-line addition is performed. In this case, assuming that the color filter array is a Bayer array as in this publication function, there are two types of color combinations in one vertical column, and each color is read out individually, and further 5 pixels are read out separately for each color. Since it is necessary, 10 charge readout electrodes are required in total, and in the case of vertical transfer driving, a total of 12 systems are required for the vertical transfer electrodes. Since there are four vertical transfer electrodes of the existing three-phase vertical transfer and thinning-out three-phase multi-pixel progressive CCD as described above, eight external vertical transfer drive circuits are added. Therefore, the scale of the CCD driving circuit is remarkably increased. Further, as the number of pixels of the CCD increases and the number of addition lines increases, the number of vertical transfer electrode systems further increases accordingly. Such an increase in the number of vertical transfer electrode systems is undesirable from the standpoints of cost, downsizing of the apparatus, and power consumption.
[0014]
[Problems to be solved by the invention]
As described above, in order to improve the quality of still images, when a multi-pixel image sensor is used for a dedicated image sensor for moving images, the pixel signal is thinned out during moving image shooting in order to improve the frame rate. However, in this case, according to the method of selectively reading out only a specific line and thinning out the remainder, the image quality of the moving image is lowered, while the charge of all pixels is added and used in the conventional configuration. Then, there is a problem that the configuration becomes complicated and the cost increases.
[0015]
The present invention has been made in view of the above points, and can drive a solid-state imaging device that can realize high image quality while improving the frame rate by adding charges of pixels of the same color, and can reduce costs with a simple configuration. It is an object to provide a method and an imaging apparatus.
[0016]
[Means for Solving the Problems]
  The solid-state imaging device driving method according to claim 1 includes a plurality of pixels having photoelectric conversion means and first and second colors arranged in a predetermined pattern, and a plurality of pixels that read and transfer the charges of these pixels. A solid-state imaging device driving method comprising: a first transfer path; and a second transfer path that reads and transfers the charges transferred by the first transfer path and outputs them.The first transfer path includes a charge coupled device provided with a plurality of charge readout electrodes for a pixel, and reading and holding of charge is performed by applying a charge readout voltage to the charge readout electrode,Reading a plurality of charges of the first color pixel to the first transfer path,Continue to apply a charge readout voltage to the charge readout electrode of a specific systemWhile maintaining the read-out state for the specific pixel and holding the read-out charge, the charge of the other pixel that has been read out is transferred, and the transferred charge is added to the held charge. A first addition step of generating a first addition charge obtained by adding a plurality of charges; and the second addition pixel in a state in which the first addition pixel is removed from a position where the charge of the pixel of the second color is read out. A plurality of charges of the color pixel are read out to the first transfer path, and a plurality of charges of the second color pixel are added to at least one of the first transfer path and the second transfer path. A second addition step of generating a second addition charge obtained by adding a plurality of charges of the pixels of the two colors, and transferring the first addition charge and the second addition charge through the second transfer path and outputting them And an addition output step.Furthermore, the increase in the number of electrodes is suppressed, the configuration is simplified, and the cost is suppressed.
[0017]
  In this configuration, among the plurality of pixels arranged in a predetermined pattern, the charges of the plurality of pixels of the first color are first read out to the first transfer path,Continue to apply the charge readout voltage to the charge readout electrode of a specific systemThe first pixel is obtained by transferring the charges of the other pixels that have been read and adding the transferred charges to the held charges and adding the charges of the pixels of the first color. Generate added charge. Next, transfer and selective charge reading are combined so as not to add to the first added charge, a plurality of charges of the second color pixel are read out to the first transfer path, and the first color pixel is read. Similarly to the charge, the charge is added on the first transfer path, or read from the first transfer path to the same position on the second transfer path and added to generate the second added charge. Then, by transferring and outputting the first and second added charges through the second transfer path, the pixels are thinned out and the frame rate is improved as compared with the state where all the pixels are sequentially read out and output. Furthermore, pixel thinning can be performed by reading all pixels and adding a plurality of charges of pixels of the same color, so that the image quality is improved as compared with a configuration in which pixels are selectively read out.
[0018]
The solid-state imaging device driving method according to claim 2 is the solid-state imaging device driving method according to claim 1, wherein the first addition step and the second addition step are configured to positively charge the electric charge read out to the first transfer path. It is performed while transferring in the opposite direction.
[0019]
In this configuration, the first added charge and the second added charge can be output in a desired order, and the process in the subsequent process is facilitated.
[0020]
The solid-state imaging device driving method according to claim 3 is the driving method of the solid-state imaging device according to claim 1, wherein the second adding step includes a plurality of pixels of the second color at a predetermined position of the second transfer path. This is performed by reading out the electric charges.
[0021]
In this configuration, the operation of reading and adding charges to the first transfer path is performed in a relatively short time.
[0022]
  The solid-state imaging device driving method according to claim 4 is the solid-state imaging device driving method according to any one of claims 1 to 3, wherein the first transfer path is, PaintingAgainst primeMultiple systemsCharge readout electrodeAnd gate electrode for vertical transfer pathThe charge-coupled device is provided, and charge reading and holding are performed by applying a charge reading voltage to the charge reading electrode.The transfer of the read pixel is performed by applying a predetermined voltage to the charge readout electrode and the vertical transfer path dedicated gate electrode.Is.
[0023]
  In this configuration, in the first addition step, the charge readout voltage is applied to the plurality of charge readout electrodes to read out the charges of the plurality of pixels to the first transfer path, and then the charge readout to the specific charge readout electrode. With voltage applied,Applying a predetermined voltage to the charge readout electrode and the gate electrode dedicated to the vertical transfer pathThis is done by transferring the first transfer path.
[0024]
  The solid-state imaging device driving method according to claim 5 is the solid-state imaging device driving method according to any one of claims 1 to 4, wherein the first addition step and the second addition are performed.Process, And the first drive mode for performing the addition output step, and the charges of each pixel are individually read out to the first transfer path, and the read charges are individually transferred to the second transfer path. Can be switched to the second drive mode output from.
[0025]
In this configuration, a state in which a high-definition image is output using all the pixels and a mode in which pixels are thinned out and output at high speed are easily switched and used.
[0026]
The solid-state imaging device driving method according to claim 6 is the solid-state imaging device driving method according to claim 5, wherein the first driving mode is a moving image mode for capturing a moving image, and the second driving mode is stationary. This is a still image mode for taking a picture.
[0027]
With this configuration, it is possible to output high-definition still image signals, as well as high-speed frame rates and improved image quality, enabling switching between still images and movies. Thus, a configuration suitable for an imaging apparatus that captures images is realized.
[0028]
  The imaging apparatus according to claim 7 includes a solid-state imaging device and a drive circuit that drives the fixed imaging device, and the solid-state imaging device includes photoelectric conversion means and includes a first color and a second color in a predetermined pattern. A plurality of pixels arranged in a plurality of colors, and the driving circuit includes:A charge-coupled device having a plurality of charge readout electrodes for a pixel is provided.A plurality of first transfer paths for reading and transferring the charges of each pixel; and a second transfer path for reading and transferring the charges transferred by the first transfer paths, and outputting the output.Applying a charge readout voltage to the charge readout electrodeReading a plurality of charges of the first color pixel to the first transfer path,Continue to apply a charge readout voltage to the charge readout electrode of a specific systemWhile maintaining the read-out state for the specific pixel and holding the read-out charge, the charge of the other pixel that has been read out is transferred, and the transferred charge is added to the held charge. A first added charge obtained by adding a plurality of charges is generated, and the charge of the pixel of the second color is changed in a state where the first added pixel is removed from a position where the charge of the pixel of the second color is read out. A plurality of charges are read out to the first transfer path, and a plurality of charges of the pixels of the second color are added to at least one of the first transfer path and the second transfer path. A second added charge obtained by adding a plurality of charges is generated, and the first added charge and the second added charge are transferred through the second transfer path and output.
[0029]
  In this configuration, among the plurality of pixels arranged in a predetermined pattern, the charges of the plurality of pixels of the first color are first read out to the first transfer path,Continue to apply the charge readout voltage to the charge readout electrode of a specific systemThe first pixel is obtained by transferring the charges of the other pixels that have been read and adding the transferred charges to the held charges and adding the charges of the pixels of the first color. Generate added charge. Next, a plurality of charges of the second color pixel are read out to the first transfer path so as not to be added to the first added charge, and the first transfer path is read in the same manner as the charge of the charge of the first color pixel. Or read from the first transfer path to the same position on the second transfer path and add to generate a second added charge. Then, by transferring and outputting the first and second added charges through the second transfer path, the pixels are thinned out and the frame rate is improved as compared with the state where all the pixels are sequentially read out and output. Further, pixel thinning can be performed by reading all pixels and adding a plurality of charges of pixels of the same color, so that the image quality is easily improved as compared with a configuration in which pixels are selectively read out.Furthermore, the increase in the number of electrodes is suppressed, the configuration is simplified, and the cost is suppressed.
[0030]
An image pickup apparatus according to an eighth aspect of the present invention is the image pickup apparatus according to the seventh aspect, further comprising processing means capable of switching the order of the first added charge and the second added charge output from the solid-state image pickup device. .
[0031]
In this configuration, since the processing means for changing the order of the output signals is provided, the first added charge and the second added charge that are added and output in the first transfer path and the second transfer path are output. It is not always necessary to arrange the order. For this reason, in each transfer path, it is only necessary to transfer charges in one direction, and there is no need to transfer in the reverse direction. Therefore, it is possible to cope with a CCD having a low transfer efficiency in the reverse direction, and versatility. improves.
[0032]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, an embodiment of a method for driving a solid-state imaging device and an imaging apparatus of the present invention will be described with reference to the drawings.
[0033]
First, an outline of the present invention will be described. The solid-state imaging device of the present invention is a CCD image sensor using a charge coupled device (CCD), a so-called CCD, and is used in an imaging device such as a digital camera or a movie camera. Is. In particular, the CCD according to the present invention is used for an image pickup apparatus for both still and moving images that enables not only still image shooting but also moving image shooting. It is a so-called multi-pixel interline CCD.
[0034]
The CCD firstly charges one of the same color (pixel signal charge, signal charge, pixel charge) out of the two color filter pixels in one vertical column along each vertical transfer path as the first transfer path. (Referred to as charge) on the vertical transfer path, and then performing vertical transfer while applying the charge read voltage to the charge read electrodes of a specific system among the charge read electrodes of a plurality of systems. The line addition of the same colors is performed. Further, by combining vertical transfer and selective reading by a plurality of charge reading electrodes, the charge read out first and added on the vertical transfer path, and the charge of the other line of another color read out later The pixel of the line including the other color filter pixel is read out to the vertical transfer path while performing the vertical transfer while applying the charge read voltage to the specific charge read electrode as in the first color. Or, by combining the line addition operation on the horizontal transfer path as the second transfer path, the same colors read later are added together, and as a result, the same colors are added together in a plurality of lines. It can perform pixel readout, improve the frame rate, improve the vertical spatial frequency reproducibility, improve the pixel sensitivity, and achieve a significant improvement in video quality. Together can also be applied to D, it is those which can suppress an increase in manufacturing cost while suppressing complication of the structure.
[0035]
That is, with a multi-pixel CCD, pixel charges can be mixed by performing vertical transfer while applying a voltage to a specific readout electrode after reading out charges to the vertical transfer path, and high-speed high-quality moving images can be obtained. The image quality can be improved only by the reading method.
[0036]
As will be described in detail below, the first embodiment uses an interlaced CCD to transfer vertical transfer only in the positive direction (forward transfer) and to perform addition in the horizontal transfer path. In the second embodiment, an interlaced CCD transfers vertical transfer in the reverse direction as well as forward transfer (reverse transfer). In the third embodiment, a progressive CCD transfers not only forward transfer but also reverse transfer. The fourth embodiment is a progressive CCD, in which vertical transfer is only forward transfer and addition in the horizontal transfer path is performed. In the fifth embodiment, interlaced complementary color line sequential CCDs perform not only forward transfer but also reverse transfer. The sixth embodiment is an interlace complementary color line sequential CCD, in which vertical transfer is only forward transfer and addition is performed in the horizontal transfer path.
[0037]
As described above, in the present invention, high-speed all-pixel readout by multi-line addition that avoids secondary color mixture in a color single plate of any color filter array, a moving image still image, and multi-pixel interline CCD that supports thinning-out is possible. Therefore, the same minimum number of vertical transfer electrode configurations can be realized in any number of line additions without increasing the number of vertical transfer electrodes as the number of line additions increases.
[0038]
In addition, when performing pixel addition of pixels of the same color, it is possible to adopt a configuration in which reverse transfer in the vertical transfer path is performed to facilitate processing after output from the CCD, and the efficiency of reverse transfer is also improved. In a bad CCD or the like, data can be transferred only in the forward direction.
[0039]
Next, embodiments of the present invention will be described with reference to the drawings.
[0040]
First, the configuration using the interlace scan type CCD (interlace CCD) corresponding to the thinning, which is the first and second embodiments shown in FIGS.
[0041]
In this interlaced CCD, regardless of the number of lines to be added, the charge readout electrodes include four systems, and the total number of vertical transfer electrodes does not increase with six systems. Specifically, the charge readout electrodes are four systems of V1A, V1B, V3A, and V3B, and the vertical transfer electrodes are a total of six systems of V1A, V1B, V2, V3A, V3B, and V4. In other words, it can be realized with an ordinary multi-pixel interlaced CCD.
[0042]
That is, in the case of an interlaced CCD in an ordinary color filter array color single plate, a moving picture still image combined, and thinning-compatible multi-pixel interline CCD, there are four types of charge readout electrodes: V1A, V1B, V3A, and V3B. . For example, in a Bayer method (primary color method) using R (red), G (green), and B (blue) filters, a combination of color filters in a certain column is RGRG, where R is an even number and G is an odd number. The charge readout electrode V1A on the first horizontal line, the charge readout electrode of the G pixel having an odd line number that is a multiple of 5, V1B is the remaining G pixel, that is, the charge readout electrode of the remaining odd-numbered horizontal line, V3A Is the charge readout electrode of the R pixel of the horizontal line number which is a multiple of 10, and V3B is the charge readout electrode of the remaining R pixels, ie, the remaining even-numbered horizontal lines. Incidentally, in this case, the adjacent column is on the horizontal line where the combination of color filters is GBGB, G is an even number, and B is an odd number. That is, V1A is a B pixel with a line number that is a multiple of 5, and V3A is a charge readout electrode of a G pixel with a horizontal line number that is a multiple of 10. Hereinafter, in order to simplify the description, the same color addition all-pixel readout operation for the RGRG column will be described. However, the description will be made on the assumption that the same thing occurs in all pixels on the same horizontal line although the combination of colors is different for each column.
[0043]
First, a charge read voltage is applied to V3A and V3B to read all the charges of the R pixel as the first color, that is, the charges of the even lines, to the vertical transfer path. Thereafter, the voltage of V3B is restored to the original value, but vertical transfer is performed for V3A for four stages while the charge read voltage is applied. Then, since the potential well remains deep under the V3A electrode that exists every 10 lines (every 5 vertical transfer paths), the charges for the 5 R pixels adjacent in the upward direction of V3A are added in the same color. Then, an R 5-pixel added charge (5R) is generated as the first added charge. Thereafter, this 5-pixel added charge of R, that is, the 5-pixel added charge of the even line, is vertically transferred and temporarily saved under the V1A electrode in order to avoid color mixture, and then a charge read voltage is applied only to V1B to The G pixel as the second color other than the double lay, that is, the charges on the odd lines other than the multiple of 5, are read out to the vertical transfer path. Then, all the charges in the G pixels are read out except for the V1A electrode where the R 5-pixel added charge is located. Then, one-stage vertical transfer is performed, and this time, R 5-pixel added charge is saved from the V1A electrode, and a charge read voltage is applied to V1A. As a result, under the V1A electrode, the G charge of the V1A electrode and the G charge that has already been read and transferred one stage above one are mixed or added for a total of two pixels. Similarly, vertical transfer is performed for three stages while the charge read voltage is applied to V1A. Then, since the potential well remains deep under the V1A electrode existing every 10 lines (every 5 stages of the vertical transfer path), the remaining three G pixels adjacent in the upward direction of V1A are added at this portion, and the same color The five pixels are added together to generate a five-pixel added charge (5G) of G as the second added charge.
[0044]
As a result, in the vertical transfer path, a state in which all pixels are read out by repeating 5G, 5R, sky, sky, sky, 5G, 5R, sky, sky, sky,. Thereafter, when signals are read out by repeating one stage of vertical transfer, horizontal transfer, five stages of vertical transfer, and horizontal transfer, readout of all pixels with the same color is realized at a frame rate of 5 times.
[0045]
Next, a first embodiment of the present invention will be described with reference to FIGS.
[0046]
In FIG. 1, reference numeral 1 denotes an image pickup device, which is used for a digital camera that is also used as a still image moving image. The CCD drive circuit 3 is provided. This CCD 2 is an interline type interlaced scan CCD that supports so-called color Bayer array thinning, and is characterized by the combined use of still images and moving images. Since it has a significantly larger number of pixels than a CCD dedicated to moving images, a mechanical shutter is used for still image shooting. When used together, all the pixels are read out individually, while at the time of moving image shooting, only 1/5 of all horizontal lines can be selectively thinned out and read out. There is a device to keep the rate (number of frames per unit time) high.
[0047]
The CCD 2 is driven by a drive signal 4 from the CCD drive circuit 3 and outputs an image signal 5. The drive signal 4 given to the CCD 2 by the CCD drive circuit 3 includes vertical transfer path gate electrodes V1A, V1B, V2, V3A, V3B, and V4 through which the vertical transfer path gate signal flows, as will be described later. Further, a drive mode switching signal 6 is input to the CCD drive circuit 3 from the control means of the digital camera, and the CCD drive circuit 3 switches the drive operation mode of the CCD 2 by this drive mode switch signal 6. That is, in the present embodiment, the moving image mode as the first drive mode and the still image mode as the second drive mode are switched.
[0048]
Further, as shown in FIG. 2, the CCD 2 includes a photodiode 11 as a photoelectric conversion means, a vertical transfer path 12 as a first transfer path connected to the photodiode 11, and these vertical transfer paths. And vertical transfer path gate signal wirings 13 connected to 12 respectively. Further, in the figure, an arrow 14 indicates a positive direction which is a transfer direction in a horizontal transfer path direction (not shown). In the following description, the direction opposite to the horizontal transfer path direction is referred to as a reverse direction, and the transfer in the reverse direction is referred to as reverse transfer.
[0049]
Each of the photodiodes 11 constitutes a pixel and is two-dimensionally arranged in a predetermined pattern. In the present embodiment, a combination of color filters in a predetermined column is arranged in a Bayer method that is a primary color Bayer array, that is, a primary color method. Is RGRG ..., R is on the even-numbered horizontal line, and G is on the odd-numbered horizontal line. The combination of the color filters in the column adjacent to this column is GBGB ..., G is the even-numbered, and B is the odd-numbered horizontal line. It is in.
[0050]
The charge accumulated in the photodiode 11 is read out to the vertical transfer path 12 side by applying a charge read pulse as a positive charge read voltage to the gate electrode of the adjacent vertical transfer path 12. As shown in FIG. 2, there are four charge readout electrodes V1A, V1B, V3A, and V3B, which are combinations of vertical transfer path gate electrodes that accompany such charge readout operation of the CCD 2. In addition, there are a total of six vertical transfer path gate electrodes added to the vertical transfer dedicated gate electrodes V2 and V4 which are not accompanied by the charge reading operation, and each is connected to the vertical transfer path gate signal wiring 13. Note that such a vertical transfer path gate signal wiring 13 is currently the most common as a multi-pixel multi-pixel CCD that is also used as a still image moving image. In the CCD 2 of the present embodiment, as shown in FIG. 2, V1A is one for every 10 pixels (lines) (G and B pixels having an odd line number that is a multiple of 5), and V3A is 10 pixels (line). ) Are connected to each other (R and B pixels with a horizontal line number that is a multiple of 10), so by selectively reading out charges only from the pixels adjacent to V1A and V3A, 1/5 decimation readout Can be easily realized.
[0051]
Note that the CCD 2 of this embodiment is merely an example, and actually corresponds to various thinning rates depending on how many lines the electrodes corresponding to V1A and V3A are arranged in consideration of the color filter. CCD is present. Incidentally, increasing the number of combinations of gate electrodes that easily accompany the charge read operation in order to realize a highly complex read operation that cannot be easily realized with the above electrode configuration not only complicates the internal wiring of the CCD but also increases it. As described above, external drive circuits are required by the number of the vertical transfer path gate wirings, resulting in adverse effects such as an increase in cost, an increase in size of the apparatus, and an increase in power consumption.
[0052]
Next, the actual signal reading operation will be described from the still image mode.
[0053]
First, all of the photodiodes 11 start to accumulate charges simultaneously with exposure via an optical system (not shown), with unnecessary charges being swept away by the electronic shutter operation onto the substrate portion of the CCD. Then, when the exposure is completed after a predetermined exposure time has elapsed, the light path to the photodiodes 11 is blocked by light shielding means such as a mechanical shutter (not shown), and each photodiode 11 is kept in a dark state until all charges are read out thereafter. Retained.
[0054]
Next, the state of charge reading and vertical transfer will be described with reference to FIGS. 3 and 4 describe the state of charge readout and vertical transfer in the leftmost column of FIG. 2, that is, the vertical transfer waveform and potential. In the following description, all other columns including adjacent columns are described. It is assumed that the same operation occurs in the column. That is, charge reading and vertical transfer are performed in units of horizontal lines. 3 and 4, the waveforms with V1A to V4 indicate the voltage waveforms of the respective vertical transfer path gate signals, and the waveforms with A to G shown in the directions orthogonal to the voltage waveforms are the vertical transfer. It shows the potential of the road. In the figure, 21 is a charge read pulse, and 22 is a read charge. First, as an initial state, each vertical transfer path gate signal and potential state are applied from the state shown in FIG. 3A to the charge reading pulse 21 to V3A and V3B as shown in FIG. 3B. Then, as shown in FIG. 3C, all charges on the even lines are read out to the vertical transfer path. Next, a predetermined voltage is applied to V1A to V4, and as shown in FIGS. 3D to 3G, the read charge 22 is vertically transferred by one stage, and the charge of the lowermost line is transferred to a horizontal transfer path (not shown). . Thereafter, all charges (pixel charges) in one line are read out by horizontal transfer. Next, one-stage vertical transfer and horizontal transfer are repeated, and all the charges on the even lines are individually read out and output to the outside of the CCD 2 to complete the reading of the first field.
[0055]
Subsequently, from each vertical transfer path gate signal and potential state shown in FIG. 4A, a charge read pulse 21 is applied to V1A and V1B as shown in FIG. 4B. Then, as shown in FIG. 4C, all charges on the odd lines are read out to the vertical transfer path. Next, a predetermined voltage is applied to V1A to V4, and the read charges 22 are vertically transferred by 1/2 stage as shown in FIGS. 4D to 4E. Further, as shown in FIGS. The read charge 22 is vertically transferred by one stage, and the charge of the lowermost line is transferred to a horizontal transfer path (not shown). Thereafter, all charges (pixel charges) in one line are read out by horizontal transfer. Next, one-stage vertical transfer and horizontal transfer are repeated to read out all the charges on the odd lines individually and output them to the outside of the CCD 2 to complete the reading of the second field.
[0056]
Thus, the readout operation in the still image mode is completed by reading out the charge on the CCD 2 over two fields. As schematically shown in FIG. 11, the operation in the still image mode is a mode in which all pixels are individually read using two fields in combination with an external light shielding unit, and one frame includes an even line and an odd line. In addition to the fact that it is divided into two and the operation of a physical light-shielding means such as a mechanical shutter is accompanied by a very slow frame rate, all the pixels of a so-called multi-pixel CCD are not suitable for moving images. Since these are all read out independently, an extremely high-definition image that is satisfactory as a still image can be obtained.
[0057]
Next, as a comparative example, a 1/5 thinning mode that is normally performed using the CCD 2 of the present embodiment, that is, a mode in which 1/5 lines are read by thinning 4/5 lines will be described. This 1/5 thinning mode is mainly used for moving image shooting, and considers the combination of the selected color filters, so that all RGB color filter signals are aligned in one field. Since RGB is aligned in one field by one exposure and reading, there is no need for a light shielding operation by a light shielding means such as a mechanical shutter at the time of reading of charges. In this mode, since the charge read pulse is applied only to V1A and V3A, the other photodiodes 11 that are not connected to V1A and V3A, that is, the pixels are not read. That is, for example, in FIG. 2, only the photodiodes 11 on the shaded horizontal lines such as R0, G0, G5, B5, R10, G10.
[0058]
Hereinafter, this read operation will be described with reference to FIG. FIG. 5 illustrates the state of charge readout and vertical transfer in the leftmost column of FIG. 2, but in the following description, similar operations occur in all other columns including adjacent columns. Shall. That is, charge reading and vertical transfer are performed in units of horizontal lines. In FIG. 5, 21a is a charge read pulse applied to V3A, 21b is a charge read pulse applied to V1A, 22a is a charge of the RG line selected and read, and 22b is also selected. This is the charge of the GB line read out.
[0059]
First, as an initial state, each of the vertical transfer path gate signals and the potential state is applied from the state shown in FIG. 5A to the charge reading pulse 21a to V3A as shown in FIG. 5B. Then, as shown in FIG. 5C, the charges 22a of the lines including the R pixels every 10 lines are read out to the vertical transfer path. Next, a predetermined voltage is applied to V1A to V4, and the read charges 22a are vertically transferred by 1/2 stage as shown in FIGS. 5D to 5E. Further, as shown in F of FIG. A charge read pulse is applied. Then, as indicated by G in FIG. 5, the charges 22b of the lines including the G pixels are read out to the vertical transfer path in the same manner as G5, G15..., B5, B15. In this state, the charges 22a and 22b are present only in two of the five stages of the charge holding section of the vertical transfer path, and the rest are empty. Therefore, after this, after the three-stage transfer of the vertical transfer path, the horizontal transfer, after the completion of the horizontal transfer, after the 2-stage transfer of the vertical transfer path, the charges are sequentially transferred on the vertical transfer path to the horizontal transfer path by repeating the horizontal transfer. Go. As schematically shown in FIG. 12, in this motion picture mode operation, the frame rate is 5 times the speed of the still picture mode, but the lines are greatly thinned out. The spatial frequency reproducibility in the vertical direction of the image is significantly deteriorated.
[0060]
Next, the moving image mode which is the all-pixel readout mode in which five lines of the same color are added according to the present embodiment will be described with reference to FIGS.
[0061]
6 and FIG. 7, the state of charge reading and vertical transfer in the leftmost column in FIG. 2 is described. In the following description, the same applies to all other columns including adjacent columns. It is assumed that operation has occurred. That is, addition, charge readout, and vertical transfer are performed in units of horizontal lines. Further, the voltage waveforms of the vertical transfer path gate signals denoted by V1A to V4 shown in FIG. 6 are the same as the voltage waveforms of the vertical transfer path gate signals denoted by V1A to V4 shown in FIG. . On the other hand, FIG. 6 shows the first half portion and FIG. 7 shows the second half portion of the waveform indicating the potential state of the vertical transfer path with A to T shown in the direction orthogonal to the voltage waveform.
[0062]
First, as an initial state, each vertical transfer path gate signal and potential state are changed from the state shown in A of FIG. 6 to V3A and V3B, respectively, as shown in FIG. 31b is applied, and only the charges 33 of the even lines are all read out to the vertical transfer path. Next, as shown in FIGS. 6C to 6H, the application of the V3B charge read pulse 31b is stopped, but vertical transfer is performed in the positive direction for four stages while the charge read pulse 31a is added to V3A. Then, even if vertical transfer is performed, since the potential well is deeper at the electrode portion of V3A every 10 lines, that is, every 5th stage, the read charge (pixel charge) of the even lines is the charge under V3A. In the holding unit, charges corresponding to five pixels of the same color of R pixels are mixed, that is, added. Then, with the application of the charge readout pulse 31a of V3A stopped, as shown in I of FIG. 6 and I of FIG. 7, as the first added charge in which charges for 5 pixels are added per stage. The five-pixel mixed charge 34 is held.
[0063]
Then, a predetermined voltage is applied to V1A to V4 from the states shown in I of FIG. 6 and I of FIG. 7, and as shown in J to L of FIG. .Vertical transfer for 5 stages, and temporarily save the mixed charge of 5 pixels on the even line under the V1A electrode. From this state, as shown by M in FIG. 7, a charge read pulse 32b is applied to V1B, and 4/5 of the charge on the odd lines is read. Next, as shown at N in FIG. 7, after the application of the V1B charge readout pulse 32b is stopped, a predetermined voltage is applied to V1A to V4, and as shown at O to R in FIG. The 5-pixel mixed charge 34 and the odd-numbered 4/5 charge are vertically transferred by one stage toward the horizontal transfer path.
[0064]
Next, as shown in S of FIG. 7, a charge read pulse 32a is applied to V1A, and the charge of the remaining 1/5 line of the odd lines is read to the vertical transfer path. Next, as shown at T in FIG. 7, after the application of the V1A charge readout pulse 32a is stopped, two adjacent pixels of the odd lines are mixed under the V1A electrode shown at T in FIG. The charge holding portions of the remaining odd lines are in a state where charges for one pixel are read and held. In this state, the charge of all the pixels is partially added to the vertical transfer path and read out in the form of repetition of 5R, 2G, G, G, G, 5R, 2G, G, G, G,. Become.
[0065]
Further, the subsequent vertical transfer and horizontal transfer are performed as shown in FIGS. That is, FIG. 8A shows the state of the vertical transfer path indicated by T in FIG. 8 to 10, reference numeral 41 denotes a vertical transfer path, and reference numeral 42 denotes a horizontal transfer path. In the stage of FIG. 8A, the horizontal transfer path 42 has already been supplied with the even-line five-pixel mixed charges (R0 + R2 + R4 + R6 + R8) 34 in the stage of the above read operation. Existing. Therefore, as shown in FIG. 8B, the 5-pixel mixed charge (R0 + R2 + R4 + R6 + R8) 34 is read out by horizontal transfer, and then the horizontal transfer is performed as shown in FIG. 8C. Vertical transfer is performed while stopping, and addition of odd lines, that is, pixel mixing is performed on the horizontal transfer path. Further, in the state shown in FIG. 8C, the charges (G1 + G3) on the horizontal transfer path are insufficient because of the edge of the screen, resulting in an incomplete number of mixed pixels. Therefore, as shown in FIG. 9 (D), this charge (G1 + G3) is horizontally transferred and output, and then, as shown in FIG. 9 (E), vertical transfer is performed for one stage to add 5 pixels. The even-line five-pixel mixed charge (R10 + R12 + R14 + R16 + R18) 34 is transferred to the horizontal transfer path.
[0066]
Then, as shown in FIG. 9F, this 5-pixel mixed charge (R10 + R12 + R14 + R16 + R18) 34 is output by horizontal transfer. Next, as shown in FIG. 10G, vertical transfer is performed for one stage, and the charge (G5 + G7) obtained by adding two pixels of the odd lines is transferred to the horizontal transfer path. Next, as shown in FIG. 10 (H to I), the vertical transfer is continued for three stages before the horizontal transfer is performed, the odd lines are added on the horizontal transfer path, and the second added charge is obtained. A 5-pixel mixed charge (G5 + G7 + G9 + G11 + G13) 44, which is a 5-pixel addition signal charge, is generated.
[0067]
After this charge is output by horizontal transfer, the operations of one-stage vertical transfer, horizontal transfer, four-stage vertical transfer, horizontal transfer,... Are repeated in the same manner as described above to read the image signal to the outside. As described above, after all the pixels are partially added to the vertical transfer path 41 and read out, the vertical transfer path 41 is repeatedly transferred in one stage and four stages, resulting in a 5 All pixel signals can be read out at double the frame rate.
[0068]
FIG. 13 schematically shows a combination of pixels that are finally added and read out in the all-pixel reading mode in which five lines of the same color are added. It should be noted that the original arrangement of charges should be G1-3 → R0-8 → G5-13 → R10-18 → G15-23 → R20-28... Then, an addition signal, which is a mixed charge of 5 pixels, is output in the order of R0 to 8 → G1 to 3 → R10 to 18 → G5 to 13 → R20 to 28 → G15 to 23, and so on. The relationship is reversed. Such a phenomenon is caused by, for example, a line buffer as a processing device that can record image data for one line by a component outside the CCD 2 that manages image processing and the like arranged in the subsequent stage of the CCD 2 shown in this embodiment. Can be compensated for by temporarily holding the previously output line signal, passing the next line signal first, and switching the signals of the even and odd lines.
[0069]
In addition, in this way, when charges (pixel charges) are mixed and read out, the charge transfer capacity of the vertical transfer path or the horizontal transfer path may be a problem. That is, the transfer capacity of each transfer path needs to be five times the saturation accumulated charge amount of the photodiode 11. As a countermeasure, it is conceivable to use a CCD manufactured by designing the charge transfer capacity of the vertical transfer path and the horizontal transfer path as a capacity corresponding to the amount of pixels mixed. However, pixel mixing can be easily handled by limiting the saturation accumulated charge amount of the photodiode by setting the CCD substrate bias voltage to a correspondingly high voltage.
[0070]
Further, in this embodiment, the primary color Bayer array has been described as an example. However, the present invention is not limited to this, and any filter array may be used as long as two vertical line color filters are included. Is possible. That is, the present invention can be applied to almost all existing filter arrays other than the filter array shown in the fourth embodiment.
[0071]
Thus, according to the present embodiment, interlaced CCDs achieve high frame rate, same color addition, all-pixel readout by changing the charge readout method with the current configuration in most color filter arrays. it can. As a result, the image quality of moving images can be significantly improved without increasing the cost or while suppressing the increase in cost. Can be greatly expanded. Further, as the number of pixels of the CCD increases, even if the number of lines added increases, the number of vertical transfer electrodes does not change, and an increase in cost can be suppressed.
[0072]
Further, in the present embodiment, in the vertical transfer path, it is only necessary to transfer charges in the positive direction which is the horizontal transfer path direction, and there is no need to perform reverse transfer. It can cope and can improve versatility.
[0073]
Next, a second embodiment will be described with reference to FIGS. The internal configuration of the CCD 2 and the basic operation including driving of the CCD 2 according to the second embodiment are exactly the same as those of the first embodiment shown in FIGS. In this embodiment, the line replacement processing by the components external to the CCD 2 required in the first embodiment is performed by devising the driving method of the CCD 2 in the all-pixel readout driving by adding 5 lines of the same color. It can be made unnecessary.
[0074]
Hereinafter, the five-line addition all-pixel readout mode according to the second embodiment will be described with reference to FIGS. 15 and 16. 15 and 16 describe the state of charge readout and vertical transfer in the leftmost column in FIG. 2, but in the following description, the same applies to all other columns including adjacent columns. It is assumed that operation has occurred. That is, addition, charge readout, and vertical transfer are performed in units of horizontal lines. Further, the voltage waveform of each vertical transfer path gate signal denoted by V1A to V4 shown in FIG. 15 is the same as the voltage waveform of each vertical transfer path gate signal denoted by V1A to V4 shown in FIG. . On the other hand, FIG. 15 shows the first half portion and FIG. 16 shows the second half portion of the waveform showing the potential state of the vertical transfer path with A to S shown in the direction orthogonal to the voltage waveform.
[0075]
First, as an initial state, each vertical transfer path gate signal and potential state are applied from the state shown in FIG. 15A to the charge reading pulses 31a and 31b to V3A and V3B, respectively, as shown in FIG. Read all line charges to the vertical transfer path. Next, as shown in C to H of FIG. 15, the application of the V3B charge read pulse 31b is stopped, but the vertical transfer is performed in the positive direction for four stages while the charge read pulse 31a is added to V3A. Then, even if vertical transfer is performed, since the potential well is deeper at the electrode portion of V3A every 10 lines, that is, every 5th stage, the read charge (pixel charge) of the even lines is the charge under V3A. In the holding unit, charges corresponding to five pixels of the same color of R pixels are mixed, that is, added. Then, with the application of the charge readout pulse 31a of V3A stopped, as shown in I of FIG. 15 and I of FIG. 16, a 5-pixel mixed charge 34 in which charges for 5 pixels are added per stage is held. It will be in the state.
[0076]
Then, from the state shown in I of FIG. 15 and I of FIG. 16, a predetermined voltage is applied to V1A to V4, and as shown in J to K of FIG. In the reverse direction, vertical transfer is performed for 2.5 stages, that is, reverse transfer is performed, so that the even-line five-pixel mixed charge 34 is temporarily saved under the V1A electrode. From this state, as shown in L of FIG. 16, a charge read pulse 32b is applied to V1B to read out 4/5 of the charge on the odd lines. Next, as shown at M in FIG. 16, after the application of the V1B charge readout pulse 32b is stopped, a predetermined voltage is applied to V1A to V4, and as shown at N to O in FIG. The 5-pixel mixed charge 34 and the odd-numbered 4/5 charge are vertically transferred by one stage in the positive direction, that is, toward the horizontal transfer path.
[0077]
Next, as indicated by P in FIG. 16, a charge read pulse 32a is applied to V1A, and the charge of the remaining 1/5 line of the odd lines is read to the vertical transfer path. Then, under the electrode of V1A shown in P of FIG. 16, two adjacent pixels of the odd lines are mixed, and the charge of one pixel is read and held in the charge holding section of the remaining odd lines. It becomes a state. From this state, as shown in FIGS. 16 to 16, each charge is vertically transferred by three stages in the positive direction while the charge read pulse 32a is applied to V1A. Then, as shown by R in FIG. 16, in the charge holding portion under the electrode of V1A, the charges for 5 pixels of the same color as the G pixel are added, and a 5-pixel mixed charge 44 is generated. Then, after the application of the V1A charge readout pulse 32a is stopped, as shown in S of FIG. 16, a 5-pixel mixed charge in which the charges of the even-numbered line and the odd-numbered line are added by 5 pixels of the same color per stage. 34 and 44 are held.
[0078]
Further, the subsequent vertical transfer and horizontal transfer are performed as shown in FIGS. That is, FIG. 17A shows the state of the vertical transfer path indicated by S in FIG. Further, reference numeral 41 in FIGS. 17 to 19 denotes a vertical transfer path, and 42 denotes a horizontal transfer path. In the steps shown in FIGS. 15 and 16, a plurality of lines are added together in the vertical transfer path 41, but all the effective pixels are added in an end portion, for example, the lowermost line 43 on the horizontal transfer path 42 side. Cannot be matched, incomplete pixel mixing situation has occurred. Therefore, first, incomplete mixed pixels on the line 43 are read out to the outside by vertical transfer and horizontal transfer. Thereafter, as shown in FIG. 17B, the first effective 5-pixel mixed line is transferred to the horizontal transfer path. Since there are three stages of empty charge holding portions above the five-pixel mixing line, horizontal transfer is not immediately performed here, and FIGS. 17C, 18D, and 18E are performed. As shown in FIG. 4, vertical transfer is performed for three stages. That is, if the portion of the first effective line transferred to the horizontal transfer path is included, four stages of vertical transfer are performed before the horizontal transfer. Thereafter, as shown in FIG. 18 (F), horizontal transfer is performed to read out the first effective 5-pixel mixed line, and next, as shown in FIG. 19 (G), vertical transfer is performed for one stage, The next effective 5-pixel mixed line is transferred to the horizontal transfer path. In this time, as shown in FIG. 19 (H), since an effective line exists immediately above, horizontal transfer is performed immediately, and vertical transfer is performed for one stage as shown in FIG. 19 (I).
[0079]
Thereafter, the operations of 4-stage vertical transfer, horizontal transfer, 1-stage vertical transfer, horizontal transfer,... Are repeated to read the image signal to the outside. As described above, after all pixels are read out and added together in the vertical transfer path, the vertical transfer path is transferred in the forward direction by repeating four stages and one stage. All pixel signals can be read out at double the frame rate.
[0080]
FIG. 14 schematically shows a combination of pixels that are finally added and read out in the all-pixel reading mode in which five lines of the same color are added. As described above, in this embodiment, by performing the reverse transfer operation, which is the reversal of the vertical transfer direction in the charge reading process, the line reading order can be corrected, and the line replacement by an external component or the like can be performed. There is no need for processing, and the cost can be easily reduced.
[0081]
In the second embodiment, not only the even lines but also the odd lines complete the line addition operation on the vertical transfer path. However, as in the first embodiment, the odd line addition operation is performed as follows. A combination of addition on the vertical transfer path and addition on the horizontal transfer path can also be realized.
[0082]
Also in the first embodiment, the addition operation of odd lines can be completed on the vertical transfer path as in the second embodiment. That is, in each embodiment described in the present application, the addition operation of the odd lines may be completed on the vertical transfer path, and is realized by combining the addition on the vertical transfer path and the addition on the horizontal transfer path. be able to.
[0083]
Next, the configuration using the progressive scan type CCD (progressive CCD) corresponding to thinning, which is the third and fourth embodiments shown in FIGS.
[0084]
In this progressive CCD, in the case of a three-phase vertical transfer structure, the number of charge readout electrodes is two systems, V2A and V2B, and the vertical transfer electrodes are V1, V2A, V2B, and V3 in total for four systems. In order to realize this configuration, there are four charge readout electrodes, V2A, V2B, V2C, and V2D, and the vertical transfer electrode needs to be increased to a total of six systems by adding V1 and V3 to these charge readout electrodes. Any number of line additions will not increase the number of systems.
[0085]
In the case of a four-phase vertical transfer structure, the number of charge readout electrodes is 2 lines, V2A and V2B, and the total number of vertical transfer electrodes is 5 lines, V1, V2A, V2B, V3, and V4. In order to realize this configuration, there are four charge readout electrodes V1, V2A, V2B, and V3, and the vertical transfer electrodes need to be increased to a total of seven systems including V1, V3, and V4 added to these charge readout electrodes. Any number of line additions will not increase the number of systems.
[0086]
That is, in the case of the progressive CCD, four charge readout electrodes V2A, V2B, V2C, and V2D are provided. A combination of color filters in a certain column becomes RGRG..., R is on the even-numbered and G-numbered horizontal lines, the charge readout electrode V2A is an R pixel having a line number that is a multiple of 10, and V2B is the remaining R pixel, that is, the remaining even-numbered horizontal line charge readout electrode, V2C is an odd line number G pixel that is a multiple of 5, and V2D is the remaining G pixel, ie, the remaining even-numbered horizontal line charge readout electrode. And
[0087]
First, a charge read voltage is applied to V2A and V2B to read all the charges of R pixels, that is, even lines, to the vertical transfer path. Thereafter, the voltage of V2B is restored, but vertical transfer is performed for eight stages while the charge read voltage is applied to V2A. Then, since the potential well remains deep under the V2A electrode that exists every 10 lines, the signal charges for the five R pixels adjacent in the upward direction of V2A are added together in the same color, and the first added charge is added. R 5-pixel added charge (5R) is generated.
[0088]
After this, the 5-pixel added charge of R, that is, the 5-pixel added charge of the even line is transferred in the opposite direction to the 4-stage horizontal transfer path and then saved, and this time, the charge read voltage is applied to V2C and V2D. All the charges of the G pixels, that is, the odd lines are read out to the vertical transfer path. As in the case of the even lines, the voltage of V2D is restored, but vertical transfer is performed for eight stages while the charge read voltage is applied to V2C. Then, the signal charges for the five G pixels adjacent in the upward direction under the electrode of V2C are added together with the same color, and a G five-pixel added charge (5G) as a second added charge is generated.
[0089]
As a result, all pixels are read in the vertical transfer path from the bottom in the order of 5G, 5R, sky, sky, sky, sky, sky, sky, sky, sky, 5G, 5R, sky, sky, etc. The released state is created. After that, if the pixel signal is read out to the outside of the CCD by repeating 1-stage vertical transfer, horizontal transfer, 9-stage vertical transfer, horizontal transfer, etc., the same color addition all-pixel readout is realized at a frame rate of 5 times. it can.
[0090]
Next, a third embodiment of the present invention will be described with reference to FIGS. The configuration of the third embodiment is the same as that of the first embodiment, and the configuration diagram is the same as that of FIG. 1, but this embodiment has a CCD 2 as shown in FIG. The present invention is applied to a so-called color Bayer array thinning-out interline type progressive scan CCD.
[0091]
That is, in the third embodiment, the CCD 2 is a color Bayer array interline type progressive scan CCD. This CCD 2 features both still images and moving images, and has a significantly larger number of pixels than a dedicated CCD for moving images. Therefore, all pixels are read out in order when shooting still images. The same color is added and read out, and a device is devised to maintain a high frame rate for moving images even with a large number of pixels.
[0092]
The CCD 2 is driven by a CCD drive circuit 3 and outputs an image signal 5. The drive signal 4 given to the CCD 2 by the CCD drive circuit 3 includes vertical transfer path gate signals V1, V2A, V2B, V2C, V2D, and V3, which will be described later. Further, a drive mode switching signal 6 is input to the CCD drive circuit 3, and the CCD drive circuit 3 switches the drive operation mode of the CCD 2 by the drive mode switch signal 6.
[0093]
Further, as shown in FIG. 20, the CCD 2 has a photodiode 11 as a photoelectric conversion means, a vertical transfer path 12 as a first CCD connected to the photodiode 11, and the vertical transfer path 12. And a vertical transfer path gate signal line 13 connected to each other. In the figure, an arrow 14 indicates a positive direction which is a vertical transfer direction to a horizontal transfer path direction which is a second CCD (not shown).
[0094]
Each of the photodiodes 11 constitutes a pixel and is two-dimensionally arranged in a predetermined pattern. In the present embodiment, a combination of color filters in a predetermined column is arranged in a Bayer method that is a primary color Bayer array, that is, a primary color method. Is RGRG ..., R is on the even-numbered horizontal line, and G is on the odd-numbered horizontal line. The combination of the color filters in the column adjacent to this column is GBGB ..., G is the even-numbered, and B is the odd-numbered horizontal line. It is in.
[0095]
The charge accumulated in the photodiode 11 is read out to the vertical transfer path 12 side by applying a charge read pulse as a positive charge read voltage to the gate electrode of the adjacent vertical transfer path 12. As shown in FIG. 20, there are four systems of V2A, V2B, V2C, and V2D as shown in FIG. In addition to the vertical transfer dedicated gate electrodes V1 and V3 which are not accompanied by an operation, there are a total of six vertical transfer path gate electrodes, which are connected to the vertical transfer path gate signal wirings 13, respectively.
[0096]
Note that the CCD 2 of the present embodiment only shows a five-line addition configuration as an example. Actually, how many lines the electrodes corresponding to V2A and V2C are arranged in consideration of the color filter. It is also possible to realize CCDs with various line addition numbers. In this embodiment, no matter how the line addition number increases, the number of vertical transfer path gate electrodes does not increase, and the cost can be suppressed.
[0097]
Next, the actual signal reading operation will be described from the still image mode.
[0098]
First, all the photodiodes 11 start to accumulate charges simultaneously with exposure via the optical system, because unnecessary charges are swept away to the substrate portion of the CCD by the electronic shutter operation. Then, when the exposure is completed after a predetermined exposure time has elapsed, the charges of all the photodiodes 11 are read out to the vertical transfer path 12.
[0099]
Next, with reference to FIG. 21, the state of charge reading and vertical transfer will be described. FIG. 21 illustrates the state of charge reading and vertical transfer in the leftmost column in FIG. 20, but in the following description, the same operation occurs in all other columns including adjacent columns. Shall. That is, charge reading and vertical transfer are performed in units of horizontal lines. In FIG. 21, the waveforms with V1 to V3 indicate the voltage waveform of each vertical transfer path gate signal, and the waveforms with A to I in the direction orthogonal to the voltage waveform indicate the potential of the vertical transfer path. Is shown. In the figure, 51a, 51b, 51c, 51d are charge read pulses, and 52 is the read charge. First, as an initial state, the vertical transfer path gate signal and the potential state are changed from the state shown in FIG. 21A to the V2A, V2B, V2C, and V2D, as shown in FIG. Add 51c and 51d. Then, as shown in FIG. 21C, all charges 52 are read out to the vertical transfer path. Next, a predetermined voltage is applied to V1A to V4, and as shown in FIGS. 21D to I, the read charges 52 are vertically transferred by one stage, and the charges on the lowermost line are transferred to a horizontal transfer path (not shown). . Thereafter, all charges on one line are read out by horizontal transfer. Next, one-stage vertical transfer and horizontal transfer are repeated, and all the charges on the horizontal lines are read out one by one in order from the top, and output to the outside of the CCD 2 to complete the readout of the still image mode. In other words, the still image mode is a mode in which all pixels are individually read in order from the top in one frame, and since the number of pixels in one frame is very large, the frame rate is very slow and not suitable for moving images. Since all the pixels of the multi-pixel CCD are independently read out, an extremely high-definition image that is satisfactory as a still image can be obtained.
[0100]
Next, the five-line addition all-pixel readout mode according to the present embodiment will be described with reference to FIGS. 22 and 23. FIG.
[0101]
22 and 23, the state of charge readout and vertical transfer in the leftmost column in FIG. 20 is described. In the following description, the same applies to all other columns including adjacent columns. It is assumed that operation has occurred. That is, addition, charge readout, and vertical transfer are performed in units of horizontal lines. Further, the voltage waveform of each vertical transfer path gate signal denoted by V1 to V3 shown in FIG. 22 is the same as the voltage waveform of each vertical transfer path gate signal denoted by V1 to V3 shown in FIG. . On the other hand, FIG. 22 shows the first half portion and FIG. 23 shows the second half portion of the waveform showing the potential state of the vertical transfer path with A to Y shown in the direction orthogonal to the voltage waveform.
[0102]
First, as an initial state, the respective vertical transfer path gate signals and potential states are supplied from the state shown in FIG. 22A to V2A and V2B, respectively, as shown in FIG. Read only the charge 52 on the line into the vertical transfer path. Next, as shown in C to K of FIG. 22, the application of the V2B charge read pulse 51b is stopped, but vertical transfer is performed in the positive direction for eight stages while the charge read pulse 51a is added to V2A. Then, even if vertical transfer is performed, since the potential well is deep at the electrode portion of V2A every ten stages, the read charge (pixel charge) of the even line is R in the charge holding portion under V2A. Charges of 5 pixels of the same color are mixed or added. Then, with the application of the V2A charge readout pulse 51a stopped, as shown in L of FIG. 22 and L of FIG. 23, a 5-pixel mixed charge 54 in which charges for 5 pixels are added per stage is held. It will be in the state.
[0103]
Then, from the state shown in L of FIG. 23, a predetermined voltage is applied to V1 to V3, and as shown in MR of FIG. 23, the five-pixel mixed charge 54 is arranged in four stages in the direction opposite to the horizontal transfer path direction. Vertical transfer, that is, reverse transfer is performed, and the mixed charge 54 of 5 pixels is temporarily saved under the V2B electrode. From this state, as shown in S of FIG. 23, charge read pulses 51c and 51d are applied to V2C and V2D, and the charges on the odd lines are read out to the vertical transfer path. Next, as shown at T to X in FIG. 23, while applying the V2C charge read pulse 51c and applying the V2D charge read pulse 51d, a predetermined voltage is applied to V1 to V3 to Each charge 52 on the transfer path is vertically transferred by eight stages in the positive direction toward the horizontal transfer path. Then, even if vertical transfer is performed, since the potential well is deep at the electrode portion of V2C every ten stages, the read charges on the odd lines are the same color of the G pixel in the charge holding portion under V2C. Charges for five pixels are mixed or added. Then, with the application of the V2C charge readout pulse 51c stopped, as shown in Y of FIG. 23, a 5-pixel mixed charge 55 in which charges for 5 pixels are added per stage is held. . In the state indicated by Y in FIG. 23, as shown in FIG. 24A, the five pixels of the even line that have been read and mixed immediately above the five-pixel mixed charge 55 of the odd line. Mixed charge 54 is present. Therefore, as shown in FIGS. 24B and 24C, after the first five-pixel mixed charge 55 is read and output to the horizontal transfer path, as shown in FIGS. 25D to 26I, By repeating 1-stage vertical transfer, horizontal transfer, 9-stage vertical transfer, horizontal transfer,..., 5-pixel mixed charges 54 and 55 of the same color can be read.
[0104]
In this embodiment, the primary color Bayer array has been described as an example. However, the present invention is not limited to this, and any filter array may be used as long as the number of color filters in one vertical line is two or less. Is possible. That is, the present invention can be applied to almost all existing filter arrays other than the filter array shown in the fourth embodiment.
[0105]
That is, in the progressive CCD as in this embodiment, the same effects as described above can be obtained with any color filter array by using four readout electrodes. In this configuration, the number of vertical transfer electrodes is increased by two lines compared to the normal configuration, but the number of vertical transfer electrodes is more than this even if the number of added lines increases as the number of CCD pixels increases. The increase in cost can be suppressed without increasing.
[0106]
Further, in this embodiment, after the even-line five-pixel mixed charge is generated on the vertical transfer path, the reverse transfer is performed on the vertical transfer path by the method shown in the second embodiment, that is, the inside of the CCD 2. The output line order is compensated for even and odd inversions. However, as in the fourth embodiment, as in the first embodiment, all pixel mixing is performed only in the vertical transfer in the positive direction. The line order can also be compensated by a component outside the CCD that implements image processing and the like. Further, in this embodiment as well, as in the second embodiment, pixel mixing on the odd line side can be performed on the horizontal transfer path.
[0107]
Next, a fourth embodiment of the present invention will be described with reference to FIGS.
[0108]
The basic configuration including the internal configuration of the CCD 2 and the driving of the CCD 2 in the fourth embodiment is the same as that in the third embodiment shown in FIG. 20, and the description of the operation in the still image mode is omitted. In this embodiment, in the vertical transfer path, the charge only needs to be transferred in the positive direction, which is the horizontal transfer path direction, and there is no need to perform reverse transfer. In addition to being able to cope with it, it is possible to improve versatility, and by incorporating addition in the horizontal transfer path, the time required for the read operation can be slightly shortened compared to the third embodiment.
[0109]
Next, the moving image mode according to the present embodiment, that is, the same color 5-line addition all-pixel readout mode will be described with reference to FIGS. 27 and 28. FIG.
[0110]
27 and 28, the state of charge readout and vertical transfer in the leftmost column in FIG. 20 is described. In the following description, the same applies to all other columns including adjacent columns. It is assumed that operation has occurred. That is, addition, charge readout, and vertical transfer are performed in units of horizontal lines. Also, the voltage waveforms of the vertical transfer path gate signals denoted by V1 to V3 shown in FIG. 27 and the voltage waveforms of the vertical transfer path gate signals denoted by V1 to V3 shown in FIG. 28 are the same. . On the other hand, in the waveform showing the potential state of the vertical transfer path with A to U shown in the direction orthogonal to the voltage waveform, FIG. 27 shows the first half and FIG. 28 shows the second half.
[0111]
First, as an initial state, each vertical transfer path gate signal and potential state are supplied from the state shown in FIG. 27A to V2A and V2B, respectively, as shown in FIG. Read only the charge 52 on the line into the vertical transfer path. Next, as shown in C to K of FIG. 27, application of the V2B charge read pulse 51b is stopped, but vertical transfer is performed in the positive direction for eight stages while the charge read pulse 51a is added to V2A. Then, even if vertical transfer is performed, since the potential well is deep at the electrode portion of V2A every ten stages, the read charge (pixel charge) of the even line is R in the charge holding portion under V2A. Charges of 5 pixels of the same color are mixed or added. Then, with the application of the V2A charge readout pulse 51a stopped, as shown in L of FIG. 27 and L of FIG. 28, a 5-pixel mixed charge 54 in which charges for 5 pixels are added per stage is held. It will be in the state.
[0112]
Then, a predetermined voltage is applied to V1 to V3 from the state shown in L of FIG. 28, and as shown in MR of FIG. 28, the five-pixel mixed charge 54 has six stages in the horizontal transfer path direction, that is, the positive direction. The vertical transfer is performed, and the 5-pixel mixed charge 54 is temporarily saved under the V2B electrode. From this state, as shown in S of FIG. 28, charge read pulses 51c and 51d are given to V2C and V2D, and the charges on the odd lines are read out to the vertical transfer path. Next, as shown at T in FIG. 28, application of these V2C and V2D charge readout pulses 51c and 51d is stopped. In this state, as shown in U of FIG. 28, except for a part of the lowermost stage, a repetitive form of 5R, G, G, G, G, G, 5R, G, G, G, G, G,. Thus, the charge of all the pixels is read out to the vertical transfer path.
[0113]
Further, the subsequent vertical transfer and horizontal transfer are performed as shown in FIGS. That is, FIG. 29A shows the state of the vertical transfer path indicated by U in FIG. 29 and 30, 61 indicates a vertical transfer path, and 62 indicates a horizontal transfer path. In the stage of FIG. 29A, the horizontal transfer path 62 has already been supplied with the even-line five-pixel mixed charge (R0 + R2 + R4 + R6 + R8) 63, as a result of the reading operation. Existing. Therefore, as shown in FIG. 29 (B), after this 5-pixel mixed charge (R0 + R2 + R4 + R6 + R8) 63 is read out by horizontal transfer, horizontal transfer is performed as shown in FIG. 29 (C). Vertical transfer is performed while stopping, and addition of odd lines, that is, pixel mixing is performed on the horizontal transfer path. In the state shown in FIG. 29C, the charges (G1 + G3) on the horizontal transfer path are insufficient because of the edge of the screen, resulting in an incomplete number of mixed pixels. Therefore, as shown in FIG. 30 (D), this charge (G1 + G3) is horizontally transferred and output, and then, as shown in FIG. 30 (E), vertical transfer is performed for one stage to add 5 pixels. The even-line five-pixel mixed charge (R10 + R12 + R14 + R16 + R18) 63 is transferred to the horizontal transfer path.
[0114]
Then, as shown in FIG. 30F, this 5-pixel mixed charge (R10 + R12 + R14 + R16 + R18) 63 is output by horizontal transfer. Next, as shown in FIG. 31 (G), vertical transfer is performed for one stage, and the charge (G5) is transferred to the horizontal transfer path, and then horizontal transfer is performed as shown in FIG. 31 (H). In the meantime, the vertical transfer for 8 stages is continued, the odd lines are added on the horizontal transfer path, and the 5-pixel mixed charge (G5 + G7 + G9 +) which is the 5-pixel added signal charge as the second added charge. G11 + G13) 64 is generated.
[0115]
Then, as shown in FIG. 31 (I), after this charge is output by horizontal transfer, the operations of 1-stage vertical transfer, horizontal transfer, 9-stage vertical transfer, horizontal transfer,... Read image signal to outside. In this way, after all the pixels are partially added to the vertical transfer path 61 and read out, the vertical transfer path 61 is repeatedly transferred by 1 stage and 9 stages, and as a result, the still image 5 All pixel signals can be read out at double the frame rate.
[0116]
In the fourth embodiment as well, as in the first embodiment, with respect to the addition signal, which is a mixed charge of five pixels, the positional relationship between the even and odd lines is reversed. . Such a phenomenon is caused by, for example, a line buffer as a processing device that can record image data for one line by a component outside the CCD 2 that manages image processing and the like arranged in the subsequent stage of the CCD 2 shown in this embodiment. Can be compensated for by temporarily holding the previously output line signal, passing the next line signal first, and switching the signals of the even and odd lines.
[0117]
Next, the configuration using interlace complementary color line sequential, which is the fifth and sixth embodiments shown in FIGS. 32 to 38, will be outlined.
[0118]
That is, as in the fifth and sixth embodiments shown in FIGS. 32 to 38, for example, color difference lines sequentially using Ye (yellow), Mg (magenta), Cy (cyan), and G (green) filters. It can also be applied to multi-pixel interline CCDs with color filter arrangements that are based on specific intentional color mixing (filter pair formation), video still images, and thinning-out compatible multi-pixel CCDs, such as the system (complementary color system). it can. In this multi-pixel interline CCD, after one filter pair is formed on the vertical transfer path first, vertical transfer is performed while a charge read voltage is applied to a specific charge read electrode, so that a plurality of line pairs of the same color filter pair can be obtained. Next, the color filter pair of the remaining lines is read out to the vertical transfer path while avoiding color mixing with the previous filter pair, and the charge read voltage is applied to the specific charge read electrode again. By performing vertical transfer, line addition of a plurality of same color filter pairs is performed, and as a result, all pixels are read out by line addition of the same color multiple filter pairs, which hinders subsequent image processing intended in advance. Therefore, it is possible to realize a significant improvement in moving image quality, such as an improvement in frame rate, vertical spatial frequency reproducibility, and sensitivity.
[0119]
That is, the above operation is applied to a color single plate with a color filter array that can easily generate luminance and color difference signals by line mixing, a moving image still image, and a multi-pixel interline / interlace scan CCD that supports thinning, and the subsequent image is applied. All pixel readout can be realized by adding a plurality of same color filter pairs without affecting the processing.
[0120]
Next, a fifth embodiment of the present invention will be described with reference to FIGS. The configuration of the fifth embodiment is the same as that of the first embodiment, and the configuration diagram is the same as that of FIG. 1, but in this embodiment, as shown in FIG. As described above, the present invention is applied to a so-called color difference line sequential method (complementary color method) thinning-compatible interline type interlaced scan CCD.
[0121]
That is, in the fifth embodiment, the CCD is a color interline type interlace scan CCD. This CCD 2 features both still images and moving images, and has a significantly larger number of pixels than a dedicated CCD for moving images. Therefore, when taking a still image, all the pixels are read individually by using a mechanical shutter. By performing pixel mixing at the time of shooting, all pixels can be read out at a frame rate four times that of a still image. In addition, this color filter array can facilitate subsequent image processing by intentionally mixing different colors of filter pixels during moving images. That is, four types of filter pair signals of Ye + Mg, Ye + G, Cy + G, and Cy + Mg can be extracted by adding up and down adjacent pixels. And
(Ye + Mg) + (Cy + G) = 2R + 3G + 2B≈luminance signal Y1
(Ye + G) + (Cy + Mg) = 2R + 3G + 2B≈luminance signal Y2
(Cy + G) − (Ye + Mg) = G−2R ≒ color difference signal Cr
(Ye + G) − (Cy + Mg) = G−2B≈color difference signal Cb
As described above, by adding or subtracting the filter pair signals, approximate signals of the luminance signal and the color difference signal can be generated very easily. For this reason, such a color filter array is generally widely used as a color CCD filter array for movies.
[0122]
As shown in FIG. 32, the CCD has a photodiode 11 as a photoelectric conversion means, a vertical transfer path 12 as a first CCD connected to the photodiode 11, and the vertical transfer path 12. And a vertical transfer path gate signal line 13 connected to each other. In the figure, an arrow 14 indicates a positive direction which is a vertical transfer direction to a horizontal transfer path direction which is a second CCD (not shown).
[0123]
Each of the photodiodes 11 constitutes a pixel and is two-dimensionally arranged in a predetermined pattern.In this embodiment, the color filters are arranged in a color difference line sequential method (complementary color method) as described above. The color filter combinations in the column are Ye, Mg, Ye, G,..., And Mg and G are positioned on the even-numbered horizontal lines. The combination of the color filters in the column adjacent to the column is Cy, Mg, Cy, G..., And Mg and G are positioned on the even-numbered horizontal line.
[0124]
The charge accumulated in the photodiode 11 is read out to the vertical transfer path 12 side by applying a charge read pulse as a positive charge read voltage to the gate electrode of the adjacent vertical transfer path 12. As shown in FIG. 32, there are six systems of V1A, V1B, V1C, V3A, V3B, V3C, and these six systems of combinations of vertical transfer path gate electrodes that accompany such charge readout operation of the CCD. In addition, there are a total of eight vertical transfer path gate electrodes, which are connected to the vertical transfer path gate signal wiring 13, by adding the vertical transfer dedicated gate electrodes V 2 and V 4 not accompanied by the charge reading operation.
[0125]
The CCD of the above embodiment shows the case of 4-line addition (addition of two sets of the same color filter pair) as an example, but in actuality, the electrodes corresponding to V1A and V3A should be selected in consideration of the color filter. Depending on whether it is arranged for each line, it is possible to realize CCDs with various line addition numbers. Furthermore, no matter how the line addition number increases, the number of vertical transfer gate electrodes does not increase.
[0126]
In this embodiment, as in the first embodiment, in the signal readout operation, when shooting a still image (still image mode), one screen is divided into two fields of even lines and odd lines. Read all pixels independently. On the other hand, at the time of moving image shooting (moving image mode), the above filter pairs are added together while avoiding color mixing with other filter pairs, and all pixel signals are read at a high frame rate of 4 times.
[0127]
Note that the operation at the time of still image shooting is to read out all pixels independently as in the above-described embodiments, and a description thereof will be omitted.
[0128]
A mode of reading out all pixels by adding two pairs of the same color filter, such as during moving image shooting, will be described below with reference to FIGS. 33 to 35. That is, in FIG. 33 and FIG. 34, the state of charge reading and vertical transfer in the leftmost column of FIG. 32 is described. In the following description, the same applies to all other columns including adjacent columns. It is assumed that operation has occurred. That is, charge reading and vertical transfer are performed in units of horizontal lines. Also, the voltage waveform of each vertical transfer path gate signal denoted by V1A to V4 shown in FIG. 33 is the same as the voltage waveform of each vertical transfer path gate signal denoted by V1A to V4 shown in FIG. . On the other hand, in the waveform showing the potential state of the vertical transfer path with A to U shown in the direction orthogonal to the voltage waveform, FIG. 33 shows the first half part and FIG. 34 shows the second half part.
[0129]
First, as an initial state, each vertical transfer path gate signal and potential state is changed from the state shown in FIG. 33A to the charge reading pulse 71 only to V3C as shown in FIG. 33B, and Mg (magenta) All the charges on the existing lines are read out to the vertical transfer path. Next, as shown in FIG. 33C, a predetermined voltage is applied to V1A to V4 in a state where the application of the V3C charge readout pulse is stopped, and as shown in FIGS. In the direction opposite to the direction, the vertical transfer of 1/2 stage is performed, that is, the reverse transfer is performed. Next, as shown in F of FIG. 33, a charge read pulse is applied to V1A and V1B. Then, the charges of Mg and Ye (yellow) are added to form a filter pair signal Mg + Ye. Next, as shown in FIG. 33G, after applying the charge read pulse of V1B while applying the charge read pulse to V1A, the reverse operation is further performed by two stages as shown in FIGS. Perform vertical transfer in the direction, that is, reverse transfer. Then, since the potential well is deep under the electrode of V1A existing every eight lines, two sets of the same color filter pair signals Mg + Ye are mixed in the charge holding unit under V1A. That is, in this charge holding unit, pixel signal charges for four pixels are added. Thereafter, as shown in K of FIG. 33 and K of FIG. 34, when the application of the V1A charge readout pulse is stopped, two sets of filter pair signals of the same color are added and held under the V1A electrode. become. Further, from this state, as shown in L of FIG. 34, a charge reading pulse is applied to V1C to read the charge of Ye on the upper side of G (green). Next, as shown by M to O in FIG. 34, the application of the V1C charge readout pulse is stopped, and the vertical transfer is performed by 1/2 stage in the horizontal transfer path direction, that is, in the positive direction, and then shown in P of FIG. In this manner, a charge readout pulse is applied to V3A and V3B. Then, the charges of G and Ye are added to form a filter pair signal G + Ye. Further, in this state, as shown in Q of FIG. 34, after applying the charge read pulse of V3B while applying the charge read pulse to V3A, as shown in RT of FIG. Vertical transfer is performed by two stages in the horizontal transfer path direction, that is, the positive direction. Then, since the potential well is deep under the electrode of V3A existing every eight lines, two sets of the same color filter pair signals G + Ye are mixed in the charge holding unit under V3A. That is, in this charge holding unit, pixel signal charges for four pixels are added. Thereafter, as shown in U of FIG. 34, when the application of the V3A charge readout pulse is stopped, two sets of filter pair signals of the same color are added and held under the electrode of V3A.
[0130]
Thereafter, as shown in FIG. 35, the charge (G0 + Ye1) + (G4 + Ye5) in the vertical transfer path is transferred to the horizontal transfer path and horizontally transferred. Thereafter, the charge (Mg2 + Ye3) + (Mg6 + Ye7) is read out to the horizontal transfer path by vertical transfer for three stages and transferred horizontally. Thereafter, similarly, the vertical transfer, horizontal transfer, vertical transfer for three stages, horizontal transfer,... Are repeated, and all pixel charge signals mixed at a frame rate four times that of the still image can be read out. .
[0131]
In this embodiment, pixel mixing is realized by performing reverse transfer on the vertical transfer path. However, in the sixth embodiment described below, reverse transfer is performed as in each of the above embodiments. Even if not accompanied by pixel mixing only in the forward transfer in the vertical transfer path, in this case mixing of the same color filter pair signals can be realized, that is, all pixel mixing is realized only in the positive direction vertical transfer, The line order can be compensated by a component outside the CCD that controls image processing and the like. Further, in this embodiment as well, as in the second embodiment, pixel mixing on the odd line side can be performed on the horizontal transfer path.
[0132]
Next, a sixth embodiment of the present invention will be described with reference to FIGS.
[0133]
The basic configuration including the internal configuration of the CCD 2 and the driving of the CCD 2 according to the sixth embodiment is the same as that of the fifth embodiment shown in FIG. 32, and the description of the operation in the still image mode is omitted. In this embodiment, in the vertical transfer path, the charge only needs to be transferred in the positive direction, which is the horizontal transfer path direction, and there is no need to perform reverse transfer. In addition to being able to cope with it, it is possible to improve versatility, and by incorporating the addition in the horizontal transfer path, the time required for the read operation can be slightly shortened compared to the fifth embodiment. Further, in the sixth embodiment, the combination of filter pair addition is changed with respect to the fifth embodiment.
[0134]
A mode of reading out all pixels by adding two pairs of the same color filter, such as during moving image shooting, will be described below with reference to FIGS. 36 to 38. That is, FIGS. 36 and 37 describe the state of charge readout and vertical transfer in the leftmost column in FIG. 32. In the following description, the same applies to all other columns including adjacent columns. It is assumed that operation has occurred. That is, charge reading and vertical transfer are performed in units of horizontal lines. Also, the voltage waveforms of the vertical transfer path gate signals denoted by V1A to V4 shown in FIG. 36 and the voltage waveforms of the vertical transfer path gate signals denoted by V1A to V4 shown in FIG. 37 are the same. . On the other hand, in the waveform indicating the potential state of the vertical transfer path indicated by AV in the direction orthogonal to the voltage waveform, FIG. 36 shows the first half part and FIG. 37 shows the second half part.
[0135]
First, as an initial state, each vertical transfer path gate signal and potential state is changed from the state shown in FIG. 36A to the charge reading pulse 81 only to V1C as shown in FIG. That is, the charge of Ye on the upper side of G is read out to the vertical transfer path. Next, as shown in FIG. 36C, a predetermined voltage is applied to V1A to V4 in a state where the application of the V1C charge readout pulse is stopped, and as shown in FIGS. The vertical transfer is performed by 1/2 stage in the direction. Next, as shown in E of FIG. 36, a charge read pulse is applied to V3A and V3B. Then, the charges of Ye and G are added to form a filter pair signal G + Ye. Next, as shown in FIG. 36F, after applying the charge read pulse of V3B while applying the charge read pulse to V3A, the vertical direction is further increased by two stages as shown in FIGS. Perform the transfer. Then, since the potential well is deep under the electrode of V3A existing every eight lines, two sets of the same color filter pair signals G + Ye are mixed in the charge holding unit under V3A. That is, in this charge holding unit, pixel signal charges for four pixels are added. Thereafter, as shown in J of FIG. 36 and J of FIG. 37, when the application of the charge readout pulse of V3A is stopped, two sets of filter pair signals of the same color are added and held under the electrode of V3A. become. Further, from this state, as shown by K to P in FIG. 37, 1.5 stages of vertical transfer is performed in the horizontal transfer path direction, that is, the positive direction, and the filter pair signal is temporarily saved under the V1C electrode. From this state, as shown by Q in FIG. 37, a charge read pulse is applied to V1A and V1B, and 1/2 of Ye, that is, the charge of Ye on the upper side of Mg is read to the vertical transfer path. Next, as shown by R in FIG. 37, the application of the V1A and V1B charge readout pulses is stopped. Next, as shown in ST of FIG. 37, vertical transfer is performed for 1/2 stage. Then, as shown in U of FIG. 37, a charge read pulse is applied to V3C. Then, the charge of Mg is added to Ye, and a filter pair signal Mg + Ye is formed. Next, as shown at V in FIG. 37, when the application of the V3C charge readout pulse is stopped, Mg + Ye is held under the V3C electrode.
[0136]
Thereafter, as shown in FIG. 38, the charge (G0 + Ye1) + (G4 + Ye5) already on the horizontal transfer path is horizontally transferred and output, and then the charge (Mg2 + Ye3) is shown. Are output in vertical transfer and horizontal transfer. Thereafter, the one-stage vertical transfer, horizontal transfer, three-stage vertical transfer, and horizontal transfer are repeated to read out all pixel charge signals mixed in a line at a frame rate four times that of a still image.
[0137]
In the sixth embodiment as well, as in the first embodiment, with respect to the addition signal that is a five-pixel mixed charge, the positional relationship between the even lines and the odd lines is reversed. . Such a phenomenon is caused by, for example, a line buffer as a processing device that can record image data for one line by a component outside the CCD 2 that manages image processing and the like arranged in the subsequent stage of the CCD 2 shown in this embodiment. Can be compensated for by temporarily holding the previously output line signal, passing the next line signal first, and switching the signals of the even and odd lines.
[0138]
In the fifth and sixth embodiments described above, the interlaced CCD has been described as an example. However, the correlation between the first and second embodiments and the third embodiment, and these embodiments. Obviously, the present invention can be easily applied to a progressive CCD. Incidentally, in the case of a progressive CCD, the vertical transfer path gate electrode (readout electrode) can be realized by four systems as in the third embodiment.
[0139]
As described above, in the case of a filter arrangement based on the premise of line mixing widely used in movie cameras and the like, six readout electrodes are required, but the effect is the same as in each of the above-described embodiments. This can be dealt with by the number of additions, and the number of vertical transfer electrodes does not change, thereby suppressing an increase in cost.
[0140]
In each of the above embodiments, the second addition using the horizontal transfer path is either a configuration in which the vertical transfer includes only the normal transfer or a configuration in which the vertical transfer includes not only the normal transfer but also the reverse transfer. Can also be combined.
[0141]
Further, even in a configuration in which the vertical transfer is only forward transfer, the addition can be completed using the vertical transfer path without using the addition using the horizontal transfer path. In the interlace complementary color line sequential CCD, the electrode wiring different from the configuration of the sixth embodiment is used for the configuration in which the addition is completed by the vertical transfer of the positive transfer.
[0142]
In each of the above embodiments, for example, the charges of five pixels are added to obtain an added charge. However, the present invention is not limited to this configuration. If the charges of two or more pixels that are not continuous in the vertical direction are added, Effects such as an improvement in frame rate and an improvement in image quality can be achieved.
[0143]
In the above embodiment, the charges of all the pixels are read out and used. However, some of the charges deviated from the effective pixels may not be read out, and the read out charges may not be used.
[0144]
【The invention's effect】
  According to the method for driving a solid-state imaging device according to claim 1, among the plurality of pixels arranged in a predetermined pattern, first, the charges of the plurality of pixels of the first color are read out to the first transfer path,Continue to apply the charge readout voltage to the charge readout electrode of a specific systemThe first pixel is obtained by transferring the charges of the other pixels that have been read and adding the transferred charges to the held charges and adding the charges of the pixels of the first color. An added charge can be generated. Next, transfer and selective charge reading are combined so as not to add to the first added charge, a plurality of charges of the second color pixel are read out to the first transfer path, and the first color pixel is read. Similar to the charge, it can be added in the first transfer path, or read from the first transfer path to the same position in the second transfer path and added to generate the second added charge. Then, by transferring and outputting the first and second added charges through the second transfer path, the pixels are thinned out and the frame rate can be improved as compared with the state where all the pixels are sequentially read out. Further, pixel thinning can be performed by reading all pixels and adding a plurality of charges of pixels of the same color, so that the image quality can be easily improved compared to a configuration in which pixels are selectively read out.Furthermore, the increase in the number of electrodes can be suppressed, the configuration can be simplified, and the cost can be suppressed.
[0145]
According to the method for driving a solid-state imaging device according to claim 2, in addition to the effect according to claim 1, the first addition charge and the second addition charge can be output in a desired order, and the process in the subsequent process is performed. Easy to do.
[0146]
According to the method for driving a solid-state imaging element according to the third aspect, in addition to the effect according to the first aspect, the operation of reading and adding charges to the first transfer path can be performed in a relatively short time.
[0147]
  According to the method for driving a solid-state image pickup device according to claim 4, in addition to the effect according to any one of claims 1 to 3, the first adding step applies a plurality of charge readout voltages to the plurality of charge readout electrodes to apply a plurality of charges. Read the charge of the pixel to the first transfer path, and then apply the charge read voltage to the specific charge read electrode,Apply a predetermined voltage to the charge readout electrode and the gate electrode for the vertical transfer path.This can be done by transferring the first transfer path.
[0148]
According to the method for driving a solid-state imaging device according to claim 5, in addition to the effect according to any one of claims 1 to 4, a state in which a high-definition image is output using each of all the pixels, and pixels are thinned out at high speed It can be used by easily switching the output mode.
[0149]
According to the solid-state image pickup device driving method of the sixth aspect, in addition to the effect of the fifth aspect, a high-definition still image signal can be output, and a high-speed frame rate can be realized and the image quality can be improved. The moving image signal can be output, and a configuration suitable for an imaging device that shoots by switching between a still image and a moving image is realized.
[0150]
  According to the imaging device of claim 7, among the plurality of pixels arranged in a predetermined pattern, first, the charges of the plurality of pixels of the first color are read out to the first transfer path,Continue to apply the charge readout voltage to the charge readout electrode of a specific systemThe first pixel is obtained by transferring the charges of the other pixels that have been read and adding the transferred charges to the held charges and adding the charges of the pixels of the first color. An added charge can be generated. Next, a plurality of charges of the second color pixel are read out to the first transfer path so as not to be added to the first added charge, and the first transfer path is read in the same manner as the charge of the charge of the first color pixel. Can be added or read from the first transfer path to the same position in the second transfer path and added to generate the second added charge. Then, by transferring and outputting the first and second added charges through the second transfer path, the pixels are thinned out and the frame rate can be improved as compared with the state where all the pixels are sequentially read out. Further, pixel thinning can be performed by reading all pixels and adding a plurality of charges of pixels of the same color, so that the image quality can be easily improved compared to a configuration in which pixels are selectively read out.Furthermore, the increase in the number of electrodes can be suppressed, the configuration can be simplified, and the cost can be suppressed.
[0151]
According to the imaging device of the eighth aspect, in addition to the effect of the seventh aspect, since the processing means for changing the order of the output signals is provided, the signals are added and output in the first transfer path and the second transfer path. The order of the first added charge and the second added charge is not necessarily aligned. For this reason, in each transfer path, it is only necessary to transfer charges in one direction, and there is no need to transfer in the reverse direction. Therefore, it is possible to cope with a CCD having poor transfer efficiency in the reverse direction, and the versatility can be improved. .
[Brief description of the drawings]
FIG. 1 is a configuration diagram showing a first embodiment of an imaging apparatus of the present invention.
FIG. 2 is a partial explanatory diagram showing an internal structure of a CCD of the image pickup apparatus.
FIG. 3 is an explanatory diagram showing a still image mode of the CCD driving method.
FIG. 4 is an explanatory diagram showing a still image mode of the CCD driving method.
FIG. 5 is an explanatory diagram showing a moving image mode of a driving method of a comparative example of the CCD.
FIG. 6 is an explanatory diagram showing a moving image mode of the CCD driving method.
FIG. 7 is an explanatory diagram showing a moving image mode of the CCD driving method.
FIG. 8 is an explanatory diagram showing a moving image mode of the CCD driving method.
FIG. 9 is an explanatory diagram following FIG. 8;
FIG. 10 is an explanatory diagram following FIG. 9;
FIG. 11 is an explanatory diagram showing an outline of a still image mode of the CCD.
12 is an explanatory view showing a moving image mode of a comparative example of the CCD. FIG.
FIG. 13 is an explanatory diagram showing an outline of line readout addition in the moving image mode of the CCD.
FIG. 14 is a schematic explanatory diagram of line readout addition in a moving image mode showing a second embodiment of the imaging apparatus of the present invention.
FIG. 15 is an explanatory diagram showing a moving image mode of the CCD.
FIG. 16 is an explanatory diagram following FIG. 15;
FIG. 17 is an explanatory view showing a moving image mode of the CCD.
FIG. 18 is an explanatory diagram following FIG. 17;
FIG. 19 is an explanatory diagram following FIG. 18;
FIG. 20 is an explanatory diagram of a part of the internal structure of a CCD showing a third embodiment of the imaging apparatus of the present invention;
FIG. 21 is an explanatory diagram showing a still image mode of the CCD.
FIG. 22 is an explanatory diagram showing a moving image mode of the CCD.
FIG. 23 is an explanatory diagram following FIG. 22;
FIG. 24 is an explanatory diagram showing a moving image mode of the CCD.
FIG. 25 is an explanatory diagram following FIG. 24;
FIG. 26 is an explanatory diagram following FIG. 25;
FIG. 27 is an explanatory diagram showing a moving image mode of a CCD showing a fourth embodiment of the imaging apparatus of the present invention.
FIG. 28 is an explanatory diagram following FIG. 27;
FIG. 29 is an explanatory diagram showing a moving image mode of the CCD.
FIG. 30 is an explanatory diagram following FIG. 29;
FIG. 31 is an explanatory diagram following FIG. 30;
FIG. 32 is a diagram illustrating a part of the internal structure of a CCD, showing a fifth embodiment of the imaging apparatus of the present invention.
FIG. 33 is an explanatory diagram showing a moving image mode of the CCD.
34 is an explanatory diagram following FIG. 28; FIG.
FIG. 35 is an explanatory diagram showing an outline of line readout addition in the moving image mode of the CCD.
FIG. 36 is an explanatory diagram showing a moving image mode of a CCD showing a sixth embodiment of the imaging apparatus of the present invention.
FIG. 37 is an explanatory diagram subsequent to FIG. 28;
FIG. 38 is an explanatory diagram showing an outline of line readout addition in the moving image mode of the CCD.
[Explanation of symbols]
1 Imaging device
2 CCD as a solid-state image sensor
3 CCD drive circuit as drive circuit
11 Photodiode as photoelectric conversion means
12 Vertical transfer path as first transfer path
31a, 31b Charge read pulse as charge read voltage
33 charge
34 5-pixel mixed charge as first additional charge
44 5-pixel mixed charge as second added charge
V1A, V1B, V3A, V3B Charge readout electrode

Claims (8)

A plurality of pixels having a first pattern and a second color arranged in a predetermined pattern with photoelectric conversion means; a plurality of first transfer paths for reading and transferring charges of these pixels; and the first transfer paths And a second transfer path that reads out, transfers, and outputs the transferred charge, and a solid-state imaging device driving method,
The first transfer path includes a charge coupled device provided with a plurality of charge readout electrodes for a pixel, and reading and holding of charge is performed by applying a charge readout voltage to the charge readout electrode,
A plurality of charges of the pixels of the first color are read out to the first transfer path , a charge read voltage is continuously applied to the charge read electrodes of a specific system, and the state of reading out charges for a specific pixel is maintained and read The first charge is generated by transferring the charges of the other pixels that have been read and adding the transferred charges to the held charges and adding a plurality of charges of the pixels of the first color. 1 addition step;
With the first addition pixel removed from the position where the charge of the pixel of the second color is read, a plurality of charges of the pixel of the second color are read out to the first transfer path, and the second A plurality of charges of the color pixel are added to at least one of the first transfer path and the second transfer path to generate a second added charge obtained by adding a plurality of charges of the second color pixel. 2 addition steps;
A solid-state imaging device driving method comprising: an addition output step of transferring and outputting the first addition charge and the second addition charge through the second transfer path. The method for driving a solid-state imaging device according to claim 1, wherein the first addition step and the second addition step are performed while transferring the electric charge read out to the first transfer path in the forward direction and the reverse direction. The method for driving a solid-state imaging device according to claim 1, wherein the second adding step is performed by reading a plurality of charges of the pixels of the second color at a predetermined position of the second transfer path. The first transfer path includes a charge-coupled device having a charge readout electrodes and the vertical transfer path dedicated gate electrode of a plurality of systems for image-containing, charge reading and retention, the charge read voltage is applied to the charge read electrode 4. The solid-state imaging device according to claim 1 , wherein transfer of the read pixel is performed by applying a predetermined voltage to the charge readout electrode and the gate electrode dedicated to the vertical transfer path . Driving method. A first drive mode for performing a first addition step , a second addition step , and an addition output step;
The charge of each pixel is individually read out to the first transfer path, the read charge is individually transferred to the second transfer path, and the second drive mode output from the second transfer path is switched. 5. The method for driving a solid-state imaging device according to claim 1, wherein the solid-state imaging device is driven. The solid-state imaging device driving method according to claim 5, wherein the first drive mode is a moving image mode for capturing a moving image, and the second drive mode is a still image mode for capturing a still image. A solid-state image sensor and a drive circuit for driving the fixed image sensor;
The solid-state imaging device includes photoelectric conversion means and a plurality of pixels in which a first color and a second color are arranged in a predetermined pattern,
The drive circuit is
A plurality of first transfer paths having a charge coupled device provided with a plurality of charge readout electrodes for a pixel, for reading and transferring the charges of each pixel, and reading and transferring and transferring the charges transferred by these first transfer paths And a second transfer path that
The drive circuit is
A charge read voltage is applied to the charge read electrode to read a plurality of charges of the first color pixel to the first transfer path, and a charge read voltage is continuously applied to the charge read electrode of a specific system . While maintaining the read-out state for the pixel and holding the read-out charge, the charge of the other pixel that has been read out is transferred, and the transferred charge is added to the held charge. Generating a first added charge obtained by adding a plurality of values;
With the first addition pixel removed from the position where the charge of the pixel of the second color is read, a plurality of charges of the pixel of the second color are read out to the first transfer path, and the second Adding a plurality of charges of a color pixel to at least one of the first transfer path and the second transfer path to generate a second added charge obtained by adding a plurality of charges of a second color pixel;
The image pickup apparatus, wherein the first addition charge and the second addition charge are transferred through the second transfer path and output. The image pickup apparatus according to claim 7, further comprising a processing unit capable of switching the order of the first addition charge and the second addition charge output from the solid-state image pickup device.

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