JP3504800B2 - Quadrature demodulator - Google Patents

Description

Detailed Description of the Invention

[0001]

[0002]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a quadrature demodulator suitable for use in a wireless device.

[0003]

2. Description of the Related Art FIG. 14 is a block diagram showing a configuration of a general wireless communication system. A wireless communication system 114 shown in FIG. 14 is connected to a transmitting side wireless device 103 connected to an antenna 101 and an antenna 102. The received wireless device 104 is connected via the wireless line 113.

Here, the transmitting radio apparatus 103 includes a modulator 105 and an up-converter (U / U) as a frequency converter.
C) 106, a transmission filter 107 (TF) and a high power amplifier (HPA) 108, the receiving side wireless device 104 includes a low noise amplifier (LNA) 109,
A reception filter (RF) 110, a down converter (D / C) 111 as a frequency converter, and a demodulator 112 are provided.

The up converter 106 is composed of a mixer circuit (detection circuit) 106A and a local oscillator 106B, and the down converter 111 is composed of a mixer circuit (detection circuit) 111A and a local oscillator 111B. With such a configuration, in the above-described wireless communication system 114 shown in FIG. 14, when transmitting a signal from the transmitting-side wireless device 103 to the receiving-side wireless device 104,
The modulator 105 modulates the transmission signal (BB signal: baseband signal) into an IF signal (intermediate frequency signal), and the IF signal modulated by the modulator 105 is upconverted by the upconverter 10.
At 6, the LO signal (local signal; local oscillator output) is used for frequency conversion into an RF signal (radio frequency signal). Then, the transmission filter 107 limits the spectrum to a required band, further amplifies it with a high-power amplifier 108, and then transmits it as a radio wave from the antenna 101.

On the other hand, in the radio apparatus 104 on the receiving side, the low noise amplifier 109 amplifies the signal received by the antenna 102, and the reception filter 110 the unnecessary signal for the RF signal low noise amplified by the low noise amplifier 109. Noise is removed, and the down converter 111 frequency-converts it into an IF signal using the LO signal.
It is designed to be demodulated by.

In recent years, like the transmitting side radio apparatus 103 shown in FIG. 14, the BB signal is not frequency-converted into an IF signal and then modulated, and then is not converted into an RF signal. There has been proposed a radio device which performs so-called direct modulation, in which the frequency is directly converted from the BB signal to the RF signal. Similarly, also for the receiving-side wireless device 104, there has been proposed a wireless device that performs so-called direct demodulation, such as direct frequency conversion from an RF signal to a BB signal during signal demodulation.

By the way, the above-mentioned wireless communication system 114
For example, a quadrature phase shift keying (QPSK) can be used as the modulation method. In this case, on the demodulation side, there are two types of modes, that is, a synchronous detection demodulation system or a quasi-synchronous detection demodulation system depending on the method of generating the reproduced carrier signal. Further, in order to secure the accuracy of the orthogonal demodulation degree by the above-mentioned QPSK demodulator, it is necessary to maintain the orthogonality degree of the carrier waves of the I component and the Q component at 90 °.

However, since the orthogonality of the carrier waves of the I component and the Q component is actually different from each other, in the above-mentioned synchronous detection system or quasi-coherent detection system QPSK demodulator, for example, by using a phase shifter, It is possible to correct the orthogonality of the carrier waves of the I component and the Q component. 12 and 13
12 is a block diagram showing a configuration of the above-mentioned general QPSK demodulation device, FIG. 12 is a block diagram showing a quadrature demodulation circuit by a synchronous detection demodulation system, and FIG. 13 is a quadrature demodulation circuit by a quasi-coherent detection demodulation system. It is a block diagram showing.

First, the quadrature demodulation circuit (synchronous detection demodulation circuit) shown in FIG. 12 includes a mixer (detection circuit) 11, a frequency synthesizer 12, a band pass filter 13, a variable gain amplifier (AGC: Automatic Gain Control) 14, and a hybrid ( H) 15, mixer (detection circuit) 16-I, 16-
Q, low-pass filter 17-I, 17-Q, analog /
Digital converter (A / D converter) 18-I, 18-
Q, for example, an equalizer 2 including a transversal equalizer
0, control unit (CONT) 21, low-pass filter 22,
23, a voltage controlled oscillator (VCO) 24 as a carrier recovery circuit (CR), a 90 ° hybrid (H) 25, and a phase shifter 30.

The equalizer 20 and the control unit 21 described above are L
It is converted to SI (see reference numeral 31). By the way, VCO
Reference numeral 24 oscillates a signal having a frequency synchronized with an input quadrature modulation signal (hereinafter, may be simply referred to as an input signal) based on the demodulation output information from the control unit 21.

The 90 ° hybrid 25 is a VCO
The reproduced carrier signals from 24 are given a 90 ° phase difference, and the reproduced carrier signals having a 90 ° phase difference are output to the respective detection circuits 16-I and 16-Q. The phase shifter 30 is interposed between the 90 ° hybrid 25 and the detection circuit 16-Q, and corrects the orthogonality of the reproduced carrier signal from the 90 ° hybrid 25. For example, a capacitor or the like. It is composed by.

Further, the control unit 21 controls the demodulated data I _CH ,
A signal for frequency control for the VCO 24 is created from Q _CH and supplied to the VCO 24 as a control voltage.
As a result, the VCO 24 can be controlled so as to be synchronized with the frequency of the input quadrature modulation signal by changing its oscillation frequency based on the control voltage from the control unit 21.

The control unit 21 also controls the demodulated data I _CH , Q.
A control signal for AGC is created from _CH , and variable gain amplifier 1
4 to automatically control the amplitude of the demodulated signal by automatically controlling the gain of the baseband (baseband AG
C) is performed. The low-pass filter 22
Is for smoothing the frequency control signal from the control unit 21, and the low-pass filter 23 is for smoothing the frequency control signal from the control unit 21.

With such a configuration, in the synchronous detection demodulation circuit shown in FIG. 12, the frequency synthesizer 1 receives the QPSK signal as the reception signal input to the detection circuit 11.
IF by frequency data (f data) input from 2
The frequency is converted into a band. The frequency-converted received signal is
The band-pass filter 13 limits the band, and the variable gain amplifier 14 performs automatic gain control (AGC) of the signal amplitude.

The signal from the variable gain amplifier 14 is branched into two by the hybrid 15 and input to the detection circuits 16-I and 16-Q, respectively. After that, in the detection circuits 16-I and 16-Q, the input signal is quadrature-detected based on the reproduced carrier signal whose quadrature is corrected from the 90 ° hybrid 25 and the phase shifter 30, respectively, and the I-channel and the Q-channel are detected. Generate demodulated data of.

Further, the demodulated data of the I channel and the Q channel are low pass filters 17-I and 17-Q, respectively.
After noise and the like are removed by the A / D converter 18-I,
It is converted to a digital signal at 18-Q. Further, the I data and Q data converted into digital signals are subjected to required amplitude equalization processing in the equalizer 20 and output as demodulation data I _CH and Q _CH .

Next, the quadrature demodulation circuit shown in FIG.
In the synchronous detection demodulation circuit of No. 2, the voltage controlled oscillator (VCO) 24 having the carrier recovery circuit is omitted, and the fixed frequency oscillator, the phase rotation circuit and the digital variable frequency oscillator are added, thereby performing the demodulation processing by the quasi-synchronous detection method. Is to be applied. Here, 19 'is a phase rotation unit, 26 is a low-pass filter, 27 is a digital variable frequency oscillator (DVCO), and 28 is a fixed frequency oscillator (OSC). In FIG. 13, the same symbols as those in FIG. 12 indicate the same parts.

The phase rotation unit 19 ', the equalizer 20, the control unit 21, the low-pass filter 26 and the DVCO 27 are L.
It is converted to SI (see reference numeral 33). By the way, OSC
Reference numeral 28 oscillates a signal having a frequency close to the carrier angular frequency of the input quadrature modulated signal. In the 90 ° hybrid 25, the reproduced carrier signal from the OSC 28 has a 90 ° phase difference, and has a 90 ° phase difference with each other. The reproduced carrier signal is output to each of the detection circuits 16-I and 16-Q.

The phase shifter 30 includes the 90 ° hybrid 25 and the detection circuit 1 as in the case of FIG.
6-Q is provided to correct the orthogonality of the reproduced carrier signal from the 90 ° hybrid 25.
The DVCO 27 also determines the frequency of the input signal and the OSC 28.
Based on the phase shift depending on the frequency of the reproduced carrier wave signal oscillated from, the phase rotation unit 19 'described later calculates correction data corresponding to the phase angle and outputs it to the phase rotation unit 19'. ′ Is used for arithmetic processing with the input signal.

Further, the control unit 21 controls the demodulated data I _CH ,
A control signal for AGC is created from Q _CH and is supplied to the variable gain amplifier 14, which enables baseband AGC for controlling the amplitude of the demodulated signal. The control unit 21 receives the demodulated data outputs I _CH and Q _CH from the equalizer 20 and outputs a signal for controlling the DVCO 27. This output is output to the DVCO 27 via the low-pass filter 26. It is supposed to be done.

Further, the phase rotation unit 19 'corrects the phase rotation of the two input quadrature modulation signals, and the phase shift depending on the frequency of the input signal and the frequency of the reproduction carrier signal oscillated from the OSC 28. , The correction data output by the DVCO 27 is used to determine the frequency of the input signal and the O
The frequency of the signal oscillated from the SC 28 can be synchronized.

The low-pass filter 22 smoothes the frequency control signal from the control section 21. With such a configuration, in the quasi-synchronous detection demodulation circuit shown in FIG. 13, the frequency data (f data) input from the frequency synthesizer 12 is used to frequency the QPSK signal as the reception signal input to the detection circuit 11. To be converted. The frequency-converted received signal is band-limited by the band-pass filter 13 and subjected to AGC processing of the signal amplitude by the variable gain amplifier 14.

The signal from the variable gain amplifier 14 is branched into two by the hybrid 15 and input to the detection circuits 16-I and 16-Q, respectively. After that, in the detection circuits 16-I and 16-Q, the input signal is quadrature-detected based on the reproduced carrier signal whose quadrature is corrected from the 90 ° hybrid 25 and the phase shifter 30, respectively, and the I-channel and the Q-channel are detected. Generate demodulated data of.

Further, the demodulated data of the I channel and the Q channel are low pass filters 17-I and 17-Q, respectively.
Then, after noise and the like are removed, the A / D converter 18-
It is converted to a digital signal at I, 18-Q. Further, in the phase rotation unit 19 ', based on the signal from the equalizer 20 in the subsequent stage, the phase is adjusted so that the input frequency in the detection circuits 16-I and 16-Q and the reproduced carrier signal as the reference local signal are synchronized. It is rotated. After that, the equalizer 20 performs a required amplitude equalization process and outputs the demodulated data I _CH and Q _CH .

In the conventional QPSK demodulator, a frequency conversion function, an automatic gain control function (variable amplifier), a quadrature demodulation function, an AFC (automatic frequency co-function).
ntrol) function (VCO: voltage controlled oscillator) and other parts that process analog signals were made up of discrete circuits (circuits made by connecting individual integrated circuits).
In recent QPSK demodulators, due to advances in semiconductor technology and the like, the portion that processes the analog signals has been modularized.

That is, for example, in the quadrature demodulation circuit shown in FIG. 12 described above, the detection circuit 11, the frequency synthesizer 12,
Band pass filter 13, variable gain amplifier 14, hybrid 15, detection circuit 16-I, 16-Q, VCO2
The 4,90 ° hybrid 25 and the phase shifter 30 can be configured as a modularized analog section 32 that processes analog signals.

Similarly, in the quadrature demodulation circuit 13 shown in the figure, the mixer (detection circuit) 11 and the frequency synthesizer 1 are used.
2, bandpass filter 13, variable gain amplifier (AG
C: Automatic Gain Control) 14, hybrid (H) 15, mixer (detection circuit) 16-I, 16-Q,
The fixed frequency oscillator (OSC) 28, the 90 ° hybrid (H) 25 and the phase shifter 30 can be configured as a modularized analog section 34 that processes an analog signal.

On the other hand, in addition to the orthogonality correction method of the demodulation section described above, in the technique disclosed in Japanese Patent Laid-Open No. 58-033305, one output of the quadrature detector is weighted and the other output is weighted. A quadrature detection circuit having a function of performing quadrature correction by adding a predetermined weighting value has been proposed. In the technique disclosed in Japanese Patent Laid-Open No. 2-058951, the quadrature detector I / Q channel A phase detector having a function of detecting and correcting gain imbalance, offset amount, and deviation of orthogonality has been proposed.
The technique disclosed in Japanese Patent No. 44 has a function of detecting a quadrature phase error from the signal value of a signal point projected on one reference axis on the phase plane and controlling so that the error is always zero. A quadrature phase error detection circuit has been proposed.

Further, in the technique disclosed in Japanese Unexamined Patent Publication No. 6-085864, a quadrature correction signal is created from a signal obtained by performing phase reverse rotation for quasi-synchronization on the quadrature detected signal, and the quadrature detector is used for the signal. A quasi-synchronous detection demodulator having a method of correcting the phase of one of the I / Q carrier signals by a variable capacitor is proposed.
In the technique disclosed in Japanese Patent Laid-Open No. -212427, a quadrature amplitude modulator and a quadrature amplitude demodulator, which is a system for detecting and correcting a shift in quadrature degree from two signals distributed by a 90 ° hybrid in a quadrature detector, are disclosed. An orthogonality correction device has been proposed.

[0031]

However, in the modularized analog units 32 and 34 shown in FIGS. 12 and 13, the phase shifter 30 fixes the phase of the reproduced carrier signal in a fixed manner. Phase shifts to the I component,
Since the orthogonality of the Q component carrier is maintained at 90 °, there is a problem that the carrier cannot be optimally adjusted. Further, even when these analog units 32 and 34 are not modularized, especially when changing the carrier frequency as in the case of the synchronous detection demodulation method shown in FIG. 12, the phase shifter 30 described above is used. There is also a problem that the correction cannot be effectively performed and the orthogonality is deviated.

Further, in the technique disclosed in Japanese Patent Laid-Open No. 58-033305, the output of the quadrature detector is uniformly weighted regardless of the quadrant in which the data is located and the direction of deviation with respect to the theoretical orthogonal axis. Therefore, it is considered that the accuracy of correction of the orthogonality may be lowered particularly depending on the direction of the deviation with respect to the theoretical orthogonal axis. Furthermore, JP-A-2-058
The technique disclosed in Japanese Patent Publication No. 951 requires a circuit for switching the modulation signal, and thus has a problem that the circuit configuration becomes complicated.

In the technique disclosed in Japanese Patent Laid-Open No. 2-146844, the phase difference between the quadrature demodulated signal and the reproduced carrier signal is detected unless the amplitude on the I axis after quadrature correction is set to a certain condition. This is not possible, and it is conceivable that the detection accuracy of the above-mentioned phase difference will decrease depending on the data position after demodulation. Further, in the technique disclosed in Japanese Unexamined Patent Publication No. 6-085864, the orthogonality of the local signal of the IF is corrected on the basis of the signal obtained by performing the phase rotation for the quasi-synchronization, so that the analog section as described above is used. Optimum phase correction cannot be performed when the module is modularized.

Also, in the technique disclosed in Japanese Patent Laid-Open No. 7-212427, the orthogonality of the IF local signal is corrected, so that the analog part is modularized as in the case described above. Therefore, optimum phase correction cannot be performed. The present invention has been devised in view of such a problem, and an orthogonal demodulation device capable of optimally maintaining the orthogonality by correcting the deviation of the orthogonality from the data after the orthogonal demodulation. The purpose is to provide.

[0035]

FIG. 1 is a block diagram of the principle of the present invention. In FIG. 1, 9 is a quadrature demodulator, and the quadrature demodulator 9 is a demodulation output information (I _CH ,
Q _CH ) is subjected to frequency conversion using the reproduced carrier signal obtained by feeding it back, and the signals are orthogonal to each other.
By obtaining one quadrature demodulation signal, demodulation processing is performed by the synchronous detection method.

The quadrature demodulator 9 shown in FIG.
Hybrid (H) 1, mixer (detection circuit) 2-I, 2
-Q, orthogonality correction unit 3, control unit 4, voltage controlled oscillator (V
(CO) 5,90 ° hybrid (H) 6 is provided. Here, the hybrid 1 divides the input QPSK wave signal as a received signal into two, and the detection circuits 2-I and 2-Q quadrature the input signal based on the reproduced carrier signal from the 90 ° hybrid 6. The quadrature correction unit 3 performs detection so that the quadrature demodulated signal is positioned on the theoretical quadrature axis.

Here, the theoretical orthogonal axis means an axis in which the respective signals of the I component and the Q component are orthogonal to each other and the value of each signal component can be accurately read. Further, the VCO 5 constitutes a carrier recovery circuit (CR) which reproduces a frequency signal (reproduced carrier signal) synchronized with the input signal and outputs it to the 90 ° hybrid 6. The 90 ° hybrid 6 has a 90 ° phase difference between the reproduced carrier signals output from the VCO 5, and the reproduced carrier signals having a phase difference of 90 ° to the respective detection circuits 2-I and 2-Q. It is designed to output.

Further, the control unit 4 controls the demodulation output information (I
A signal for frequency control for the VCO 5 is created from CH, QCH) and supplied to the VCO 5 as a control voltage. As a result, in the quadrature demodulator 9 of the synchronous detection system shown in FIG. 1, the hybrid 1 splits the QPSK wave signal as the reception signal into two, and the detection circuits 2-I and 2-Q are used.
To enter. In the detection circuits 2-I and 2-Q, the input signal is quadrature-detected based on the reproduced carrier signal from the 90 ° hybrid 6, and the quadrature demodulation signal is positioned on the theoretical quadrature axis in the quadrature correction unit 3. Correction calculation is performed, I channel,
It generates a demodulated data of the Q channel.

FIG. 2 is a block diagram of the principle of the present invention. In FIG. 2, reference numeral 10 is a quadrature demodulation device. This quadrature demodulation device 10 performs frequency conversion using a reproduced carrier signal and is orthogonal to each other. By obtaining one quadrature demodulation signal and performing phase rotation control on the two quadrature demodulation signals, demodulation processing is performed by the quasi-coherent detection method.
The quadrature demodulation device 10 shown in FIG. 2 includes a hybrid (H) 1, a mixer (detection circuit) 2-I, 2-Q, a quadrature degree correction unit 3, a control unit 4, a 90 ° hybrid (H) 6,
It comprises a phase rotation control unit 7 and a fixed frequency oscillator (OSC) 8.

Here, the hybrid 1 divides the input QPSK wave signal as a received signal into two, and the detection circuits 2-I and 2-Q input based on the reproduced carrier signal from the 90 ° hybrid 6. The signal is subjected to quadrature detection, and the quadrature correction unit 3 performs a correction calculation so that the quadrature demodulated signal is located on the theoretical quadrature axis. The phase rotation control unit 7 corrects the phase rotation of the two input quadrature modulation signals, and the OSC 8 oscillates a frequency signal (reproduction carrier signal) close to the carrier angular frequency of the input quadrature modulation signals. So, 90 ° Hybrid 6 is OS
The reproduced carrier signals output at C8 have a phase difference of 90 °, and reproduced carrier signals having a phase difference of 90 ° are output to the respective detection circuits 2-I and 2-Q. There is.

Further, the control unit 4 controls the demodulation output information (I
A signal for frequency control is created from CH, QCH) and a control signal is output so as to correspond to each phase θ in the phase rotation control unit 7. As a result, in the quadrature demodulation device 10 of the quasi-coherent detection system shown in FIG. 2, the hybrid 1 splits the QPSK wave signal as a received signal into two and inputs them into the detection circuits 2-I and 2-Q, respectively. Detection circuit 2
In -I and 2-Q, quadrature detection of the input signal is performed based on the reproduced carrier signal from the OSC8, 90 ° hybrid 6,
The quadrature correction unit 3 performs a correction operation such that the quadrature demodulated signal is located on the theoretical quadrature axis, and the phase rotation control unit 7 performs phase rotation on the quadrature demodulated signal to obtain I channel and Q channel demodulated data. that occur.

[0042] In the orthogonal demodulation apparatus shown in FIG. 1 or 2 of the above mentioned is the case where the deviation of orthogonality caused by the reproduced carrier signal is shifted to the positive side with respect to the theoretical orthogonal axis, displacement of orthogonality is With the case of being shifted to the negative side with respect to the theoretical orthogonal axis,
The orthogonality correction unit 3 is configured to change the correction calculation .
Also, the quadrature that occurs depending on the frequency of the reproduced carrier signal
The setting information of the degree deviation and the change of the frequency of the input signal
The orthogonality correction unit 3 can also be configured to perform the correction calculation accordingly . Also, in this case, quadrature demodulation
The device 10 performs phase rotation control on the two quadrature demodulated signals.
The applied phase rotation control unit 7 may also function as the orthogonality correction unit 3.
I can do it.

[0043]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings. (A) Description of First Embodiment FIG. 3 is a block diagram showing a quadrature demodulation device according to the first embodiment of the present invention.
It is applied to the demodulation unit 112 in the wireless communication system 114 shown in FIG. 14 described above, frequency conversion is performed using a reproduced carrier signal obtained by feeding back demodulation output information, and two orthogonal demodulated signals that are orthogonal to each other are generated. By obtaining it, the demodulation process is performed by the synchronous detection method.

Here, the quadrature demodulator shown in FIG.
Mixer (detection circuit) 11, frequency synthesizer 12, bandpass filter 13, variable gain amplifier (AGC) 1
4, hybrid (H) 15, mixer (detection circuit) 16
-I, 16-Q, low-pass filter 17-I, 17-
Q, analog / digital converter (A / D converter) 18
-I, 18-Q, orthogonality correction circuit 19, equalizer 20, control unit (CONT) 21, low-pass filters 22, 23,
It comprises a voltage controlled oscillator (VCO) 24 and a 90 ° hybrid (H) 25.

Further, the detection circuit 11 receives the input QPS
The K signal is frequency-converted by the frequency data (f data) from the frequency synthesizer 12. The detection circuit 1
1 and the frequency synthesizer 12 constitute a down converter. Further, the band-pass filter 13 limits the band of the signal from the detection circuit 11, and the variable gain amplifier 14 controls the automatic gain control (AGC: Au) for the signal amplitude band-limited by the band-pass filter 13.
tomatic gain control), hybrid 1
Reference numeral 5 is for branching the IF signal (intermediate frequency signal), which has been subjected to AGC processing by the variable gain amplifier 14, into two, and the two branched signals are detected by the detection circuits 16-I, 16 respectively.
It is designed to be output to -Q.

The VCO 24 is a carrier recovery circuit (C
R), reproduces a frequency signal (reproduced carrier signal) synchronized with the input signal, and outputs it to the 90 ° hybrid 25. In addition, 90 ° hybrid 25 is VC
The reproduced carrier signal oscillated by O24 is branched into two reproduced carrier signals having a phase difference of 90 °, and the branched reproduced carrier signals are respectively detected by the detection circuit 16-
I, 16-Q are output.

Further, the detection circuit 16-I uses the 90 ° hybrid 2 for the IF signal from the hybrid 15.
The quadrature detection is performed based on the reproduced carrier wave signal from 5 to generate I data as a quadrature demodulation signal.
6-Q is for the IF signal from the hybrid 15,
Quadrature detection is performed based on the reproduced carrier signal from the 90 ° hybrid 25 to generate Q data as a quadrature demodulation signal.

Further, the low-pass filters 17-I, 17-
Q removes noise of I data and Q data as quadrature demodulation signals from the detection circuits 16-I and 16-Q, respectively. Furthermore, the A / D converters 18-I, 1
8-Q are low-pass filters 17-I and 17-, respectively.
Two analog signals as I data and Q data which have been low-pass filtered by -Q are converted into digital signals.

Further, the quadrature correction circuit 19 positions the quadrature demodulated signals of the two digital signals input from the A / D converters 18-I and 18-Q on the theoretical quadrature axis. It has a function as an orthogonality correction unit that performs such correction calculation. Further, the equalizer 20 equalizes the signal of which the deviation of the orthogonality is corrected by the orthogonality correction circuit 19 to a required amplitude, and produces demodulated data I _CH and Q _CH .

Further, the control section 21 performs AGC control of the variable gain amplifier 14 based on the demodulation output information (I _CH , Q _CH ) from the equalizer 20, and inputs the reproduced carrier signal output from the VCO 24. The control is performed so as to be synchronized with the frequency of the signal. The equalizer 20 and the control unit 2 described above
1 and is integrated into an LSI (see reference numeral 31). Further, the low-pass filter 22 removes noise and the like in the control signal for AGC control of the variable gain amplifier 14, and the low-pass filter 23 removes noise and the like in the control signal for controlling the oscillation frequency in the VCO 24. It is a thing.

By the way, the above orthogonality correction circuit 19
In detail, it has a hardware configuration as shown in the block diagram of FIG. Here, the orthogonality correction circuit 19 shown in FIG. 4 converts the digital signal before orthogonal correction into I _CH , Q _CH ,
Let I ′ _CH and Q ′ _{CH be} the digital signal after the orthogonality correction and θ be the deviation of the orthogonality depending on the frequency of the reproduced carrier signal, then, according to the deviation of the orthogonality caused by the reproduced carrier signal,
For example, the coordinate conversion is performed on the theoretical orthogonal axis by performing an operation equivalent to the linear conversion expression as shown in Expression (1) or Expression (2).

The above I _CH and Q _CH are described as I and Q in the following formulas, and I ′ _CH and Q ′ _CH are described as I ′ and Q ′ in the following formulas. ing.

[0053]

[Equation 1]

The above-mentioned deviation θ of the orthogonality is set from the outside. This orthogonality correction circuit 19
Is a ROM (Read Only Memory) 190, 191, a multiplier 192 to 195, an adder 196, 197, a θ setting device 198, an A / D converter 199A, a polarity inverting device 200 and an EXOR (Exclusive OR). ) Circuit 201
It consists of

Here, the ROMs 190 and 191 are reproduction carriers.
Orthogonality due to frequency of transmitted signal and reproduced carrier signal
Quadrature demodulation signal with the direction of deviation of
(I_CH, Q _CH) For specific correction value calculation data
Remember that each ROM 190, 191
Depending on the deviation θ of the intersection, for example, the following correction value
Calculation data can be stored.

[0056]

[Table 1]

The calculation accuracy of each value for the deviation of the orthogonality is sin (θ / 2) / cos θ is 8
Bit data of 9 bits or more is required, and cos (θ
The value of / 2) / cos θ requires bit data of 14 bits or more. The multipliers 192 to 195 multiply the quadrature demodulated signals (I _CH , Q _CH ) by the correction values generated by the ROMs 190 and 191, and adders 196 and 196 are provided.
197 is for adding the values multiplied by the multipliers 192-195.

Further, the θ setting device 198 has a value θ of deviation of the orthogonality generated depending on the frequency of the reproduced carrier signal.
The [angle at which the data (I, Q) deviates from the theoretical orthogonal axis] is set. In addition, the A / D converter 199
A is A / D converted from the control voltage (Vc) for controlling the oscillation frequency of the VCO 24 from the control unit 21,
The ROM 19 is used as information indicating the change in the frequency of the input signal.
It is transmitted to 0,191.

Further, the polarity reversing device 200 is provided with I _CH , Q
A polarity inversion signal for detecting the direction (polarity) of the deviation of the orthogonality occurring in the _CH data and inverting the polarity of the deviation θ of the orthogonality set by the θ setting device 198 is RO.
It is designed to be output to M191. Also, EXO
The R circuit 201, like the polarity reversing device 200 described above,
The polarities of I _CH and Q _CH data after demodulation are input, and these I
An exclusive OR operation is performed on the polarity of the data and the polarity of the Q data, and the operation result is output to the ROM 191 as a control signal indicating whether to invert the polarity of the deviation θ of the orthogonality set by the θ setting device 198. It is supposed to do.

The polarity reversing device 200 and the EXOR circuit 201 are both provided as means for inverting the deviation θ of the orthogonality set by the θ setting device 198.
Only at least one of them may be installed. As a result, in the ROM 190, the θ setting information from the θ setting device 198 and the information (digital signal) indicating the frequency change of the input signal from the A / D converter 199A are input as the address designation information, and this address is set. Unique correction value calculation data cos (θ / 2) / c based on the designated information
osθ is read out.

Similarly, in the ROM 191, the θ setting device 1
Θ setting information from 98 and information indicating a change in frequency of the input signal from the A / D converter 199A (digital signal)
At the same time, the polarity reversal signal from the polarity reversing device 200 and / or the EXOR circuit 201 is input as addressing information, and based on this addressing information, unique correction value calculation data sin (θ / 2) / cos θ is read out. It is supposed to be.

Generally, the deviation of the orthogonality is generated by the 90 ° hybrid 25.
If the frequency of the input signal is one, the orthogonality can be adjusted at that time, whereas if the frequency of the input signal changes in a certain range, the deviation of the orthogonality cannot be adjusted. Control voltage (Vc) of
By performing the D / D conversion to change the frequency of the input signal, the deviation of the orthogonality caused by the frequency of the input signal is corrected.

The value of the correction value calculation data cos (θ / 2) / cos θ in the ROM 190 is the polarity reversing device 20.
This polarity inversion signal is not used as the addressing information of the ROM 190 because it does not depend on the polarity inversion signal from the 0 and / or EXOR circuit 201. Also, the multiplier 1
Reference numeral 92 denotes the digital signal I _CH before correction of orthogonality and the ROM 1
Data read at 90 cos (θ / 2) / cos
is multiplied by θ, and the multiplication result is output to the adder 196.

Similarly, the multiplier 193 multiplies the digital signal I _CH before the orthogonality correction by the data sin (θ / 2) / cos θ read by the ROM 191.
The multiplication result is output to the adder 197. Further, the multiplier 194 uses the digital signal Q _CH before correction of orthogonality and the data si read by the ROM 191.
n (θ / 2) / cos θ is multiplied, and the multiplication result is output to the adder 196.

Similarly, the multiplier 195 multiplies the digital signal Q _CH before correction of the orthogonality by the data cos (θ / 2) / cos θ read by the ROM 190,
The multiplication result is output to the adder 197. The adder 196 adds the multiplication result from the multiplier 192 and the multiplication result from the multiplier 194 and outputs the result as an orthogonal correction digital signal I ′ _CH . The adder 197 outputs the multiplication result from the multiplier 193. Multiplication result and multiplier 19
Multiplication result by adding from 5, and outputs a quadrature correction digital signal Q _'CH.

As a result, in the orthogonality correction circuit 19, according to the polarity of the deviation of the orthogonality from the polarity inverting device 200 and / or the EXOR circuit 201 and the frequency information of the reproduced carrier signal from the A / D converter 199A. The quadrature demodulated signals I _CH and Q _CH are converted into data I ′ _CH and Q ′ _CH on the theoretical quadrature axis by performing an operation equivalent to the primary conversion equation shown in the above equation (1) or equation (2). It is like this.

By the way, the correction amount of the orthogonality by the orthogonality correction circuit 19 can be obtained by using the equations (1) and (2) according to the deviation of the orthogonality and the position of the data (I, Q). ing. Here, FIGS. 5 and 6 are diagrams showing the phase correction of the orthogonality of the input signal. In FIGS. 5 and 6, the axes where the orthogonality is deviated are indicated by solid lines a and b, and the demodulated data is I,
Q, the theoretical orthogonal axes are indicated by dotted lines c and d, and the values obtained by correcting the orthogonality of the demodulated data I and Q are I'and Q '.

Here, FIG. 5 shows the deviation of the orthogonality between θ [the angle formed by the theoretical orthogonal axes c and d (right angle) and the angle formed by the axes a and b whose orthogonality deviates from each other]. Difference], θ is positive, that is, the data (I, Q) is displaced to the positive side with respect to the theoretical orthogonal axis.
The axes a and b, which are deviated from each other in orthogonality, are located at positions where they are evenly deviated by θ / 2 by carrier reproduction control by the VCO 24 and 90 ° hybrid 25.

In this case, (I, Q) = (1,
In the case of 1) or (0,0), the data (I, Q) is subjected to coordinate conversion using the equation (1), and (I, Q) on the axes a and b whose orthogonality is deviated. By converting the value of (1) into the value of (I ', Q') on the theoretical orthogonal axes c, d, the deviation of the orthogonality is corrected. On the other hand, (I, Q)
= (0,1) or (1,0), the data (I, Q) is coordinate-transformed using the equation (2), and (I , Q) is converted into the value of (I ', Q') on the theoretical orthogonal axes c, d so that the deviation of the orthogonality is corrected.

Further, FIG. 6 is a diagram showing a case where the above-mentioned θ is negative, that is, the data (I, Q) is deviated to the negative side with respect to the theoretical orthogonal axes c, d. In the case of FIG. 6,
In the case of (I, Q) = (0,1) or (1,0), the coordinates of the data (I, Q) are transformed by using the equation (1), and the axes a and b whose degrees of orthogonality deviate from each other. By converting the above (I, Q) values into (I ', Q') values on the theoretical orthogonal axes c, d, the deviation of the orthogonality is corrected.

On the other hand, when (I, Q) = (1,1) or (0,0), the data (I,
Q) is coordinate-converted, and the values of (I, Q) on the axes a and b whose orthogonality is deviated are (I ′, Q ′) on the theoretical orthogonal axes c and d.
The shift of the orthogonality is corrected by converting into the value of. In other words, the formula used according to the value of the data is reversed depending on whether the data (I, Q) is shifted to the positive side or the negative side with respect to the theoretical orthogonal axis.

Further, as shown in FIGS. 5 and 6, cos (θ / 2)
The value of I / (I ′ + x₁) Or Q / (Q ′ + y ₁), And tan (θ /
The value of 2) is x₁/ Q ′ or y₁/ I '. Therefore, orthogonal
In the degree correction circuit 19, due to the reproduced carrier signal
The deviation of the orthogonality is shifted to the positive side with respect to the theoretical orthogonal axis.
There is a difference in orthogonality from the case (θ has a positive polarity)
It is deviated to the negative side with respect to the theoretical orthogonal axis (θ has a negative polarity.
If you have), you can change the correction calculation
ing.

Further, as described above, the control voltage (Vc) of the VCO 24 is A / D converted into a change in the frequency of the input signal and output to the ROMs 190 and 191, so that it is corrected according to the frequency of the reproduced carrier signal. It is designed to change the calculation. With the configuration described above, in the quadrature demodulation device according to the first embodiment of the present invention, as shown in FIG. 3, the QPSK signal as the reception signal is detected by the detection circuit 11
In (1), the frequency is converted by the frequency data (f data) from the frequency synthesizer 12, the band is limited in the band pass filter 13, and further, the AGC process is performed in the variable gain amplifier 14.

Further, in the hybrid 15, the IF signal which has been subjected to the AGC process by the variable gain amplifier 14 is branched into two, which are respectively added to one input of the detection circuits 16-I and 16-Q. Further, in the VCO 24, a frequency (reproduced carrier signal) synchronized with the input signal is reproduced, and the reproduced carrier signal is branched into two reproduced carrier signals having a 90 ° phase difference in the 90 ° hybrid 25, each of which is a detection circuit. It is applied to the other input of 16-I and 16-Q.

In the detection circuits 16-I and 16-Q, the two IF signals from the hybrid 15 and 90 ° are used.
The reproduced carrier signal from the hybrid 25 is quadrature-detected and output to the low-pass filters 17-I and 17-Q as I data and Q data as quadrature demodulation signals, respectively. Further, in the low-pass filters 17-I and 17-Q, noises and the like of I data and Q data as quadrature demodulation signals from the detection circuits 16-I and 16-Q are removed, and noises and the like are removed. The I data and Q data (both analog signals) as quadrature demodulation signals are converted into digital signals by A / D converters 18-I and 18-Q, respectively.

In the orthogonality correction circuit 19, A /
The deviation of the orthogonality in the orthogonal demodulation signal as the two digital signals from the D converters 18-I and 18-Q is expressed by the formula (1) according to the polarity of the deviation and the value of the data (I, Q).
Alternatively, it is corrected by performing a coordinate conversion calculation equivalent to the equation (2). Then, in the equalizer 20, the signal in which the deviation of the orthogonality is corrected by the orthogonality correction circuit 19 is equalized to a required amplitude and output as demodulated data I _CH and Q _CH .

In the controller 21, the equalizer 20 is used.
A control signal for operating the variable gain amplifier 14 in the AGC operation is output via the low-pass filter 22 based on the demodulation output information (I _CH , Q _CH ) from the VCO 24.
A control signal for synchronizing the reproduced carrier wave signal oscillated at 1) with the frequency of the input signal is output through the low-pass filter 23.

As described above, according to the quadrature demodulation device in the first embodiment of the present invention, regarding the two quadrature demodulation signals in the quadrature degree correction circuit 19, these quadrature demodulation signals are located on the theoretical quadrature axis. Since the correction calculation can be performed, the demodulated data after quadrature demodulation may be corrected without correcting the orthogonality of the reproduced carrier signal. For example, the analog unit (see reference numeral 36) that processes the analog signal is modularized. Even in the case of the above configuration, there is an advantage that the orthogonality can be optimally maintained according to the frequency of the reproduced carrier signal, and the performance of the demodulator can be improved.

Further, even when the frequency of the carrier wave is changed according to the system design, the ROMs 190 and 19 are used.
There is also an advantage that it is not necessary to change the configuration itself of the analog unit by only changing the specification of No. 1, and the cost for configuring the device can be suppressed. Also, the orthogonality correction circuit 1
No. 9 is configured to correct to the theoretical orthogonal axis regardless of whether the deviation of the orthogonality of the reproduced carrier signal oscillated from the VCO 24 deviates to the positive side or the negative side, so that demodulation is performed. Since the orthogonality can be corrected with high accuracy regardless of the subsequent data position, the demodulation performance of the device can be significantly improved.

Furthermore, since the orthogonality correction circuit 19 is configured to correct the orthogonality according to the frequency of the reproduced carrier signal, even if the frequency of the input signal is not one type and changes in a certain range, the input The orthogonality of the signals can be corrected, and the orthogonality can be optimally maintained when the analog section is modularized and configured as in the case described above.

In the above-described embodiment, the value sin (θ / 2) / cos θ produced by the ROM 191 changes greatly with respect to the deviation θ [deg] of the orthogonality, while the cos produced by the ROM 190 changes greatly.
The value of (θ / 2) / cos θ is almost negligible (cos (θ / 2) / cos θ≈1). Therefore, the equations (1) and (2) can be approximated to the equations (3) and (4) shown below. In this way, R in FIG.
Since the OM 190 and the multipliers 192 and 195 can be removed as shown in FIG. 7, for example, the circuit configuration of the device can be simplified, and the device can be downsized.

[0082]

[Equation 2]

(B) Description of Second Embodiment FIG. 8 is a block diagram according to the second embodiment of the present invention. The orthogonal demodulation device according to the present embodiment is applied to the demodulation section 112 shown in FIG. , Performing a frequency conversion using a reproduced carrier signal to obtain two orthogonal demodulated signals that are orthogonal to each other, and performing phase rotation control on the two orthogonal demodulated signals to perform demodulation processing by a quasi-synchronous detection method. Is.

Here, the orthogonal demodulation device shown in FIG.
Mixer (detection circuit) 11, frequency synthesizer 12, bandpass filter 13, variable gain amplifier (AGC) 1
4, hybrid (H) 15, mixer (detection circuit) 16
-I, 16-Q, low-pass filter 17-I, 17-
Q, analog / digital converter (A / D converter) 18
-I, 18-Q, quadrature correction circuit 19A-1, phase rotation unit 19A having both functions of phase rotation circuit 19A-2, equalizer 20, control unit (CONT) 21, low-pass filter 22, 90 ° hybrid. 25 (H), low-pass filter 26, digital variable frequency oscillator (DVCO) 27
And a fixed frequency oscillator (OSC) 28.

Here, the detection circuit 11 uses the input QP
The SK signal is frequency-converted by the frequency data (f data) from the frequency synthesizer 12, and the detection circuit 1
1 and the frequency synthesizer 12 constitute a down converter. The bandpass filter 13 limits the band of the signal from the detection circuit 11, and the variable gain amplifier 14 performs automatic gain control (AGC) on the signal amplitude bandlimited by the bandpass filter 13. The hybrid 15 includes a variable gain amplifier 14
The IF signal subjected to the AGC process is branched into two, and the two branched IF signals are detected by the detection circuit 16-
I, 16-Q can be applied to one input.

Further, the OSC 28 is a frequency signal (reproduced carrier signal) close to the carrier angular frequency of the input quadrature modulated signal.
90 ° hybrid 25 is the OSC
The regenerated carrier signal oscillated at 28 is branched into two regenerated carrier signals having a 90 ° phase difference, and the regenerated carrier signals thus branched are respectively detected by the detection circuit 16-
It is adapted to be added to the other input of I, 16-Q.

Further, the detection circuit 16-I uses the 90 ° hybrid 25 for the IF signal from the hybrid 15.
The quadrature detection is performed on the basis of the reproduced carrier wave signal from the signal generator to generate I data as a quadrature demodulation signal.
-Q is 9 for the IF signal from the hybrid 15.
Quadrature detection is performed based on the reproduced carrier signal from the 0 ° hybrid 25 to generate Q data as a quadrature demodulation signal.

Furthermore, the low-pass filters 17-I, 17
-Q is for removing noises of I data and Q data as quadrature demodulation signals from the detection circuits 16-I and 16-Q, respectively. Also, the A / D converters 18-I, 1
8-Q are low-pass filters 17-I and 17-, respectively.
Two analog signals as I data and Q data which have been low-pass filtered by -Q are converted into digital signals.

Further, the phase rotation unit 19A corrects the deviation of the orthogonality between the two digital signals and also eliminates the deviation of the phase of the orthogonal demodulation signal caused by the deviation between the frequency of the input signal and the frequency generated by the OSC 28. The quadrature correction circuit 1 performs phase rotation so as to correct it.
9A-1 and the function as the phase rotation circuit 19A-2.

Here, the orthogonality correction circuit 19A-1 is
As a quadrature degree correction unit that performs a correction operation on the quadrature demodulated signals of the two digital signals input from the / D converters 18-I and 18-Q so that these quadrature demodulated signals are located on the theoretical quadrature axis. It has a function. Further, the phase rotation circuit 19A-2 performs phase rotation control on the two input quadrature modulation signals, and the phase shift caused by the frequency of the input signal and the frequency of the signal oscillated from the OSC 28 of the quadrature demodulator is Correction is performed by performing phase rotation using the correction data output by the DVCO 27, and the phase rotation of the phase rotation circuit 19A-2 synchronizes the frequency of the signal oscillated from the OSC 28 with the frequency of the input signal. be able to. Equalizer 2
0 equalizes the signal whose phase has been rotated in the phase rotation unit 19A to a required amplitude and outputs it as demodulated data I _CH , Q _CH .

That is, as shown in FIG. 10, in the quasi-synchronous detection method, even if the I and Q axes are orthogonal, the frequency of the input quadrature modulation signal and the signal oscillated from the OSC 28 of the quadrature demodulator are Since the frequencies are not synchronized, the input quadrature modulation signal has the signal points (1,1), (0,1), (0,0), (1,1) on the I and Q axes. The I and Q axes are not fixed at a fixed position but rotate on the same circumference at a constant speed.

Therefore, it is necessary to rotate the I and Q axes by an amount corresponding to the deviation of the frequency, and by rotating the positions of the signal points on the I and Q axes according to the speed of the rotating axis, The input signals that have not been set to fixed positions are corrected as if they were stopped, and the input signals are set to their original signal point positions. Further, the phase to be rotated (θ ₀ ) when the above-mentioned frequency shift is ω ₀
Can be expressed as θ ₀ = ω ₀ t (t = time).

The equation (5) shown below is used as the calculation for rotating the signal point by the phase rotation circuit 19A-2 by the phase angle θ ₀ .

[0094]

[Equation 3]

The control section 21 also controls the variable gain amplifier 1 based on the demodulation output information (I _CH , Q _CH ) from the equalizer 20.
4 is output as a control signal for AGC operation, and based on the demodulated data from the A / D converters 18-I, 18-Q, the equalizer 20 and the frequency information from the DVCO 27 described later, the input signal of The control signal (voltage signal) for performing phase rotation in the phase rotation unit 19A is output so as to eliminate the deviation between the frequency and the frequency generated by the OSC 28.

The low-pass filter 22 includes the control unit 2
1 to the variable gain amplifier 14 demodulation output information (I _CH ,
Q _CH ) noise and the like are removed, and the low pass filter 26 removes noise and the like from the voltage signal as a control signal from the control unit 21 to the DVCO 27. Further, the DVCO 27 receives a control signal (voltage signal) for performing phase rotation from the control unit 21 via the low-pass filter 26, generates a digital frequency signal according to the voltage of the control signal, and outputs the phase rotation unit. 19A
Is output to.

The phase rotation unit 19A, the equalizer 20, the control unit 21, the low pass filter 26 and the DVCO 27 are L.
It is configured as SI35. By the way, the above-mentioned phase rotation unit 19A has a hardware configuration as shown in detail in the block diagram of FIG. Here, this FIG.
The phase rotator 19A shown in FIG. 2 uses the equation (6) or the equation (7) summed with the phase shift of the signal point as shown below according to the shift of the orthogonality caused by the reproduced carrier signal and the position of the signal point. The quadrature demodulation signal is subjected to coordinate conversion on the theoretical quadrature axis by calculating the linear transformation equation as shown, and the quadrature demodulation signal generated by the difference between the frequency of the input signal and the frequency of the reproduced carrier signal generated by the OSC 28 is calculated. This is to correct the phase shift.

In equation (6) or (7) shown below, the digital signals before quadrature correction are set as I _CH and Q _CH , and the digital signals after quadrature correction are set as I ′ _CH and Q ′ _CH , which are set externally. The phase rotation circuit 19 sets the deviation of the orthogonality depending on the frequency of the reproduced carrier signal, which is θ, from the DVCO 27.
The value corresponding to the phase angle of A-2 is θ ₀ .

[0099]

[Equation 4]

By the way, the 2 × 2 matrix for the coordinate conversion in the equations (6) and (7) is the 2 × 2 matrix in the equations (1) and (2) and the equation (5), respectively. It is obtained by summing (multiplying) 2 × 2 matrices. That is, when the data (I, Q) is deviated to the positive side with respect to the theoretical orthogonal axis, (I, Q) =
In the case of (1, 1) or (0, 0), coordinate conversion of the data (I, Q) is performed by using the equation (6), so that ( The value of (I, Q) is converted into the value of (I ', Q') on the theoretical orthogonal axes c, d, and the deviation of the orthogonality is corrected.

On the other hand, when (I, Q) = (0, 1) or (1, 0), the data (I,
By transforming Q) into coordinates, the values of (I, Q) on the axes a and b whose orthogonality deviates are transformed into the values of (I ′, Q ′) on the theoretical orthogonal axes c and d, The deviation of the orthogonality is corrected. Further, when the data (I, Q) is deviated to the negative side with respect to the theoretical orthogonal axis,
If (I, Q) = (0,1) or (1,0),
By coordinate-converting the data (I, Q) using the equation (6), the values of (I, Q) on the axes a and b whose orthogonality are deviated are changed to (I on the theoretical orthogonal axes c and d). ′, Q ′) to correct the deviation of the orthogonality.

On the other hand, when (I, Q) = (1,1) or (0,0), the data (I,
By transforming Q) into coordinates, the values of (I, Q) on the axes a and b whose orthogonality deviates are transformed into the values of (I ′, Q ′) on the theoretical orthogonal axes c and d, The deviation of the orthogonality is corrected. That is, as in the first embodiment,
The formula used depending on the value of the data is reversed depending on whether the data (I, Q) is shifted to the positive side or the negative side with respect to the theoretical orthogonal axis.

Therefore, the phase rotation circuit 19A-2 for performing phase rotation control on the two quadrature demodulated signals is the quadrature correction circuit 1
By also using 9A-1, the phase rotation unit 19A is configured. Here, the phase rotation unit 19A uses R
OM 202 to 205, multipliers 192 to 195, adder 1
96, 197, θ setting device 198, A / D converter 199
B, the polarity reversing device 200, and the EXOR circuit 201.

The multipliers 192 to 195 and the adder 19
6,197, θ setting device 198, A / D converter 199
B, the polarity reversing device 200, and the EXOR circuit 201 are the same as those in the first embodiment (reference numerals 192 to 201).
Function), and detailed description thereof will be omitted. Further, the ROMs 202 to 205 have orthogonal demodulation signals (I _CH , Q _CH ) according to the deviation between the frequency of the input signal and the frequency generated by the OSC 28 together with the polarity of the deviation of the orthogonality due to the reproduced carrier signal. For storing the unique correction value calculation data for.

The polarity reversing device 200 and the EX described above are used.
The OR circuit 201 is also provided as a means for inverting the deviation θ of the orthogonality set by the θ setting device 198, but at least one of them may be provided. As a result, in the ROMs 202 to 205, the θ setting device 19
The θ setting information from 8 and the information (digital signal) indicating the frequency change of the input signal from the A / D converter 199B,
A digital frequency signal from the DVCO 27 is input as addressing information together with the polarity inversion signal from the polarity inverting device 200 and / or the EXOR circuit 201, and unique correction value calculation data is read based on this addressing information. It has become.

In the ROM 202, the above-mentioned correction value calculation data is cos (θ ₀ + θ / 2) / co
The ROM 203 stores the value of sθ as −sin (θ ₀ + θ /
2) / cos θ, the value of cos (θ
_{The value of 0-} θ / 2) / cos θ is
The value of in (θ ₀ −θ / 2) / cos θ is held.

The respective values for the deviation of the orthogonality
The calculation accuracy of -sin (θ₀+ Θ / 2) / cos θ,
sin (θ₀The value of −θ / 2) / cos θ is 8 to 9 bi
Bit data of t or more is required, and cos (θ₀+ Θ /
2) / cos θ, cos (θ ₀-Θ / 2) / cos θ
The value requires bit data of 14 bits or more. Well
In addition, the multiplier 192 uses the digital signal I before the orthogonality correction.
_CHAnd the data read from the ROM 202 cos (θ₀+ Θ
/ 2) / cos θ and the multiplication result is addition
It is designed to be output to the device 196.

Similarly, the multiplier 193 multiplies the digital signal I _CH before the orthogonality correction by the data −sin (θ ₀ + θ / 2) / cos θ read by the ROM 203, and the multiplication result is It is adapted to be output to the adder 197. Further, the multiplier 194 multiplies the digital signal Q _CH before the orthogonality correction by the data sin (θ ₀ −θ / 2) / cos θ read by the ROM 205, and the multiplication result is added to the adder 196. It is supposed to be output.

Similarly, the multiplier 195 multiplies the digital signal Q _CH before the correction of the orthogonality by the data cos (θ ₀ −θ / 2) / cos θ read by the ROM 204, and the multiplication result is It is adapted to be output to the adder 197. The adder 196 adds the multiplication result from the multiplier 192 and the multiplication result from the multiplier 194 and outputs the result as an orthogonal correction value I ′ _CH.
Is to add the multiplication result from the multiplier 193 and the multiplication result from the multiplier 195 and output the result as the orthogonal correction value Q ′ _CH .

In the quadrature demodulating device according to the second embodiment of the present invention having the above-mentioned configuration, as shown in FIG. 8, the QPSK signal as the received signal is the frequency output from the frequency synthesizer 12 in the detection circuit 11. Data (f
After being frequency-converted by (data), the band pass filter 13 performs band limitation, and the variable gain amplifier 14 performs AGC processing.

Further, in the hybrid 15, the IF signal which has been subjected to the AGC process by the variable gain amplifier 14 is branched into two, which are respectively added to one input of the detection circuits 16-I and 16-Q. Further, the OSC 28 oscillates a reproduced carrier signal, and this reproduced carrier signal is branched into two reproduced carrier signals having a 90 ° phase difference in the 90 ° hybrid 25, and the detector circuits 16-I and 16-, respectively. Added to the other input of Q.

Further, in the detection circuits 16-I and 16-Q, the two IF signals from the hybrid 15 and 90 °
The reproduced carrier signal from the hybrid 25 is quadrature-detected and output to the low-pass filters 17-I and 17-Q as I-data and Q-data which are quadrature demodulated signals, respectively. In the low-pass filters 17-I and 17-Q, noise and the like of I data and Q data as quadrature demodulation signals from the detection circuits 16-I and 16-Q are removed, and noise and the like are removed. I data and Q data (both analog signals) that are quadrature demodulated signals are respectively
The signals are converted into digital signals by the A / D converters 18-I and 18-Q.

Further, in the phase rotation unit 19A, θ
Θ setting information from the setting device 198, A / D converter 199
Information indicating frequency change from B, polarity reversing device 200,
Polarity inversion information from the EXOR circuit 201 and DVCO2
7 based on the phase rotation information from the A / D converter 18-
Coordinate conversion operations equivalent to the above equations (6) and (7) are performed on the I data and Q data from I, 18-Q.

As a result, the A / D converters 18-I, 18
The deviation of the orthogonality in the quadrature demodulation signal as two digital signals from -Q is corrected, and the phase deviation caused by the difference between the frequency of the input signal and the frequency of the signal oscillated from the OSC 28 is output by the DVCO 27. The phase rotation is applied and corrected by the correction data.

After that, in the equalizer 20, the signal corrected by the phase rotation unit 19A is equalized to a required amplitude and output as demodulated data I _CH and Q _CH . The control unit 21
, The demodulation output information (I _CH , Q from the equalizer 20)
_CH ), a control signal for operating the variable gain amplifier 14 in the AGC operation is output via the low-pass filter 22, and a control signal for performing phase rotation for correcting the phase shift is output via the low-pass filter 26. D
Output to VCO 27.

As described above, according to the quadrature demodulation device of the second embodiment of the present invention, the phase rotation section 19A seems to position these quadrature demodulation signals on the theoretical quadrature axis. Since the correction calculation can be performed, the demodulated data after quadrature demodulation may be corrected without correcting the orthogonality of the reproduced carrier signal. For example, the analog unit (see reference numeral 37) that processes the analog signal is modularized. Even in the case of the above configuration, there is an advantage that the orthogonality can be optimally maintained according to the frequency of the reproduced carrier signal, and the performance of the demodulator can be improved.

Further, even when the frequency of the carrier wave is changed according to the system design, the ROMs 202 to 20
There is also an advantage that it is not necessary to change the configuration itself of the analog part by only changing the specification of No. 5, and the cost for configuring the device can be suppressed. Further, the phase rotation circuit 19A-2, which performs phase rotation on the two quadrature demodulated signals, also serves as the quadrature degree correction circuit 19A-1, thereby configuring the phase rotator 19A. And the phase rotation shift can be corrected at the same time, and the quadrature correction function of the present device can be speeded up. Besides, the device configuration can be simplified, so that the device can be downsized. You can also

Further, the orthogonality correction circuit 19A-1 is
Since the reproduction carrier signal oscillated from the SC 28 is configured to correct to the theoretical orthogonal axis regardless of whether the deviation of the orthogonality is on the positive side or the negative side.
The orthogonality can be corrected with high accuracy regardless of the data position after demodulation, and the demodulation performance of the device can be significantly improved.

Since the orthogonality correction circuit 19A-1 is configured to correct the orthogonality according to the frequency of the reproduced carrier signal, when the frequency of the input signal changes within a certain range instead of one type. However, the orthogonality of the input signal can be corrected, and the orthogonality can be optimally maintained in the case where the analog unit is modularized as in the case described above.

In the above-described embodiment, the calculation shown in the equation (6) or (7) is performed when the coordinate conversion in the phase rotation unit 19A is performed. deg] for ROM202 and ROM2
The value produced by 04 is almost negligible (cos (θ ₀ + θ / 2) / cos θ and cos (θ ₀
−θ / 2) / cos θ≈1), the above equations (6) and (7)
Can be approximated by the following equations (8) and (9).

In this case, the ROM 202, RO
The M204 and the multipliers 192 and 195 can be eliminated as shown in FIG. 11, and the accuracy of the phase correction can be reduced to simplify the circuit configuration of the orthogonality correction circuit 19A-1. It becomes possible to realize miniaturization.

[0122]

[Equation 5]

In the second embodiment of the present invention, the phase rotation circuit 19A-2 in the phase rotation unit 19A also serves as the orthogonality correction circuit 19A-1 for orthogonal correction, but the orthogonality correction has been described. The correction function of the circuit 19A-1 and the correction function of the phase rotation circuit 19A-2 can be provided independently.

(C) Others The quadrature demodulation system in this apparatus may be used as hardware or software.

[0125]

As described above in detail, according to the quadrature demodulating device of the present invention, by providing the quadrature degree correcting section for performing the correction operation so that the two quadrature demodulated signals are located on the theoretical quadrature axis, Since the deviation of the orthogonality can be corrected from the reproduced data after the orthogonal demodulation, for example, even when the analog section for processing the analog signal is modularized and configured, the orthogonality is optimized according to the frequency of the reproduced carrier signal. Can be held, which can contribute to improving the performance of the demodulator.

Furthermore , according to the quadrature demodulation device of the present invention, the phase rotation control unit that performs the phase rotation control on the two quadrature demodulation signals also serves as the quadrature correction unit. The phase rotation shift can be corrected at the same time, and the quadrature correction function of this device can be speeded up. Besides, the device configuration can be simplified, and the device can be downsized. You can also

Further, according to the orthogonal demodulation device of the present invention,
When the deviation of the orthogonality due to the reproduced carrier signal is shifted to the positive side with respect to the theoretical orthogonal axis, and when the deviation of the orthogonality is shifted to the negative side with respect to the theoretical orthogonal axis. Since the orthogonality correction unit is configured to change the correction calculation, the orthogonality can be corrected with high accuracy regardless of the data position after demodulation, and the demodulation performance of the device is significantly improved. Can be made.

Further , according to the quadrature demodulation device of the present invention, the direct demodulation generated depending on the frequency of the reproduced carrier signal is generated.
The setting information of the deviation of the crossing degree and the change of the frequency of the input signal
Since the orthogonality correction unit is configured to perform the correction calculation according to the above, the orthogonality can be corrected even when the frequency of the input signal is not one type but changes in a certain range.

[Brief description of drawings]

FIG. 1 is a principle block diagram of a first invention.

FIG. 2 is a principle block diagram of a second invention.

FIG. 3 is a block diagram showing a quadrature demodulation device according to the first embodiment of the present invention.

FIG. 4 is a block diagram showing a configuration of an orthogonality correction circuit according to the first embodiment of the present invention.

FIG. 5 is a diagram for explaining phase correction when the orthogonality is positively deviated according to the first embodiment of the present invention.

FIG. 6 is a diagram for explaining phase correction when the orthogonality deviates to a negative value according to the first embodiment of the present invention.

FIG. 7 is a block diagram showing a modified example of the orthogonality correction circuit according to the first embodiment of the present invention.

FIG. 8 is a block diagram showing an orthogonal demodulation device according to a second embodiment of the present invention.

FIG. 9 is a block diagram showing a configuration of a phase rotation unit according to a second embodiment of the present invention.

FIG. 10 is a diagram for explaining phase rotation control in the quasi-coherent detection method according to the second embodiment of the present invention.

FIG. 11 is a block diagram showing a modification of the phase rotation unit according to the second embodiment of the present invention.

FIG. 12 is a block diagram of a quadrature demodulation circuit based on a general synchronous detection demodulation method.

FIG. 13 is a block diagram of a quadrature demodulation circuit based on a general quasi-coherent detection demodulation method.

FIG. 14 is a block diagram showing transmission / reception of a general wireless communication system.

[Explanation of symbols]

1,15 Hybrid (H) 2-I, 2-Q, 11,16-I, 16-Q Mixer (detection circuit) 3 Quadrature correction unit 4,21 Control unit 5,24 Voltage controlled oscillator (VCO) 6, 25 90 ° hybrid (H) 7 Phase rotation controller 8, 28 Fixed frequency oscillator (OSC) 9, 10 Quadrature demodulator 12 Frequency synthesizer 13 Bandpass filter 14 Variable gain amplifier (AGC) 17-I, 17-Q, 22 , 23, 26 Low-pass filter 18-I, 18-Q, 199A, 199B A / D converter 19, 19A-1 Quadrature correction circuit (quadrature correction unit) 19 ', 19A Phase rotation unit 19A-2 Phase rotation circuit (Phase rotation control unit) 20 Equalizer 27 Digital variable frequency oscillator (DVCO) 30 Phase shifter 31, 33, 35 LSI 32, 34, 36, 37 Analog unit 101, 102 antenna 103 transmitting side wireless device 104 receiving side wireless device 105 modulator 106 up converter 107 transmitting filter 108 amplifier (HPA) 109 low noise amplifier (LNA) 110 receiving filter 111 down converter 112 demodulator 113 wireless line 114 wireless communication System 190, 191, 202-205 ROM 192-195 Multiplier 196, 197 Adder 198 θ setting device 200 Polarity inverting device 201 Exclusive OR circuit a, b Axis before correction of orthogonality c, d theoretical orthogonal axis

Claims (5)

(57) [Claims] 1. A frequency conversion is performed using a reproduced carrier signal obtained by feeding back demodulation output information, and two orthogonal demodulation signals that are orthogonal to each other are obtained to perform demodulation processing by a synchronous detection method. In the quadrature demodulation device, a quadrature degree correction unit that performs a correction operation for the above two quadrature demodulated signals so that these quadrature demodulated signals are located on the theoretical quadrature axis is provided , and the quadrature degree caused by the reproduced carrier signal is corrected . The deviation is orthogonal to the theory
There is a deviation of the orthogonality from the case where it is shifted to the positive side with respect to the axis.
When the shift is on the negative side with respect to the theoretical orthogonal axis,
The orthogonality correction unit is configured to change the positive operation.
A direct demodulator , which is characterized in that 2. A demodulation by a quasi-coherent detection method by performing frequency conversion using a reproduced carrier signal to obtain two quadrature demodulation signals that are orthogonal to each other and performing phase rotation control on the two quadrature demodulation signals. processing performed in the orthogonal demodulator, for the two quadrature demodulation signal, orthogonality correction unit is provided which these orthogonal demodulated signal subjected to correction operation, such as to be positioned on theoretical orthogonal axes, due to the reproduction carrier signal Deviation of the orthogonality
There is a deviation of the orthogonality from the case where it is shifted to the positive side with respect to the axis.
When the shift is on the negative side with respect to the theoretical orthogonal axis,
The orthogonality correction unit is configured to change the positive operation.
A direct demodulator , which is characterized in that 3. Feedback of demodulation output information
Allows the playback carrier signal synchronized with the input signal to
Wavenumber conversion is performed to generate two orthogonal demodulated signals that are orthogonal to each other.
By obtaining demodulation processing by synchronous detection method, quadrature
In the demodulation device, regarding the above-mentioned two orthogonal demodulation signals, these orthogonal demodulation signals are
No. is orthogonal to the correction calculation so that the signal is located on the theoretical orthogonal axis.
Is provided with a degree correction unit ,
Depending on the deviation setting information and the change in the frequency of the input signal
The orthogonality correction unit is configured to perform the correction calculation by
The direct demodulator , which is characterized in that 4. Frequency conversion is performed using a reproduced carrier signal.
And to obtain two orthogonal demodulated signals that are orthogonal to each other
To perform phase rotation control on the two quadrature demodulated signals
Enables the quadrature demodulation device to perform demodulation processing using the quasi-synchronous detection method.
The quadrature demodulation signals of the above two quadrature demodulation signals are
No. is orthogonal to the correction calculation so that the signal is located on the theoretical orthogonal axis.
Is provided with a degree correction unit, and the degree of orthogonality generated depending on the frequency of the reproduced carrier signal is
Depending on the deviation setting information and the change in the frequency of the input signal
The orthogonality correction unit is configured to perform the correction calculation by
The direct demodulator , which is characterized in that 5. A phase rotation control for the two quadrature demodulation signals.
The phase rotation control unit that performs the function also serves as the orthogonality correction unit.
The quadrature demodulation device according to claim 2 or 4, characterized in that: