JP3453030B2 - Digital audio equipment - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital audio device capable of recording and reproducing an audio signal using a recording medium such as a mini disk (hereinafter simply referred to as MD), and particularly, at the time of recording the audio signal, The present invention relates to a digital audio device designed to improve monitor sound.

[0002]

2. Description of the Related Art Among conventional digital audio devices, MD devices and the like are capable of both recording and reproduction. In such a digital audio device, when an audio signal such as music is heard at the same time as recording, since the input rate of the input digital audio signal is variable, the digital signal whose input rate is variable is
First of all, we introduce this digital PLL circuit to the digital PLL circuit.
The circuit extracts clocks corresponding to the sampling frequencies of the input digital audio signals of 48KHz, 44.1KHz, and 32KHz, and synchronizes with the clocks data, bit clocks, LR signals, master clocks for D / A converters, etc. The signal of (4) was input to the D / A converter for converting it to the analog signal of the next stage, and the monitor output of the analog signal was obtained.

[0003]

In the above-mentioned conventional digital audio apparatus, when the digital audio signal to be recorded on the recording medium is supplied as a digital optical input, noise due to disturbance or the like is introduced or is input. Since the input rate of the digital audio signal to be changed changes, fluctuations occur in the clock of the digital PLL circuit output. Due to the fluctuation of the clock, noise is generated in the D / A converter in the next stage that converts a digital signal into an analog signal, and an audio signal such as music is disturbed, which is not preferable in terms of hearing.

[0004]

In order to solve the above problems, a digital audio apparatus according to the invention of claim 1 extracts a clock synchronized with a large number of sampling frequencies of an input digital audio signal to be recorded. a digital PLL means for the frequency conversion means for converting the upper fill power digital audio signal-out based on the clock extracted by said digital PLL means to a signal of a single sampling frequency provided, the output signal from said frequency conversion means Signal processing such as signal compression processing is performed and recording is performed on the recording medium.
On the other hand, the data is input to the FIFO means , and the FIFO means
After converting to the data of constant output rate, D / A converter
Data is converted into an analog signal and monitor output is obtained.
Characterized in that that.

Therefore, an input digital audio signal having a large number of sampling frequencies to be recorded on a recording medium such as an MD is supplied to a digital PLL circuit, where the input digital audio signal having a large number of sampling frequencies described above. Extract the clock synchronized with. Next, the frequency conversion circuit converts the input digital audio signal into a signal having an average single sampling frequency based on the clock extracted by the digital PLL circuit. Then, the digital audio signal having a single sampling frequency output from the frequency conversion circuit is
It is recorded on a recording medium after being subjected to normal signal processing such as signal compression processing.

On the other hand, the digital audio signal having a single sampling frequency output from the frequency conversion circuit is supplied to the FIFO means . Digital audio signal converted into the data of the predetermined output rate from the FIFO means a D / A converter, converted into an analog signal, is derived as a monitor output of the analog audio signal. As a result, it is possible to improve the monitor sound when recording the digital audio signal so that the audio signal is not disturbed in terms of the same audibility as during reproduction.

A digital audio apparatus according to a second aspect of the present invention is the digital audio apparatus according to the first aspect, characterized in that the FIFO means is constituted by a gate element.

Therefore, since the FIFO means does not use a memory element such as a RAM but is composed only of a gate element such as a flip-flip, an inexpensive device can be provided and a cost increase factor for improving the monitor sound can be reduced. be able to.

In the digital audio apparatus according to the third aspect of the present invention, a digital PLL means for extracting a clock synchronized with a large number of sampling frequencies of an input digital audio signal to be recorded, and the digital PLL means extract the clock. Frequency conversion means for converting the input digital audio signal into a signal having a single sampling frequency based on the clock, and the digital audio signal converted into a signal having a single sampling frequency by the frequency conversion means is signal-compressed. In the recording / reproducing digital audio device, which performs signal processing such as processing to record the information on the recording medium and performs signal processing such as reading signal expansion processing on the information recorded on the recording medium to derive a reproduction signal, FI for converting the output of the conversion means into data of a fixed output rate The output format of the O means and the monitor signal derived from the FIFO means is made to be the same as the output format of the reproduction signal from the recording medium at the time of reproduction of the digital audio device, and the monitor signal and the reproduction signal are switched. Provided with switching means,
It is characterized in that D / A converter means for converting the monitor signal or the reproduction signal outputted as a digital audio signal from the switching means into an analog signal is provided.

Therefore, an input digital audio signal having a large number of sampling frequencies to be recorded on a recording medium such as a disc is supplied to the digital PLL circuit,
Here, a clock synchronized with the input digital audio signal having a large number of sampling frequencies is extracted. Next, the frequency conversion circuit converts the input digital audio signal into a signal having an average single sampling frequency based on the clock extracted by the digital PLL circuit. Then, the digital audio signal having a single sampling frequency output from the frequency conversion circuit is subjected to normal signal processing such as signal compression processing and recorded on a recording medium.

On the other hand, the digital audio signal having a single sampling frequency output from the frequency conversion circuit is supplied to a FIFO means for correct data conversion when the input / output rates are the same, and the FIFO means outputs a constant output rate. The digital audio signal converted into the data is derived as a monitor signal. The output format of this monitor signal is set to be the same as the output format of the playback signal that has undergone signal processing such as signal expansion processing during playback of the digital audio device. The reproduction signal is guided to the switching device, and selectively outputs one of the outputs. The monitor signal or reproduction signal selectively derived from this switching device is D / A converted by the D / A converter means to selectively derive an analog monitor output or reproduction output.

[0012]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments in which the present invention is applied to an MD device will be described below with reference to the drawings. Figure 1
FIG. 1 is a block diagram of an MD device embodying the present invention. In FIG. 1, the principle of recording / reproducing of the MD device will be briefly described. At the time of recording, the audio signal to be recorded is given as a digital optical input from the terminal 19.

This digital optical input is converted into a digital electric signal by the photoelectric element 15 and then supplied to the digital PLL circuit 16, which in turn extracts the clock and sampling frequencies of 48 KHz and 44.1 K.
Data is detected according to Hz and 32 KHz, and further guided to the frequency conversion circuit 17, where it is converted into data having a single sampling frequency of 44.1 KHz.

Next, the audio compression circuit 7-1 outputs ATRAC (A
Shock proof memory controller 5 for compressing data using the daptive Transform Acoustic Coupling method and then controlling shock proof memory 6.
Further, the signal processing circuit 4 further performs signal processing such as parity addition by the encoder.

The shock proof memory 6 is controlled by the shock proof memory controller 5,
The difference between the transfer rate of the audio data output from the audio compression circuit 7-1 and the transfer rate of the audio data input to the signal processing circuit 4 is absorbed, and the interruption of the signal due to disturbance such as vibration during reproduction is prevented. It is provided for interpolating and protecting audio data.

Next, in the pickup 2, the laser light is M
The magnetic recording medium of the magneto-optical disk 1 constituting D is irradiated, and at the same time the magnetic head 23 is moved to that position by the head drive circuit 24, and the magnetic field corresponding to the data subjected to the encoder signal processing by the signal processing circuit 4 is applied to the magnetic field. The head 23 is formed at the recording position to record digital audio data at a predetermined position on the magneto-optical disk 1.

Here, the feed motor 13 moves the optical pickup 2 in a direction orthogonal to the track of the magneto-optical disk 1, the spindle motor 12 rotates the magneto-optical disk 1, and the driver circuit 11 causes the feed circuit to move. Motor 1
3, a circuit for supplying electric power to drive the spindle motor 12 and the drive device for driving the objective lens of the optical pickup 2. Also, the servo circuit 10
The respective devices driven by the driver circuit 11 are feedback-controlled so that the operation of causing the light emitted from the optical pickup 2 to follow the target track of the magneto-optical disk 1 is accurately performed.

At the time of reproduction, the optical pickup 2 irradiates the magneto-optical disk 1 with laser light, reads the reflected light, and detects the RF signal (modulated audio data) recorded on the magneto-optical disk 1. The detected RF signal is amplified by the RF amplifier 3 and is then sent to the signal processing circuit 4 where it is subjected to decoding processing by the decoder, and then shock proof processing by the shock proof memory 6 and the shock proof memory controller 5. Reverse processing at the time of recording such as expansion processing of the reproduction signal by the audio expansion circuit 7-2 is performed, and the D / A converter 21 converts the analog signal into an analog signal and derives an audio signal reproduction output from the output terminal 22. All the above processes are centrally managed by the system control microcomputer 9.

At the same time as recording, when an audio signal such as music to be recorded is heard as a monitor sound, the audio signal after frequency conversion by the frequency conversion circuit 17, that is, a sampling frequency of 44.1 KHz.
The integrated audio signal is guided to the FIFO circuit 18, converted into data of a constant output rate by the FIFO circuit 18, and then the switching circuit 20 is selected by the system control microcomputer 9 and input to the D / A converter 21. , Get the monitor output converted into analog signal. Figure 1
At the output of the digital PLL circuit 16 at the switching circuit 20
The connection of the dotted line portion directly connecting to the above shows the conventional connection method.

Next, the operation of the FIFO circuit 18 according to the present invention will be described in detail with reference to FIGS. 2, 3 and 4. As shown in FIG. 2, the frequency conversion circuit 17 of FIG.
The serial data din input to is first serial →
After being converted into n-bit parallel data P-DO by the parallel (S → P) conversion circuit 30, it is input to the n-bit register FF1 by the clock signal CK1 having the same rate as the input LR signal Iri, that is, an average of about 44.1 KHz. , Latched here. The signal latched in the n-bit register FF1 is transferred to the n-bit register FF2 and the n-bit register FF3 as quickly as possible according to the values of VAL1, VAL2 and VAL3 (the meanings of these values will be described later).

The signal transferred to the n-bit register FF3 is obtained by dividing the master clock MCKI having a high frequency which is a system clock by the frequency dividing circuit 31.
N at regular time intervals by the 1 KHz clock CK4
It is latched in the bit register FF4.

Then, using a control signal such as a load clock output from the frequency divider circuit 31, parallel → serial (P →
S) The conversion circuit 32 outputs the output data dout in which the n-bit data is converted into serial data, and the frequency dividing circuit 3
From 1 output bit clock bcko, output LR signal Ir
O and the output master clock dcko are output, and data of a constant output rate, a bit clock, an LR signal, and a master clock for the D / A converter that meet the specifications of the D / A converter to be connected next are derived.

Here, as is clear from the detailed block diagram of the FIFO circuit 18 shown in FIG. 2, VAL1, VAL2, V
AL3 signals are n-bit registers FF1 and FF, respectively.
2 shows the presence / absence of data in FF3. In the VAL1, VAL2, and VAL3 signals, when there is data in each of the n-bit registers FF1, FF2, and FF3, when the rising edge of the latch clock of the main stage register occurs, the output of the n-bit register of that stage is "H". In addition, when there is no data in each bit register FF1, FF2, FF3, when the rising edge of the latch clock of the next stage occurs, the output of the n-bit shift register of that stage becomes "L".

Further, the above VAL1, VAL2, VAL3
Are n-bit registers FF1, FF2, FF3, FF
CK1, CK4 to secure the timing margin of 4
Master clock MC with a sufficiently high frequency compared to
Created using both rising and falling edges of K, CK1 and CK2, CK2 and CK3, CK3 and CK4
Are trying not to change at the same time. That is, the rising edge of CK2 is VAL1 = "H" and VAL2 = "L", and the rising edge of CK3 is VAL2 = "H" and VAL3.
= "L" occurs.

However, although the input rates of the input signals din, bcki, and Iri are not constant due to the disturbance of the digital optical input supplied from the input terminal 19 of FIG. 1 and the change of the input rate, the frequency division of the master clock MCK is performed. Output signals dout, bcko, Iro, dck
Since the output rate of o is constant, the difference between the
The O circuit 18 performs the following operation.

As shown in FIG. 3, when the input rate is high,
A state (A) occurs in which the VAL1 signal is "H" and the rising edge of CK1 comes, the data of FF1 is skipped, and as a result, the data is lost. Further, as shown in FIG. 4, when the input rate is small, a state (B) occurs in which the VAL3 signal is "L" and the rising edge of CK4 comes, the data of FF4 is repeated, and as a result, the previous value interpolation of the data occurs. Sometimes.

As a result, when the digital optical input is a sine wave having a single frequency such as 10 KHz, if the above-mentioned data loss or pre-value interpolation occurs, an abnormal noise such as a rattling sound will be heard but the actual music signal input. However, since the frequency changes from time to time and sounds normal, there is no problem in hearing.

As described above, in the embodiment of the present invention, the examples in which the sampling frequencies are 48 KHz, 44.1 KHz and 32 KHz have been described, but any numerical value may be used. Also, the number of stages of the FIFO circuit is not limited to the four stages of this embodiment, and this is determined by the output format of the frequency conversion circuit, and is the minimum necessary amount that does not cause data loss and previous value interpolation when the input / output rates are exactly the same. Take the number of steps.

[0029]

As described above, according to the present invention, the digital audio signal to be recorded having a large number of sampling frequencies is converted into the signal having a single sampling frequency on average by the frequency conversion circuit, and then the FIFO circuit is formed. , It converts to data of a constant output rate, and then the D / A converter converts it to an analog signal to obtain a monitor output, so there is a disturbance in the input digital audio signal to be recorded, or the input rate of the input signal changes. Even if the clock extracted from the sampling frequency fluctuates, noise does not occur in the D / A converter, and the monitor output of a music signal or the like is not disturbed in terms of hearing.

Further, according to the present invention, since the FIFO circuit is composed of only the gate element without using an expensive memory element such as RAM, the output of the monitor such as a music signal is disturbed at a low cost. It is possible to improve the monitor sound so that it does not occur.

Furthermore, according to the present invention, the FIF
Since the output format of the O circuit is made to be the same as the output format of the digital reproduction output reproduced from the recording medium, both the above outputs are switched by the switching circuit and converted into an analog signal using a common D / A converter. Since it is not necessary to add a D / A converter for the monitor signal, it is possible to improve the monitor sound at a low cost so that the monitor output of the music signal or the like is not disturbed in the sense of hearing.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of the present invention.

FIG. 2 is a block diagram showing a configuration of a main part of the present invention.

FIG. 3 is a timing chart of signals of essential parts showing the operation of the present invention.

FIG. 4 is a timing chart of signals of essential parts showing the operation of the present invention.

[Explanation of symbols]

1 Magneto-optical disk 2 optical pickup 3 RF amplifier 4 Signal processing circuit 5 Shockproof memory controller 6 Shockproof memory 7-1 Audio compression circuit 7-2 Voice expansion circuit 9 System control microcomputer 16 Digital PLL circuit 17 Frequency conversion circuit 18 FIFO circuit 20 Switching circuit 21 D / A converter 23 Magnetic head 30 S → P conversion circuit 31 frequency divider 32 P → S conversion circuit FF1 n-bit register FF2 n-bit register FF3 n-bit register FF4 n-bit register

─────────────────────────────────────────────────── ─── Continuation of the front page (58) Fields surveyed (Int.Cl. ⁷ , DB name) G11B 20/10 311 G11B 27/36

Claims (3)

(57) [Claims] And 1. A digital PLL means for extracting a plurality of clock synchronized with the sampling frequency with the input digital audio signal to be recorded, on the entry force digital audio signal-out based on the clock extracted by said digital PLL means A frequency conversion means for converting into a signal of a single sampling frequency is provided, and an output signal from the frequency conversion means is subjected to signal processing such as signal compression processing and recorded on a recording medium, while a FIFO hand is used.
Input to the stage and converted to data of a constant output rate by the FIFO means.
After conversion, a digital audio device characterized in that a D / A converter means converts the analog signal to obtain a monitor output. 2. A digital audio apparatus according to claim 1, wherein said FIFO means is composed of a gate element. 3. A digital PLL means for extracting a clock synchronized with a large number of sampling frequencies of an input digital audio signal to be recorded, and the digital PLL.
Frequency conversion means for converting the input digital audio signal into a signal having a single sampling frequency based on the clock extracted by the means, and the digital audio signal converted into a signal having a single sampling frequency by the frequency conversion means In a recording / playback type digital audio device, which performs signal processing such as signal compression processing and records it on a recording medium, and reads information recorded on the recording medium and performs signal processing such as signal expansion processing to derive a reproduction signal. , varying the output of said frequency converting means into data of a predetermined output rate
The FIFO means to be replaced and the output format of the monitor signal derived from the FIFO means are set to be the same as the output format of the reproduction signal from the recording medium at the time of reproduction of the digital audio device, and the monitor signal and the reproduction signal are And a switching means for switching between the monitor signal and the reproduction signal output as a digital audio signal from the switching means.
A digital audio apparatus characterized by comprising an A / A converter means.