JP3448685B2 - Semiconductor device, liquid crystal display device and EL display device - Google Patents

Description

Detailed Description of the Invention

[0001]

TECHNICAL FIELD The present invention relates to a semiconductor device and a liquid crystal.
The present invention relates to a display device and an EL display device .

[0002]

2. Description of the Related Art As a method of manufacturing a semiconductor thin film for forming a semiconductor layer of a thin film transistor (hereinafter also referred to as "TFT"), an amorphous semiconductor film or a microcrystalline semiconductor film formed on a substrate such as glass is used. A laser annealing method is generally known in which a polycrystalline semiconductor film is obtained by irradiating laser light to crystallize the film. This is usually called a crystallization process.

Argon lasers, KrF and XeCl excimer lasers are commonly used as light sources for lasers used in the crystallization process. The TFT manufactured by the above manufacturing method is generally called a low temperature poly-Si-TFT because Si is mainly used as a semiconductor and the process is constituted at a temperature equal to or lower than the melting point of glass used as a substrate.

In a conventional TFT liquid crystal display device, a TFT using amorphous Si as a semiconductor layer is generally used, and a circuit portion for driving a pixel adopts a method in which an IC chip is mounted around the screen. . On the other hand, by adopting the above-mentioned low-temperature poly Si-TFT, it is possible to manufacture a drive circuit using the TFT formed on the glass substrate. That is, it is possible to reduce the area without the screen in the outer peripheral portion of the panel of the liquid crystal display device, which is usually called a frame, and to manufacture a liquid crystal display device with a higher definition dot pitch. In addition, high-performance low-temperature poly-Si-TFT
By using, the so-called system-on-panel (SOP) in which various semiconductor circuits are formed on the glass substrate becomes possible. Furthermore, by using a low temperature poly Si-TFT, E
An EL display device can be manufactured by switching the L display element.

[0005]

However, the above-mentioned low temperature poly-Si-TFT has the following problems. (1) Since the crystal grain size of the produced polycrystalline silicon thin film is small, the mobility of electrons is small, so that characteristics such as response performance in the case of manufacturing a TFT are deteriorated. (2) As a TFT, a low concentration impurity region (hereinafter referred to as “LD
Also referred to as "D area". ), Or if there are many silicon crystal grain boundaries at or near the boundary between the offset region and the channel region, many crystal defects and dangling bonds exist near the grain boundaries. If this happens, deterioration will occur and reliability will decrease. (3) When a TFT or a display device is manufactured, there is no means for determining the positional relationship between the crystal of the silicon thin film and the TFT pattern. The characteristics vary.

The main object of the present invention is to provide a semiconductor device having high characteristics and high reliability.

[0007]

[Means for Solving the Problems] To achieve the above object
In addition, the semiconductor device of the present invention has a polycrystalline semiconductor layer.
A thin film transistor is provided, and a thin film transistor is provided in the semiconductor layer.
High concentration on both sides of the channel region and the channel region
Impurity region, channel region and high concentration impurity region
Is located between and has a lower impurity concentration than the high-concentration impurity region.
Low concentration impurity region or offset region that does not contain impurities
And a low concentration impurity region or an offset region
The grain size of any of the crystals that are at least partially present in
Larger than the grain size of other crystals, the thin film transistor
Is a material having a higher thermal conductivity than the semiconductor layer.
The pattern is formed in the vicinity of a fixed pattern,
Is formed between the substrate and the semiconductor layer, and
The pattern is formed between the substrate and the semiconductor layer.
The base film is covered with an insulating base film.
The film is composed of an upper base film and a lower base film.
Turn, distribution between the lower base layer and the upper lower Chimaku
And the upper base film is a porous layer,
The lower base film is a denser layer than the porous layer.
Is characterized by. (Method for Producing Semiconductor Thin Film) A method for producing a semiconductor thin film according to the present invention is directed to a part of an amorphous or polycrystalline semiconductor thin film formed on a substrate and having a higher thermal conductivity than the semiconductor thin film. And a step of irradiating the semiconductor thin film with strong light or laser light to crystallize the semiconductor thin film.

According to this method for manufacturing a semiconductor thin film, when the semiconductor thin film is melted by irradiation with intense light or laser light such as a flash lamp, the heat radiating layer radiates heat in the vicinity of the portion where the heat radiating layer is formed. As a result, it is cooled rapidly. This cooling rate becomes gradually slower as the distance from the heat dissipation layer increases. As a result, a temperature gradient occurs in the semiconductor thin film during cooling, so that crystals grow along this temperature gradient, that is, in the direction away from the vicinity of the heat dissipation layer, and crystals with a large grain size are obtained. T using this semiconductor thin film
When FT is manufactured, the mobility is improved and the deterioration of the performance is reduced because the crystal grain size is larger than that of the conventional one.

As the step of forming the heat dissipation layer, specifically, the following method can be preferably exemplified.

Forming a film of a substance having a higher thermal conductivity than the semiconductor thin film on the semiconductor thin film, forming a resist mask on the film of a substance having a higher thermal conductivity by photolithography, A step of etching away a portion of the film having a high thermal conductivity that is not covered with the resist mask; a step of removing the resist mask; a step of forming a resist pattern by photolithography; A step of forming a film of a substance having a high conductivity, a step of lifting off the resist pattern together with the substance having a high thermal conductivity, and using a mask having an opening, a thermal conductivity higher than that of the semiconductor thin film by vapor deposition or sputtering. The process of depositing a high-quality substance makes it possible to easily form the heat dissipation layer and improve productivity. It is possible to above.

The heat dissipation layer can be formed in contact with the semiconductor thin film, and may be above or below the semiconductor thin film.

Further, in another method of manufacturing a semiconductor thin film according to the present invention , the intense light or the laser light is pulsed for a predetermined range on the substrate with the positional relationship between the substrate and the light source being fixed. Alternatively, it is provided by irradiation with a plurality of pulses.

In the case of scanning irradiation in which pulse irradiation is performed while moving the substrate or the light source at a predetermined pitch, crystals grow in correspondence with each irradiation position, so crystals having a grain size equal to or larger than the pitch width in the scanning direction. Is not formed. On the other hand, by performing pulse irradiation with the positional relationship between the substrate and the light source fixed, it is possible to form crystals with a large grain size without being restricted by the scanning pitch width. In particular, by irradiating a predetermined range on the substrate with a plurality of pulses, variations in irradiation intensity for each pulse are averaged and the crystal grain size and film quality of the semiconductor thin film are made uniform. The variation in the characteristics of is reduced.

However, the intense light or the laser light is irradiated by a plurality of pulses for a predetermined range on the substrate while the positional relationship between the substrate and the light source is relatively changed at a predetermined pitch by a pulse laser device. It is also possible to give it by irradiation.

Still another method of manufacturing a semiconductor thin film according to the present invention is a step of forming a heat dissipation layer on a part of a substrate and forming an amorphous or polycrystalline semiconductor thin film on the substrate. The method further comprises the steps of irradiating the semiconductor thin film with intense light or laser light to crystallize the semiconductor thin film, and the heat dissipation layer is made of a material having a higher thermal conductivity than the semiconductor thin film.

According to this method of manufacturing a semiconductor thin film, since the semiconductor thin film is formed after forming the heat dissipation layer, the heat dissipation layer is formed below the semiconductor thin film. Therefore, a TFT is manufactured using this semiconductor thin film. If so, it is not necessary to remove the heat dissipation layer. Further, since it is not necessary to remove the heat dissipation layer, this heat dissipation layer can also be used as an alignment key in the TFT manufacturing process. Examples of the step of forming the heat dissipation layer below the semiconductor thin film include the following.

A step of forming a heat dissipation layer on the substrate, a step of forming an insulating base film on the substrate and covering the heat dissipation layer with the base film; and an amorphous or multi-layered base film. A step of forming a crystalline semiconductor thin film, a step of forming a base film having an insulating property on a substrate, a step of forming the heat dissipation layer on the base film, and another base film having an insulating property on the base film And covering the heat dissipation layer with the other underlayer film, and forming an amorphous or polycrystalline semiconductor thin film on the other underlayer film.

Still another method of manufacturing a semiconductor thin film according to the present invention is to irradiate an amorphous or polycrystalline semiconductor thin film formed on a substrate with intense light or laser light through an exposure mask. A step of crystallizing the exposure mask, wherein the exposure mask has a lens portion having a curved surface formed on at least a part of the front and back surfaces, and produces an inclined distribution in the amount of light with which the semiconductor thin film is irradiated. To do.

According to this method of manufacturing a semiconductor thin film, since the intense light or the laser light is transmitted through the lens portion of the exposure mask, the light amount irradiated to the semiconductor thin film has a sloping distribution. Accordingly, a temperature distribution is generated in the semiconductor thin film. As a result, the melted semiconductor thin film starts to solidify and crystallize from the lowest temperature part, that is, the part with the lowest irradiation light amount. Then, along the gradient temperature gradient, the crystal grows toward the portion where the irradiation light amount was large, and a crystal having a large grain size is obtained. When a TFT is manufactured using this semiconductor thin film, since the crystal grain size is larger than that of the conventional one, the mobility is improved and the deterioration of the performance is reduced.

As a method for producing the above light quantity distribution,
Specifically, the following can be preferably exemplified.

When an exposure mask in which the lens portion is formed in a band shape or a circle shape in a plan view is used, and the lens section which causes a light amount distribution along the longitudinal direction of the band shape or a radial direction of the circle shape is a band shape in a plan view. , The crystal grows along the longitudinal direction of the strip from the portion where the amount of light is weak to the portion where the amount of light is strong. Also,
When the lens portion has a circular shape in a plan view, the amount of light is increased from weak to strong in the direction from the vicinity of the center of the lens portion to the outer periphery, whereby crystals grow from the central portion to the peripheral portion.
If the lens portion has a circular shape in plan view, the position where crystallization starts is clear as a point, so there is an advantage that the formation position of the large grain crystal can be controlled with high accuracy. As a specific example of the lens portion having a circular shape in plan view, a concave lens in which the inner wall surface of the concave portion formed on the lower surface of the exposure mask is a substantially spherical shape can be mentioned.

The curved surface of the lens portion is preferably formed by denting at least a part of the front and back surfaces of the exposure mask, but conversely, the lens portion is made to have a convex shape and the other portion of the exposure mask is formed. It is also possible to form the lens portion to be thicker than that.

Still another method of manufacturing a semiconductor thin film according to the present invention is to irradiate an amorphous or polycrystalline semiconductor thin film formed on a substrate with intense light or laser light through an exposure mask. It is characterized in that the exposure mask includes a step of crystallizing, and the exposure mask imparts a phase distribution to the irradiation light to generate an oblique distribution in the amount of light irradiated to the semiconductor thin film.

According to this method for manufacturing a semiconductor thin film, since the light quantity irradiated to the semiconductor thin film has a sloping distribution due to the interference of light generated by the phase distribution, a temperature distribution is generated in the semiconductor thin film according to the light quantity distribution. . As a result, the melted semiconductor thin film starts to solidify and crystallize from the lowest temperature part, that is, the part with the smallest irradiation light amount.
Then, along the gradient temperature gradient, the crystal grows toward the portion where the irradiation light amount was large, and a crystal having a large grain size is obtained. When a TFT is manufactured using this semiconductor thin film, since the crystal grain size is larger than that of the conventional one, the mobility is improved and the deterioration of the performance is reduced.

As a method of producing the phase distribution,
Specifically, the following can be preferably exemplified, which makes it possible to easily give a light amount distribution.

An exposure mask made of a light transmissive member having a partially different thickness is used, and a phase distribution is given to the irradiation light by this thickness distribution. For example, a concave portion whose inner wall surface is cylindrical is formed on the lower surface of the exposure mask. Thus, by providing the step, it is possible to give a phase distribution to the transmitted light. Also,
In the case where the recess is formed in a circular shape in a plan view as described above, the position where crystallization starts is clear as a point, so that the formation position of the large grain crystal can be controlled with high accuracy. .

Still another method of manufacturing a semiconductor thin film according to the present invention is to irradiate an amorphous or polycrystalline semiconductor thin film formed on a substrate with intense light or laser light through an exposure mask. A step of crystallizing, wherein the exposure mask is made of a light-shielding member having a plurality of openings, and the plurality of openings cause an oblique distribution in the amount of light with which the semiconductor thin film is irradiated. And

According to this method of manufacturing a semiconductor thin film, by appropriately determining the size, shape, arrangement, etc. of each opening, a sloping distribution is generated in the amount of light irradiated onto the semiconductor thin film. As a result, temperature distribution occurs in the semiconductor thin film. As a result, the melted semiconductor thin film starts to solidify and crystallize from the lowest temperature part, that is, the part with the smallest irradiation light amount. Then, along the gradient temperature gradient, the crystal grows toward the portion where the irradiation light amount was large,
Crystals with a large grain size are obtained. When a TFT is manufactured using this semiconductor thin film, since the crystal grain size is larger than that of the conventional one, the mobility is improved and the deterioration of the performance is reduced.

As a method of producing the light quantity distribution,
Specifically, the following can be preferably exemplified.

Using an exposure mask in which a plurality of the opening portions are arranged so that the aperture ratio per unit area changes stepwise or continuously along the longitudinal direction of the strip-shaped region, the light amount distribution is changed to the longitudinal direction. An exposure mask in which a plurality of openings are arranged so that the aperture ratio per unit area increases stepwise or continuously in the radial direction from the center of the circular region to the periphery. When the aperture ratio per unit area that causes the light amount distribution to be generated along the radial direction is changed along the longitudinal direction of the strip-shaped region, the portion where the light amount is weak to the strong portion along the longitudinal direction is used. The crystal grows toward. In addition, when the aperture ratio per unit area is increased in the radial direction from the center of the circular region toward the periphery, crystals grow from the center of the circular region toward the periphery. By making the change of the light quantity distribution incline, the grain size of the crystal becomes large. In the latter case, since the position where crystallization starts is clear as a point, there is an advantage that the formation position of the large grain crystal can be controlled with high accuracy.

In the method of manufacturing a semiconductor thin film,
The semiconductor thin film may be formed after the porous insulating film is formed on the substrate, whereby crystals having a larger grain size can be obtained.

The manufacturing method of a semiconductor device related to the present invention (a method of manufacturing a semiconductor device) is a part of the semiconductor thin film of amorphous or polycrystalline formed on the substrate, the thermal conductivity than the semiconductor thin film A heat-dissipating layer made of a substance having a high temperature and an alignment key; a step of irradiating the semiconductor thin film with strong light or a laser beam to crystallize; and a step of forming a gate electrode film on the semiconductor thin film. The alignment key is used in a photo process for etching at least a part of the gate electrode film to form a pattern of the gate electrode at a predetermined position.

According to this method of manufacturing a semiconductor device, when the semiconductor thin film is melted by irradiation with intense light or laser light,
The vicinity of the portion where the heat dissipation layer is formed is rapidly cooled by the heat dissipation by the heat dissipation layer. This cooling rate becomes gradually slower as the distance from the heat dissipation layer increases.
As a result, a temperature gradient occurs in the semiconductor thin film during cooling, so that crystals grow along this temperature gradient, that is, in the direction away from the vicinity of the heat dissipation layer, and crystals with a large grain size are obtained.

When a TFT is manufactured using this semiconductor thin film, the crystal grain size is larger than that of the conventional one, so that defects mainly present at the crystal grain boundaries are reduced or eliminated, and the TFT including mobility is reduced. Since the characteristics are improved, a semiconductor device having high characteristics and high reliability can be obtained. For the specific method of forming the heat dissipation layer, the method of manufacturing the semiconductor thin film may be referred to.

Furthermore, since an alignment key is formed on the semiconductor thin film, a gate electrode can be formed by using this alignment key, and TF can be applied to large grain crystals.
T can be formed at a desired position.

Conventionally, even if a large grain crystal was formed in a semiconductor thin film, there was no means for forming a TFT in accordance with this crystal. Therefore, in the LDD region, the offset region or the channel region, the presence or absence of a grain boundary and the grain boundary were observed. The change in the number of fields has caused the TFT characteristics to vary. However, according to this method of manufacturing a semiconductor device, the TFT or a part of the TFT structure can be formed at the position of the large grain crystal while avoiding the position of the crystal grain boundary, so that the above problems can be mitigated. it can.

It is preferable that this alignment key is formed simultaneously with the formation of the heat dissipation layer in the same process.

Another method of manufacturing a semiconductor device according to the present invention is a step of forming an alignment key on a part of a substrate, and forming an amorphous or polycrystalline semiconductor thin film on the substrate and the alignment key. A step of forming, a step of irradiating the semiconductor thin film with strong light or a laser beam to crystallize, and a step of forming a gate electrode film on the semiconductor thin film, wherein the alignment key is more than the semiconductor thin film. It is made of a material having a high thermal conductivity, and is used in a photo process for forming a pattern of a gate electrode at a predetermined position by etching at least a part of the gate electrode film.

According to this method of manufacturing a semiconductor device, the characteristics of the TFT are improved as described above, a semiconductor device having high characteristics and high reliability is obtained, and the alignment key also functions as a heat dissipation layer. Therefore, productivity can be improved.

Still another method of manufacturing a semiconductor device according to the present invention is to irradiate an amorphous semiconductor thin film formed on a substrate with intense light or laser light through an exposure mask to obtain a light amount. The method includes crystallizing in a state where the distribution is generated and forming an alignment key, and forming a gate electrode film on the semiconductor thin film, wherein the alignment key is configured such that the exposure mask blocks a part of transmitted light. To form a gate electrode pattern at a predetermined position by etching at least a part of the gate electrode film by forming a color difference between the polycrystalline silicon region and the amorphous silicon region generated in the semiconductor thin film. It is used in the photo process of.

According to this method of manufacturing a semiconductor device, a distribution of the amount of light applied to the semiconductor thin film is generated, so that a temperature distribution is generated in the semiconductor thin film in accordance with the distribution of the amount of light.
As a result, the melted semiconductor thin film starts to solidify and crystallize from the lowest temperature part, that is, the part with the lowest irradiation light amount. Then, the crystal grows toward the portion where the irradiation light amount is large, and a crystal having a large grain size is obtained. When a TFT is manufactured using this semiconductor thin film, the crystal grain size is larger than that of the conventional one, so that the defects mainly present in the crystal grain boundaries are reduced or eliminated, and TF including mobility is reduced.
Since the characteristics of T are improved, it is possible to obtain a semiconductor device having high characteristics and high reliability. For the method of generating the light amount distribution, refer to the method for manufacturing the semiconductor thin film.

Further, since the alignment key is formed on the semiconductor thin film, the gate electrode can be formed using this alignment key, and TF can be applied to the large grain crystal.
T can be formed at a desired position. Therefore,
Since the TFT or a part of the TFT structure can be formed at the position of the large grain crystal, it is possible to alleviate the problem of the variation in the TFT characteristics that has occurred in the past.

For the alignment key, a region of the semiconductor thin film corresponding to the key pattern formed on the exposure mask is irradiated to form a polycrystalline region, and the surrounding irradiation light is blocked by the exposure mask to be an amorphous region. Can be formed. Alternatively, it is also possible to form an amorphous region with only a portion corresponding to the key pattern as a non-irradiated portion, and form an exposure mask so that the periphery thereof is irradiated to form a polycrystalline region. The amorphous region and the polycrystalline region are preferably formed in the same layer of the semiconductor thin film.

In still another semiconductor device manufacturing method according to the present invention , a step of forming a gate electrode and an alignment key on a part of a substrate, and an amorphous or multi-layered structure on the gate electrode and the alignment key. A step of forming a crystalline semiconductor thin film; a step of using the alignment key to form a heat dissipation layer made of a substance having a higher thermal conductivity than the semiconductor thin film at a predetermined position on the semiconductor thin film; And crystallization by irradiating strong light or laser light.

According to this method of manufacturing a semiconductor device, by forming the heat dissipation layer by using the alignment key, it is possible to form a large grain crystal in accordance with the position of the gate electrode. The alignment with the TFT can be performed accurately. Therefore, as described above, T
The FT characteristics are improved, and a semiconductor device having high characteristics and high reliability can be obtained.

(Semiconductor Device) To achieve the above object, a semiconductor device according to the present invention includes a thin film transistor having a polycrystalline semiconductor layer, and a channel region and the channel region are provided in the semiconductor layer. A high-concentration impurity region located on both sides of the LDD region, an LDD region located between the channel region and the high-concentration impurity region and having an impurity concentration lower than that of the high-concentration impurity region, or an offset region containing no impurity. It is characterized in that the grain size of any of the crystals, at least a part of which exists in the region or the offset region, is larger than the grain sizes of the other crystals. Here, the crystal grain size is a value obtained by measuring the longest diameter in an arbitrary direction in plan view.

When an electric current flows while the TFT constituting the semiconductor device is in the ON state, the carriers moving in the channel region at high speed may collide with crystal defects and be scattered. This is called the hot carrier phenomenon. When the scattered carriers hit a weak bond such as Si-H nearby, the carrier is broken and a dangling bond of Si is formed. When a dangling bond is formed, other carriers are captured, so that the electric conductivity and mobility are extremely lowered, and T
FT characteristics deteriorate.

Crystal defects and Si-H bonds are concentrated near the crystal grain boundaries. Especially, when many crystal grain boundaries exist in the LDD region or offset region on the drain side, the characteristics are deteriorated and the reliability is reduced. Leading to a decrease in

Therefore, by making the grain size of any of the crystals, at least a part of which exists in the LDD region or the offset region, larger than the grain size of the other crystals, the crystal grain boundaries existing in this region are compared with the conventional ones. Can be reduced or eliminated altogether, and the characteristics and reliability can be improved.

For example, as shown in FIG.
When the grain size of the crystal C1 in which a part of the crystal is present in the region A indicating the D region or the offset region is made larger than the grain size of the other crystal C2, and the crystal grain boundary B is slightly present in the region A. Alternatively, as shown in FIG. 30 (b), the grain size of the crystal C3 including all of the region A is made larger than that of the other crystal C4, and there is no grain boundary in the region A at all. .

Another crystal whose grain size is to be compared is LDD.
Those existing outside the region or the offset region are preferable. That is, the grain size of any of the crystals of which at least a part is present in the LDD region or the offset region is other crystals which are entirely present outside the LDD region or the offset region (more preferably, other crystals present in the channel region). It is preferable that the particle size is larger than any of the grain sizes.

If a large number of crystal grain boundaries exist near the boundary between the channel region and the LDD region or the offset region on the drain side, the deterioration of characteristics and the deterioration of reliability are more remarkable. Therefore, from at least one of the boundary between the channel region and the LDD region or the offset region, the LDD region side or the offset region side 0.5 including the boundary is included.
It is preferable that one of the crystals, at least a part of which exists in the region within μm, has a larger grain size than other crystals. This region is preferably 0.4 μm or less including the LDD region side or the offset region side, including the boundary,
More preferably, it is within 0.3 μm.

In this case as well, the grain size of any of the crystals at least partially present in the above region is present in the other crystals entirely outside the LDD region or the offset region (more preferably in the channel region). It is preferable that the particle size is larger than any of the other crystals).

According to an experiment conducted by the present inventors, it was found that the relationship between the crystal grain size of polycrystalline silicon and the TFT reliability is shown in FIG.
It became clear that there is a correlation as shown in. Here, the boundary between the channel region forming the TFT and the LDD region or the offset region is aligned with the center of the crystal grain size. As for the reliability, for each of the TFTs having the LDD region or the offset region, a voltage of 5 V is applied between the source and drain, and 500 kHz 1500 hours,
By repeating ON / OFF of the gate voltage, a resistance test is performed in a large number of switching operations, and the resistance is indicated by the ratio of the mobility after the inspection to the mobility before the inspection.

As is clear from the figure, the crystal grain size is 0.
When the thickness is 6 μm or more, the reliability is 75% or more, which is good in both cases of LDD and offset. The reliability of the TFT is better as the crystal grain boundary is farther from the boundary between the channel region and the LDD region or the offset region, and the crystal grain size is preferably 0.8 μm or more, more preferably 1 μm or more.

Further, as a result of the subsequent examination, among the crystal grain boundaries located on both sides of the region boundary, the grain boundaries existing near the region boundary on the LDD region or offset region side adversely affect the reliability. I understood. That is, since the electric field is high in the vicinity of the region boundary in the LDD region or the offset region on the drain side, if a grain boundary exists at this position, hot carriers are easily generated. In addition, the semiconductor layer may be destroyed starting from the grain boundary. As a result, the TFT characteristics are deteriorated, and the reliability is degraded when the switching operation is performed for a long time or many times.

Therefore, among the crystal grain boundaries located on both sides of the region boundary, it is particularly effective to separate the grain boundaries on the LDD region or offset region side from the region boundary by a predetermined distance or more. Since this distance corresponds to half the crystal grain size in the above experiment, it is preferably 0.3 μm or more, more preferably 0.4 μm or more, and 0.5 μm or more. More preferable. That is, the LD including the boundary from at least one of the boundary between the channel region and the LDD region or the offset region.
By adopting a structure in which crystal grain boundaries do not exist within 0.3 μm on the D region or offset region side, there are few defects that cause the hot carrier phenomenon in this vicinity, and even if hot carriers are generated, it is weak such as Si-H. Since the number of bonds is small, dangling bonds, which are the main cause of characteristic deterioration, do not occur, and the phenomenon of destroying the semiconductor layer due to defects is less likely to occur. As a result, the deterioration of the TFT characteristics can be reduced and the reliability can be improved.

The region boundary where no crystal grain boundary exists may be on the drain side. However, depending on the semiconductor device,
Since the drain and source may be converted,
In this case, it is preferable that no grain boundaries exist at the boundary between the drain side and the source side.

Further, in the above semiconductor device, it is preferable that no crystal grain boundary exists within 0.3 μm from the boundary between the channel region and the LDD region or the offset region on the channel region side. This distance is more preferably 0.4 μm or less, further preferably 0.5 μm or less. As a result, the grain boundaries do not exist not only within the predetermined distance on the LDD region or the offset region side of the region boundary but also within the predetermined distance on the channel region side, so that the mobility is improved and the deterioration of the TFT characteristics is reduced. In addition, the reliability can be improved more reliably.

Further, another semiconductor device related to the present invention comprises a thin film transistor having a polycrystalline semiconductor layer, wherein a channel region and high-concentration impurities located on both sides of the channel region are provided in the semiconductor layer. A region and an LDD region located between the channel region and the high-concentration impurity region and having an impurity concentration lower than that of the high-concentration impurity region or an offset region containing no impurities, and the LDD region or the offset region on at least one side In addition, there is no grain boundary.

According to this semiconductor device, since no crystal grain boundary exists in the LDD region or the offset region on the drain side having the portion where the electric field is high, it is possible to suppress the generation of hot carriers and reduce the deterioration of the TFT characteristics. Also, the reliability can be improved.

Further, when the channel region is configured so that no crystal grain boundary exists, the mobility is improved and T
It is possible to more reliably reduce the deterioration of the FT characteristics and improve the reliability.

Further, when the high-concentration impurity region adjacent to the LDD region or the offset region is configured so that no grain boundary exists, the contact resistance of the source or drain is reduced, and the TFT of the TFT is substantially formed. The effect of increasing the on-current can be obtained.

Still another semiconductor device according to the present invention is provided with a plurality of thin film transistors having a common function, and 50% or more of the whole thin film transistors are the above-mentioned thin film transistors ( However, the numbers after the decimal point are truncated.) This ratio is 70%
More preferably, it is more preferably 90% or more. For example, in a liquid crystal display device or an EL display device which is an example of a semiconductor device, when the number of TFTs controlling the operation of each pixel is 100, for example, it is preferable that the above-mentioned TFTs are 50 or more.

According to this semiconductor device, among the plurality of thin film transistors, the thin film transistors capable of reducing the deterioration of the TFT characteristics and improving the reliability are provided in a predetermined ratio or more, so that stable performance can be obtained. .

In each of the above semiconductor devices, it is preferable that a base film having an insulating property is formed between the substrate and the semiconductor layer, and the base film has an average pore diameter of 0.01 to 2 μm.
It is preferable to include the porous layer of This pore size has a cross section S
It can be measured by observation using an electron microscope typified by EM / TEM.

By forming a base film including a porous layer between the substrate and the semiconductor layer, an effect of promoting crystal growth of the semiconductor layer can be obtained. However, when the pore diameter of the porous layer is large, the effect of preventing the diffusion of impurities from the substrate to the semiconductor layer is not sufficient, and the gate voltage that switches from OFF to ON when the TFT is switched for a long time or many times A shift of the threshold value (Vt) occurs. Further, if large voids are present at the interface with the channel region or the LDD region, the TFT will not function and the yield will be deteriorated.

From the above viewpoint, the pores of the porous layer preferably have an average pore diameter of 0.01 to 2 μm, and 0.0
More preferably, it is 5 to 0.1 μm. As a result, not only the effect of increasing the grain size in the semiconductor layer is obtained, but also the defective rate of the TFT is lowered, and further, the gate voltage at which the TFT is switched from off to on when the TFT is operated for a long time or many times. It is possible to prevent the threshold value (Vt) from being shifted.

The insulating base film formed between the substrate and the semiconductor layer has an average pore diameter of 0.01.
It is also preferable to include a porous layer of ˜2 μm and a layer formed on the porous layer and denser than the porous layer.

According to this semiconductor device, the dense layer forming the base film has the effect of preventing the diffusion of impurities, the defective rate of the TFT is lowered, and the TFT is operated for a long time or many times. In this case, it is possible to prevent the threshold voltage (Vt) of the gate voltage from being switched from off to on. Further, the porous layer forming the base film has an effect of promoting crystal growth of the semiconductor layer.

Still another semiconductor device according to the present invention is characterized in that the thin film transistor is formed in the vicinity of a pattern of a predetermined shape made of a substance having a higher thermal conductivity than the semiconductor layer.

According to this semiconductor device, it becomes easy to form crystals with a large grain size in the semiconductor layer by the pattern of a predetermined shape made of a substance having a higher thermal conductivity than the semiconductor layer.

The pattern is preferably formed between the substrate and the semiconductor layer, and more preferably covered by an insulating base film formed between the substrate and the semiconductor layer. This produces an effect that this pattern can be used as an alignment key in a photo process when manufacturing a semiconductor device.

The base film can be composed of a first base film (upper base film) and a second base film (lower base film). The pattern may be formed between them. In this case, it is preferable to make the thickness of the first undercoating film smaller than the thickness of the second undercoating film so that the crystal having a larger grain size can be obtained with good thermal conductivity.
The pattern is preferably made of a metal film and can be provided in the vicinity of the drain region, the channel region or the source region of the semiconductor layer.

It is possible to obtain a semiconductor device in which a crystal having a grain size larger than that of the crystal in other portions exists in the semiconductor thin film around the pattern. The pattern can be provided in contact with the semiconductor thin film. Further, it is possible to obtain a semiconductor device in which the crystal grain size of the semiconductor thin film located directly above or directly below the pattern is smaller than the crystal grain size of the semiconductor thin film around the pattern.

The above semiconductor device can be manufactured, for example, by the above-described method for manufacturing a semiconductor device. In addition, for example, by the above-described method for manufacturing a semiconductor device,
The following semiconductor device can be manufactured.・
A thin film transistor having a semiconductor layer formed on a substrate is provided, and a channel region, high concentration impurity regions located on both sides of the channel region, and a region between the channel region and the high concentration impurity region are provided in the semiconductor layer. However, it has an LDD region having an impurity concentration lower than that of the high-concentration impurity region or an offset region containing no impurity, and the crystal grain size in the vicinity of the boundary between the channel region and the LDD region or the offset region is a crystal of another region. A semiconductor device characterized by having a larger grain size, and a thin film transistor having a semiconductor layer formed on a substrate, wherein a channel region and high-concentration impurity regions located on both sides of the channel region are provided in the semiconductor layer. And a crystal grain size in the vicinity of the boundary between the channel region and the high-concentration impurity region is larger than that in other regions. A thin film transistor having a semiconductor layer formed on a substrate is provided, and in the semiconductor layer, a channel region, high concentration impurity regions located on both sides of the channel region, and between the channel region and the high concentration impurity region. A LDD region having an impurity concentration lower than that of the high-concentration impurity region or an offset region containing no impurities, and the crystal grain size of the source region is different from that of the LDD region or the offset region, or A thin film transistor having a semiconductor layer formed on a semiconductor device / substrate in which the crystal grain size of the source region and the crystal grain size of the drain region are different (for example, the crystal grain size of the drain region is smaller than the crystal grain size of the source region) It includes a semiconductor device also one grain boundary exists in a channel region of the semiconductor layer, still another semiconductor device related to the present invention The thin film transistor comprises a semiconductor layer formed of a polycrystalline semiconductor thin film, and having a pattern of a predetermined shape formed of amorphous semiconductor thin film.

According to this semiconductor device, there is an effect that a pattern having a predetermined shape can be used as an alignment key in a photo process in manufacturing.
It is preferable that the polycrystalline semiconductor thin film and the amorphous semiconductor thin film form the same layer.

Further, each of the above-mentioned semiconductor devices is, for example,
By being supplied with a voltage through a semiconductor device including a plurality of thin film transistors, a display device such as a liquid crystal display device or an EL display device in which each pixel operates can be obtained.
In this case, it is possible to improve the life until the point defect and the line defect of the image appear, improve the definition and the uniformity of the screen brightness, and improve the yield and reliability. An EL display device can manufacture, drive, and display an EL pixel and a driver circuit using the above-mentioned TFT using a TFT, and includes both an inorganic EL display and an organic EL display.

[0079]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings.

(Embodiment 1) (Semiconductor Thin Film) First, a method of manufacturing a semiconductor thin film will be described. The manufacturing method in the present embodiment and the following embodiments is GaA
The same applies to semiconductor thin films such as s, Ge, SiGe, and SiGeC, but the description will focus on silicon (Si), which is commonly used at present.

As shown in FIG. 1, for the purpose of preventing the diffusion of impurities from the substrate 1, for example, TEOS-C is formed on the substrate 1.
A SiO ₂ base film 2 having a film thickness of 300 nm is formed by the VD method. The thickness of the base film 2 is not limited to 300 nm, and various settings can be made. Although glass is used as the substrate 1 in the present embodiment, it is also possible to use plastic or a film. A silicon nitride film or the like can also be used as the base film 2. SiO
_There is no problem if the film thickness of the _two films and the silicon nitride film is 200 nm or more. If the film thickness is less than 200 nm, impurities from the glass substrate 1 may diffuse into the silicon layer 9 and a problem such as Vt shift of TFT characteristics may occur.

Next, the base film 2 is formed by the plasma CVD method.
An amorphous silicon film 3 is formed on top. In forming the amorphous silicon film 3, a low pressure CVD method or sputtering may be used. The thickness of the amorphous silicon film 3 is usually preferably 30 nm to 90 nm. In this embodiment, the thickness is 50 nm.

Then, in order to remove hydrogen in the produced amorphous silicon film 3, a heat treatment is carried out at 450 ° C. for 1 hour as a dehydrogenation step. Note that the dehydrogenation treatment is not necessary when a method such as sputtering in which hydrogen is not contained in the amorphous silicon film 3 or a film formation method in which the amount of contained hydrogen is small is used.

Next, as shown in FIG. 2, preliminary irradiation is performed by a laser annealing device (ELA device) 6. In this embodiment mode, a XeCl pulsed laser (wavelength: 308 nm) is used, and laser light is irradiated 10 times (10 pulses) to one position while moving a substrate on a stage (not shown). Instead of moving the substrate, the substrate may be fixed and irradiation may be performed while moving the optical system of the laser light.

Since the laser used for crystallization needs to generate heat by being absorbed by the silicon film, it has a wavelength of 500.
A shorter laser of nm or less is required, and the shorter the wavelength, the better the absorption efficiency, which is preferable. In the present invention, X
Although the crystallization process was performed using an eCl excimer laser (wavelength 308 nm), any laser having a wavelength of 500 nm or less may be used, and an excimer laser such as ArF or KrF or an Ar laser may be used. Further, although a pulsed laser is used for description, a continuous wave (CW) laser may be used. In this case, the number of pulses in the following description may correspond to the irradiation time.

When the laser beam 7 is applied to the amorphous silicon film 3, crystallization occurs by irradiating the amorphous silicon film 3 with an energy density of about 160 mJ / cm ² or more at room temperature, and the polycrystalline silicon film is sequentially irradiated in the direction of the arrow. 11 is formed. In order to calculate the energy density, it is necessary to obtain the irradiation area. In this specification, however, the distribution of the laser intensity is measured, and the positions at which the intensity is half the maximum intensity are connected and surrounded. The area of the exposed region is the irradiation area.

In this pre-irradiation step, the polycrystalline silicon film 11 having a particularly high film quality is not necessary, and conversely, the smaller the grain size, the more crystal defects are generated in the subsequent step of forming the large grain size silicon film. Since it is difficult, 170-280 mJ /
The amorphous silicon film 3 is crystallized by using a relatively weak laser intensity of cm ² . In this embodiment, 250 mJ
/ Cm ² and the particle size is 30 nm as shown in Fig. 3.
The following polycrystalline silicon film 11 was obtained.

Next, using the pattern forming mask, as shown in FIG. 8A, the heat dissipation layer 4 and the alignment key 5 are formed on the polycrystalline silicon film 11. In this embodiment, the film is formed by vapor deposition, but other means such as sputtering can be applied.

The heat dissipation layer 4 is a substance having a higher thermal conductivity than the polycrystalline silicon film 11, and is made of Al, Ti, Ni, Cr,
Ti, Mo, W, Cu, Au, Ag, Pt, Ta, In
Almost all metals or alloys thereof are suitable. Further, a metal oxide such as ITO (InTiO) may be used as long as it has high thermal conductivity. This also applies to the following embodiments. In the present embodiment, the heat dissipation layer 4 and the alignment key 5 are formed of molybdenum tungsten alloy (MoW). Further, although the heat dissipation layer 4 has a rectangular shape in a plan view in the present embodiment, it may have a triangular shape, a circular shape, an elliptical shape, or the like.

Then, the laser annealing apparatus (ELA
Device) is used to perform the main irradiation step as shown in FIG. The lower limit of the irradiation intensity of the laser beam 7 in the main irradiation process is a value larger than the irradiation intensity of the preliminary irradiation process described above. Further, the upper limit of the irradiation intensity is the polycrystalline silicon layer 11
It is the value until the alteration and evaporation of In particular,
The intensity range of the laser beam 7 is 280 mJ / cm ² to 420
mJ / cm ² , which is 380 mJ / c in this embodiment.
It was set to m ² . Further, it is preferable that the upper limit value and the lower limit value are substantially proportional to the film thickness of the silicon film 3, Ta is the film thickness (nm) of the silicon film 3, and El is the laser light intensity density (mJ / mJ /
As cm ² ), a range satisfying the relationship of 3.78Ta + 138 ≦ El ≦ 4.54Ta + 153 is preferable.

As the number of times the laser beam 7 is irradiated to one location is increased, the irradiation intensity is stabilized and the crystal grain size and the film quality become uniform, so that the characteristics when the TFT is formed later are stabilized. On the other hand, it takes a long time to irradiate, which deteriorates productivity. Therefore, from this point of view, the preferable number of irradiations per site is about 10 to 30 times. In this embodiment, while moving the substrate at an appropriate pitch,
I went to one place 20 times. In addition, the number of irradiation to one place is 10
When the number of times is 0 or more, the mobility in the case of manufacturing the TFT is improved by about 1.5 times as compared with the case of 20 times.

By this main irradiation step, the polycrystal silicon film 11 in the preliminary irradiation step is melted again. In the vicinity of the heat dissipation layer 4 in the melted silicon film 11, an arrow 12 is drawn toward the heat dissipation layer 4 having a higher thermal conductivity than the silicon film 11.
The heat is transferred in the direction of and is cooled rapidly. Since the cooling rate becomes slower as the distance from the heat dissipation layer 4 increases, as shown in FIG. 5B, a temperature gradient is generated near the heat dissipation layer 4 after a predetermined time elapses, and a low temperature is generated in a portion where the temperature gradient occurs. From the side to the high temperature side. As a result, as shown in FIG. 6, a large grain crystal 14 having a large grain size is formed in the silicon film 11 in the vicinity of the heat dissipation layer 4, and the grain size is smaller than that in the portion away from the heat dissipation layer 4. Small grain crystals 15 are formed. Further, the lower region 13 of the heat dissipation layer 4 is not melted because the heat dissipation layer 4 serves as a mask and is not irradiated, and is kept in a crystallized state in the preliminary irradiation process.

The plane shape of the large grain crystal 14 is shown in FIG.
When the crystal grain size was measured with an atomic force microscope (AFM) and a transmission electron microscope (TEM), the grain size a in the length direction, that is, the direction in which the temperature gradient was generated was 1 μm, and the width direction. That is, the particle size b in the direction orthogonal to the length direction on the plane was 0.5 μm. This grain size is indicated by the maximum distance between grain boundaries in each direction. Also, there were no major defects in the grains. When the crystal grain size of the small grain crystal 15 around the large grain crystal 14 is also examined, the grain size is 100 nm or less, which is about the same as the grain size of the polycrystalline silicon film obtained by the conventional irradiation process. Met. As described above, in the main irradiation step, it is possible to improve the film quality by selectively increasing the crystal grain size of the silicon film in the vicinity of the heat dissipation layer 4, that is, at a predetermined position.

Next, a step of removing the heat dissipation layer 4 is performed. Figure 8
As shown in (a), since the alignment key 5 is formed together with the heat dissipation layer 4 on the polycrystalline silicon film 11, first, the alignment key 5 is coated with a protective film 16 such as a resist and dried and solidified. (FIG.8 (b)). Then, dry etching or wet etching is performed,
The heat dissipation layer 4 is removed. (FIG.8 (c)). Finally, the protective film 16 is removed with a stripping solution (FIG. 8D). This allows
With the alignment key 5 left, the heat dissipation layer 4 is removed, and the semiconductor thin film is completed. Since many dangling bonds are formed in the polycrystalline silicon film 11,
The dangling bond of silicon atoms is terminated by hydrogen atoms by leaving it in hydrogen plasma at 450 ° C. for 2 hours, for example. The hydrogen content concentration is, for example, 2 × 10 ²⁰
It is about atom · cm ⁻³ .

In the manufacture of the semiconductor thin film in this embodiment, the heat dissipation layer 4 has a rectangular shape in plan view.
It is also preferable to have a triangular shape in a plan view. By forming the heat dissipation layer 4 in such a shape, the heat dissipation layer 4 can be formed after the main irradiation step.
The crystal growth starts from the top of, and as shown in FIG.
The planar shape of the large grain crystal 14 is substantially fan-shaped. In this case, since the starting point of crystal growth becomes clear as a point, it becomes easy to align the large grain crystal with the TFT in the TFT manufacturing process described later.

(Semiconductor Device) Next, a thin film transistor (TF) included in the semiconductor device is formed.
A method of manufacturing T) will be described. First, FIG.
As shown in (a), using the semiconductor thin film obtained by the above-described manufacturing method, the photolithography process and the etching process using the alignment key 5 are performed on the polycrystalline silicon film 11 having the large grain crystal 14. After performing the island-shaped patterning, the gate insulating film 19 made of silicon oxide is formed. The alignment key 5 is also used for aligning the mask in the following photo process. The gate insulating film 19 can be formed of a SiO ₂ film by plasma CVD using TEOS, for example, and the necessary film thickness is 100 nm, for example. As a forming method, for example, low pressure CVD, remote plasma CVD, atmospheric pressure CV
It is also possible to use D, ECR-CVD or the like. Further, high pressure oxidation and plasma oxidation are also possible.

Next, as shown in FIG. 10B, a gate electrode 20 is formed on the gate insulating film 19. The gate electrode 20 is formed, for example, by forming a molybdenum-tungsten alloy film by sputtering, performing a photo process using a photo mask for the gate electrode, and patterning the film into a predetermined shape by etching. As the material of the gate electrode, other than that, high-purity Al or A
l is at least 1 such as Si, Cu, Ta, Sc, Zr
It is also possible to use an Al-based material added with a seed.

A mask (not shown) used in the photo process can be aligned by the alignment key 5, and the gate electrode 20 is located near the large grain crystal 14 of the polycrystalline silicon film 11, more specifically, The gate electrode 20 is formed so that the end portion on the drain side (right side in the drawing) is located at the center of the large grain crystal 14.

Then, as shown in FIG. 10C, an ion doping step is performed. First, the silicon film 1 is formed by using an ion doping apparatus with the gate electrode 20 as a mask.
1 is injected with phosphorus at a low concentration. As a result, the portion of the silicon film 11 immediately below the gate electrode 20 becomes the channel region 22. As impurities, in addition to phosphorus, boron or arsenic serving as an acceptor, or aluminum other than phosphorus serving as a donor can be selectively used to selectively form P-channel and N-channel transistors. It is also possible to build it on.

Next, the gate electrode 20 is formed by a photo process.
Then, after forming a resist pattern in a range of 2 μm from both ends thereof, high-concentration phosphorus is implanted by an ion doping apparatus using this resist pattern as a mask. As a result, high-concentration impurity regions are formed in the silicon film 11 on both sides of the channel region 22 in the portions not covered with the resist pattern. This high concentration impurity region is
It becomes the source region 24 and the drain region 17, respectively.
In addition, the channel region 22 and the high-concentration impurity regions 17 and 24
Between L and L, the impurity concentration is lower than that in the high-concentration impurity region.
It becomes the DD regions 18a and 18b.

After that, the resist pattern is removed. The implanted impurities are activated by heat treatment or the like. Regarding the activation of the implanted ions, since self-activation due to the implanted hydrogen occurs at the same time, it is possible not to add a step such as annealing, but in order to achieve more reliable activation, 400 Local heating may be performed by annealing at a temperature of ℃ or more, excimer laser irradiation, RTA (Rapid Thermal Anneal), or the like.

Next, as shown in FIG. 10D, an interlayer insulating film 21 made of silicon oxide is formed on the entire surface. As the interlayer insulating film 21, a film of SiO ₂ is used, for example, TEOS.
It can be formed by plasma CVD using, but other methods such as AP-CVD (Atmospheric Pr
essure CVD) method, LTO (Low Temperature Oxide), E
It goes without saying that the SiO ₂ film may be formed by CR-CVD or the like. Further, as the material of the interlayer insulating film 21, for example, silicon nitride, tantalum oxide, aluminum oxide or the like can be used, and a thin film laminated structure made of these materials may be adopted.

Then, the interlayer insulating film 2 is formed by etching.
A contact hole reaching the source region 24 and the drain region 17 of the polycrystalline silicon film 11 is opened in the gate insulating film 1 and the gate insulating film 19. Then, a titanium film, an aluminum-zirconium alloy film, or the like is sputtered in this contact hole and patterned into a predetermined shape by etching to form a source electrode 23a and a drain electrode 23b. Source and drain electrodes 23a,
As the material of 23b, in addition to the aluminum-zirconium alloy film, for example, a metal such as aluminum (Al), tantalum (Ta), molybdenum (Mo), chromium (Cr), titanium (Ti), or an alloy thereof is used. It may be poly-Si containing a large amount of impurities. Alternatively, a transparent conductive layer such as poly-SiGe alloy or ITO may be used.

Through the above process, the n-type TFT 40 shown in FIG. 11A is completed. If a p-type TFT is required, a B doping step may be performed instead of implanting phosphorus.

The TFT of this embodiment uses the alignment key 5 so that the end of the gate electrode 20 on the drain side is located at the center of the large grain crystal 14.
Since 0 is formed, as shown in FIG. 11, a region of 0.5 μm on both sides from the boundary between the LDD region 18b on the drain side and the channel region 22 (region indicated by a mesh line in the figure) is a single crystal. , No grain boundary B exists. Therefore, the deterioration of the TFT due to the generation of hot carriers can be prevented, and the reliability can be improved. In the manufacture of the semiconductor thin film, the heat dissipation layer 4 is formed not only in the vicinity of the drain region 17 but also in the vicinity of the source region 24, so that the vicinity of the boundary between the LDD region 18a on the source side of the TFT 40 and the channel region 22 (for example, , 0.5μ on both sides
It is possible to prevent the crystal grain boundary B from existing in m) as well, whereby the characteristics and reliability can be further improved.

The mobility of the TFT 40 in this embodiment was measured and found to be 180 cm ² / V · s.
The mobility of the conventional TFT obtained by using the semiconductor thin film manufactured without forming the film was significantly improved as compared with 100 cm ² / V · s. Also, 5V between source and drain
Voltage was applied and the gate voltage was repeatedly turned on and off for 500 hours at 1500 kHz, and a reliability test was conducted with a large number of switching operations.
In the FT, the mobility decreased from the initial value to about 50%, whereas in the TFT 40 of the present embodiment, the mobility was 85% or more of the initial value, and the deterioration due to switching was reduced. This reliability test was performed under the same conditions in the following embodiments.

(Liquid Crystal Display Device) Next, a liquid crystal display device using the TFT obtained by the above method will be described. As shown in FIG. 12, the liquid crystal display device 50 has a TFT array substrate 1 and a counter substrate 31 which are arranged so as to face each other.

In the TFT array substrate 1, a plurality of TFTs 40 are arranged in a matrix on the upper surface side (opposite substrate 31 side), and driving circuits 42, 4 are provided around the TFT 40.
4 are formed. Further, the counter substrate 31 is a glass substrate (for example, a product number 173 manufactured by Corning Incorporated) which is an insulating substrate.
7), and the color filter 32 and the transparent electrode 33 are provided on the lower surface side (TFT array substrate 1 side). T
Between the FT array substrate 1 and the counter substrate 31, there is a liquid crystal part 35 in which liquid crystal is sealed between alignment films such as polyimide. Furthermore, the TFT array substrate 1 and the counter substrate 31
Is the polarizing plate 3 on the surface opposite to the facing surface.
7, 39 are attached.

One of the pixel regions 56 in the above-mentioned TFT array substrate is enlarged and shown in FIG. The scanning lines 52 and the data lines 54 are arranged in a matrix on the TFT array substrate, and the TFTs 40 are arranged near each intersection. The source electrode 23a of the TFT 40 is connected to the data line 54, and the drain electrode 23b is connected to the pixel electrode 58 which is a transparent electrode. Further, the gate electrode 20 is connected to the scanning line 52.

The liquid crystal display device 50 having the above structure
As a result of the improved characteristics of the TFT array and the reduction in deterioration, the defective rate of the drive circuit of the liquid crystal display device decreased, and defects such as screen brightness unevenness decreased. Specifically, the defective rate of the drive circuit in the liquid crystal display device using the conventional TFT is 15%.
On the other hand, in the liquid crystal display device 50 of the present embodiment, the defective rate is reduced to 7%, and the defective rate of screen brightness unevenness is 7% in the past, whereas the liquid crystal display of the present embodiment is In device 50, it was reduced to 3%.

(EL Display Device) Next, an EL using the TFT obtained by the above-mentioned method
The display device will be described. This EL display device is
The TFT array substrate includes a switching TFT, a driving TFT and an E TFT in each pixel area.
The L element is arranged.

The EL element 60, as shown in FIG.
It is formed by stacking an anode 61 made of a transparent electrode such as TO, a light emitting layer 62, a hole injection layer 63, and a cathode 64 such as AlLi on the polycrystalline silicon film 11. An aluminum quinolinol complex layer 65 is formed on the lower surface side (substrate 1 side) of the cathode 64. Between each anode 61,
A light blocking layer 66 is formed by photolithography and is filled with a resin black resist. Light emitting layer 62
Is red, for example using an inkjet printing device,
It is formed by patterning and applying green and blue light emitting materials. Further, the hole injection layer 63 is formed by vacuum-depositing polyvinylcarbazole, for example.

As the material of the EL element 60, the polydialkylfluorene derivative is used in the present embodiment, but other organic materials such as other polyfluorene-based material or polyphenylvinylene-based material or inorganic material may be used. It can be used. Further, the manufacturing method of the EL element 60 may be appropriately determined according to the material used, such as a coating method such as spin coating, vapor deposition, and ejection formation by inkjet.

A circuit diagram of this EL display device is shown in FIG. The gate electrode of the switching TFT 71 is connected to the gate signal line 72, the drain electrode is connected to the drain signal line 73, and the source electrode is the driving TFT.
It is connected to the gate electrode of 74. Also, drive TF
The source electrode of T74 is connected to the anode of the EL element 60, and the drain electrode is connected to the power supply line 76. Reference numeral 75 is a capacitor.

When the pulse signal applied to the gate signal line 72 by the drive circuit 77 is applied to the gate electrode of the switching TFT 71, the switching TFT 71 is turned on.
The drive circuit 78 causes the drain signal line 73
To the gate electrode of the driving TFT 74. As a result, the driving TFT 74 is turned on, current is supplied from the power supply line 76 to the EL element 60, and the EL element 60 emits light.

The EL display device thus constructed is
Due to the improved characteristics and reduced deterioration of the FT array, problems such as uneven screen brightness and poor image quality have been reduced. Specifically, in the case of using the conventional TFT, the defective rate of the screen brightness unevenness was 8%, whereas in the EL display device of the present embodiment, it is 2%.
Decreased to. Further, the deterioration of the TFT characteristics caused by switching for a long time or a large number of times resulted in poor image quality, but the conventional defective rate was reduced from 15% to 5%.

(Second Embodiment) Next, a second embodiment of the present invention will be described. In the present embodiment and the following embodiments, components having the same functions as those of the constituent parts described in the first embodiment are designated by the same reference numerals in the drawings, and the contents overlapping with those in the first embodiment are repeated. The description is omitted.

The method of manufacturing a semiconductor thin film according to the second embodiment differs from the method of manufacturing a semiconductor thin film according to the first embodiment in that the number of irradiations of the laser beam 7 in the main irradiation step is changed. That is, in the first embodiment, the laser light 7 is irradiated to the predetermined range on the substrate a plurality of times, whereas in the present embodiment, the laser light shaped so that the entire substrate surface can be irradiated at one time, Irradiation was performed only once (one pulse) on a predetermined area on the substrate. The preferable intensity range of the laser light 7 is similar to that of the first embodiment.

The grain size of the large grain crystals 14 of the semiconductor thin film thus obtained was measured by an atomic force microscope (AFM) and a transmission electron microscope (TEM). a was 1.6 μm, and the grain size b in the width direction was 0.5 μm (see FIGS. 6 and 7). Also,
There were no major defects in the grains. As described above, from the viewpoint of obtaining a silicon thin film having a larger crystal grain size, it is also preferable to irradiate only one pulse at one location on the substrate in the main irradiation step.

Using this semiconductor thin film, a semiconductor device, a liquid crystal display device and an EL display device were manufactured as in the first embodiment. In the manufacture of a TFT constituting a semiconductor device, since the grain size of the large grain crystal is 1.6 μm, the end of the gate electrode on the drain side is at the center of the large grain crystal, that is, from the grain boundary. The mask is aligned with the alignment key so that it is located at 8 μm. As a result, a region of 0.8 μm on both sides from the boundary between the drain-side LDD region 18b and the channel region 22 becomes a single crystal, and there is no crystal grain boundary.

The TFT thus obtained has a mobility of 18
0 cm ² / V · s, mobility after resistance test is the initial value of 95
% Or more, and all were better than the conventional TFT. Further, in the liquid crystal display device, the defective rate of the drive circuit was 3% and the defective rate of the screen luminance unevenness was 0.8%, which were both better than those of the conventional liquid crystal display device. Also,
Regarding the EL display device, the defective rate of unevenness in screen brightness was 1% and the defective rate of image quality was 2%, which were both better than those of the conventional EL display devices.

(Third Embodiment) Next, a third embodiment of the present invention will be described. The method of manufacturing a semiconductor thin film according to the third embodiment is the same as that of the first embodiment.
In the method of manufacturing a semiconductor thin film in, the step of forming the heat dissipation layer 4 and the alignment key 5 is performed without performing the preliminary irradiation step, and further, the step of forming the heat dissipation layer 4 and the alignment key 5 is performed. This is done by lift-off.

That is, a resist pattern R is formed by photolithography on the dehydrogenated amorphous silicon film 3 to cover the portion other than the heat radiation layer and the portion serving as the alignment key with a resist (FIG. 16A). . Then, after forming the MoW film M by vapor deposition (FIG. 16B), the heat release layer 4 and the alignment key 5 are formed by removing the resist R and the MoW film M on the resist with a resist stripping solution. (FIG.16 (c)).

Next, a main irradiation step is performed to form a polycrystalline silicon film. The intensity range of the laser beam 7 in this main irradiation step is preferably the same as that in the main irradiation step in the first embodiment, and is 380 mJ / cm ^{2 in the} present embodiment.
And Also, the number of times of irradiation to one place on the substrate is 8
The number of times (8 pulses) was set. As a result, large grain crystals are formed around the heat dissipation layer 4 (see FIG. 6). After that, the heat dissipation layer 4 is removed in the same manner as in the first embodiment.

In the present embodiment, since the preliminary irradiation step is not performed unlike the first embodiment, the lower region where the heat dissipation layer 4 was formed is amorphous silicon. Therefore, in order to crystallize this region, an additional irradiation process is performed by a laser annealing device (ELA device). The region where the heat dissipation layer 4 was formed is not required to have a particularly high film quality, so that the intensity of the laser beam in the additional irradiation step may be smaller than the laser beam intensity in the main irradiation step. Irradiation with a laser beam having an extremely high intensity is not preferable because defects occur in the large grain silicon crystal 14 formed in the main irradiation step. Therefore, the laser light intensity is preferably in the same range as in the preliminary irradiation step in the first embodiment, and is 250 in the present embodiment.
It was set to mJ / cm ² . Further, the number of times of irradiation to one place on the substrate was 10 times. The number of irradiations can be set variously. As a result, polycrystalline silicon having a small grain size of 30 nm or less is formed in the region where the heat dissipation layer 4 was formed.

The grain size of the large grain silicon crystal 14 of the semiconductor thin film thus obtained was measured by an atomic force microscope (AFM) and a transmission electron microscope (TEM), and it was about 2 μm. Also, there were no major defects in the grains.
Furthermore, when the variation in grain size of 100 large grain crystals 14 was examined, it was 2 μm ± 0.4 μm, and in the main irradiation step of the first embodiment, instead of irradiating the laser light with a plurality of pulses, a single pulse was used. 1.6 μm ± when irradiated with
The variation was small compared with 0.8 μm.

Using this semiconductor thin film, a semiconductor device, a liquid crystal display device and an EL display device were manufactured as in the first embodiment. In the manufacture of the TFT configuring the semiconductor device of this embodiment, the offset region is formed as follows instead of forming the LDD region in the ion doping step of the first embodiment. First, a resist pattern is formed on the gate electrode 20 and 2 μm from both ends thereof by photolithography. Then, an ion doping apparatus is used to implant a high concentration of phosphorus using the resist as a mask. As a result, as shown in FIG. 17, the region below the gate metal 20 is the channel region 22, and the region 2 μm from both ends of the channel region 22 is the offset region 18.
c, 18d are formed. Further, a high-concentration impurity region is formed in a portion which is not covered with the resist pattern. The high-concentration impurity regions are the source regions 24, respectively.
And the drain region 17. After that, the semiconductor device is manufactured in the same manner as in the first embodiment.

Since the grain size of the large grain crystal is 2 μm, the alignment key 5 is arranged so that the end of the gate electrode 20 on the drain side is located at the center of the large grain crystal, that is, 1 μm from the grain boundary. Align the mask with. As a result, a region of 1 μm on both sides from the boundary between the drain side offset region 18d and the channel region 22 is a single crystal,
The TFT has no crystal grain boundaries.

The TFT thus obtained has a mobility of 20.
0 cm ² / V · s, mobility after resistance test is the initial value of 95
% Or more, and all were better than the conventional TFT. Further, in the liquid crystal display device, the defective rate of the drive circuit was 2.5% and the defective rate of screen luminance unevenness was 0.6%, which were both better than those of the conventional liquid crystal display device. The EL display devices had a screen brightness unevenness defect rate of 0.7% and an image quality defect rate of 1.2%, which were both better than those of conventional EL display devices.

(Fourth Embodiment) Next, a fourth embodiment of the present invention will be described. The method of manufacturing a semiconductor thin film according to the fourth embodiment is the same as that of the third embodiment.
Similar to the method for manufacturing a semiconductor thin film in, the step of forming the heat dissipation layer 4 and the alignment key 5 is performed without performing the preliminary irradiation step, and the step of forming the heat dissipation layer 4 and the alignment key 5 is further performed. It is performed by a photo process and an etching process.

That is, an InTiO (ITO) film is formed on the dehydrogenated amorphous silicon film 3 by vapor deposition or sputtering as a substance having a higher thermal conductivity than the silicon film and transmitting laser light. To form a film. Then,
IT with a predetermined shape by photo process and etching process
The heat dissipation layer 4 and the alignment key 5 having the O pattern are formed (see FIG. 4).

Next, a main irradiation step is performed to form a polycrystalline silicon film. In the present embodiment, the intensity of the laser beam 7 is set to 360 mJ / cm ^2, and the number of irradiations on one position on the substrate is set to 300 times (300 pulses). As a result, large grain crystals 14 are formed around the heat dissipation layer 4 (see FIGS. 6 and 7). After that, the heat dissipation layer 4 is removed in the same manner as in the first embodiment.

In this embodiment, the pre-irradiation step is not performed as in the third embodiment, but since the heat dissipation layer 4 is made of ITO, which is a light-transmitting substance, the main irradiation step The silicon film below the heat dissipation layer 4 is also crystallized. Therefore, unlike the third embodiment, the additional irradiation process is not required, and the manufacturing process can be shortened.

The grain size of the large grain crystal 14 of the semiconductor thin film thus obtained was measured by an atomic force microscope (AFM) and a transmission electron microscope (TEM). The grain size a in the length direction was 4 μm. And the grain size b in the width direction was 0.5 μm (see FIGS. 6 and 7). Also, there were no major defects in the grains. Furthermore, when the variation in grain size of 100 large grain crystals 14 was examined, it was 4 μm ± 0.4 μm,
In the main irradiation step of the first embodiment, there was less variation compared to 1.6 μm ± 0.8 μm when the laser light was irradiated with a single pulse.

Using this semiconductor thin film, a semiconductor device, a liquid crystal display device and an EL display device were manufactured as in the first embodiment. In the manufacture of a TFT that constitutes a semiconductor device, in this embodiment, the gate electrode 20 is the large grain crystal 14
The gate for forming the gate was aligned by the alignment key 5 so that the mask was positioned at the center of. That is, since the grain size in the length direction of the large grain crystal 14 is 4 μm, by setting the length in the source-drain direction of the gate electrode 20 to 2.5 μm, the drain side end of the gate electrode 20 becomes
It was located 0.8 μm from the grain boundary. In accordance with this, the channel length of the channel region below the gate electrode 20 is set to 2.5 μm, and the LDD lengths of the LDD regions 18a and 18b on both sides of the channel region 22 are set to 0.8 μm.
By setting the above, the channel region 22 and the LDD region 18
A single crystal in which a and 18b are continuous, that is, a state in which no crystal grain boundaries exist (see FIG. 11).

The TFT thus obtained has a mobility of 32.
0 cm ² / V · s, mobility after resistance test is initial value of 97
% Or more, and all were better than the conventional TFT. Further, in the liquid crystal display device, the defective rate of the drive circuit is 1.5%, and the defective rate of unevenness in screen brightness is 0.4%.
All were better than the conventional liquid crystal display device. Further, the EL display device had a screen luminance unevenness defective rate of 0.5% and an image quality defective rate of 1.2%, which were both favorable as compared with the conventional EL display device.

(Fifth Embodiment) Next, a fifth embodiment of the present invention will be described. The method of manufacturing a semiconductor thin film according to the fifth embodiment is the same as that of the first embodiment.
In the method of manufacturing a semiconductor thin film in, the heat radiation layer 4 and the alignment key 5 are formed by a photo process and an etching process instead of by vapor deposition using a pattern forming mask.

That is, a MoW film is formed on the polycrystalline silicon film formed by the preliminary irradiation step by vapor deposition or sputtering as a substance having a higher thermal conductivity than the silicon film. Next, the heat dissipation layer 4 and the alignment key 5 made of a MoW pattern having a predetermined shape are formed by a photo process and an etching process (see FIG. 8A). Next, the main irradiation step is performed to form the polycrystalline silicon film 11. In the present embodiment, the intensity of the laser light 7 is set to 360
mJ / cm ^2, and the number of irradiations to one place on the substrate was 300 times (300 pulses). As a result, large grain crystals 14 are formed around the heat dissipation layer 4. After that, the heat dissipation layer 4 is removed in the same manner as in the first embodiment.

The grain size of the large grain crystal 14 of the semiconductor thin film thus obtained was measured by an atomic force microscope (AFM) and a transmission electron microscope (TEM). The grain size a in the length direction was 4 μm. And the grain size b in the width direction was 0.5 μm (see FIGS. 6 and 7). Also, there were no major defects in the grains.

Using this semiconductor thin film, a semiconductor device, a liquid crystal display device and an EL display device were manufactured as in the first embodiment. In the manufacture of the TFT constituting the semiconductor device of this embodiment, the offset region is formed in the same manner as in the third embodiment, instead of forming the LDD region in the ion doping step of the first embodiment (FIG. 17). reference).

In this embodiment, the alignment key 5 is arranged so that the gate electrode 20 is located at the center of the large grain crystal 14.
The position of the mask for forming the gate was adjusted by. That is, since the grain size in the length direction of the large grain crystal 14 is 4 μm, by setting the length in the source-drain direction of the gate electrode 20 to 2.5 μm, the drain side end of the gate electrode 20 becomes It was located 0.8 μm from the grain boundary. In accordance with this, the length of the channel region 22 below the gate electrode 20 is set to 2.5 μm, and the channel region 2
2 Set the length of the offset areas 18c and 18d on both sides to 0.8
By setting the thickness to be μm, the channel region 22 and the offset regions 18c and 18d become a continuous single crystal, and there is no crystal grain boundary.

The TFT thus obtained has a mobility of 31.
0 cm ² / V · s, mobility after resistance test is initial value of 97
% Or more, and all were better than the conventional TFT. Further, in the liquid crystal display device, the defective rate of the drive circuit was 2% and the defective rate of the screen luminance unevenness was 0.4%, which were both better than those of the conventional liquid crystal display device. Also,
The EL display device has a screen luminance unevenness defect rate of 0.4.
%, The image quality defect rate is 1%, both of which are
It was better than the L display device.

(Sixth Embodiment) Next, a sixth embodiment of the present invention will be described. The method of manufacturing a semiconductor thin film according to the sixth embodiment is the same as that of the first embodiment.
In (1), a hole having a minute diameter is formed in the base film formed on the substrate.

That is, while rotating the substrate 1, silica containing Si, O and an organic solvent as a main component is applied onto this substrate. In this embodiment, alcohol (methanol) was used as the organic solvent. Then, the substrate 1 is heat-treated to form a SiOx underlayer film 2 including pores (see FIG. 1). Heat treatment temperature is 450 ° C or higher 65
0 ° C or lower is suitable, and in order to reduce the voids and the warp of the substrate 1, 550 ° C or higher and 620 ° C or higher.
The following is more preferable. In the present embodiment, the heat treatment temperature is 600 ° C.

When the silica solidifying step is performed at 400 ° C. as in the conventional heat treatment, the average pore diameter is 10 μm.
However, the average pore diameter of the pores was improved to 2 μm or less by solidifying at 600 ° C. This average pore diameter is preferably 0.01 to 2 μm,
More preferably, it is ˜0.1 μm.

Thereafter, a semiconductor thin film was manufactured in the same manner as in the fifth embodiment. When the grain size of the large grain crystal 14 of the semiconductor thin film was measured with an atomic force microscope (AFM) and a transmission electron microscope (TEM), the grain size a in the length direction was 30 μm and the grain size in the width direction was 30 μm. The diameter b was 0.5 μm (see FIGS. 6 and 7). Also, there were no major defects in the grains. The small grain crystal 15 had a grain size of 200 μm or less.

Using this semiconductor thin film, a semiconductor device, a liquid crystal display device and an EL display device were manufactured as in the first embodiment. In the manufacture of the TFT which constitutes the semiconductor device of this embodiment, the channel region, the LDD region, the source region and the drain region are formed in the large grain silicon crystal 14 as a photomask for patterning the polycrystalline silicon layer. Using the photomask designed for, the center of the gate electrode was set to the center of the large grain silicon crystal. The length of the gate electrode in the source-drain direction is 4
μm. As a result, the channel length is 4 μm and LDD
An n-type TFT having a length of 1.5 μm and a source length and a drain length of 10 μm was obtained. All of these regions are continuous single crystals, and no grain boundaries exist.

The TFT thus obtained has a mobility of 38.
0 cm ² / V · s, mobility after resistance test is initial value of 97
% Or more, and all were better than the conventional TFT. Further, the average pore size of the pores of the undercoating film was 2 μm or less, and the average pore size of the pores was considerably smaller than that of the conventional porous undercoating film, so that the defect rate was significantly reduced.

For the liquid crystal display device, the defective rate of the drive circuit is 1.5% and the defective rate of unevenness of screen brightness is 0.3%.
All were better than the conventional liquid crystal display device. Further, the EL display device had a screen luminance unevenness defective rate of 0.3% and an image quality defective rate of 0.7%, which were all better than the conventional EL display device.

(Seventh Embodiment) Next, a seventh embodiment of the present invention will be described. The method of manufacturing a semiconductor thin film according to the seventh embodiment is the same as that of the first embodiment.
The method is characterized in that after forming the base film on the substrate, the base film further having a porous layer is formed.

That is, as in the first embodiment, a 300 nm thick SiO 2 film is formed on the substrate 1 by the TEOS-CVD method.
_{2 The} base film 2 is formed. Next, a silicon film is formed on the base film 2 by laser ablation by irradiating a laser beam with an intensity at which silicon is evaporated using a silicon substrate for film formation as a target and vapor-depositing silicon particles. A large amount of holes are present in the formed silicon film. Next, the formed silicon film is oxidized. By generating plasma in an ozone or oxygen atmosphere, the silicon film containing the holes formed by laser ablation is oxidized and becomes the SiO ₂ film 2a (see FIG. 18). The SiO ₂ film 2a contains a large amount of pores, and the average pore diameter is 1 μm or less. Although only the base film 2a having pores has an insufficient role of preventing impurities from the substrate 1 such as glass from diffusing into the semiconductor layer, in the present embodiment, a lower layer composed of a dense layer of SiO ₂ is used. The two-layer structure of the base film 2 and the base film 2a made of a porous layer can surely prevent impurity diffusion from the substrate 1 to the semiconductor layer.

Thereafter, a semiconductor thin film was manufactured in the same manner as in the fifth embodiment. When the crystal grain size of the large grain crystal 14 of the semiconductor thin film was measured by an atomic force microscope (AFM) and a transmission electron microscope (TEM), the grain size a in the length direction was 30 μm, and the grain size in the width direction was 30 μm. The particle size b was 0.5 μm (see FIGS. 6 and 7). Also, there were no major defects in the grains. The small grain crystal 15 had a grain size of 200 μm or less.

Using this semiconductor thin film, a semiconductor device, a liquid crystal display device and an EL display device were manufactured as in the first embodiment. In the manufacture of the TFT which constitutes the semiconductor device of this embodiment, an n-type TFT having a channel length of 4 μm, an LDD length of 1.5 μm, and a source length and a drain length of 10 μm is used in the same manner as in the fifth embodiment. Obtained. All of these regions are continuous single crystals, and no grain boundaries exist.

The TFT thus obtained has a mobility of 38.
0 cm ² / V · s, mobility after resistance test is initial value of 97
% Or more, and all were better than the conventional TFT.

In the liquid crystal display device, the defective rate of the drive circuit is 1.2% and the defective rate of the unevenness of the screen luminance is 0.2%.
All were better than the conventional liquid crystal display device. In addition, the EL display device had a screen luminance unevenness defect rate of 0.2% and an image quality defect rate of 0.5%, which were both better than those of the conventional EL display device.

The base film having a porous layer can be a porous film such as an SOG (spin on glass) film, and it has been confirmed that a large-sized silicon crystal grows. SOG may be organic or inorganic.

(Embodiment 8) Next, an embodiment 8 of the invention will be described. The method for manufacturing a semiconductor thin film according to the eighth to twelfth embodiments is the same as the method for manufacturing a semiconductor thin film according to the first embodiment, in which the main irradiation step is performed using an exposure mask.

First, in the same manner as in the first embodiment, the substrate 1
A base film 2 and an amorphous silicon film 3 are formed on the upper surface (see FIG.
After the dehydrogenation treatment is performed as necessary, the main irradiation step is performed as follows. In the present embodiment, as the exposure mask, as shown in FIG. 19, an exposure mask 105 is used in which a plurality of lenses 114 having a band shape in a plan view are provided in parallel to each other on a plate-shaped body. Exposure mask 105
For the plate-shaped body constituting the above, either a light-transmitting material or a light-shielding material may be used, but in the present embodiment, quartz having a light-transmitting property is used.

As shown in FIG. 20A, each lens 114 is formed so that the lower side (the side facing the substrate 1) is a concave curved surface 114a which is substantially arcuate in side view on the side surface in the longitudinal direction. In order to generate an inclined distribution in the amount of light that passes through the lens 114 and is irradiated on the silicon film,
The lens curvature is designed in consideration of the installation locations of the substrate 1 and the exposure mask 105.

The exposure mask 105 having such a configuration was arranged near the substrate 1, and one pulse of laser light 7 was irradiated through the exposure mask 105. The preferable irradiation intensity range of the laser beam 7 is the same as in the case of the main irradiation step in the first embodiment, and is 380 mJ / cm ² in the present embodiment. As a result, the laser light 7 transmitted through the lens 114
20B, a light amount distribution is generated in the longitudinal direction of the lens 114, and an inclined temperature gradient is generated in the same direction of the silicon film 11, as shown in FIG. As a result, from the portion with the least amount of light (two locations in FIG. 20B), the
Crystals grow toward the center side and the peripheral side of
Large grain crystals 14 are formed. When the grain size of the large grain crystal 14 was measured by an atomic force microscope (AFM) and a transmission electron microscope (TEM), the grain size a in the length direction was 6
The particle size b in the width direction was 2 μm (see FIGS. 6 and 7). Also, there were no major defects in the grains. Thus, in the present embodiment, the lens 11 of the exposure mask 105
A silicon crystal 14 having a large grain size is formed at a position corresponding to 4. Further, in the present embodiment, although not shown, the exposure mask 105 is provided with a pattern for forming a key, whereby an alignment key can be formed. The pattern for forming the key will be described in detail in Embodiment 10 described later.

Using this semiconductor thin film, a semiconductor device, a liquid crystal display device, and an EL display device were manufactured as in the first embodiment. In the present embodiment, the TFT is formed at the position of the large grain silicon crystal by using the alignment key formed by the above-mentioned key forming pattern.

The TFT thus obtained has a mobility of 17
0 cm ² / Vs, mobility after resistance test is the initial value of 75
% Or more, and all were better than the conventional TFT. Further, in the liquid crystal display device, the defective rate of the drive circuit was 11% and the defective rate of the screen luminance unevenness was 5%, which were both better than those of the conventional liquid crystal display device. Also, E
Regarding the L display device, the defective rate of unevenness in screen brightness was 5% and the defective rate of image quality was 11%, which were all better than those of the conventional EL display device. Further, the brightness of the EL display device was 400 cd / m ² when a voltage of 5 V was applied, which was improved compared to the conventional 300 cd / m ² .

Further, in the manufacture of the semiconductor thin film of this embodiment, the number of times of irradiation with the laser beam 7 is one as described above, but the positional relationship between the substrate and the optical axis is fixed by making them stationary. Irradiation several times (several pulses) in this state (static irradiation) reduced the number of silicon crystal defects in the polycrystalline silicon film 11. In particular, by irradiating 10 pulses or more (more preferably 100 pulses or more), defects of the silicon crystal were reduced and the grain size was expanded, and the characteristics when the TFT was manufactured were improved. Further, in the case of irradiating a plurality of pulses so that the irradiation areas for each irradiation of the laser light 7 overlap by 90% while gradually changing the relative position between the substrate and the optical axis (scanning irradiation), the above-mentioned is performed. Although the reduction of crystal defects was not remarkable compared to static irradiation,
Compared to conventional scanning irradiation, the effect of using the exposure mask 105 increased the crystal grain size and improved the TFT characteristics.

Further, regarding the shape of the lens 114, the lens used for the exposure mask is a concave lens in the present embodiment, but it has been confirmed that an appropriate light amount distribution can be generated even if it is a convex lens. In this regard,
The same applies to the following embodiments using an exposure mask having a lens.

(Ninth Embodiment) Next, a ninth embodiment of the present invention will be described. In the method of manufacturing a semiconductor thin film according to the ninth embodiment, as shown in FIG. 21, an exposure mask 139 in which a plurality of openings 138 are formed in a plate made of a substance that does not transmit light (for example, stainless steel) is used as an exposure mask. did. Each opening 138
Are formed in a row so that the opening area changes stepwise, and a plurality of rows are arranged in parallel with each other. That is, the aperture ratio changes stepwise along the longitudinal direction of the strip-shaped region including this row. The aperture ratio may be changed, for example, by changing the shape or interval of each opening 138.

The size of each opening 138 is such that the exposure mask 1 has a size of 380 mJ / cm ² when the intensity of the laser beam 7 is set to 380 mJ / cm ^2.
The light amount distribution radiated to the substrate 1 through 39 is 250 mJ
/ Cm ² to 380 mJ / cm ² are designed. Further, the exposure mask 139 is provided with an opening 137 having a predetermined shape for forming a key pattern.

The exposure mask 139 having such a structure was arranged near the substrate 1, and a semiconductor thin film was manufactured in the same manner as in Embodiment 8 (FIG. 22A). As a result, the laser light 7 that has passed through the opening 138 of the exposure mask 139 is
A light amount distribution is generated along the row of openings, and an inclining temperature gradient is generated in the same direction of the silicon film 11. As a result, large-sized silicon crystals 14 are formed from the low temperature portion to the high temperature portion. The grain size of the large grain crystal 14 is measured by an atomic force microscope (AF
M) and a transmission electron microscope (TEM), the grain size a in the length direction was 10 μm and the grain size b in the width direction was 3 μm (see FIGS. 6 and 7). Also, there were no major defects in the grains. As described above, in the present embodiment, the silicon crystal 14 having a large grain size is formed at the position corresponding to the row formed by the openings 138 of the exposure mask 139.

Further, in the present embodiment, the exposure mask 139.
Since the opening 137 for forming the key pattern is formed in the, a region of the polycrystalline silicon film corresponding to the opening shape is formed by the irradiation of the laser beam, and the periphery thereof becomes the region of the amorphous silicon film. Therefore, the formed key pattern can be used as the alignment key 5 due to the difference in color between polycrystalline silicon and amorphous silicon.

The alignment key 5 is formed by forming an exposure mask so that only the key portion is a non-irradiated portion and the periphery thereof is illuminated, so that an alignment key made of an amorphous silicon film is formed. good. Using this semiconductor thin film, as in the first embodiment, a semiconductor device,
A liquid crystal display device and an EL display device were manufactured. In the manufacture of the TFT constituting the semiconductor device, the TFT was formed at the position of the large grain silicon crystal by using the alignment key 5 as in the first embodiment.

The TFT thus obtained has a mobility of 25.
0 cm ² / Vs, mobility after resistance test is initial value of 83
% Or more, and all were better than the conventional TFT. Further, in the liquid crystal display device, the defective rate of the drive circuit was 8% and the defective rate of the screen brightness unevenness was 4%, which were both better than those of the conventional liquid crystal display device. Also, EL
Regarding the display device, the defective rate of unevenness in screen brightness was 3% and the defective rate of image quality was 8%, which were all better than those of the conventional EL display device. In addition, the brightness of the EL display device was 450 cd / m ² when a voltage of 5 V was applied, which was improved compared to the conventional one.

(Tenth Embodiment) Next, a tenth embodiment of the present invention will be described. In the method of manufacturing a semiconductor thin film according to the tenth embodiment, as an exposure mask, as shown in FIG. 23, an exposure mask 205 in which a plurality of lenses 214 are arranged in an array (matrix) on a plate is used. The plate-shaped body forming the exposure mask 205 may use either a light-transmitting material or a light-shielding material, but in this embodiment, quartz having light-transmitting property is used.

Each lens 214, as shown in FIG.
The concave lens has a concave portion formed on the lower side (the side facing the substrate 1), and the inner wall surface of the concave portion is formed into a substantially spherical shape.
The curvature of the lens is such that the intensity of the laser light is 380 mJ / cm ²
In this case, the distribution of the amount of light irradiated onto the substrate 1 through the exposure mask is 250 mJ / cm ² to 380 mJ / cm ²
It is designed to have a sloping distribution. Further, a key forming pattern 240 made of a metal having no light transmitting property is formed in a part of the light transmitting region of the exposure mask 205 (see FIG. 23).

The exposure mask 205 having such a structure was arranged near the substrate 1, and a semiconductor thin film was manufactured in the same manner as in Embodiment 8 (FIG. 24 (a)). As a result, the laser light 7 transmitted through the lens 214 of the exposure mask 205
As shown in FIG. 24B, the
A light amount distribution is generated along the radial direction of 4, and large-sized silicon crystals are formed from the low temperature portion to the high temperature portion. When the grain size of the large grain crystal 14 was measured by an atomic force microscope (AFM) and a transmission electron microscope (TEM), the grain size a in the length direction was 10 μm and the grain size b in the width direction was It was 10 μm (see FIGS. 6 and 7). Also, there were no major defects in the grains. Thus, in the present embodiment, the eighth embodiment
Compared with the above, since the light amount distribution is generated in the width direction, the crystal shape becomes substantially circular and the area of the large grain crystal 14 is expanded.

Further, in the present embodiment, the exposure mask 205
Since the key forming pattern 240 formed in the above forms an amorphous silicon region in a part of the polycrystalline silicon film 11, the amorphous silicon region is formed due to a difference from the surrounding polycrystalline silicon region. The patterned pattern can be used as the alignment key 5.

Using this semiconductor thin film, a semiconductor device, a liquid crystal display device and an EL display device were manufactured as in the first embodiment. In the manufacture of the TFT which constitutes the semiconductor device, the TFT is formed at the position of the large grain crystal 14 using the alignment key 5 as in the first embodiment. In the present embodiment, since the center of the large grain crystal 14 substantially coincides with the position corresponding to the center of the lens 214 of the exposure mask 205, the formation position of the large grain crystal 14 becomes clearer and more uniform, and the alignment is improved. Large grain crystal 14 and T by key 5
The alignment with the FT can be performed more accurately.

The TFT thus obtained has a mobility of 37.
0 cm ² / V · s, mobility after resistance test is the initial value of 95
% Or more, and all were better than the conventional TFT. Further, in the liquid crystal display device, the defective rate of the drive circuit was 3% and the defective rate of the screen luminance unevenness was 1%, which were both better than those of the conventional liquid crystal display device. Also, EL
Regarding the display device, the defective rate of unevenness in screen brightness was 1% and the defective rate of image quality was 5%, which were all better than those of the conventional EL display device. In addition, the brightness of the EL display device was 470 cd / m ² when a voltage of 5 V was applied, which was improved compared to the conventional one.

(Eleventh Embodiment) Next, an eleventh embodiment of the present invention will be described. In the method for manufacturing a semiconductor thin film according to the eleventh embodiment, as an exposure mask, as shown in FIG. 25, a lower side (a side facing a substrate) of a material (for example, quartz) having a light transmitting property is used.
Then, an exposure mask 241 having a plurality of recesses 242 arranged in an array is used. The inner wall surface of each recess 242 is formed in a cylindrical shape, and a step 2 is formed between the inner wall surface of each recess 242 and the mask lower surface 241a.
41b is formed. Further, a key forming pattern 240 made of metal or the like having no light transmission property is formed on a part of the exposure mask 241.

As shown in FIG. 26 (a), an exposure mask 241 having such a structure was arranged near the substrate 1 and a semiconductor thin film was manufactured in the same manner as in the eighth embodiment. As a result, the laser beam 7 that has passed through the exposure mask 241 has a phase shift due to the step 241b that forms the concave portion 242, so that the amount of light irradiated onto the substrate has a distribution, as shown in FIG. . This light amount distribution is
The light amount is weakest at a position corresponding to the vicinity of the second step 241b, and the light amount increases toward the center side and the opposite side along the radial direction of the recess 242. The size of the recess 242 and the height of the step 241b are such that the intensity of the laser light is 380 m.
250 mJ / cm ² to 380, given J / cm ²
It is designed to have a sloped distribution of mJ / cm ² . As a result, large-sized silicon crystals are formed from the low temperature portion toward the high temperature portion. In the present embodiment, as the method of generating the phase difference distribution in the laser light 7 that passes through the exposure mask 241, the concave portion 242 is formed on the lower surface 241a of the exposure mask 241, but a convex portion is formed instead. Even if the wall thickness of this portion is thicker than that of the peripheral portion, the phase shift can be generated as in the present embodiment.

The grain size of the large grain crystal 14 was measured by an atomic force microscope (AFM) and a transmission electron microscope (TEM). The grain size a in the length direction was 10 μm and the grain size in the width direction was 10 μm. The diameter b was 10 μm (see FIGS. 6 and 7). Also, there were no major defects in the grains. Thus, in the present embodiment, similarly to the tenth embodiment, since the light amount distribution is generated in the width direction as well, the crystal shape is substantially circular and the area of the large grain crystal 14 is expanded.

In this embodiment, the exposure mask 241 is also used.
Since the amorphous silicon region is formed by the key forming pattern 240 formed in the above, the formed pattern is used as the alignment key 5 due to the difference from the surrounding polycrystalline silicon region. It is possible (see FIG. 26 (a)).

Using this semiconductor thin film, a semiconductor device, a liquid crystal display device and an EL display device were manufactured as in the first embodiment. In the manufacture of the TFT that constitutes the semiconductor device, the TFT is formed at the position of the large grain crystal using the alignment key 5 as in the first embodiment. In the present embodiment, since the center of the large grain crystal 14 substantially coincides with the position corresponding to the center of the concave portion 242 of the exposure mask 241, the formation position of the large grain crystal 14 becomes clearer and more uniform, and alignment Large grain silicon crystal 14 with key 5
The TFT and the TFT can be aligned more accurately.

The TFT thus obtained has a mobility of 41.
0 cm ² / V · s, mobility after resistance test is initial value of 97
% Or more, and all were better than the conventional TFT. Further, in the liquid crystal display device, the defective rate of the drive circuit was 2% and the defective rate of the screen luminance unevenness was 0.7%, which were both better than those of the conventional liquid crystal display device. Also,
The EL display device has a screen luminance unevenness defect rate of 0.6.
%, And the image quality defect rate is 4%, both of which are
It was better than the L display device. The brightness of the EL display device is 520 cd / m ² when a voltage of 5 V is applied.
Which is an improvement over the conventional one.

(Twelfth Embodiment) Next, a twelfth embodiment of the present invention will be described. In the method of manufacturing a semiconductor thin film according to the twelfth embodiment, as shown in FIG. 27, a plurality of openings 338 are formed in a plate made of a substance that does not transmit light (for example, stainless steel) as an exposure mask.
The exposure mask 339 formed with is used. Each opening 33
8 are arranged radially so that the opening area gradually increases from one point toward the periphery, and forms a light amount distribution forming region 350 having a substantially circular shape in plan view. That is, in the light amount distribution forming region 350, the openings 338 are arranged so that the aperture ratio per unit area increases in the radial direction from the center toward the periphery. The shape of each opening 338, etc. interval when the intensity of the laser light and 380 mJ / cm ^2, light amount distribution is applied to the substrate through an exposure mask from 250 mJ / cm ² of 380 mJ / cm ² inclinatorily It is designed to have a wide distribution. In the exposure mask 339, a plurality of such light amount distribution forming regions 350 are formed in an array (matrix).

Further, in the areas other than the light quantity distribution forming area 350, openings 340 having the same area are arranged all over at equal intervals, and the openings 3 having a predetermined shape for forming a key pattern are further formed.
37 is formed.

The exposure mask 339 having the above-described structure was arranged near the substrate, and a semiconductor thin film was manufactured in the same manner as in the eighth embodiment. The opening 33 of the light amount distribution forming region 350
The laser light that has passed through 8 has a light amount distribution that increases in the radial direction from the position corresponding to the center of the light amount distribution forming region 350 on the substrate 1 toward the periphery, and causes an inclined temperature gradient.
As a result, the large grain silicon crystal 14 is formed from the low temperature portion to the high temperature portion. Atomic force microscope (AFM) and transmission electron microscope (TEM) are used to measure the grain size of the large grain crystal 14.
The particle size a in the length direction was 10 μm, and the particle size b in the width direction was 10 μm (see FIGS. 6 and 7). Also, there were no major defects in the grains. As described above, in this embodiment, similarly to the tenth embodiment, since the light amount distribution is generated in the width direction as well, the crystal shape is substantially circular,
The area of the large grain crystal 14 was enlarged. Further, the portion irradiated with light through the opening 340 formed in the region other than the light amount distribution forming region 350 became the small grain crystal 15.

In this embodiment, the exposure mask 339 is also used.
The polycrystalline silicon region is formed at a position corresponding to the opening 337 by the key forming opening 337 formed in the above, and the periphery of the polycrystalline silicon region is blocked by the exposure mask 339 to form an amorphous silicon region. Therefore, due to the difference in color between the polycrystalline silicon region and the amorphous silicon region, the pattern corresponding to the key forming opening 337 can be used as the alignment key 5.

Using this semiconductor thin film, a semiconductor device, a liquid crystal display device and an EL display device were manufactured as in the first embodiment. In the manufacture of the TFT which constitutes the semiconductor device, the TFT is formed at the position of the large grain crystal 14 using the alignment key 5 as in the first embodiment. In this embodiment, the light amount distribution forming region 350 of the exposure mask is formed.
Since the center of the large grain crystal 14 substantially coincides with the position corresponding to the center of the large grain crystal 14, the formation position of the large grain crystal 14 becomes clearer and more constant, and the large grain crystal 14 by the alignment key 5 is formed.
The TFT and the TFT can be aligned more accurately.

The TFT thus obtained has a mobility of 41.
0 cm ² / V · s, mobility after resistance test is initial value of 97
% Or more, and all were better than the conventional TFT. Further, in the liquid crystal display device, the defective rate of the drive circuit was 2% and the defective rate of the screen luminance unevenness was 0.7%, which were both better than those of the conventional liquid crystal display device. Also,
The EL display device has a screen luminance unevenness defect rate of 0.6.
%, And the image quality defect rate is 4%, both of which are
It was better than the L display device. The brightness of the EL display device is 520 cd / m ² when a voltage of 5 V is applied.
Which is an improvement over the conventional one.

(Thirteenth Embodiment) Next, a thirteenth embodiment of the present invention will be described. The method for manufacturing a semiconductor thin film according to the thirteenth embodiment is as shown in FIG.
As shown in (a), first, the alignment key 5 is formed on the substrate 1, and then the insulating base film 2 such as a nitride film or an oxide film is formed on the substrate 1 and the alignment key 5. An amorphous silicon film 3 is formed on 2. The alignment key 5 is made of a material having a higher thermal conductivity than the amorphous silicon film 3, and vapor deposition using a mask, etching after film formation, a method of film formation after forming a resist pattern and lift-off, and the like are described above. It can be formed by the forming method in each embodiment.

Next, the amorphous silicon film 3 is irradiated with laser light under the same conditions as in the main irradiation step in the first embodiment. Thereby, as shown in FIG. 28B, the alignment key 5 functions as a heat dissipation layer, and the large grain crystal 14 is formed in the vicinity of the alignment key 5.

After that, the alignment key 5 is used in the same manner as in the manufacturing method of the TFT in the first embodiment, and then, as shown in FIG.
As shown in (c), the TFT 4 is placed at the position of the large grain crystal 14.
0 can be formed. In this way, since the alignment key 5 can also be used as a heat dissipation layer, the manufacturing process of the semiconductor device can be shortened.

The base film 2 is, as shown in FIG.
It is composed of two layers, an upper base film 2b and a lower base film 2c,
The alignment key 5 may be arranged between the upper base film 2b and the lower base film 2c. In this case, it is preferable to make the thickness of the upper base film 2b smaller than the thickness of the lower base film 2c, which can improve the thermal conductivity. In addition, the upper base film 2b is a porous layer,
The lower base film 2c may be a denser layer than this porous layer.

(Fourteenth Embodiment) Next, a fourteenth embodiment of the present invention will be described. The structure of the TFT in each of the above-described embodiments is generally called a coplanar structure or a positive stagger structure, but there is a structure called a bottom gate structure or an inverted stagger structure. Such an inverted staggered TFT
Can be manufactured as follows.

First, the alignment key 5 is formed on the substrate 1, and then the base film 2 is formed. Next, the metal film is sputtered, photolithography is performed using the alignment key 5, and the patterned gate electrode 20 is formed at a predetermined position by dry etching or the like (FIG. 29A). Then, the gate insulating film 19 is formed with TEOS-
After the film is formed by the CVD method or the like, the amorphous silicon film 3 is formed by the plasma CVD method or the like, and dehydrogenation is performed by heat treatment or the like (FIG. 29B).

After this, as in the first embodiment, the amorphous silicon film 3 is changed to the polycrystalline silicon film 1 by the preliminary irradiation process.
1, the heat dissipation layer 4 made of a material having a higher thermal conductivity than the polycrystalline silicon film 11 is formed near the gate electrode 20 using the alignment key 5 (FIG. 29C). Then, a large grain crystal is formed in the vicinity of the heat dissipation layer 4 by the main irradiation step, and then a step of removing the heat dissipation layer 4 is performed to complete the semiconductor thin film. It goes without saying that the heat dissipation layer 4 can also be formed by other methods shown in the above-described embodiments. The method of manufacturing a TFT using this semiconductor thin film can be performed in the same manner as in the first embodiment.
Further, the alignment key 5 is formed simultaneously with the gate electrode 20 when a metal film for forming a gate electrode is formed and a photo process and an etching process are performed, instead of being formed between the substrate 1 and the base film 2. It is also possible to do so.

Although the embodiments of the present invention have been specifically described above, it is needless to say that the present invention is not limited to the above embodiments, and various modifications can be made without departing from the scope of the invention. .

[0197]

As is apparent from the above description, according to the present invention, it is possible to provide a semiconductor device having high characteristics and high reliability.

[Brief description of drawings]

FIG. 1 is a perspective view showing a substrate on which an amorphous silicon film is formed in the method of manufacturing a semiconductor thin film according to the first embodiment of the present invention.

FIG. 2 is a schematic configuration diagram of a laser annealing apparatus used in the method for manufacturing a semiconductor thin film.

FIG. 3 is a cross-sectional view showing a state after laser light irradiation in the method for manufacturing a semiconductor thin film.

FIG. 4 is a cross-sectional view showing a state in which a heat dissipation layer and an alignment key are formed on an amorphous silicon film in the method for manufacturing a semiconductor thin film.

FIG. 5 (a) In the method for manufacturing a semiconductor thin film,
It is sectional drawing which shows the state in this irradiation process, and (b) It is a figure which shows the temperature distribution of the said silicon film by this irradiation process.

FIG. 6 is a cross-sectional view showing a state in which large grain crystals are formed in the silicon film due to the presence of the heat dissipation layer in the method for manufacturing a semiconductor thin film.

FIG. 7 is a plan view of the vicinity of the large grain crystal.

FIG. 8 is a cross-sectional view illustrating a step of removing the heat dissipation layer in the method for manufacturing a semiconductor thin film.

FIG. 9 is a plan view showing the shape of the large grain crystal when the shape of the heat dissipation layer is changed in the method for manufacturing a semiconductor thin film.

FIG. 10 is a cross-sectional view for explaining the manufacturing process of the TFT included in the semiconductor device in the method of manufacturing the semiconductor device according to the first embodiment of the present invention.

11A is a sectional view showing a positional relationship between the large grain crystal and the TFT, and FIG. 11B is a plan view of the semiconductor device according to the first embodiment of the present invention.

FIG. 12 is a schematic perspective view showing a liquid crystal display device, which is an example of the semiconductor device according to the first embodiment of the present invention, with a part thereof cut away.

FIG. 13 is a schematic plan view showing a part of the liquid crystal display device.

FIG. 14 is a cross-sectional view showing an EL element of an EL display device which is an example of the semiconductor device according to the first embodiment of the present invention.

FIG. 15 is a circuit diagram showing a part of the EL display device.

FIG. 16 is a cross-sectional view for explaining a step of forming a heat dissipation layer and an alignment key in the method of manufacturing a semiconductor thin film according to the third embodiment of the present invention.

FIG. 17 is a cross-sectional view showing a state in which an offset region of a TFT included in the semiconductor device is formed in the method of manufacturing a semiconductor device according to the third embodiment of the present invention.

FIG. 18 is a cross-sectional view showing a state in which a second underlayer film having a porous layer is formed on the first underlayer film in the method for manufacturing a semiconductor thin film according to the seventh embodiment of the present invention.

FIG. 19 is a perspective view showing a state where a main irradiation step is performed using an exposure mask in the method of manufacturing a semiconductor thin film according to the eighth embodiment of the present invention.

20 (a) is a cross-sectional view schematically showing a state in which a light amount distribution is generated on the silicon film by the main irradiation step using the exposure mask shown in FIG. 19, and (b) an outline of the light amount distribution. FIG.

FIG. 21 is a plan view of an exposure mask used in the method of manufacturing a semiconductor thin film according to the ninth embodiment of the present invention.

22 (a) is a sectional view schematically showing a state where a light amount distribution is generated on the silicon film by the main irradiation step using the exposure mask shown in FIG. 21, and (b) an outline of the light amount distribution. FIG.

FIG. 23 is a perspective view showing a state in which a main irradiation step is performed using an exposure mask in the method for manufacturing a semiconductor thin film according to the tenth embodiment of the present invention.

24 (a) is a sectional view schematically showing a state where a light amount distribution is generated on the silicon film by the main irradiation step using the exposure mask shown in FIG. 19, and (b) an outline of the light amount distribution. FIG.

FIG. 25 is (a) a side view and (b) a perspective view of an exposure mask used in a method for manufacturing a semiconductor thin film according to an eleventh embodiment of the present invention.

26 (a) is a cross-sectional view schematically showing a state in which a light amount distribution is generated on the silicon film by the main irradiation step using the exposure mask shown in FIG. 25, and (b) an outline of the light amount distribution. FIG.

FIG. 27 is a plan view of an exposure mask used in the method of manufacturing a semiconductor thin film according to the twelfth embodiment of the present invention.

FIG. 28 is a cross-sectional view for explaining a manufacturing step of a TFT included in the semiconductor device in the method of manufacturing the semiconductor device according to the thirteenth embodiment of the present invention.

FIG. 29 is a cross-sectional view for explaining a manufacturing step of a TFT included in the semiconductor device in the method for manufacturing the semiconductor device according to the fourteenth embodiment of the present invention.

FIG. 30 is a diagram showing an example of a positional relationship between an LDD region or an offset region and a crystal in the semiconductor device of the present invention.

FIG. 31 is a diagram showing a correlation between a silicon crystal grain size and TFT reliability.

[Explanation of symbols]

1 substrate 2 Underlayer film 2b Upper base film 2c Lower base film 3 Amorphous silicon film 4 Heat dissipation layer 5 Alignment key 7 laser light 11 Polycrystalline silicon film 14 Large grain crystals 15 Small grain crystals 16 Protective film 17 Drain region 18a, 18b LDD region 18c, 18d offset area 19 Gate insulating film 20 gate electrode 21 Interlayer insulation film 22 channel area 23a Source electrode 23b drain electrode 24 Source Area 40 TFT 50 Liquid crystal display 60 EL element 105,139,205,241,339 Exposure mask

─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. ⁷ Identification code FI H01L 29/78 616A (56) References JP-A-11-274502 (JP, A) JP-A-5-21343 (JP, A) JP-A-7-249779 (JP, A) JP-A-5-326402 (JP, A) JP-A-3-116924 (JP, A) (58) Fields investigated (Int.Cl. ⁷ , DB name) H01L 29/786 H01L 21/336 H01L 21/20 G02F 1/1368 G09F 9/30 365

Claims (4)

(57) [Claims] 1. A thin film transistor having a polycrystalline semiconductor layer, wherein a channel region, a high concentration impurity region located on both sides of the channel region, the channel region and the high concentration impurity region are provided in the semiconductor layer. A low-concentration impurity region having an impurity concentration lower than that of the high-concentration impurity region or an offset region containing no impurities, and the low-concentration impurity region or the offset region is at least partially present in any of crystals The grain size of is larger than the grain size of other crystals, the thin film transistor is formed in the vicinity of a pattern of a predetermined shape made of a substance having a higher thermal conductivity than the semiconductor layer, the pattern, the substrate and The pattern is formed between the semiconductor layer and the pattern, and the pattern is formed by an insulating base film formed between the substrate and the semiconductor layer. The base film is composed of an upper base film and a lower base film, the pattern is arranged between the upper base film and the lower base film, the upper base film is A semiconductor device, which is a porous layer, wherein the lower base film is a denser layer than the porous layer. 2. The semiconductor device according to claim 1, wherein the upper base film has a thickness smaller than that of the lower base film. 3. A liquid crystal display device comprising a pixel which operates by being supplied with a voltage through the semiconductor device according to claim 1. 4. An EL display device having a pixel which operates by being supplied with a voltage through the semiconductor device according to claim 1.