JP3319083B2 - Plasma processing method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to dry etching, C
Regarding a plasma processing method such as VD, in particular, after performing a plasma processing in a state where a wafer (substrate) is attracted to a wafer stage using a monopolar electrostatic chuck, the result of the plasma processing is not adversely affected. And a method for removing residual charges from the single-pole electrostatic chuck in a short time.

[0002]

2. Description of the Related Art An electrostatic chuck applies a DC voltage to an internal electrode buried in an insulating member, and utilizes a Coulomb force developed between the insulating member and a wafer mounted thereon. This is a mechanism for adsorbing and fixing the wafer. The wafer stage provided with the electrostatic chuck is widely used in recent low-temperature etching apparatuses because it is advantageous for correcting the heat transfer efficiency between the wafer and the flatness of the wafer. Also,
In a plasma CVD apparatus, it is employed as a mechanism for realizing vertical holding of a wafer from the viewpoint of particle reduction.

[0003] Several different types of electrostatic chucks are known depending on whether the wafer is a conductor, a semiconductor, or a dielectric, and whether or not the wafer is grounded. Is a system called a monopolar system. This is where the wafer is a conductor or semiconductor
In this method, a DC voltage having a predetermined polarity is applied to a single internal electrode in an insulating member, and the opposite ground is taken through a wall of a processing chamber via plasma. This method has an important advantage that the gate oxide film of the MOS device is hardly deteriorated in the withstand voltage, although the wafer cannot be attracted to the wafer stage unless plasma is generated in principle.

[0004] In the case of using the single-pole electrostatic chuck, even if the application of the DC voltage is stopped after the plasma processing is completed, electric charges remain on the surface of the insulating member. Therefore, in order to detach the wafer from the stage, it is necessary to supply an appropriate gas to generate plasma again, and to discharge residual charges through the plasma. At this time, a DC voltage having a polarity opposite to that of the DC voltage used for chucking the wafer is applied to the internal electrodes to forcibly remove residual charges to shorten the charge removing time.

[0005]

However, the method of applying a DC voltage of the opposite polarity as described above is a method which is very effective in speeding up the removal of residual charges if the neutralization point of the charges can be accurately determined. However, it is difficult to actually make this determination within a range that does not hinder the attachment / detachment of the wafer. In many cases, charges of the opposite polarity are induced on the wafer, and the wafer is again attracted. In addition, since the neutralization rate of the residual charge also depends on the physical properties of the wafer and the surface state of the suction surface, there is a limit in determining the reverse potential application time by measuring the application time.

To solve this problem, for example, Japanese Unexamined Patent Publication No. 4-162443 discloses an electrode connected to a constant voltage power supply to which a voltage of a predetermined potential is applied, and an electrode connected to a constant current power supply having a voltage of an opposite potential. There is disclosed an electrostatic chuck device that includes an electrode to be applied and monitors a process of decreasing a voltage (proportional to a residual charge) between the two electrodes to detect a decrease in an attraction force. However, complication of the device configuration and control is inevitable.

Further, in the plasma CVD, the applicant of the present application has found experimentally that when the polarity of the voltage applied to the monopolar electrostatic chuck is switched immediately after film formation and the residual charge removal plasma is irradiated, the plasma is irradiated. The particle level on the wafer deteriorates over time. One of the causes is that the reaction product particles of the plasma floating near the wafer due to the effect of the Coulomb force of the electrostatic chuck during the film formation or the reaction product particles peeled off from the inner wall surface of the chamber cause the applied voltage to decrease. It is conceivable that the film is attracted to the surface of the wafer as the polarity is reversed.

As described above, there is a great possibility that application of a voltage having the opposite polarity causes a new problem.

Further, it has been pointed out that radicals are generated from the residual processing gas used in the plasma treatment before removing residual charges, and the radicals deteriorate the anisotropic shape of the pattern already formed. I have. This is related to the fact that the normal residual charge removal process does not apply a substrate bias, and is performed under conditions where a radical reaction prevails.

For example, if a residual hole is removed using O ₂ plasma after opening a contact hole in the SiO ₂ interlayer insulating film using a fluorocarbon-based gas, the decomposition of the residual fluorocarbon-based gas is promoted by O ₂ ,
It is known that a large amount of generated F ^* deteriorates the anisotropic shape of the contact hole.

A similar problem occurs in the etching of the lower resist layer in the three-layer resist process. That is, if the O ₂ gas used for etching is also used for removing residual charges as it is, the generated O ^* deteriorates the anisotropic shape of the lower resist pattern. Therefore, the present invention is to remove the residual charge of a monopolar electrostatic chuck in a short time without deteriorating the anisotropic shape without applying a reverse polarity voltage and without modifying an existing device. It is an object of the present invention to provide a plasma processing method capable of performing the following.

[0012]

A plasma processing method according to the present invention is proposed to achieve the above-mentioned object, and independently controls ion density and ion incident energy.
A first step of adsorbing a substrate on a substrate stage having a monopolar electrostatic chuck in a plasma chamber of a possible plasma processing apparatus and performing predetermined plasma processing on the substrate using plasma of a processing gas; Stopping applying a DC voltage to the monopolar electrostatic chuck, generating a plasma of a residual charge removing gas in the chamber, and generating a self-bias on the substrate stage. And a second step of removing the residual charges.

Examples of such a plasma processing apparatus include an apparatus in which the ion density and the ion incident energy can be controlled independently in principle, such as an ECR (Electron Cyclotron Resonance) plasma apparatus, a helicon wave plasma apparatus, and an ICR plasma apparatus.
CP (Inductively Coupled Pl)
asma), TCP (Transformer Cou)
Pled Plasma), a hollow anode type plasma device, a helical resonator plasma device, and the like can be given as typical examples. Further, when these apparatuses are classified according to their uses, they are almost either dry etching apparatuses or plasma CVD apparatuses.

Here, the residual charge removing gas may be supplied into the plasma chamber with the plasma discharge continued after the first step is completed. In this case, in the first step, just etching for removing a predetermined material layer on the substrate substantially by the thickness thereof is performed, and in the second step, the residual charge removal of the monopolar electrostatic chuck is performed. At the same time, over-etching can be performed using the residual processing gas used in the first step.

Alternatively, between the first step and the second step, there may be provided a third step of once extinguishing the plasma and exhausting the processing gas out of the plasma chamber. In this case, the residual charge removing gas to be used next is naturally a gas different from the processing gas, and an inert gas which does not affect the result of the plasma processing can be appropriately selected and used.

[0016]

The point of the present invention is that the removal of the residual charge of the monopolar electrostatic chuck is performed not by applying a DC voltage of the opposite polarity to its internal electrode but by applying a self-bias . This principle will be described with reference to FIGS. These drawings illustrate a wafer mounting electrode 7, a monopolar electrostatic chuck 1, and related peripheral members of a magnetic field microwave plasma etching apparatus capable of low-temperature etching.

The single-electrode electrostatic chuck 1 is constructed by applying a DC voltage from a DC power supply 6 connected to a high-frequency cutoff filter 4 and a switch 5 to an internal electrode 3 embedded in an insulating block 2 so that the wafer can be mounted on a wafer. W is adsorbed. 1 and 2, the polarity of the DC power supply 6 is opposite. In FIG. 1, when the switch 5 is ON, the electric charge accumulated in the internal electrode 3 is negative (−), and thus the electric charge induced on the surface of the insulating member 2 is positive (+). The opposite is true in FIG. However, in these drawings, the switch 5 is
F, only charges remaining on the surface of the insulating member 2 are shown.

The opposite ground passes through the plasma P,
It is taken through the plasma chamber wall, not shown.

The wafer mounting electrode 7 can be applied with a substrate bias by an RF power supply 11 connected via a switch 9 and a blocking capacitor 10. Note that a cooling pipe 8 for circulating a coolant is buried in the wafer mounting electrode 7 in order to cope with low-temperature etching.

When the switch 9 is turned on and the RF power supply 1
When the plasma P of the residual charge removing gas is generated on the electrostatic chuck 1 having the residual charge as described above in a state where the substrate 1 is connected, a negative self-bias is applied to the wafer by applying the substrate bias, and Positive ions are ions
The light enters from the sheath S. However, the effective ion incidence at this time becomes relatively small as shown in FIG. 1 if the residual charge is positive (+), and as shown in FIG. 2 if the residual charge is negative (−). Relatively more. In other words, since the amount of incident ions is automatically controlled in accordance with the polarity of the residual charges, the residual charges are alleviated, so that the irradiation time of the residual charge removing plasma can be significantly reduced.

[0021] Through this time reduction, the throughput is greatly improved. In addition, the substrate bias is applied even when the residual charge is removed, and the ion assist mechanism operates, so that only the radical reaction does not become dominant. Therefore, the deterioration of the anisotropic shape of the already formed pattern can be suppressed.

The effect of improving the throughput is further improved by performing the plasma treatment and the residual charge removing step by continuous discharge, and by removing the residual charge also by performing over-etching. Of course, the shape anisotropy at the time of over-etching is ensured by applying the substrate bias. In the present invention, the influence of the residual processing gas used in the previous plasma processing is originally reduced by shortening the plasma irradiation time for removing the residual charges and applying the substrate bias. By exhausting the processing gas once later, it is possible to further reduce the exhaust gas. Therefore, for example, even in the etching of the contact hole and the lower resist layer, the anisotropic shape does not deteriorate when the residual charge is removed as in the conventional case.

[0023]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, specific embodiments of the present invention will be described.

Embodiment 1 In this embodiment, SiO ₂ is used for forming contact holes.
After just etching the interlayer insulating film using the fluorocarbon-based gas plasma, He gas is introduced while the discharge and the substrate bias are continuously applied, and the residual charge is removed by the He gas and the over-etching is performed by the residual portion of the fluorocarbon-based gas. Are performed at the same time. The charge state of the monopolar electrostatic chuck in this process will be described with reference to FIGS. 3 to 5, and the processing state of the wafer will be described with reference to FIGS. 6 to 8.

First, FIG. 6 shows a state of a sample wafer before etching. In this wafer, an SiO ₂ interlayer insulating film 23 having a thickness of about 1 μm is laminated on a Si substrate 21 on which an impurity diffusion region 22 has been previously formed as a lower wiring, and a resist mask 24 having a predetermined pattern is further formed thereon. It was done. The resist mask 24 is made of KrF excimer by using a negative type three-component chemically amplified photoresist material (trade name: SAL-601, manufactured by Shipley Co., Ltd.).
It is formed by laser lithography and has an opening having a diameter of about 0.35 μm facing the impurity diffusion region 22.

This wafer was attracted to the monopolar electrostatic chuck 1 of the wafer mounting electrode 7 of the magnetic field microwave plasma etching apparatus set in the state shown in FIG.
These configurations are as described above. Here, a negative DC voltage is applied to the internal electrode 3. In this state, as an example, the SiO ₂ interlayer insulating film 2 is formed under the following conditions.
3 was just etched.

C-C ₄ F ₈ flow rate 15 SCCM CH ₂ F ₂ flow rate 10 SCCM gas pressure 0.27 Pa microwave power 1200 W (2.45 GH)
z) RF bias power 300 W (800 kHz)
z) Wafer mounting electrode temperature -50 ° C (using alcohol-based refrigerant) Etching time 72 seconds

During etching, ions are attracted to the wafer's self-bias induced by the RF bias.
Since CF _x ⁺ is incident from the sheath S, the SiO ₂ interlayer insulating film 23 was anisotropically etched as shown in FIG. However, the above etching time gives just etching conditions, and a residual portion 23b of about 10% of the film thickness remains on a part of the wafer.

Next, the process enters a residual charge removing step also serving as over-etching for removing the residual portion 23b.
That is, as shown in FIG. 4, the switch 5 is turned off to stop the application of the DC voltage, and the negative charge of the internal electrode 3 is extinguished. As a result, the positive charge on the surface of the insulating member 2 remains. During this time, ECR discharge and RF power 11
Is applied, and He gas is introduced into the etching chamber. An example of the discharge conditions at this time is shown below.

He flow rate 15 SCCM Gas pressure 0.67 Pa Microwave power 900 W (2.45 GH)
z) RF bias power 200 W (800 kHz)
z) Wafer mounting electrode temperature -50 ° C (however, initial temperature) Discharge time 60 seconds

By this discharge, the removal of residual charges through the plasma P progressed. In addition, since CF _x ⁺ generated from the residual fluorocarbon-based gas is still incident on the wafer W at the beginning of this discharge, the etching of the remaining portion 23b proceeds, and as shown in FIG. A contact hole 23a having a shape was formed. However, the amount of ions incident on the wafer W is much smaller than during the just etching. As shown in FIG. 5, the amount of incident ions further decreases as the residual charge decreases.

By such a mechanism, in the present embodiment, the process time is reduced by about 30 seconds as compared with the conventional process in which the residual charge is removed without applying a substrate bias after overetching, and the throughput is greatly improved.

Since the adhesion between the wafer W and the electrostatic chuck 1 gradually decreases during the overetching, the wafer temperature gradually increases from -50.degree. However, since the shape anisotropy and the resist selectivity were ensured at the stage until the just etching, no substantial adverse effect occurred.

Embodiment 2 This embodiment is directed to a process of embedding an insulating film in a trench for element isolation by ECR-CVD using SiH ₄ / N ₂ O.
After depositing the SiO ₂ insulating film using the mixed gas, the residual charge was removed by introducing He gas while continuing the discharge and the application of the substrate bias. The processing state of the wafer in this process will be described with reference to FIGS.

FIG. 9 shows a wafer before performing CVD, that is, a wafer in which an element isolation trench 32 having a depth of about 0.5 μm is formed in a Si substrate 31 by ordinary shallow trench etching. This wafer is ECR-
The wafer was attached to a single-electrode electrostatic chuck of a wafer mounting electrode of a CVD apparatus. Although illustration of these members is omitted, the configuration is basically the same as the configuration for the etching apparatus described above. However, in this case, the monopolar electrostatic chuck is intended not for cooling the wafer but for vertical holding. Further, a heater is built in the wafer mounting electrode instead of the cooling pipe, and a substrate bias is applied through the electrode to perform anisotropic deposition.

An example of the deposition conditions is shown below. SiH ₄ flow rate 17 SCCM N ₂ O flow rate 35 SCCM Gas pressure 1 × 10 ⁻³ Pa Microwave power 1000 W (2.45 GH)
z) RF bias power 500 W (13.56 M
Hz) Wafer mounting electrode temperature 250 ° C. Deposition time 600 seconds By this CVD, the element isolation trench 32 was filled with the SiO ₂ insulating film 33 as shown in FIG.

Next, a residual charge removing step is started. That is, the application to the internal electrode of the monopolar electrostatic chuck is stopped,
The charge of the internal electrode is extinguished. During this time, the ECR discharge and the application of the substrate bias by the RF power supply are continued,
He gas is introduced into the CVD chamber. An example of the discharge conditions at this time is shown below. He flow rate 50 SCCM Gas pressure 1 × 10 ⁻³ Pa Microwave power 800 W (2.45 GH
z) RF bias power 300 W (13.56 M
Hz) Wafer mounting electrode temperature 250 ° C. Discharge time 5 seconds By this discharge, the residual charge removal was completed in about half the required time as compared with the case where no substrate bias was applied. Since the present embodiment is a CVD process, there was no problem with respect to shape anisotropy or wafer temperature change in this process.

[0038] Example 3 This example is the lower layer resist etching in a three-layer resist process, after up to over-etching using O ₂ gas, discharge once to terminate the O ₂
This is an example in which gas is exhausted and residual charge is removed using plasma of Ar gas. The processing state of the wafer in this process will be described with reference to FIGS.

FIG. 11 shows the state of the wafer before etching. Here, a gate electrode 45 made of a first-layer W-polycide film is formed via a gate oxide film on a Si substrate 41 on which shallow trench type element isolation regions 42 are formed in advance. Polycrystalline Si layer 43 lower side of the gate electrode 45 containing an impurity, the upper layer side composed of WSi _x (tungsten silicide) layer 44. A second W-polycide film 49 is formed on the gate electrode 45 via an SiO ₂ interlayer insulating film 46, and the entire wafer is planarized by a lower resist layer 50. On this lower resist layer 50, an SOG (spin-on-glass) intermediate layer 51 and an upper resist layer 52 are formed in accordance with the bit line pattern of the SRAM. Polycrystalline Si layer 47 lower side of the second layer W- polycide film 49 containing an impurity, the upper side is composed of WSi _x layer 48. The SOG intermediate layer 51 is formed by performing RIE (Reactive Ion Etching) using the upper resist layer 52 as a mask.

This wafer was attracted to the monopolar electrostatic chuck 1 of the wafer mounting electrode 7 of the magnetic field microwave plasma etching apparatus set in the state shown in FIG. In this state, as an example, the lower resist layer edge film 23 was etched under the following conditions. O ₂ flow rate 10 SCCM Gas pressure 0.27 Pa Microwave power 1200 W (2.45 GH
z) RF bias power 300 W (800 kHz)
z) Wafer mounting electrode temperature -70 ° C (using alcohol-based refrigerant) Since the lower resist layer 50 is formed so as to cover a large step, the above-described etching was performed for a time corresponding to 50% of over-etching. By this etching,
As shown in FIG. 12, the lower resist pattern 50a having a good anisotropic shape was formed.

Next, the supply of O ₂ and the ECR discharge were stopped, the chamber was evacuated for 5 seconds, and the ultimate vacuum was set to 1 × 10 ⁻⁴ Pa
And Next, in order to remove residual charges, ECR discharge was performed under the following conditions as an example. Ar flow rate 50 SCCM Gas pressure 0.67 Pa Microwave power 900 W (2.45 GH
z) RF bias power 50 W (800 kHz)
z) Wafer mounting electrode temperature −70 ° C. (however, initial temperature) Discharge time 5 seconds Also according to the present embodiment, it was possible to remove the residual charge in approximately half the required time as compared with the case where no substrate bias was applied. Since the removal of the residual charges is performed after O ₂ evacuation, the anisotropic shape of the lower resist pattern 50a was not affected at all.

Although the present invention has been described based on three embodiments, the present invention is not limited to these embodiments. For example, the incident ion energy may be gradually reduced by attenuating the substrate bias applied at the time of removing residual charges with time. In addition, details such as the configuration of the sample wafer, etching conditions, discharge conditions for removing residual charges, exhaust conditions, types of etching equipment and CVD equipment to be used, and the polarity of the DC voltage for removing residual charges can be changed as appropriate. It goes without saying that there is something.

[0043]

As is clear from the above description, according to the present invention, it is possible to quickly remove the residual charge of the single-electrode electrostatic chuck and without adversely affecting the result of the plasma processing. Dry etching and plasma CVD
Is improved. Moreover, the residual charge removal of the present invention can be performed without modifying existing devices, and does not involve any complicated operating procedures. Therefore, it greatly contributes to improvement of economy and process reliability.

[Brief description of the drawings]

FIG. 1 is a schematic cross-sectional view illustrating the principle of residual charge removal according to the present invention.

FIG. 2 is a schematic cross-sectional view illustrating the principle of removing residual charges according to the present invention.

FIG. 3 is a schematic cross-sectional view showing a state of a monopolar electrostatic chuck during etching in contact hole processing to which the present invention is applied.

FIG. 4 is a schematic cross-sectional view showing a state of a monopolar electrostatic chuck in which residual charges are continuously removed after the etching of FIG. 3 is completed.

5 is a schematic cross-sectional view showing the state of the monopolar electrostatic chuck at a stage where the removal of the residual charges in FIG. 4 has further progressed.

FIG. 6 is a schematic cross-sectional view showing a state of a wafer before etching in contact hole processing to which the present invention is applied.

FIG. 7 is a schematic cross-sectional view showing a state where the SiO ₂ interlayer insulating film of FIG. 6 is just etched.

8 is a schematic cross-sectional view showing a state where the SiO ₂ interlayer insulating film of FIG. 7 has been over-etched.

FIG. 9 is a view showing a state in which trenches are buried according to the present invention;
FIG. 4 is a schematic cross-sectional view showing a state of a wafer before performing ECR-CVD.

10 is a schematic cross-sectional view showing a state in which the element isolation trench of FIG. 9 is buried with an SiO ₂ insulating film.

FIG. 11 is a schematic cross-sectional view showing a state of a wafer before etching in etching a lower resist layer to which the present invention is applied.

FIG. 12 is a schematic cross-sectional view showing a state where a lower resist layer of FIG. 11 is etched.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Monopolar electrostatic chuck 3 ... Internal electrode 6 ... DC power supply 7 ... Wafer mounting electrode 11 ... RF power supply P ... Plasma S ... Ion sheath 23. ··· SiO ₂ interlayer insulating film 23a ··· Contact hole 32 ··· Element isolation trench 33 ··· SiO ₂ insulating film 50 ··· Lower resist layer 50a ··· Lower resist pattern

Continuation of the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H01L 21/3065 H01L 21/68

Claims (4)

(57) [Claims] 1. The ion density and the ion incident energy are
In a plasma chamber of an independently controllable plasma processing apparatus , a substrate is adsorbed on a substrate stage provided with a monopolar electrostatic chuck, and a predetermined plasma process is performed on the substrate using plasma of a processing gas. Stopping the DC voltage application to the monopolar electrostatic chuck, generating a plasma of a residual charge removing gas in the chamber, and generating a self-bias on the substrate stage. A second step of removing the residual charge of the single-electrode electrostatic chuck. 2. The plasma processing method according to claim 1, wherein the residual charge removing gas is supplied into the plasma chamber in a state where plasma discharge is continued after the first step. . 3. In the first step, just etching for removing a predetermined material layer on the substrate substantially by the thickness thereof is performed, and in the second step, the remaining of the monopolar electrostatic chuck is performed. 3. The plasma processing method according to claim 2, wherein, at the same time as the charge is removed, over-etching is performed to remove a remaining portion of the predetermined material layer by using a remaining amount of the processing gas used in the first step. . 4. A method according to claim 1, further comprising a third step of temporarily extinguishing the plasma and exhausting the processing gas out of the plasma chamber between the first step and the second step. The plasma processing method according to claim 1.