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JP3286518B2 - Electric field strength detection circuit of radio receiver - Google Patents

Electric field strength detection circuit of radio receiver

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Publication number
JP3286518B2
JP3286518B2 JP00952596A JP952596A JP3286518B2 JP 3286518 B2 JP3286518 B2 JP 3286518B2 JP 00952596 A JP00952596 A JP 00952596A JP 952596 A JP952596 A JP 952596A JP 3286518 B2 JP3286518 B2 JP 3286518B2
Authority
JP
Japan
Prior art keywords
circuit
signal
output signal
electric field
agc
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP00952596A
Other languages
Japanese (ja)
Other versions
JPH09199962A (en
Inventor
孝夫 佐伯
勝男 松本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP00952596A priority Critical patent/JP3286518B2/en
Publication of JPH09199962A publication Critical patent/JPH09199962A/en
Application granted granted Critical
Publication of JP3286518B2 publication Critical patent/JP3286518B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Circuits Of Receivers In General (AREA)
  • Control Of Amplification And Gain Control (AREA)

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、直線性の良い電界
強度検出信号を得るように改善したラジオ受信機の電界
強度検出回路に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electric field intensity detecting circuit of a radio receiver improved to obtain an electric field intensity detecting signal having good linearity.

【0002】[0002]

【従来の技術】従来は、図2の如き、AGC信号を利用
して受信電界強度を検出する回路が知られていた。図2
において、受信RF信号は、RF増幅回路(1)で増幅
された後、混合回路(2)において局部発振回路(3)
から発生する局部発振信号と混合され、IF信号に変換
される。前記IF信号は、IF増幅回路(4)で増幅さ
れ、AM検波回路(5)でAM検波される。そして、A
M検波回路(5)の出力信号は、後段のオーディオ増幅
回路で増幅される。
2. Description of the Related Art Conventionally, there has been known a circuit for detecting a received electric field intensity using an AGC signal as shown in FIG. FIG.
In the above, after the received RF signal is amplified by the RF amplifier circuit (1), the local oscillator circuit (3) in the mixing circuit (2)
And is converted to an IF signal. The IF signal is amplified by an IF amplifier circuit (4) and AM detected by an AM detection circuit (5). And A
An output signal of the M detection circuit (5) is amplified by a subsequent audio amplification circuit.

【0003】また、AM検波回路(5)の出力信号はI
FAGC回路(6)に印加され、IFAGC回路(6)
から発生するIFAGC信号によりIF増幅回路(4)
のゲインが制御される。IF信号のレベルが所定レベル
以上になるとIFAGC信号によりIF増幅回路(4)
のゲインが低下し、IF信号レベルが略一定となるよう
に制御される。受信電界強度が強くなりIF信号レベル
がさらに高くなると、IF増幅回路(4)のゲインが最
小になり、IF増幅回路(4)の出力信号レベルが高く
なり、IFAGCループが効かなくなる。そして、IF
AGCループが効かなくなる受信電界強度になる直前
に、RFAGC回路(7)からRF増幅回路(1)の出
力信号に応じたRFAGC信号が発生する。即ち、受信
RF信号レベルが所定レベル以上になると、RFAGC
信号が発生する。RF信号レベルが高くなると、RFA
GC信号の増大し、RF増幅回路(1)のゲインが低下
する。その為、RF増幅回路(1)の出力信号レベルを
略一定に保つことができる。よって、大入力の受信信号
に対して、AM検波回路(5)に印加されるIF信号の
レベルがAM検波回路(5)の飽和レベル以下に制限さ
れるので、検波出力の歪率を良好にできる。
The output signal of the AM detection circuit (5) is I
Applied to the FAGC circuit (6) and the IFAGC circuit (6)
Amplifying circuit (4) by IFAGC signal generated from
Is controlled. When the level of the IF signal exceeds a predetermined level, the IF amplifier circuit (4) uses the IFAGC signal.
Is controlled so that the IF signal level becomes substantially constant. When the received electric field strength increases and the IF signal level further increases, the gain of the IF amplifier circuit (4) becomes minimum, the output signal level of the IF amplifier circuit (4) increases, and the IFAGC loop does not work. And IF
Immediately before the reception electric field strength at which the AGC loop becomes ineffective, an RFAGC signal corresponding to the output signal of the RF amplifier circuit (1) is generated from the RFAGC circuit (7). That is, when the received RF signal level exceeds a predetermined level, the RFAGC
A signal is generated. When the RF signal level increases, RFA
The GC signal increases, and the gain of the RF amplifier circuit (1) decreases. Therefore, the output signal level of the RF amplifier circuit (1) can be kept substantially constant. Therefore, the level of the IF signal applied to the AM detection circuit (5) is limited to a level not higher than the saturation level of the AM detection circuit (5) with respect to the received signal having a large input. it can.

【0004】また、前記IFAGC信号及びRFAGC
信号は加算回路(8)において加算される。加算回路
(8)の出力信号は電界強度を示す信号として発生す
る。RFAGC信号及びIFAGC信号はそれぞれRF
増幅回路(1)及びAM検波回路(5)の出力信号を平
滑して得られるものであり、RF及びIFAGC信号の
レベルは図3(イ)の如く変化する。よって、加算回路
(8)の出力信号は図3(イ)の点線の如くなり、電界
強度を示す信号を得ることができる。
The IFAGC signal and the RFAGC signal
The signals are added in an adding circuit (8). The output signal of the adding circuit (8) is generated as a signal indicating the electric field strength. RFAGC signal and IFAGC signal are RF
It is obtained by smoothing the output signals of the amplifier circuit (1) and the AM detection circuit (5), and the levels of the RF and IFAGC signals change as shown in FIG. Therefore, the output signal of the adder circuit (8) is as shown by the dotted line in FIG. 3A, and a signal indicating the electric field strength can be obtained.

【0005】[0005]

【発明が解決しようとする課題】ところで、ラジオ受信
機は、局部発振信号を変化させることににより受信周波
数を掃引し、検出レベル以上の受信電界強度を有する放
送局が受信されたら、掃引を停止し前記放送局を受信す
るサーチ機能を有する。放送局の電界強度が検出レベル
以上か否かの判別は、加算回路(8)の出力信号レベル
が所定レベル以上か否かにより判別する。しかしなが
ら、図3(イ)の加算回路(8)の出力信号のうち前記
出力信号レベルが電界強度の増大に対して微小に増大す
る(a)の部分がある。電界強度検出レベルを前記
(a)の部分に設けた場合、検出レベルがバラツキ等に
より変化すると、放送局の電界強度検出レベルが大きく
変化し、正確な電界強度で放送局を検出することができ
ないという問題があった。
By the way, the radio receiver sweeps the reception frequency by changing the local oscillation signal, and stops the sweep when the broadcast station having the reception electric field strength equal to or higher than the detection level is received. And a search function for receiving the broadcast station. The determination as to whether or not the electric field strength of the broadcasting station is equal to or higher than the detection level is made based on whether or not the output signal level of the adding circuit (8) is equal to or higher than a predetermined level. However, there is a portion (a) in the output signal of the adder circuit (8) in FIG. 3A where the output signal level slightly increases with an increase in the electric field intensity. When the electric field strength detection level is provided in the portion (a), if the detection level changes due to a variation or the like, the electric field strength detection level of the broadcasting station greatly changes, and the broadcasting station cannot be detected with accurate electric field strength. There was a problem.

【0006】[0006]

【課題を解決するための手段】本発明は上述の点に鑑み
成されたものであり、受信RF信号を増幅するRF増幅
回路と、前記RF増幅回路の出力信号をIF信号に変換
する周波数変換回路と、前記IF信号を増幅するIF増
幅回路と、を備えるラジオ受信機の電界強度検出回路で
あって、前記IF増幅回路の出力信号を検波する第1検
波回路と、該第1検波回路の出力信号に応じて、前記I
F増幅回路のゲインを制御するための第1AGC信号を
発生する第1AGC信号発生回路と、前記周波数変換回
路の出力信号を増幅する増幅回路と、該増幅回路の出力
信号を検波する第2検波回路と、該第2検波回路の出力
信号に応じて前記RF増幅回路のゲインを制御するため
の第2AGC信号を発生する第2AGC信号発生回路
と、前記第1及び第2AGC信号と、前記増幅回路の出
力信号とを加算し、電界強度検出信号を得る加算回路と
から成り、前記第1AGC信号に応じて、前記IF増幅
回路と増幅回路とのゲインを互いに逆方向に制御するこ
とを特徴とする。
SUMMARY OF THE INVENTION The present invention has been made in view of the above points, and has an RF amplifier circuit for amplifying a received RF signal and a frequency converter for converting an output signal of the RF amplifier circuit into an IF signal. A circuit for detecting electric field strength of a radio receiver, comprising: a first circuit for detecting an output signal of the IF amplifier; and a first circuit for detecting an output signal of the first circuit. According to the output signal, the I
A first AGC signal generation circuit for generating a first AGC signal for controlling a gain of an F amplification circuit; an amplification circuit for amplifying an output signal of the frequency conversion circuit; and a second detection circuit for detecting an output signal of the amplification circuit A second AGC signal generation circuit for generating a second AGC signal for controlling a gain of the RF amplification circuit in accordance with an output signal of the second detection circuit; the first and second AGC signals; An adder circuit for adding an output signal to obtain an electric field intensity detection signal, wherein gains of the IF amplifier circuit and the amplifier circuit are controlled in opposite directions according to the first AGC signal.

【0007】[0007]

【発明の実施の形態】図1は本発明の実施の形態を示す
図であり、(9)及び(10)は増幅率が互いに逆方向
に変化し、IF信号を増幅する第1及び第2IF増幅回
路、(11)は第1IF増幅回路(9)の出力信号を増
幅する第3IF増幅回路、(12)はAM検波回路
(5)の出力信号を平滑する平滑回路(12a)と、平
滑回路(12a)の出力信号に応じてIFAGC信号を
発生する比較回路(12b)とから成る第1AGC信号
発生回路、(13)は第2IF増幅回路(10)の出力
信号をAM検波するAM検波回路(13a)と、AM検
波回路(13a)の出力信号を平滑する平滑回路(13
b)と、平滑回路(13b)の出力信号に応じてRFA
GC信号を発生する比較回路(13c)とから成る第2
AGC信号発生回路、(14)は第1及び第2AGC信
号発生回路(12)及び(13)の出力信号と、AM検
波回路(13a)の出力信号とを加算する加算回路であ
る。
DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a diagram showing an embodiment of the present invention. (9) and (10) show first and second IFs in which amplification factors change in opposite directions to amplify IF signals. An amplifier circuit, (11) a third IF amplifier circuit for amplifying an output signal of the first IF amplifier circuit (9), (12) a smoothing circuit (12a) for smoothing an output signal of the AM detector circuit (5), and a smoothing circuit A first AGC signal generation circuit including a comparison circuit (12b) for generating an IFAGC signal in accordance with the output signal of (12a); and (13) an AM detection circuit (13) for AM detection of an output signal of the second IF amplification circuit (10) 13a) and a smoothing circuit (13) for smoothing the output signal of the AM detection circuit (13a).
b) and RFA according to the output signal of the smoothing circuit (13b).
A comparison circuit (13c) for generating a GC signal;
The AGC signal generation circuit (14) is an addition circuit for adding the output signals of the first and second AGC signal generation circuits (12) and (13) and the output signal of the AM detection circuit (13a).

【0008】図1において、受信RF信号は、RF増幅
回路(1)で増幅された後、混合回路(2)において局
部発振回路(3)からの局部発振信号と混合され、IF
信号が混合回路(2)から発生する。前記IF信号は第
1及び第3IF増幅回路(9)及び(11)で増幅され
た後、検波回路(5)でAM検波される。検波回路
(5)の出力信号は、出力端子(16)から後段の回路
に伝送されると共に、平滑回路(12a)で平滑され、
受信信号の電界強度が検出される。平滑回路(12a)
の出力信号は比較回路(12b)に印加され、前記出力
信号のレベルが第1基準レベル以下であると、第1AG
C信号発生回路(12)からIFAGC信号は発生しな
い。その場合には、第1IF増幅回路(9)のゲインは
最大のゲインとなっており、また、第2IF増幅回路
(10)のゲインは0となっているので、第2IF増幅
回路(10)から出力信号は発生しない。その為、RF
−AGC動作は全く行われていない。
In FIG. 1, a received RF signal is amplified by an RF amplifier circuit (1), and then mixed with a local oscillation signal from a local oscillation circuit (3) in a mixing circuit (2).
A signal is generated from the mixing circuit (2). The IF signal is amplified by first and third IF amplifier circuits (9) and (11), and then AM detected by a detection circuit (5). The output signal of the detection circuit (5) is transmitted from an output terminal (16) to a subsequent circuit, and is also smoothed by a smoothing circuit (12a).
The electric field strength of the received signal is detected. Smoothing circuit (12a)
Is applied to the comparison circuit (12b), and when the level of the output signal is lower than the first reference level, the first AG
No IFAGC signal is generated from the C signal generation circuit (12). In this case, the gain of the first IF amplifier circuit (9) is the maximum gain, and the gain of the second IF amplifier circuit (10) is 0. No output signal is generated. Therefore, RF
-AGC operation is not performed at all.

【0009】ここで、受信電界強度が大きくなり、平滑
回路(12a)の出力信号レベルが第1基準レベル以上
になると、IFAGC信号が第1AGC信号発生回路
(12)から第1及び第2IF増幅回路(9)及び(1
0)に印加される。そして、前記IFAGC信号に応じ
て、第1IF増幅回路(9)のゲインは低下し、第2I
F増幅回路(10)のゲインは増加する。その為、第1
IF増幅回路(9)の出力のレベルは所定レベル以上に
高くならない。一方、第2IF増幅回路(10)のゲイ
ンが増加したことにより、第2IF増幅回路(10)か
ら出力信号が発生し、第2IF増幅回路(10)の出力
信号はAM検波回路(13a)においてAM検波され
る。そして、AM検波回路(13a)の出力信号は平滑
回路(13b)で平滑される。平滑回路(13b)の出
力信号は比較回路(13c)に印加され、平滑回路(1
3b)の出力信号のレベルが第2基準レベル以下である
と、第2AGC信号発生回路(13)はRFAGC信号
を発生しない。
Here, when the received electric field strength increases and the output signal level of the smoothing circuit (12a) exceeds the first reference level, the IFAGC signal is sent from the first AGC signal generation circuit (12) to the first and second IF amplification circuits. (9) and (1)
0). Then, in response to the IFAGC signal, the gain of the first IF amplifying circuit (9) decreases,
The gain of the F amplifier circuit (10) increases. Therefore, the first
The output level of the IF amplifier circuit (9) does not rise above a predetermined level. On the other hand, an output signal is generated from the second IF amplifying circuit (10) due to an increase in the gain of the second IF amplifying circuit (10), and the output signal of the second IF amplifying circuit (10) is output to the AM detection circuit (13a). It is detected. Then, the output signal of the AM detection circuit (13a) is smoothed by the smoothing circuit (13b). The output signal of the smoothing circuit (13b) is applied to the comparison circuit (13c), and the smoothing circuit (1
If the level of the output signal of 3b) is equal to or lower than the second reference level, the second AGC signal generation circuit (13) does not generate the RFAGC signal.

【0010】また、さらに強入力の受信信号が印加され
た場合には、IFAGC動作が効かなくなりAM検波回
路(5)の出力レベルが略一定のレベルからさらに高く
なる。その際、平滑回路(13b)の出力信号のレベル
が比較回路(13c)において第2基準レベル以上であ
ると検出され、第2AGC信号発生回路(13)はRF
AGC信号を発生する。前記RFAGC信号はRF増幅
回路(1)に印加され、RF増幅回路(1)のゲインは
RF−AGC信号に応じて低下する。その為、RF増幅
回路(1)の出力レベルは所定レベル以上に高くならな
いように制御される。
When a stronger input signal is applied, the IFAGC operation becomes ineffective and the output level of the AM detector (5) rises from a substantially constant level. At this time, the level of the output signal of the smoothing circuit (13b) is detected by the comparison circuit (13c) to be equal to or higher than the second reference level, and the second AGC signal generation circuit (13) outputs the RF signal.
Generate an AGC signal. The RFAGC signal is applied to the RF amplifier circuit (1), and the gain of the RF amplifier circuit (1) decreases according to the RF-AGC signal. Therefore, the output level of the RF amplifier circuit (1) is controlled so as not to become higher than a predetermined level.

【0011】よって、受信信号の電界強度が所定レベル
以上になった場合、AM検波回路(5)の出力レベルを
略一定にでき、AM検波回路(5)が飽和するのを防止
できる。そして、RF−AGCを動作させるために混合
回路(2)の出力信号を第2IF増幅回路(10)で増
幅させた信号を用いれば、比較回路(13c)の入力信
号は受信電界強度に対して大きく変化するので、RFA
GCの動作開始点を高精度に設定できる。
Therefore, when the electric field strength of the received signal becomes higher than a predetermined level, the output level of the AM detection circuit (5) can be made substantially constant, and the AM detection circuit (5) can be prevented from being saturated. If the signal obtained by amplifying the output signal of the mixing circuit (2) by the second IF amplifying circuit (10) is used to operate the RF-AGC, the input signal of the comparing circuit (13c) is in proportion to the received electric field strength. Because it changes greatly, RFA
The operation start point of the GC can be set with high accuracy.

【0012】また、第1及び第2AGC信号発生回路
(12)及び(13)の出力信号は加算回路(14)に
印加される。さらに、AM検波回路(13a)の出力信
号も加算回路(14)に印加される。ところで、IFA
GC信号は、受信電界強度に対して図3(ロ)の如く変
化する。また、第2IF増幅回路(10)の出力信号
は、IFAGC信号が発生することにより発生するの
で、AM検波回路(13a)の出力信号は図3(ロ)の
如くなる。またさらに、RFAGC信号はIFAGC動
作が効かなくなった電界強度で発生するから、図3
(ロ)の如く発生する。加算回路(14)の出力信号は
3つの前記出力信号を加算するので、図3(ロ)の点線
の如き信号となる。図3(ロ)から明らかなように加算
回路(14)の出力信号は受信電界強度に対して直線的
に変化する。
The output signals of the first and second AGC signal generation circuits (12) and (13) are applied to an addition circuit (14). Further, the output signal of the AM detection circuit (13a) is also applied to the addition circuit (14). By the way, IFA
The GC signal changes as shown in FIG. Since the output signal of the second IF amplifier circuit (10) is generated by the generation of the IFAGC signal, the output signal of the AM detection circuit (13a) is as shown in FIG. Further, since the RFAGC signal is generated at an electric field strength at which the IFAGC operation is no longer effective, FIG.
It occurs as shown in (b). Since the output signal of the adder circuit (14) adds the three output signals, it becomes a signal as indicated by a dotted line in FIG. As apparent from FIG. 3B, the output signal of the adder circuit (14) changes linearly with the received electric field strength.

【0013】図4は図1の第1及び第2IF増幅回路
(9)及び(10)の具体回路例を示す図であり、(
)及び(17)は差動接続されたトランジスタ、(
)及び(19)は差動接続され、共通エミッタがトラ
ンジスタ(16)のコレクタに接続されるトランジス
タ、(20)及び(21)は差動接続され、共通エミッ
タがトランジスタ(17)のコレクタに接続されるトラ
ンジスタ、(22)乃至(25)はトランジスタ(
)乃至(19)のコレクタ電流をそれぞれ反転する電
流ミラー回路、(26)及び(27)は電流ミラー回路
24)及び(25)の出力電流を反転する電流ミラー
回路、(28)は基準電圧Vrefを発生する基準電圧
源、(30)は基準電圧Vrefがカソードに印加され
るダイオード、(31)及び(32)はダイオード(3
0)のアノード・カソード間に直列接続された抵抗であ
る。
[0013] Figure 4 is a diagram showing a specific circuit example of the first and second 2IF amplifier circuit of FIG. 1 (9) and (10), (1
6 ) and ( 17 ) are differentially connected transistors, ( 1)
8 ) and ( 19 ) are differentially connected, transistors having a common emitter connected to the collector of the transistor ( 16 ), ( 20 ) and ( 21 ) are differentially connected, and the common emitter is connected to the collector of the transistor ( 17 ). The connected transistors, ( 22 ) to ( 25 ), are transistors ( 1 )
8 ) to ( 19 ), current mirror circuits for inverting the collector currents, ( 26 ) and ( 27 ) are current mirror circuits for inverting the output currents of the current mirror circuits ( 24 ) and ( 25 ), and ( 28 ) is a reference. A reference voltage source for generating the voltage Vref, ( 30 ) is a diode to which the reference voltage Vref is applied to the cathode, and ( 31 ) and ( 32 ) are diodes (3)
0) is a resistor connected in series between the anode and the cathode.

【0014】図4において、第1AGC信号発生回路
(12)の出力信号が発生していないと、ダイオード
30)のアノード・カソード間電圧VDを分圧した電
圧がトランジスタ(18)及び(21)に印加される。
ダイオード(30)の端子電圧VDは約0.7Vなの
で、直列接続された抵抗(31)及び(32)の分圧比
は7:1に設定すれば、トランジスタ(18)及び(
)のベース電圧の差電圧と、トランジスタ(20)及
び(21)のベース電圧の差電圧とは、共に、0.1V
となり、トランジスタ(18)及び(21)だけがオン
する。入力信号としてトランジスタ(16)のベースに
印加されるRF信号に応じたトランジスタ(16)及び
17)のコレクタ電流は、トランジスタ(18)及び
21)を介して、電流ミラー回路(22)及び(
5)に印加され、反転される。さらに、電流ミラー回路
25)の出力電流は、電流ミラー回路(28)に印加
され、反転される。そして、電流ミラー回路(22)及
び(27)の出力電流が加算され、加算された出力電流
は後段のAM検波回路(5)に印加される。
In FIG. 4, when the output signal of the first AGC signal generation circuit (12) is not generated, the voltage obtained by dividing the anode-cathode voltage VD of the diode ( 30 ) is applied to the transistors ( 18 ) and ( 21 ). Is applied to
Since the terminal voltage VD of the diode ( 30 ) is about 0.7 V, if the voltage dividing ratio of the resistors ( 31 ) and ( 32 ) connected in series is set to 7: 1, the transistors ( 18 ) and ( 1 )
9 ) The difference voltage between the base voltages of the transistors ( 20 ) and ( 21 ) is 0.1 V
Thus, only the transistors ( 18 ) and ( 21 ) are turned on. The collector currents of the transistors ( 16 ) and ( 17 ) according to the RF signal applied to the base of the transistor ( 16 ) as an input signal are supplied to the current mirror circuit ( 22 ) and the transistors ( 18 ) and ( 21 ) via the transistors ( 18 ) and ( 21 ). ( 2
5) is applied and inverted. Further, the output current of the current mirror circuit ( 25 ) is applied to the current mirror circuit (28) and inverted. Then, the output currents of the current mirror circuits ( 22 ) and ( 27 ) are added, and the added output current is applied to the AM detection circuit (5) at the subsequent stage.

【0015】また、第1AGC信号発生回路(12)か
らIFAGC信号が発生すると、前記IFAGC信号に
応じたトランジスタ(33)のコレクタ電流が発生す
る。前記コレクタ電流により、直列接続された抵抗(
)及び(32)の接続中点電圧は低下し、前記接続中
点が低下することによって、トランジスタ(18)及び
19)と、トランジスタ(20)及び(21)とは差
動対のリニア領域で動作する。入力信号に応じたトラン
ジスタ(16)のコレクタ電流は、トランジスタ(
)及び(19)に、トランジスタ(17)のコレクタ
電流はトランジスタ(20)及び(21)に分流され
る。トランジスタ(18)及び(21)のコレクタ電流
は、電流ミラー回路(22)、(25)及び(27)を
介して、後段の回路に供給される。また、トランジスタ
19)及び(20)のコレクタ電流は、電流ミラー回
路(23)及び(24)に印加され、反転される。さら
に、電流ミラー回路(24)の出力電流は、電流ミラー
回路(26)に供給され、反転される。そして、電流ミ
ラー回路(23)及び(26)の出力電流が加算され、
加算された出力電流は第2AGC信号発生回路(12
に供給される。そして、IFAGC信号に応じて、前記
差動対をリニア領域で動作させることにより、電流ミラ
ー回路(26)及び(27)の出力信号の大きさは互い
に逆方向に変化する。
When an IFAGC signal is generated from the first AGC signal generation circuit (12), a collector current of the transistor ( 33 ) corresponding to the IFAGC signal is generated. The collector current ( 3
The connection midpoint voltages of 1 ) and ( 32 ) decrease, and the connection midpoints decrease, so that the transistors ( 18 ) and ( 19 ) and the transistors ( 20 ) and ( 21 ) have a linear pair of differential pairs. Work in the area. The collector current of the transistor ( 16 ) according to the input signal is the transistor ( 1)
8 ) and ( 19 ), the collector current of the transistor ( 17 ) is shunted to the transistors ( 20 ) and ( 21 ). The collector currents of the transistors ( 18 ) and ( 21 ) are supplied to subsequent circuits via current mirror circuits ( 22 ), ( 25 ) and ( 27 ). The collector currents of the transistors ( 19 ) and ( 20 ) are applied to the current mirror circuits ( 23 ) and ( 24 ) and are inverted. Furthermore, the output current of the current mirror circuit (24) is supplied to a current mirror circuit (26) is inverted. Then, the output currents of the current mirror circuits ( 23 ) and ( 26 ) are added,
The added output current is supplied to a second AGC signal generation circuit ( 12 ).
Supplied to By operating the differential pair in the linear region according to the IFAGC signal, the magnitudes of the output signals of the current mirror circuits (26) and (27) change in opposite directions.

【0016】[0016]

【発明の効果】以上述べた如く、本発明によれば、第1
AGC信号発生回路のAGC信号に応じて第2IF増幅
回路のゲインが増加し、周波数変換回路の出力信号を前
記増幅回路で増幅して得られた信号を用いて第2AGC
信号発生回路を動作させており、第1及び第2AGC信
号発生回路の出力信号と増幅回路の出力信号とを加算し
て受信電界強度を示す信号を発生しているので、直線性
の良い電界強度検出信号を得ることができる。よって、
サーチ動作時、サーチストップを定める局検出レベルに
バラツキが発生しても、検出される受信電界強度は小さ
く変化し、正確なサーチストップを行うことができる。
As described above, according to the present invention, the first
The gain of the second IF amplifying circuit increases according to the AGC signal of the AGC signal generating circuit, and the second AGC signal is amplified using the signal obtained by amplifying the output signal of the frequency conversion circuit by the amplifying circuit.
Since the signal generation circuit is operated and the output signal of the first and second AGC signal generation circuits and the output signal of the amplification circuit are added to generate a signal indicating the reception electric field intensity, the electric field intensity with good linearity is obtained. A detection signal can be obtained. Therefore,
At the time of the search operation, even if a variation occurs in the station detection level that determines the search stop, the intensity of the received electric field detected changes little, and the accurate search stop can be performed.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の実施の形態を示すブロック図である。FIG. 1 is a block diagram showing an embodiment of the present invention.

【図2】従来例を示すブロック図である。FIG. 2 is a block diagram showing a conventional example.

【図3】本発明を説明するための特性図である。FIG. 3 is a characteristic diagram for explaining the present invention.

【図4】図1の要部を示す回路図である。FIG. 4 is a circuit diagram showing a main part of FIG. 1;

【符号の説明】[Explanation of symbols]

9 第1IF増幅回路 10 第2IF増幅回路 11 第3IF増幅回路 12 第1AGC信号発生回路 13 第2AGC信号発生回路 14 加算回路 Reference Signs List 9 first IF amplifier circuit 10 second IF amplifier circuit 11 third IF amplifier circuit 12 first AGC signal generation circuit 13 second AGC signal generation circuit 14 addition circuit

───────────────────────────────────────────────────── フロントページの続き (56)参考文献 特開 昭60−62246(JP,A) 特開 平4−223629(JP,A) 特開 平1−208915(JP,A) 特開 平1−241932(JP,A) 実開 昭48−101549(JP,U) 特許3148540(JP,B2) (58)調査した分野(Int.Cl.7,DB名) H03G 3/30 H04B 1/16 ────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-60-62246 (JP, A) JP-A-4-223629 (JP, A) JP-A-1-208915 (JP, A) JP-A-1- 241932 (JP, A) JP-A-48-101549 (JP, U) Patent 3148540 (JP, B2) (58) Fields investigated (Int. Cl. 7 , DB name) H03G 3/30 H04B 1/16

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】受信RF信号を増幅するRF増幅回路と、
前記RF増幅回路の出力信号をIF信号に変換する周波
数変換回路と、前記IF信号を増幅する第1IF増幅回
路と、を備えるラジオ受信機の電界強度検出回路であっ
て、 前記第1IF増幅回路の出力信号を検波する第1検波回
路と、 該第1検波回路の出力信号に応じて、前記第1IF増幅
回路のゲインを制御するための第1AGC信号を発生す
る第1AGC信号発生回路と、 前記周波数変換回路からのIF信号を増幅する第2IF
増幅回路と、 該第2IF増幅回路の出力信号を検波する第2検波回路
と、 該第2検波回路の出力信号に応じて前記RF増幅回路の
ゲインを制御するための第2AGC信号を発生する第2
AGC信号発生回路と、 前記第1及び第2AGC信号と、前記第2検波回路の出
力信号とを加算し、電界強度検出信号を得る加算回路と
から成り、前記第1AGC信号に応じて、前記第1IF
増幅回路と前記第2IF増幅回路とのゲインを互いに逆
方向に制御することを特徴とするラジオ受信機の電界強
度検出回路。
An RF amplifier circuit for amplifying a received RF signal;
A field strength detection circuit of a radio receiver comprising a frequency conversion circuit for converting the output signal into an IF signal, and the 1 IF amplifying circuit for amplifying the IF signal, of the RF amplifier circuit, the first 1I F amplifier A first detection circuit for detecting an output signal of the circuit; a first AGC signal generation circuit for generating a first AGC signal for controlling a gain of the first IF amplification circuit in accordance with the output signal of the first detection circuit; A second IF for amplifying the IF signal from the frequency conversion circuit
An amplification circuit; a second detection circuit for detecting an output signal of the second IF amplification circuit; and a second generation circuit for generating a second AGC signal for controlling a gain of the RF amplification circuit in accordance with the output signal of the second detection circuit. 2
An AGC signal generation circuit; and an addition circuit for adding the first and second AGC signals and the output signal of the second detection circuit to obtain an electric field strength detection signal . 1 IF
An electric field strength detection circuit for a radio receiver , wherein gains of an amplifier circuit and the second IF amplifier circuit are controlled in opposite directions.
JP00952596A 1996-01-23 1996-01-23 Electric field strength detection circuit of radio receiver Expired - Fee Related JP3286518B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP00952596A JP3286518B2 (en) 1996-01-23 1996-01-23 Electric field strength detection circuit of radio receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP00952596A JP3286518B2 (en) 1996-01-23 1996-01-23 Electric field strength detection circuit of radio receiver

Publications (2)

Publication Number Publication Date
JPH09199962A JPH09199962A (en) 1997-07-31
JP3286518B2 true JP3286518B2 (en) 2002-05-27

Family

ID=11722693

Family Applications (1)

Application Number Title Priority Date Filing Date
JP00952596A Expired - Fee Related JP3286518B2 (en) 1996-01-23 1996-01-23 Electric field strength detection circuit of radio receiver

Country Status (1)

Country Link
JP (1) JP3286518B2 (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6440785B1 (en) 1992-06-26 2002-08-27 Semiconductor Energy Laboratory Co., Ltd Method of manufacturing a semiconductor device utilizing a laser annealing process
US6576534B1 (en) 1991-09-21 2003-06-10 Semiconductor Energy Laboratory Co., Ltd. Method for forming a semiconductor
US6596613B1 (en) 1995-02-02 2003-07-22 Semiconductor Energy Laboratory Co., Ltd. Laser annealing method
US6638800B1 (en) 1992-11-06 2003-10-28 Semiconductor Energy Laboratory Co., Ltd. Laser processing apparatus and laser processing process

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
MXPA05011285A (en) 2003-04-21 2006-05-25 Matsushita Electric Ind Co Ltd High frequency signal level determining device and high frequency signal receiver apparatus using the same.
JP5050341B2 (en) * 2005-11-28 2012-10-17 ソニー株式会社 Tuner circuit
JP2008258738A (en) * 2007-04-02 2008-10-23 Mitsubishi Electric Corp Detection logarithmic amplifier

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6576534B1 (en) 1991-09-21 2003-06-10 Semiconductor Energy Laboratory Co., Ltd. Method for forming a semiconductor
US6440785B1 (en) 1992-06-26 2002-08-27 Semiconductor Energy Laboratory Co., Ltd Method of manufacturing a semiconductor device utilizing a laser annealing process
US6638800B1 (en) 1992-11-06 2003-10-28 Semiconductor Energy Laboratory Co., Ltd. Laser processing apparatus and laser processing process
US6596613B1 (en) 1995-02-02 2003-07-22 Semiconductor Energy Laboratory Co., Ltd. Laser annealing method

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