JP3248456B2 - Digital video signal recording method and apparatus - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital video signal recording device for recording digital video signals, and more particularly to a recording device for recording digital compressed video signals.

[0002]

2. Description of the Related Art A digital signal recording apparatus for recording a digital compressed video signal on a magnetic tape using a rotary head is described in Japanese Patent Application Laid-Open No. 8-273305. This digital signal recording device describes that a signal for variable speed reproduction is recorded.

[0003]

However, at the time of variable speed reproduction, since the scanning locus of the head does not coincide with the recording track, it is difficult to determine the reproduced signal for variable speed reproduction.

An object of the present invention is to provide a digital signal recording method and apparatus which can easily determine a signal at the time of variable speed reproduction.

[0005]

An object of the present invention is to provide a first compressed frame signal composed of pictures compressed without using correlation between frames and a second compressed frame signal composed of pictures compressed using correlation between frames. A digital compressed video signal of a predetermined number of bytes composed of a compressed frame signal and a packet generated from the digital compressed video signal.
In a digital video signal recording method for recording a third compressed video signal in a packet format of a predetermined number of bytes for variable speed reproduction on a magnetic recording medium using a rotating head, the third compressed video signal is composed of the signal. Variable speed playback data
This can be achieved by adding information indicating the order between the tracks and recording the information in a predetermined area of the track on the magnetic recording medium.

[0006]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 shows the configuration of a digital signal recording / reproducing apparatus. FIG. 1 shows an apparatus that is used for both recording and reproduction. Of course, the same applies when recording and reproduction are independent. 100 is a rotary head, 101 is a capstan, 102a is a recording signal processing circuit for generating a recording signal at the time of recording, 102b is a reproduction signal processing circuit for demodulating a reproduction signal at the time of reproduction, 10
Reference numeral 4 denotes a control circuit for controlling a recording / reproduction mode or the like, for example, a control circuit such as a microprocessor; 104a, a key for controlling the operation of the recording / reproduction device; A timing generation circuit; 106, a servo circuit for controlling a rotating head and a tape feed speed; 107, an input / output circuit for inputting a recording signal or outputting a reproduction signal; 109, a timing control circuit for controlling timing during recording; Is an oscillation circuit for generating a reference clock, 111 is a tape, 112 is a recording and reproducing circuit for analog video signals, 115 is a data generating circuit for recording digital signals, and 116 is a data selecting circuit for reproducing digital signals.

FIG. 2 shows an example of connection between the digital signal recording / reproducing apparatus shown in FIG. 1 and a digital broadcast receiver. 200
Is a digital signal recording / reproducing apparatus of FIG. 1, 201 is a digital broadcast receiver, 202 is an antenna, and 207 is a receiver. 203 is a tuner, 204 is a selection circuit, 2
05 is a decoding circuit, 206 is an interface circuit, 20
A control circuit 8 controls the operation of the digital broadcast receiver 201.

The digital video compression signal is packet format data, and a plurality of channel signals are transmitted in a time division multiplexed manner. After the digital broadcast signal received by the antenna 202 is demodulated by the tuner 203, the selection circuit 204 selects a required digital compressed video signal. The selected digital compressed video signal is decoded into a normal video signal by the decoding circuit 205 and output to the receiver 207. When the received signal is subjected to a process such as scrambling, the selection circuit 204 cancels the signal and performs a decoding process. When recording, the selection circuit 204
And outputs the digital compressed video signal to be recorded to the digital signal recording / reproducing apparatus 200 from the interface circuit 206. Then, the digital signal recording device 20 is input from the input / output terminal 108.
0 is entered and recorded. A digital compressed video signal or the like reproduced by the digital signal recording / reproducing apparatus 200 is supplied from the input / output terminal 108 to the interface circuit 206.
Output to The interface circuit 206 performs the same processing as that at the time of normal reception from the input signal, and outputs the signal to the receiver 207.

[0010] In the digital signal recording device 200, during recording, part of the packet data input from the input / output terminal 108 is input to the control circuit 104 via the input / output circuit 107. The control circuit 104 detects the type of the packet data based on the information added to the packet data or the information transmitted separately from the packet data, determines the recording mode based on the detection result, and determines the recording signal processing circuit 102a and the servo signal. The operation mode of the circuit 106 is set. The input / output circuit 107 outputs the packet data to be recorded to the data generation circuit 115. The data generation circuit 115 generates data for variable speed reproduction, adds the data, and outputs the data to the recording signal processing circuit 102a. The recording signal processing circuit 102a generates an error correction code, ID information, a subcode, and the like according to the recording mode determined by the control circuit 104, generates a recording signal, and records the recording signal on the tape 111 by the rotary head 100. .

At the time of reproduction, first, a reproduction operation is performed in an arbitrary reproduction mode, and ID information is detected by the reproduction signal processing circuit 102b. Then, the control circuit 104 determines in which mode the recording has been performed, and the operation mode of the reproduction signal processing circuit 102b and the servo circuit 106 is reset to perform reproduction. The reproduction signal processing circuit 102b performs detection of a synchronization signal, error detection and correction, and the like from the reproduction signal reproduced by the rotary head 100, reproduces data, and outputs the data to the data selection circuit 116. The data selection circuit 116 selects data recorded in a normal recording area during normal reproduction, and selects data for variable speed during variable speed reproduction, and outputs the data to the input / output circuit 107. If the order of data is not correctly reproduced during variable speed reproduction, the data is rearranged and output. In the input / output circuit 107, the timing generation circuit 10
The reproduced data is output from the input / output terminal 108 with reference to the timing generated in step 5.

At the time of recording, the operation timing of the recording / reproducing apparatus is controlled by the timing control circuit 109 based on the rate of the recording data inputted from the input / output terminal 108. At the time of reproduction, the clock oscillated by the oscillation circuit 110 is used as the operation reference. Works as

When recording / reproducing an analog video signal, the analog video signal input from the input terminal 113 is subjected to predetermined processing by an analog recording / reproducing circuit 112 and recorded on a tape 111 by a rotary head 100 during recording. Then, at the time of reproduction, the video signal reproduced by the rotary head 111 is subjected to predetermined processing by the analog recording / reproduction circuit 112, and then output from the output terminal 114. In this case, although not shown, the servo circuit 106 is controlled based on the frame period of the analog video signal. Note that the head for analog recording may be shared with the head for digital recording, or may be provided independently.

FIG. 3 shows the structure of a packet of a digital video compression signal. One packet has a fixed length, for example, 188
4 bytes packet header 3
It consists of packet information 307 of 06 and 184 bytes. The digital compressed video signal contains packet information 3
07 area. Also, the packet header 307
Is composed of information such as the type of packet information.

FIG. 4 shows the structure of the packet header 306. Reference numeral 501 denotes a synchronization byte indicating the beginning of a packet;
Is an error display indicating the presence or absence of an error, 503 is a unit start display indicating the start of a unit, 504 is a packet priority indicating the importance of a packet, 505 is a packet ID indicating a type of packet, and 506 is scramble control indicating whether or not scrambling is performed. , 507 are adaptation field controls indicating the presence / absence of additional information and the presence / absence of packet information, and 508 is a cyclic counter that counts up in packet units.

FIG. 5A shows the structure of a digital broadcast transmission signal. Reference numeral 71 denotes the packet shown in FIG. Normally, an audio signal, information about a program, and the like are added to the video signal, and a program of a plurality of channels is time-division multiplexed and transmitted. FIG. 5A shows an example in which three-channel programs are multiplexed, where V1, A1, and P1 are video signal, audio signal, program information, V2, and A of the first channel.
2 and P2 are the video signal, audio signal and program information of the second channel, and V3, A3 and P3 are the video signal, audio signal and program information of the third channel. Each packet is assigned a different packet ID 505 so that the contents of the packet can be identified. Of course, the number of channels to be multiplexed may be other than three, for example, four, or other information may be multiplexed.

FIG. 5B shows a case where only the information of the first channel is selected from FIG. 5A. When recording the first channel, this information is output from the digital broadcast receiver 201 to the recording / reproducing apparatus 200. Of course, other information may be included and recorded,
In order to facilitate the processing at the time of reproduction, a part of the header information or the like of the packet may be changed.

FIG. 5C shows a case where only the video signal of the first channel is selected. Variable speed data is generated from the video signal packet.

FIG. 6 shows the relationship between intra-frame data compressed on a frame-by-frame basis of a digitally compressed video signal and inter-frame data obtained by compressing only difference information using prediction from data of the preceding and succeeding frames. 30
1 is an intra frame, and 302 is an inter frame. In the digital compressed video signal, a predetermined number of frames, for example, 15 frames, form one sequence, the head of the group is an intra frame, and the remaining frames are inter frames compressed using prediction from the intra frame. Of course, an intra frame may be arranged in addition to the head.

FIG. 7 shows the structure of one sequence of digitally compressed video signals. A picture header is added to the digital compressed video signal in frame units, and a sequence header is added in sequence units. The sequence header includes information such as a synchronization signal and a transmission rate. The picture header is composed of a synchronization signal, identification information of an intra frame or an inter frame, and the like. Normally, the length of the data of each picture changes according to the amount of information. In the example of FIG. 7, the data of one picture is completed in packet units, and the unit start indication (US) of the first packet of the picture is 1. By doing so, the head of the picture can be identified by the unit start display.

Next, a method for recording on a magnetic tape will be described.

FIG. 8 shows a recording pattern of one track. 3 is a subcode recording area for recording subcodes such as time information and program information, 7 is a data recording area for recording a digital compressed video signal, 2 and 6 are preambles of the respective recording areas, and 4 and 8 are respective recording areas. The postamble of the area, 5 is the gap between the recording areas, and 1 and 9 are the margins at the track ends. By providing a postamble, a preamble, and a gap in each recording area in this way, it is possible to perform dubbing on each area independently. Of course, a digital signal other than the digital compressed video signal may be recorded in the recording area 7.

FIG. 9 shows a block configuration of the data recording area 7. Reference numeral 20 denotes a synchronization signal, 21 denotes ID information, 22 denotes data, and 23 denotes a parity (C1) for first error detection and correction.
Parity). For example, the synchronization signal 20 is 2 bytes,
The ID information 21 is composed of 3 bytes, the data 22 is composed of 99 bytes, the parity 23 is composed of 8 bytes, and one block is composed of 112 bytes.

FIG. 10 shows the structure of the ID information 21. 3
1 is a group number, 32 is a track address, 33 is 1
Block address in track, 35 is group number 3
1. Parity for detecting errors in the track address 32 and the block address 33. The block address 33 is an address for identifying a block in each recording area. For example, in the data recording area 7, 0 to 3
35. The track address 32 is an address for identifying a track. For example, by changing the address in units of one track or two tracks and setting it to 0 to 5 or 0 to 2, 6 tracks can be identified. . For example, the group number 31 is changed in units of six tracks identified by the track address 32,
Thus, 96 tracks can be identified. By synchronizing the track address with a cycle of a second error correction code described later, processing at the time of recording and identification at the time of reproduction can be facilitated.

FIG. 11 shows the data structure of one track in the data recording area 7. Note that the synchronization signal 20 and the ID information 21 are omitted. The data recording area 7 is
For example, it is composed of 336 blocks, and the first 30
Data 41 is recorded in six blocks, and a second error correction code (C2 parity) 43 is recorded in the next 30 blocks. For example, the C2 parity 43 divides data of 306 blocks × 6 tracks into 18 in units of 6 tracks, and assigns 1 to each of them.
10 blocks of C2 parity are added to 02 blocks. For example, a Reed-Solomon code may be used as the error correction code. Each block of 99-byte data is composed of a 3-byte header 44 and 96-byte data 41.

FIG. 12 shows the header 44 of the data recording area 7.
It is a structure of. The header 44 includes the format information 31,
It comprises block information 32 and additional information 33.

The format information 31 is information relating to a recording format. For example, one information is composed of 6 bytes of 6 blocks. By multiplex-recording this information a plurality of times, the detection capability at the time of reproduction is improved. Here, the presence / absence and type of the variable speed reproduction data are recorded, and the data is identified at the time of reproduction, so that it is possible to easily cope with the variable speed reproduction.

The block information 32 includes a data recording area 41
Is information for identifying the type of data recorded in the.

The additional information 33 is composed of, for example, 6 bytes of 6 blocks to form one piece of information. The first 1 byte is an item code indicating the type of information, and the remaining 5 bytes are data. Data can be recorded. For example, information such as the recording time and the type of the recording signal are recorded. Here, detailed information on the variable speed reproduction data may be recorded.

FIG. 13 shows a digital compressed video signal transmitted in a packet format of 188 bytes in a data recording area 4.
1 is an example of the configuration of a block when recording data in No. 1; In this case, 4-byte time information 25 is added to make 192 bytes, and one packet is recorded in two blocks.

FIG. 14 shows a block configuration when the length of the packet 71 is 140 bytes. At this time, 2
The packets 71 are recorded in three blocks.

FIG. 15 shows another example of the configuration of the packet shown in FIG. 13 or FIG. The packet includes 3-byte time information 25 and control information 72 related to a 1-byte packet in 188-byte or 140-byte packet data 7.
1. If the number of packet data 71 is smaller than this, for example, 130 bytes,
Dummy data may be added and recorded, or the area of control information may be increased.

The time information 25 is information on the time at which the packet was transmitted. That is, the time when a packet (the head) is transmitted or the interval between packets is counted by a reference clock, the count value is recorded together with the packet data, and the interval between the packets is determined based on the information at the time of reproduction. , The data can be output in the same form as when it was transmitted.

As described above, the ratio of the number of bytes of one packet to the number of bytes of the recording area of one block is a simple integer ratio n: m.
If m packets are recorded in n blocks, efficient recording can be performed even when the packet length is different from the recording area of one block.

FIG. 16 shows the structure of the block information 32. The block information 32 is information for identifying data in block units. The data information 74 is information for identifying the type of data recorded in this block. For example, 0 is set for a block where normal packet data is recorded, 1 is set for a block where valid data is not recorded, 2 is set for a block where first variable speed reproduction data is recorded, and 2nd variable speed reproduction is performed. For a block in which application data is recorded, the value may be set to 3. Block number 7
Reference numeral 5 denotes information for identifying the order of blocks when packet data is recorded in units of two blocks or three blocks. For example, when recording in units of two blocks, 0 to
When recording is performed in units of one or three blocks, the number is set to 0 to 2.
The variable speed data information 76 is information for identifying the data order of the variable speed reproduction data.

FIG. 17 shows the structure of the variable speed data information. 511 is a picture counter for identifying a picture;
Reference numeral 512 denotes a track counter for identifying a track;
Reference numeral 3 denotes a block counter for identifying a block in a track.

FIG. 18 shows an example in which data information 74 and a block number 75 are recorded in units of two blocks. 51
Is a block in which normal packet data is recorded, 52 is a block in which variable speed reproduction data is recorded, and 53 is an unused area. In the variable speed reproduction data recording area 52, the block numbers are 0 to 3. Although the variable speed reproduction data recording area 52 has four blocks in the figure, usually more than four blocks are used as the variable speed reproduction data recording area 52.

At the time of reproduction, the data information 7 is
4 is discriminated, and if it is other than 0, the block may be skipped and output. This makes it possible to maintain compatibility at the time of reproduction regardless of where the variable speed reproduction data or invalid data is recorded. Even if other special data is recorded, there is no problem if different data information is assigned to the block.

FIG. 19 shows an example of the arrangement of the first variable speed reproduction data. Reference numeral 311 denotes first variable speed reproduction data. The variable speed playback data is stored at a predetermined location on the track.
The same data is multiplex-recorded on several tracks. Accordingly, all data can be detected even when the head scans in any locus. The multiplexed data is variable speed data information 76.
Are the same, the order of the data can be identified at the time of reproduction. The number of times of multiplexing may be set according to the speed of variable speed reproduction. In FIG. 19, the variable speed reproduction data is arranged in all the continuous tracks, but the variable speed reproduction data need not be arranged in all the tracks. For example, they may be arranged every other track.

FIG. 20 shows an example of an arrangement of data for variable-speed reproduction of one track. The upper part of the figure is the head of the track, that is, the lower side of the track in FIG. In FIG. 20, one area of the variable speed reproduction data is set to 10 blocks, and three areas are arranged in one track. That is, 30 blocks (15 packets) of variable speed reproduction data can be recorded on one track. Of course, the number of blocks in one area and the number of areas in one track may have other values, for example, six areas may be arranged in one track. Further, the number of blocks may be different in each area. BN is the value of the block number 75 added to each block, and BC is the value of the block counter 513 added to each block. From the block number 75 and the block counter 513, it is possible to identify which block of one track is the variable speed reproduction data.

FIG. 21 shows an example of the arrangement of the track counter 512. Reference numeral 7 denotes one track shown in FIG. 20, and TC denotes a track counter 512. In the variable speed reproduction data, the same data is arranged on a plurality of tracks, for example, 16 tracks. Then, by assigning the same track counter value to the tracks on which the same data is arranged, it is possible to identify the variable speed reproduction data in track units. For example, when the track counter is 2 bits, 4 × 16 = 64 tracks can be identified. During normal variable speed playback, the trajectory of the head is 1
Since the number of tracks does not exceed six, discrimination of 64 or more tracks is possible by taking the order of head scanning into account.

FIG. 22 shows an example of the arrangement of the picture counter 511. 521 is a track having the same track counter value, for example, 16 tracks, and PC is a picture counter 511. FIG. 22 shows a case where the first k × 16 track and the next k ′ × 16 track are one picture. For example, when one picture is composed of 100 packets and 15 packets can be recorded on one track, (100/15) +1> k ≧ 100/15 may be set. That is, one picture may be arranged on 7 × 16 tracks. Of course, if k ≧ 100/15, more tracks may be allocated to one picture.

If the data of one picture is completed in track units, the processing at the time of data generation and reproduction becomes easy. When the data of one picture ends in the middle of the track, the remaining portion of the track includes a block of dummy data, for example, one data information 74.
You can put it as. Also, invalid data may be arranged as variable speed reproduction data.

As described above, the data of one picture must be completed in track units, and the picture counter 51 must be set so that a picture break can be identified.
By adding 1, even if data is not reproduced in order as in the case of variable speed reproduction in the reverse direction, data of one picture can be easily determined. That is, the picture counter 511 determines the data of one picture, and the track counter 512, the block counter 513, and the block number 75 determine the order of the data in one picture. Can be output.

FIG. 23 is a flowchart for generating variable speed reproduction data from the video signal packet data of FIG. 5C. Since the variable speed reproduction data needs to be able to be decoded independently, it needs to be intra-frame data. Therefore, by extracting intra-frame data in packet units, it is possible to easily generate variable-speed reproduction data.

First, the unit start display of the input packet is confirmed, and the head of the picture is detected. Note that the start of the picture may be detected by a picture header or the like. Next, it is checked whether a sequence header is present in the first bucket of the picture. Thereby, the head of the sequence, that is, the intra-frame picture is detected. Of course, the information other than the sequence header may be used to detect that the picture is an intra-frame picture.
Then, data from this packet to a position before the first packet of the second picture, that is, data of one intra-frame picture is extracted as variable-speed reproduction data.

FIG. 24 is a diagram showing the timing of extracting data of an intra-frame picture. FIG. 24 (a)
Is video signal packet data corresponding to FIG. 5C, and 531 is intra-frame picture data.
FIG. 24B shows data for variable-speed playback arranged on a tape, and 532 is intra-frame picture data. When one sequence has 15 frames, two intra-frame pictures per second are obtained. On the other hand, if the rotation speed of the rotary head is 1800 rpm, 60 tracks are recorded per second. Therefore, it is sufficient that one intra-frame picture can be arranged in 30 tracks, but since the data area for variable-speed reproduction is limited, usually 30 or more tracks are required. Therefore, first, the first picture (picture 0) may be arranged on the track, and the extraction of the next packet may be started from the time when the arrangement is completed. Of course, the start of the extraction of the packet does not have to be at the time when the arrangement is completed, but may be about the time when the arrangement is completed.

As a result, it is possible to generate optimal variable-speed reproduction data according to the data amount of the intra-frame picture in the video signal. If the data amount of the intra-frame picture is equal to or more than a certain amount, the data of the excess part may be truncated.

FIG. 25 shows the configuration of the data generation circuit 115. 401 is a time information adding circuit, 402 is a storage circuit,
403 is a video signal packet separation circuit, 404 is a picture detection circuit, 405 is a writing circuit, 406 is a storage circuit, 40
7 is a readout circuit, and 408 is a block information adding circuit.
The packet output from the input / output circuit 107 is input to the time information adding circuit 401 from the input terminal 409, and the time information 25 is added. This processing need not be performed if time information has already been sent. The packet to which the time information is added is stored in the storage circuit 402. At the same time, in the video signal packet separation circuit 403,
The video packet is separated based on the packet ID 505 of the input packet and output to the writing circuit 405 and the picture detection circuit 404. In the figure, the time information is added only to the packet stored in the storage circuit 402 and used during normal reproduction. However, the same time information may be added to the variable speed reproduction data.

The packet ID of the video signal packet may be detected from the contents of the program information packet. However, if the packet ID information detected by the digital broadcast receiver 201 is used, the detection processing becomes unnecessary. That is, video packets may be separated using the packet ID information input from the input terminal 409a via the input terminal 108c.

The picture detection circuit 404 detects the header information in the packet information 307, controls the writing circuit 405 as shown in the flowchart of FIG. 23 and the timing of FIG. 24, and stores the variable speed reproduction data in the storage circuit 406. Remember. At the same time, the storage range of one picture is stored. The readout circuit 407 sequentially reads out the packet data stored in the storage circuits 402 and 406 to obtain the recording data having the arrangement shown in FIG. 19, and adds the block information 32 by the block information addition circuit 408 to record and reproduce the signal. Output to 102. For the variable speed reproduction data, the block counter 513 and the counter 51
The picture counter 511 is generated from the range of one picture stored in the storage circuit 406 and added to the track counter 512 and the track counter 512. Then, the recording / reproducing signal processing circuit 102 generates and records the recording signal of FIG. Note that the same storage circuit may be used for the storage circuits 402 and 406.

FIG. 26 shows the structure of the data selection circuit 116. 411 is a packet data distribution circuit, 412 is a storage circuit, 413 is a read circuit, and 414 is a switching circuit.

At the time of normal reproduction, the distribution circuit 411 detects the contents of the packet based on the block information of the reproduction packet data input from the input terminal 415, selects a packet for normal reproduction, and outputs the output terminal via the switching circuit 414. 4
16 to the input / output circuit 107.

At the time of variable speed reproduction, the distribution circuit 411 selects a packet of data for variable speed reproduction and stores it in the storage circuit 41.
Output to 2. The storage circuit 412 writes the data in the variable speed data information 76 at a position corresponding to the data order. And
The data is sequentially read in the read circuit 413 and output to the input / output circuit 107 from the output terminal 416 via the switching circuit 414. At the time of variable speed reproduction, particularly at the time of variable speed reproduction in the reverse direction, the data for variable speed reproduction is not reproduced in the order. Therefore, if reading is started after a certain period of time has elapsed since data was first written, it is possible to prevent reading before writing.

FIG. 27 shows the configuration of the input / output circuit 107. 420 is a packet detection circuit, 422 is an output control circuit, 423 is a buffer, and 424 is a time control circuit.

During recording, data and a synchronous clock are input from the input / output terminals 108a and 108b at the timing shown in FIG. The input data and the synchronous clock are input to the packet detection circuit 420, and the input terminal 42
The packet is detected based on the clock output from the timing generation circuit 105 input from 7. Then, the detected packet 71 is output from the output terminal 425a to the data generation circuit 115. The control signal and the like transmitted in addition to the packet are output from the output terminal 426a to the control circuit 104, where the type of the packet is determined, the recording mode is determined, and the like.

At the time of normal reproduction, the output control circuit 422 is controlled to the output mode by the control signal from the control circuit 104 input from the input terminal 426b, and the reproduced packet 7
1 is output in synchronization with the reference clock transmitted from the oscillation circuit 110. The packet input from the input terminal 425b is stored in the buffer 423. The time information 25 in the packet is input to the time control circuit 424. In the time control circuit 424, the time information 25 and the input terminal 427
Based on the input clock, control of the timing of reading and outputting the packet from the buffer 423 and generation of the synchronous clock are performed, and the packet is output at the timing shown in FIG. 28, that is, the same timing as when the recording data is input. . As a result, a device that receives and processes reproduced packets, such as a digital compressed video signal decoding device or another digital signal recording / reproducing device, performs recording / reproducing in the same process as when the signal before recording is directly processed. Later signals can be processed.

At the time of variable-speed reproduction, the data for variable-speed reproduction is different from the original data sequence, and it is meaningless to perform time control. Therefore, the input packet is output as it is.

It should be noted that the input / output circuit of FIG. 27 can be similarly applied to the input / output circuits of other devices such as the digital broadcast receiver 201.

Further, in the embodiment, the input and output are performed using the terminal that is shared, but the input and the output may be independent terminals.

[0061]

According to the present invention, the variable speed playback data reproduced at the time of the variable speed playback is recorded by adding the information for determining the data order and the picture break to the variable speed playback data. It is possible to easily determine the order of the data and the breaks of the pictures.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of a digital signal recording / reproducing apparatus.

FIG. 2 is a connection diagram of a digital signal recording / reproducing device and a digital broadcast receiver.

FIG. 3 is a configuration diagram of a packet of a digital video compression signal.

FIG. 4 is a configuration diagram of a packet header.

FIG. 5 is a configuration diagram of a transmission signal of digital broadcasting.

FIG. 6 is a diagram showing a relationship between intra-frame data and inter-frame data.

FIG. 7 is a configuration diagram of a digital compressed video signal of one sequence.

FIG. 8 is a recording pattern diagram of one track.

FIG. 9 is a block diagram of a data recording area.

FIG. 10 is a configuration diagram of ID information.

FIG. 11 is a configuration diagram of data of one track in a data recording area.

FIG. 12 is a configuration diagram of a header of a data recording area.

FIG. 13 is a block diagram of a block for recording a digitally compressed video signal transmitted in a packet format of 188 bytes in a data recording area.

FIG. 14 is a configuration diagram of a block when a packet length is 140 bytes.

FIG. 15 is another configuration diagram of a packet.

FIG. 16 is a configuration diagram of block information.

FIG. 17 is a configuration diagram of variable speed data information.

FIG. 18 is a diagram illustrating a recording example of data information and a block number.

FIG. 19 is a diagram showing an arrangement of first variable speed reproduction data.

FIG. 20 is a diagram showing an arrangement of data for variable-speed reproduction of one track.

FIG. 21 is a diagram showing an arrangement of a track counter.

FIG. 22 is a diagram showing an arrangement of a picture counter.

FIG. 23 is a flowchart of generating variable speed reproduction data from video signal packet data.

FIG. 24 is a diagram illustrating the timing of extracting data of an intra-frame picture.

FIG. 25 is a configuration diagram of a data generation circuit.

FIG. 26 is a configuration diagram of a data selection circuit.

FIG. 27 is a configuration diagram of an input / output circuit.

FIG. 28 is an input / output timing chart.

[Explanation of symbols]

7: data recording area, 20: synchronization signal, 21: ID information, 22: data, 23: C1 parity, 25: time information, 31: format information, 32: block information, 3
3: additional information, 41: video signal data, 43: C2 parity, 44: header, 51: normal packet data, 5
2: Variable speed reproduction data, 53: Unused area, 71: Packet, 72: Control information, 74: Data information, 75: Block information, 76: Variable speed data information, 100: Rotating head, 101: Capstan, 102a: record signal processing circuit, 102b: reproduction signal processing circuit, 104: control circuit, 105: timing generation circuit, 106: servo circuit, 107: input / output circuit, 109: timing control circuit, 110: oscillation circuit, 112: analog Signal recording / reproduction circuit, 115: data generation circuit, 116: data selection circuit, 301: intra frame, 302: inter frame, 306: packet header, 307: packet information, 311: first variable speed reproduction data, 401 ... Time information addition circuit, 402: storage circuit, 403: video packet separation circuit, 404: pic Catcher detection circuit, 405 ... write circuit, 406 ... memory circuit, 407 ... read circuit, 408 ...
Block information adding circuit, 411: packet data distribution circuit, 412: storage circuit, 413 ... readout circuit, 414 ... switching circuit, 420 ... packet detection circuit, 422 ... output control circuit, 423 ... buffer, 424 ... time control circuit, 50
3: Unit start indication, 505: Packet ID, 511
... picture counter, 512 ... track counter, 51
3, block counter, 521, tracks having the same track counter value, 531, intra-frame picture data, 532, intra-frame picture data.

Continuation of the front page (72) Inventor Kyoichi Hosokawa 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Japan, Ltd. Multimedia System Development Division, Hitachi, Ltd. (56) References JP-A-8-140030 (JP, A) JP-A-6-284378 (JP, A) JP-A-8-273305 (JP, A) JP-A-8-140055 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H04N 5 / 91-5/956 G11B 20/10-20/12 H04N 5/782-5/783

Claims (13)

(57) [Claims] A first compressed frame signal composed of a picture compressed without utilizing the correlation between frames and a second compressed frame signal composed of a picture compressed using the correlation between frames. a digital compression video signal having byte packets format, the digital compressed
Specified number of bytes for variable speed playback generated from video signal
A digital video signal recording method for recording a third compressed video signal in a packet format on a magnetic recording medium using a rotary head, wherein each of the variable speed signals constituting the third compressed video signal comprises the signal.
A digital video signal recording method, characterized in that information indicating an order between raw data is added and recorded in a predetermined area of a track on the magnetic recording medium. 2. Each variable added to the third compressed video signal.
2. The digital video signal recording method according to claim 1, wherein the information indicating the order between the data for fast reproduction includes at least information indicating the order within a predetermined area of the track. 3. The track is composed of blocks of a predetermined number of bytes, and the information indicating an order in a predetermined area of the track is information indicating an order of a block in a predetermined area of the track. 3. The digital video signal recording method according to claim 2, wherein: 4. Each variable added to the third compressed video signal.
2. The digital video signal recording method according to claim 1, wherein the information indicating the order between the data for fast reproduction includes at least information indicating the order of the tracks. 5. The third compressed video signal, wherein the same signal is multiplexed and arranged on n tracks, and the information indicating the order of the tracks is information indicating the order in units of n tracks. The digital video signal recording method according to claim 4, wherein: 6. Each variable added to the third compressed video signal.
2. The digital video signal recording method according to claim 1, wherein the information indicating the order between the data for fast reproduction includes at least information indicating the order in picture units. 7. The picture is composed of the third compressed video signals of different numbers of tracks, respectively.
7. The digital video signal recording method according to claim 6, wherein the information indicating the order in picture units is information indicating an order for each of a plurality of tracks constituting the picture. 8. A predetermined compressed frame signal composed of a first compressed frame signal composed of pictures compressed without utilizing correlation between frames and a second compressed frame signal composed of pictures compressed using correlation between frames. a digital compression video signal having byte packets format, the digital compressed
Specified number of bytes for variable speed playback generated from video signal
A digital video signal recording device for recording a third compressed video signal in a packet format on a magnetic recording medium using a rotary head, wherein: a signal generating means for generating the third compressed video signal; Each variable speed playback that constitutes the compressed video signal
A digital video signal recording apparatus, comprising: an information adding unit for adding information indicating an order between use data . 9. The digital video signal recording apparatus according to claim 8, wherein said information adding means generates and adds at least information indicating an order within a predetermined area of said track. 10. The digital video signal recording apparatus according to claim 8, wherein said information adding means generates and adds at least information indicating the order of said tracks. 11. The digital video signal recording apparatus according to claim 8, wherein said information adding means generates and adds at least information indicating an order in picture units. 12. The digital video signal recording method according to claim 1, wherein in the third compressed video signal, a signal constituting one picture is completed in track units. 13. The digital video signal recording apparatus according to claim 8, wherein in the third compressed video signal, a signal constituting one picture is completed in track units.