JP3160856B2 - Inductor components for IC mounting - Google Patents
Inductor components for IC mountingInfo
- Publication number
- JP3160856B2 JP3160856B2 JP23518590A JP23518590A JP3160856B2 JP 3160856 B2 JP3160856 B2 JP 3160856B2 JP 23518590 A JP23518590 A JP 23518590A JP 23518590 A JP23518590 A JP 23518590A JP 3160856 B2 JP3160856 B2 JP 3160856B2
- Authority
- JP
- Japan
- Prior art keywords
- mounting
- inductor
- component
- terminal
- mounting portion
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/14—Structural association of two or more printed circuits
- H05K1/141—One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components
Landscapes
- Coils Or Transformers For Communication (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Description
【発明の詳細な説明】 ＜産業上の利用分野＞ 本発明は、ICをプリント配線基板に実装する場合に、
ICの全ラインに接続されるノイズ対策用のインダクタを
単体の部品にまとめたインダクタ部品に関する。DETAILED DESCRIPTION OF THE INVENTION <Industrial Application Field> The present invention relates to a method for mounting an IC on a printed circuit board.
The present invention relates to an inductor component that integrates a noise suppression inductor connected to all lines of an IC into a single component.
＜従来の技術＞ 従来、プリント配線基板にICを実装して構成される装
置では、ICを表面実装型とすることで、プリント配線基
板の小型化を図っているが、ICのノイズ対策を講じる場
合、ICの各ラインにノイズ対策部品を設ける必要があ
り、通常は、第５図に示すように、プリント配線基板上
において、IC21の端子に接続される各ラインパターン2
2,…の中途部に、ビーズインダクタ23や、コンデンサ2
4、３端子コンデンサ25等のノイズ対策部品が介装され
る。<Conventional technology> Conventionally, in a device configured by mounting an IC on a printed wiring board, the size of the printed wiring board is reduced by making the IC a surface mount type. In this case, it is necessary to provide a noise suppression component on each line of the IC. Usually, as shown in FIG. 5, each line pattern 2 connected to the terminal of the IC 21 on the printed wiring board is provided.
2, in the middle of the bead inductor 23 and capacitor 2
4, noise suppression components such as a three-terminal capacitor 25 are interposed.
＜発明が解決しようとする課題＞ ところで、上記のような構成では、表面実装型IC21を
使用しているにもかかわらず、IC21の周りにノイズ対策
部品でスペースをとってしまい、プリント配線基板の小
型化が図れない。<Problems to be Solved by the Invention> In the above-described configuration, despite the use of the surface-mount type IC21, a space is taken around the IC21 with noise suppression components, and the printed circuit board is The size cannot be reduced.
また、IC21の各ライン毎にビーズインダクタ23等のノ
イズ対策部品を取り付けるため、実装コストがかさむ、
という問題があった。In addition, mounting noise suppression components such as bead inductors 23 for each line of IC 21 increases the mounting cost.
There was a problem.
本発明は、上述の問題点に鑑みてなされたものであっ
て、ICの各ラインに接続するインダクタを単体の部品に
まとめることで、ノイズ対策部品のための占有スペース
を減少させるとともに、ノイズ対策部品の実装工程を簡
略化し実装コストを削減することを課題とする。The present invention has been made in view of the above-described problems, and reduces the occupied space for noise countermeasure components and reduces noise countermeasures by integrating inductors connected to each line of the IC into a single component. It is an object to simplify a component mounting process and reduce mounting cost.
＜課題を解決するための手段＞ 本発明は、上記の課題を達成するために、ICの各端子
に接続すべきノイズ対策用インダクタを有する部品であ
って、 複数の磁性体層の積層体からなり、積層体は、載置部
と、取付電極と、外部電極と、内部導体とを有してお
り、載置部は、積層体の積層上面においてICが搭載され
る部分であり、取付電極は、ICの各端子と合致するピッ
チで載置部に形成されており、外部電極は、ICの各端子
に対応して積層体の周囲に設けられており、内部導体
は、複数の磁性体層に設けられ、コイル状のパターンを
形成するようにスルーホールを介して接続され、積層体
内部でインダクタとなるものであって、コイル状のパタ
ーンの一端は、スルーホールを介して取付電極に接続さ
れ、コイル状のパターンの他端は、積層体の周囲まで延
長され、外部電極に接続されている構成とした。<Means for Solving the Problems> In order to achieve the above object, the present invention provides a component having a noise suppression inductor to be connected to each terminal of an IC, the component comprising a laminated body of a plurality of magnetic layers. The laminate has a mounting portion, a mounting electrode, an external electrode, and an internal conductor, and the mounting portion is a portion where the IC is mounted on the upper surface of the stack of the laminate, and the mounting electrode Are formed on the mounting portion at a pitch that matches each terminal of the IC, external electrodes are provided around the laminate corresponding to each terminal of the IC, and the inner conductor is made of a plurality of magnetic materials. Provided in the layer, connected through through holes to form a coil-shaped pattern, and serves as an inductor inside the laminate, and one end of the coil-shaped pattern is connected to the mounting electrode through the through hole. The other end of the connected coiled pattern is It was configured to be extended around and connected to an external electrode.
＜作用＞ 上記構成のインダクタ部品は、表面実装型部品として
プリント配線基板上に取り付けられ、このインダクタ部
品の載置部に、ICが取り付けられる。これで、ICの各端
子がプリント配線基板上の対応するラインと接続され
る。<Operation> The inductor component having the above configuration is mounted on a printed wiring board as a surface mount component, and an IC is mounted on the mounting portion of the inductor component. Thus, each terminal of the IC is connected to the corresponding line on the printed wiring board.
ここで、ICの各端子とプリント配線基板のラインとの
間には、内部導体が介在しており、この内部導体は、磁
性体層の内部でインダクタとして作用するから、ICの全
ラインにそれぞれノイズ対策部品が取り付けられたこと
になる。Here, an internal conductor is interposed between each terminal of the IC and the line of the printed wiring board, and this internal conductor acts as an inductor inside the magnetic material layer. This means that noise suppression components have been installed.
＜実施例＞ 以下、本発明を図面に示す実施例に基づいて詳細に説
明する。<Example> Hereinafter, the present invention will be described in detail based on an example shown in the drawings.
第１図および第２図は本発明の一実施例に係り、第１
図はインダクタ部品のICとの外観斜視図、第２図はイン
ダクタ部品の要部の分解斜視図である。FIGS. 1 and 2 relate to an embodiment of the present invention.
FIG. 2 is an external perspective view of an inductor component and an IC, and FIG. 2 is an exploded perspective view of a main part of the inductor component.
第１図において、１は表面実装型のIC、1a,…はその
端子、２は本発明に係るインダクタ部品である。In FIG. 1, reference numeral 1 denotes a surface mount type IC, 1a,..., Terminals thereof, and 2 denotes an inductor component according to the present invention.
本発明のインダクタ部品２は、磁性体層3u,3dの積層
体４からなる。この実施例では、積層体４は上下２層の
磁性体層3u,3dからなり、IC1より一回り大きい平面形状
を有する。The inductor component 2 of the present invention includes a laminated body 4 of magnetic layers 3u and 3d. In this embodiment, the laminated body 4 is composed of upper and lower two magnetic layers 3u and 3d, and has a plane shape slightly larger than the IC1.
そして、積層体４は、その積層上面にIC1を搭載する
ための載置部５と、IC1の各端子1aと接続するための取
付電極6,…とを有し、周囲には、プリント配線基板（図
示せず）のラインパターンと接続するための外部電極7,
…が設けられている。The laminated body 4 has a mounting portion 5 for mounting the IC 1 on the upper surface of the laminated body, and mounting electrodes 6 for connecting to each terminal 1a of the IC 1, and a printed wiring board is provided around the mounting portion 5. External electrodes 7 for connecting to a line pattern (not shown),
... are provided.
取付電極６は、IC1の端子数と同数のものが端子1aと
合致するピッチで載置部５に形成されている。外部電極
７も、IC1の端子1aと同数のものが形成されている。The mounting electrodes 6 having the same number as the number of terminals of the IC 1 are formed on the mounting portion 5 at a pitch matching the terminals 1a. The same number of external electrodes 7 as the number of terminals 1a of IC1 are formed.
積層体４の内部には、第２図に示すように、インダク
タとなる内部導体8,…が設けられている。この内部導体
８は、IC1の端子数と同数設けられていて、それぞれ、
スルーホール９を介して取付電極６に接続するととも
に、積層体４周縁に延長して外部電極７に接続してい
る。As shown in FIG. 2, inside the laminated body 4, internal conductors 8, which are inductors, are provided. The number of the internal conductors 8 is equal to the number of the terminals of the IC 1.
It is connected to the mounting electrode 6 through the through hole 9, and is connected to the external electrode 7 extending to the periphery of the laminate 4.
上記の構成のインダクタ部品２は、実装に際しては、
表面実装型部品としてプリント配線基板上に取り付けら
れ、その外部電極７がプリント配線基板上の各ラインパ
ターンに接続される。そして、インダクタ部品２の載置
部５に、IC1が取り付けられ、IC1の各端子1aが取付電極
５に接続される。When mounting the inductor component 2 having the above configuration,
The external electrodes 7 are mounted on the printed wiring board as surface mount components, and the external electrodes 7 are connected to each line pattern on the printed wiring board. Then, the IC 1 is mounted on the mounting portion 5 of the inductor component 2, and each terminal 1 a of the IC 1 is connected to the mounting electrode 5.
実装の手順としては、インダクタ部品２の載置部５上
に予めIC1を取り付けておいて、そのインダクタ部品２
をプリント配線基板に取り付けてもよいし、プリント配
線基板へのインダクタ部品２の取付と、インダクタ部品
２へのIC1の取付とを同時的に行ってもよい。As a mounting procedure, IC1 is previously mounted on the mounting portion 5 of the inductor component 2, and the inductor component 2 is mounted.
May be attached to the printed wiring board, or the attachment of the inductor component 2 to the printed wiring board and the attachment of the IC 1 to the inductor component 2 may be performed simultaneously.
このように、インダクタ部品２を介してIC1をプリン
ト配線基板に取り付けることで、IC1の各端子1aがプリ
ント配線基板上の対応するラインパターンと接続され
る。Thus, by attaching IC1 to the printed wiring board via inductor component 2, each terminal 1a of IC1 is connected to the corresponding line pattern on the printed wiring board.
ここで、IC1の各端子1aとプリント配線基板のライン
との間には、内部導体８が介在しており、この内部導体
８は、積層体４の内部でインダクタとして作用するか
ら、IC1の全ラインにそれぞれノイズ対策用のインダク
タが取り付けられたことになる。Here, an internal conductor 8 is interposed between each terminal 1a of the IC1 and the line of the printed wiring board, and this internal conductor 8 acts as an inductor inside the multilayer body 4. This means that noise suppression inductors are attached to the lines.
第２図の例では直線状の内部導体８を示したが、第３
図および第４図に示すように、種々の形状の内部導体が
採用可能である。In the example shown in FIG. 2, the linear inner conductor 8 is shown.
As shown in FIGS. 4 and 5, various shapes of internal conductors can be employed.
第３図の例では、スルーホール９と外部電極７との間
で内部導体81を屈曲させたもので、このように内部導体
81を長くすることで、高いインピーダンスが得られる。In the example shown in FIG. 3, the internal conductor 81 is bent between the through hole 9 and the external electrode 7.
High impedance can be obtained by making 81 long.
第４図の例では、積層体４を３層（3u,3m,3d）構造と
し、中間の磁性体層3mにもスルーホール９を設け、中間
層の内部導体82mと下層の内部導体82dとでコイル状のパ
ターンが形成されるようにしたものである。In the example of FIG. 4, the laminated body 4 has a three-layer (3u, 3m, 3d) structure, a through hole 9 is also provided in the intermediate magnetic layer 3m, and the internal conductor 82m of the intermediate layer and the internal conductor 82d of the lower layer are connected to each other. Thus, a coil-shaped pattern is formed.
このほか、上記実施例では、積層体４の平坦な積層上
面を載置部５としたが、IC1が嵌入するような凹部に形
成してもよく、このように凹入した載置部とすると、IC
1の位置ずれを防止しうる。In addition, in the above-described embodiment, the flat stacked upper surface of the stacked body 4 is set as the mounting portion 5. However, the mounting portion 5 may be formed in a concave portion into which the IC 1 is fitted. ,I C
1 position deviation can be prevented.
さらに、載置部５を凹入させることで、載置部５内に
内部導体８の端部を露出させ、この露出端部を取付電極
６とすることもできる。この場合は、内部導体８と取付
電極６とが直結され、スルーホールによる接続を必要と
しない。Further, by recessing the mounting portion 5, the end of the internal conductor 8 is exposed in the mounting portion 5, and the exposed end can be used as the mounting electrode 6. In this case, the internal conductor 8 and the mounting electrode 6 are directly connected, and there is no need to connect through holes.
＜発明の効果＞ 以上述べたように、本発明のインダクタ部品を用い、
該インダクタ部品を間にしてICをプリント配線基板に取
り付けることで、ICの全端子にそれぞれノイズ対策用の
インダクタが接続されることになるから、ノイズ対策の
ために、単体のインダクタ部品を取り付けるだけで済
み、ICの各ライン毎にノイズ対策部品を取り付ける必要
がなくなり、ノイズ対策部品の実装工程が簡略化し、実
装コストが低下する。<Effect of the Invention> As described above, using the inductor component of the present invention,
By mounting the IC on the printed wiring board with the inductor component in between, the inductor for noise suppression is connected to all the terminals of the IC, so just attach a single inductor component for noise suppression. This eliminates the need to attach noise suppression components to each line of the IC, simplifies the mounting process of noise suppression components, and reduces mounting costs.
また、ノイズ対策用のインダクタが単体の部品にまと
まっていて、しかも、この部品は、ICと基板との間に介
装されるから、ICと取付スペースを共有し、ノイズ対策
部品のみのために広いスペースを占有せず、ICが実装さ
れる基板の小型化に役立つ。In addition, the noise suppression inductor is integrated into a single component, and since this component is interposed between the IC and the board, it shares the mounting space with the IC and is used only for the noise suppression component. It does not occupy a large space and helps to reduce the size of the board on which the IC is mounted.
このほか、インダクタ部品も表面実装型として基板に
実装することができて、実装工程が簡単であり、また、
内部導体の形状を適宜選択することで、インピーダンス
を任意の値に設定することができるから、ICや周辺回路
とのインピーダンスマッチングが容易に行える、等の利
点がある。In addition, the inductor component can be mounted on the board as a surface mount type, and the mounting process is simple.
Since the impedance can be set to an arbitrary value by appropriately selecting the shape of the internal conductor, there is an advantage that impedance matching with an IC or a peripheral circuit can be easily performed.
第１図および第２図は本発明の一実施例に係り、第１図
はインダクタ部品とICとの外観斜視図、第２図はインダ
クタ部品の要部の分解斜視図である。 第３図および第４図は、いずれも他の実施例に係る内部
導体の平面図である。 第５図は従来のIC取付部の説明図である。 １……IC、２……インダクタ部品、3u,3d……磁性体
層、４……積層体、５……載置部、６……取付電極、７
……外部電極、８……内部導体。1 and 2 relate to an embodiment of the present invention. FIG. 1 is an external perspective view of an inductor component and an IC, and FIG. 2 is an exploded perspective view of a main part of the inductor component. FIG. 3 and FIG. 4 are plan views of the inner conductor according to another embodiment. FIG. 5 is an explanatory view of a conventional IC mounting portion. DESCRIPTION OF SYMBOLS 1 ... IC, 2 ... Inductor parts, 3u, 3d ... Magnetic layer, 4 ... Laminated body, 5 ... Placement part, 6 ... Mounting electrode, 7
... external electrodes, 8 ... internal conductors.
Claims (1)
ダクタを有する部品であって、 磁性体層の積層体からなり、 積層体は、載置部と、取付電極と、外部電極と、内部導
体とを有しており、 載置部は、積層体の積層上面においてICが搭載される部
分であり、 取付電極は、ICの各端子と合致するピッチで載置部に形
成されており、 外部電極は、ICの各端子に対応して積層体の周囲に設け
られており、 内部導体は、複数の磁性体層に設けられ、コイル状のパ
ターンを形成するようにスルーホールを介して接続さ
れ、積層体内部でインダクタとなるものであって、 コイル状のパターンの一端は、スルーホールを介して取
付電極に接続され、コイル状のパターンの他端は、積層
体の周囲まで延長され、外部電極に接続されていること
を特徴とするIC実装用インダクタ部品。1. A component having a noise suppression inductor to be connected to each terminal of an IC, comprising a laminated body of magnetic layers, wherein the laminated body includes a mounting portion, a mounting electrode, an external electrode, The mounting portion is a portion where the IC is mounted on the upper surface of the laminate, and the mounting electrode is formed on the mounting portion at a pitch matching with each terminal of the IC. The external electrodes are provided around the laminate corresponding to each terminal of the IC, and the internal conductors are provided on a plurality of magnetic layers, and are formed through through holes so as to form a coil-shaped pattern. Connected to form an inductor inside the laminate, one end of the coil-shaped pattern is connected to the mounting electrode via a through hole, and the other end of the coil-shaped pattern is extended to the periphery of the laminate. , Connected to an external electrode Inductor component for C mounting.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP23518590A JP3160856B2 (en) | 1990-09-04 | 1990-09-04 | Inductor components for IC mounting |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP23518590A JP3160856B2 (en) | 1990-09-04 | 1990-09-04 | Inductor components for IC mounting |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH04114414A JPH04114414A (en) | 1992-04-15 |
| JP3160856B2 true JP3160856B2 (en) | 2001-04-25 |
Family
ID=16982330
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP23518590A Expired - Lifetime JP3160856B2 (en) | 1990-09-04 | 1990-09-04 | Inductor components for IC mounting |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3160856B2 (en) |
-
1990
- 1990-09-04 JP JP23518590A patent/JP3160856B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH04114414A (en) | 1992-04-15 |
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