JP3155748B2 - Image processing device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[Industrial Application Field] The present invention relates to an image processing apparatus. [Related Art] In recent years, color documents have been color-separated and read for each pixel.
2. Description of the Related Art Digital color copiers for obtaining digital color hard copies by digitally processing read image data and outputting the processed digital data to a color printer are becoming widespread. This type of apparatus has the advantage that image data can be processed digitally, so that the image output position can be moved (FIG. 72 (a)) or a desired image area can be extracted (FIG. 72 (a)).
(FIG. 72 (b)), color conversion of only a certain color in a desired area (FIG. 72 (c)), and fitting of characters and images stored in a memory to a reflection original (FIG. 72 (d)). ) And various other image processings have become possible, and applications in the field of so-called color copying are expanding. Therefore, by combining various functions, it can be easily applied to a color plan, an advertisement poster, a promotional material, a design drawing, and the like. On the other hand, there is a growing demand for characters to be more character-like and images to be more image-like for color reflective originals.
In contrast, character areas and image areas are separated by image area separation, and high-resolution processing is performed on character areas, especially black characters are processed with a single black color, while image processing is performed with high gradation processing. Has been made. [Problem to be Solved by the Invention] However, in the above-described conventional example, a multi-valued luminance signal YY = 0.3R + 0.6G + 0.11B is used for image area separation. When such a multi-valued image signal is used, the load in the image area separation processing is large. Furthermore, considering that it is not possible to determine the image area without taking into account not only one pixel but also pixels surrounding the pixel of interest as in the case of halftone dot determination, it is inevitable that the calculation processing becomes enormous. SUMMARY OF THE INVENTION It is an object of the present invention to provide an image processing apparatus that has been made in view of the above points and that reduces the load when performing image area determination.

[Means for Solving the Problems]

 In order to solve the above problems, the present invention has a multi-color component.
Input means for inputting color image data,
Image data of one color component from color image data
Extracting means for extracting the image data of the one color component,
The color component values of the image data and the
By comparing the average value of the color component values of the image data, 2
Binarization means for binarizing and outputting a binarization result;
Check the dots using the binarization result by means
To determine the halftone dot by calculating the amount of surrounding dots
Determining means. Embodiments Hereinafter, the present invention will be described in detail with reference to the drawings. FIG. 1 shows a digital color image processing system according to the present invention.
1 shows an example of a schematic internal configuration of a system. This system is
Digital color image reading device (hereinafter, referred to as
1) and a digital color image at the bottom
An image printing device (hereinafter referred to as a color printer) 2
Having. This color reader 1 is provided with a color separation unit described later.
The color image information of the original is
Information in color and converted to electrical digital image signals.
Replace. In addition, the color printer 2 uses the digital image
The color image is reproduced for each color according to the signal,
To transfer and record multiple times in digital dot form
It is a laser beam color printer of the child photograph type. First, an outline of the color reader 1 will be described. 3 is an original, 4 is a platen glass on which the original is placed, 5 is
From the original scanned and exposed by the halogen exposure lamp 10.
Condenses the reflected light image and enters the image into the 1: 1 full-color sensor 6
Rod array lens for power, and 5,6,7,10
Exposure in the direction of arrow A1 as one unit as a manuscript scanning unit 11
Scan. Scanned line by line during exposure scanning
The color separation image signal is supplied to a sensor output signal amplifying circuit 7.
After being amplified to a predetermined voltage by the signal line 501 described later.
Input to the video processing unit to be processed. Details
Details will be described later. 501 to ensure faithful signal transmission
Coaxial cable. The signal 502 is the same size full color
This is a signal line that supplies the drive pulse for the
Motion pulses are all generated within the video processing unit 12.
8 and 9 are white level correction and black level correction of the image signal described later
White and black plates, and halogen exposure lamps
By irradiating at 10, the signal level of the specified density
Video level, video signal white level correction, black level
Used for bell correction. 13 has a microcomputer
Control unit, which is
Display, key input control and video on the operation panel 20
Control of processing unit 12, by position sensors S1 and S2
The position of the original scanning unit 11 is detected via signal lines 509 and 510.
To move the scanning body 11 through the signal line 503.
Stepping to pulse drive stepping motor 14
Motor drive circuit control, exposure lamp via signal line 504
ON / OFF control of halogen exposure lamp 10 by driver,
Light control, digitizer 16 via signal line 505 and
All of the color reader unit 1 such as internal keys and display unit control
Control. Exposure scanning during document exposure scanning
The color image signal read by the unit 11 is increased.
To the video processing unit 12 via the width circuit 7 and the signal line 501
Is input and subjected to various processes described later in the unit 12.
To the printer unit 2 via the interface circuit 56.
Sent out. Next, an outline of the color printer 2 will be described. 711
The image signal from the color reader 1
Laser output part to convert to number, polyhedron (for example, octahedron)
Polygon mirror 712, a mode for rotating this mirror 712
(Not shown) and f / θ lens (imaging lens) 713
Have. 714 is a reflection mirror that changes the optical path of laser light, 7
Reference numeral 15 denotes a photosensitive drum. Ray emitted from laser output section
The light is reflected by the polygon mirror 712, and the lens 713 and
Scan the surface of the photosensitive drum 715 through the mirror 714 like a cotton
Star scan) to form a latent image corresponding to the original image.
You. Also, 711 is a primary charger, 718 is an overall exposure lamp, 723
Is a cleaner section for collecting the residual toner not transferred,
724 is a pre-transfer charger, and these members are the photosensitive drum 7
It is located around 15. 726 is formed on the surface of the photosensitive drum 715 by laser exposure.
A developing unit that develops the formed electrostatic latent image.
1Y, 731M, 731C, 731Bk are developed directly in contact with the photosensitive drum 715
730Y, 730M, 730C, 730Bk are spare toner
732 is the toner hopper that keeps the
Skewers that do these sleeves 731Y-73
1Bk, toner hopper 730Y ~ 730Bk and screw 732
Constitutes a developing unit 726, and these members are
It is arranged around the rotation axis P of the developing unit. An example
For example, when forming a yellow toner image,
Develops yellow toner and forms a magenta toner image.
When developing, rotate the developing unit 726 about the axis P in the figure.
In the magenta developer at a position where it contacts the photoconductor 715.
The developing sleeve 731M is provided. Cyan and Black
The image works in the same way. Reference numeral 716 denotes a toner image formed on the photosensitive drum 715.
719 is a transfer drum for transferring to paper, and 719 is a transfer drum 716.
Actuator plate for detecting the moving position of
The proximity of this actuator plate 719 causes the transfer
Detects that the ram 716 has moved to the home position
Position sensor, 725 is transfer drum cleaner, 727
Is a paper holding roller, 728 is a static eliminator, and 729 is a transfer charger.
Yes, these members 719, 720, 725, 727, 729
It is located around 16. On the other hand, 735 and 736 are paper cassettes for storing paper (sheets).
737, 738 are for feeding paper from cassettes 735, 736.
Paper rollers, 739, 740, 741 timing for paper feed and transport
Timing roller that feeds paper through these
The conveyed paper is guided by the paper guide 749 and the leading end is described later.
Wrapping around the transfer drum 716 while being carried by the gripper,
The process proceeds to the image forming process. Reference numeral 550 denotes a drum rotation motor, and the photosensitive drum 715
And the transfer drum 716 are rotated synchronously.
After the removal, remove the paper from the transfer drum 716.
Is the transport belt that transports the removed paper, 743 is the transport
Image fixing unit that fixes paper conveyed by belt 742
The image fixing unit 743 includes a pair of heat pressure rollers 744 and
745. The image processing circuit according to the present invention will be described with reference to FIG.
It will be described in detail. This circuit shows a full-color original
Exposure and reflection with illumination sources such as halogen lamps and fluorescent lamps
A color image is captured by a color image sensor such as a CCD and
Digitized analog image signal with A / D converter
To process and process digitized full-color image signals
And a thermal transfer color printer (not shown)
Color printer, laser beam color printer
Color image copying machine that outputs color images to
Or computerized color image signals that have been digitized in advance.
Or other color image reading device or color image
Input from a transmission device, etc., perform processing such as synthesis, and
For color image output devices that output to color printers
Is what is done. The original is first irradiated by an exposure lamp (not shown),
The reflected light is colored for each image by the color reading sensor 500a.
It is read after being disassembled and increased to a predetermined level by the amplifier circuit 501a.
It is width. 533a drives color reading sensor
CCD driver that supplies pulse signals
The pulse source is the system control pulse generator 53
Generated in 4a. Fig. 3 shows the color reading sensor and the driving pulse.
You. FIG. 3A shows a color reading system used in this example.
63.5 to scan the main scanning direction in five
μm as one pixel (4dot / inch (hereinafter referred to as dpi))
1024 pixels, that is, one pixel in the main scanning direction as shown in FIG.
Since it is divided into three by R, there is a total of 1024 x 3 = 3072
It has the number of effective pixels. On the other hand, each chip 58-62 has the same ceramic
The first, third and fifth sensors (58a, 60a, 6
2a) is on the same line LA, 2nd and 4th are 4 lines with LA
(63.5 μm × 4 = 254 μm)
When reading a document, the document is scanned in the direction of arrow AL. The driving pulse group ODRV118a is the first, third, and fifth of each of the five CCDs.
In addition, the second and fourth are independent and same by EDRV119a.
It is driven in anticipation. O01A, O02A, ORS included in ODRV118a
E01A, E02A, and ERS included in EDRV119a
Charge transfer clock and charge reset pulse
Interference and noise restrictions between the 1,3,5th and 2,4th
Are generated completely synchronously so that they are not in jitter with each other
You. For this reason, these pulses are generated by one reference oscillation source OSC558.
a (FIG. 2). FIG. 4A shows a circuit block for generating the ODRV118a and the EDRV119a.
FIG. 4 (b) is a timing chart, and FIG.
2 Included in the system control pulse generator 534a
I will. Original clock CLK0 generated from a single OSC558a
Clock K0135a is the timing of ODRV and EDRV generation
Clock that generates reference signals SYNC2 and SYNC3
SYNC2 and SYNC3 are connected to the signal line 22 connected to the CPU bus.
The preset value of the presettable counters 64a and 65a
Output timing is determined according to the
Initialize the frequency dividers 66a and 67a and the drive pulse generators 68a and 69a.
You. In other words, the HSYNC118 input to this block is
CLK0 and CLK0 output from one oscillation source OSC558a
Generated by the divided clock that is generated synchronously
The ODRV118a and EDRV119a
Groups are obtained as synchronized signals without any jitter.
Signal disturbance due to interference between sensors can be prevented. Here, the sensor drive pulses obtained in synchronization with each other
ODRV118a is connected to the first, third and fifth sensors 58a, 60a and 62a, and the EDRV119a
Is supplied to the second and fourth sensors 59a and 61a, and the respective sensors 58a and 59a
a, 60a, 61a, 62a
1 to V5 are output independently, and each channel shown in FIG.
A predetermined voltage value by independent amplifier circuits 501-1 to 501-5 for each unit
3 (b) through the coaxial cable 101a.
V1, V3, V5 are at the timing of EOS134a at the timing of OOS129a
V2 and V4 signals are sent out and input to the video image processing circuit.
It is. The document input to the video image processing circuit is divided into five parts
The color image signal obtained by scanning
G (green), B (blue), and R in the S / H502a
(Red) are separated into three colors. So after S / H
Are subjected to 3 × 5 = 15 signal processing. S / H circuit 502a allows sample hold for each color R, G, B
The converted analog color image signal is supplied to the next-stage A / D conversion circuit 503.
In a, each 1-5 channel is digitized, and each 1-channel
The data is output to the next stage in parallel for 5 channels independently. In this embodiment, as described above, four lines (63.5
μm × 4 = 254 μm) in the sub-scanning direction, and
5 staggered sensors divided into 5 areas in the main scanning direction
Because the original is being read, the chan
The reading position is shifted between the flanks 2, 4 and the remaining 1, 3, and 5. So
In order to connect this correctly, multiple lines of memory
The shift correction circuit 504a having the
ing. Next, a black correction / white correction circuit 506a will be described with reference to FIG.
Will be described. As shown in Fig. 5 (b)
The black level output of channels 1 to 5 is the light input to the sensor.
When the amount is very small, variation between chips and between pixels is large.
When this is output as is and the image is output, the image data
Streaks and unevenness occur in the part. Therefore, the output rose
It is necessary to correct the difference, and a circuit as shown in FIG.
Perform correction with. Prior to the original reading operation, the original scanning unit
Uniform density placed in the non-image area at the tip of the platen
Move to the position of the black plate with
The bell image signal is input to the circuit. Blue signal B_INAbout
One line of this image data is stored in the black level RAM 78a.
A is selected by the selector 82a to store it in the
Close 0a () and open 81a. That is, the data line is 151
a → 152a → 153a, while RAM78a address input 1
Initialized by ▲ ▼ for 55a, counts VCLK
The output 154a of the address counter 84a
The output to the selector 83a is output, and the black level for one line is output.
The bell signal is stored in the RAM78a.
Mode). When reading an image, the RAM78a is in data read mode
And the B line of the subtractor 79a enters the data line 153a → 157a.
Each line is read out and input for each pixel. You
That is, at this time, the gate 81a is closed (), and the gate 80a is open.
(). The selector 86a has an A output. Therefore,
The black correction circuit output 156a corresponds to the black level data DK (i).
For example, in the case of a blue signal B_IN(I) -DK (i) = B
_OUT(I) (referred to as black correction mode). same
So green G_IN, Red R_INThe same applies to 77aG and 77aR.
Control is performed. In addition, each selector game for this control
Control lines of CPU22 (Fig. 2)
Performed under CPU control by the latch 85a assigned as / O
It is. Note that the selectors 82a, 83a, and 86a are to be B-selected.
This allows the CPU 22 to access the RAM 78a. Next, in FIG. 6, the white level in the black correction / white correction circuit 506a is determined.
The bell correction (shading correction) will be described. White level
To correct, move the original scanning unit to the position of the uniform white plate.
Illumination system, optical system,
The sensitivity variation of the sensor is corrected. Basic circuit configuration
Is shown in FIG. 6 (a). Figure 5 shows the basic circuit configuration
Same as (a), but in black correction, corrected by subtractor 79a
The white correction uses a multiplier 79'a.
Therefore, the description of the same part is omitted. During color correction, the CCD (500a) for reading the original is
At the reading position (home position) of one white plate
Time, i.e., prior to a copying or reading operation,
Turn on the exposure lamp (not shown) to obtain a uniform white level image.
The data is stored in the correction RAM 78'a for one line. example
For example, if it has a width in the main scanning direction A4 longitudinal direction, 16pe
16 x 297mm = 2752 pixels in l / mm, ie at least RAM
The capacity is 4752 bytes. As shown in FIG.
Assuming the whiteboard data Wi (i = 1 to 4752), RAM7
8'a has a white plate for each pixel as shown in FIG.
The corresponding data is stored. On the other hand, for Wi, the normal image of the i-th pixel is read.
Data Do = Di x FF after correction for value Di_HShould be / Wi
is there. Then, the CPU 85 sends the latches 85'a ',',
Gates 80'a and 81'a are opened for
Output so that B is selected by the collectors 82'a, 83'a, 86'a
Then, the RAM 78'a can be accessed by the CPU. Next, FIG.
In the procedure shown in (d), the CPU 22 performs FF for the first pixel Wo._H/ Wo, W₁
FF / W₁.. Are sequentially replaced to replace data. color
When the process is completed for the blue component of the component image (FIG. 6D)
Step B) Similarly, the green component (Step G) and the red component (St
epR), and thereafter, the input original image data Di
Do = Di × FF_HGate 80'a so that / Wi is output
Is open ('), 81'a is closed ('), and selectors 83'a, 8
6'a is the coefficient selected from A and the coefficient read from RAM 78'a
Data FF_H/ Wi goes through signal line 153a → 157a, input from one side
Multiplication with the obtained original image data 151a is performed and output. As described above, the black level sensitivity of the image input system and the darkness of the CCD
Current variation, sensitivity variation between sensors, light intensity of optical system
Black level based on various factors such as variation and white level sensitivity
And white level correction, and in the main scanning direction,
Image data B uniformly corrected for each color for both white and black_OUT
101, G_OUT102, R_OUT103 is obtained. Shiroo obtained here
Each color-separated image data whose black level has been corrected is not shown.
Specific color density or specific
Pixel on the image with the color ratio of
Data to another color density or color ratio specified by the
It is sent to the color conversion circuit B which performs conversion. <Color conversion> Fig. 7 shows color conversion (gradation color conversion and density color conversion) block.
FIG. The circuit of FIG. 7 is an 8-bit color separation signal R_IN, G
_IN, B_IN(1b to 3b) to register 6b by CPU20
Color detection unit 5b that determines an arbitrary set color in multiple places
Area signal A4rb for color detection and color conversion
"Specific color" signal output by the color detection unit
(Hereinafter referred to as hit signal) in the main scanning and sub-scanning directions (seventh
In the example of the figure, the line for performing processing to expand in the sub-scanning direction only)
Memory 10b-11b, OR gate 12b, expanded hit signal 3
4b and color generated from non-rectangular signal (including rectangle) BHi27b
Conversion enable signal 33b, enable signal 33b and input color component
Solution data (R_IN, G_IN, B_IN1b to 3b), synchronization of area signal Ar4
Line memories 13b to 16b for adjustment, and a delay circuit 17
b to 20b, enable signal 33b, synchronized color separation
Data (R_IN′, G_IN′, B_IN'21b to 23b), area signal A
color set in register 26b by r'24b and CPU 20
Color conversion unit 25 that performs color conversion based on the converted color data
b, Color conversion processed color separation data (R_OUT, G_OUT, B_OUT Two
8b-30b), R_OUT, G_OUT, B_OUTHits output in synchronization with
Signal H_OUTIt consists of 31b. Next, the algorithm of gradation color judgment and gradation color conversion
Give an overview. Here, gradation color determination and gradation color conversion
When performing judgment and color conversion, color
Color judgment of the same hue to perform color conversion
This is to perform color conversion of one hue. The same color (a certain hue) is, for example, a red signal R₁And gree
Signal G₁And blue signal B₁Is known to be equal to
I have. Therefore, one of the colors to be converted (here, the maximum value color,
Data M₁And the other two colors
Find the ratio with the data. For example, when the main color is R, M₁= R₁
And G₁/ M_Two, B₁/ M_TwoAsk for. And input data R_i, G_i, B_iAgainst  Where α₁, β₁, γ₁≦ 1 α_Two, β_Two, γ₂A pixel satisfying ≧ 1 is determined as a pixel to be color-converted. The color conversion data (R_Two, G_Two, B_Two) Also
Of the primary color (in this case, the maximum value color)_TwoAnd the other two colors
Find the ratio with the data. For example G_TwoIs the primary color, M_Two= G_TwoAnd R_Two/ M_Two, B_Two/ M_TwoTo
Ask. And the main color M of the input data₁AgainstAsk for. If the data is a color conversion pixel,Is not a color conversion pixel, (R_i, G_i, B_i) Is output
You. As a result, all parts of the same hue with gradation can be detected
And output color conversion data according to the gradation.
Become. FIG. 8 is a block diagram showing an example of the color judgment circuit.
This part is a part for detecting a pixel to be color-converted. In this figure, 50b is R_IN b1, G_IN b2, B_IN Enter b3
Smoothing section for smoothing force data, 51b
Selector for selecting one of the outputs of the smoothing section (primary color)
52b_R, 52b_G, 52b_BIs the output of the selector 51b and the fixed value R₀, G₀, B₀
Selector to select one of 54b_R, 54b_G, 54b_BIs an OR game
G, 63b, 64b_R, 64b_G, 64b_BAre the area signals Ar10 and A, respectively.
Selectors 51b and 52b based on r20_R, 52b_G, 52b_BSelect to
Selector to set signal, 56b_R, 56b_G, 56b_BAnd 57
b_R, 57b_G, 57b_BIs the power to calculate each upper and lower limit
It is a calculator. Also, each upper limit ratio register 5 set by CPU 20
8b_R, 58b_G, 58b_B, Lower limit ratio register 59b_R, 59b_G, 59b_BHaso
For each of multiple areas based on the area signal Ar30
Data for color detection can be set. Here, Ar10, Ar20, Ar30 were made based on Fig. 7 Ar4b.
Each signal contains the required number of stages of DF / F. Also
61b is an AND gate, 62b is an OR gate, 67b is a register.
You. Next, the actual movement will be described. R_IN b1, G_IN b2, B
_IN Data R ', G', B 'obtained by smoothing b3
One of them is the select signal S which the CPU 20 sets.₁By
The main color data is selected using the selector 51b.
You. Here, the CPU 20 differs from the selectors 65b and 66b respectively.
Data A and B are set, and selector 63b responds to the Ar10 signal.
Select either A or B and S₁Selector 51b as signal
input. In this way, two registers 65b and 66b are prepared,
Input data to A and B of the selector 63b, and input the area signal Ar10
Select one of them,
Separate color detection can be performed. This area
The signal Ar10 is for not only rectangular areas but also non-rectangular areas.
Signal. Next selector 52b_R, 52b_G, 52b_BNow, CPU 20 is set
R₀, G₀, B₀Is the primary color data selected by selector 51b
The decoder 53b outputs 53ba to 53bc and fixed color mode
Signal S_TwoSelect by the select signal generated by
Is done. The selector 64b_R, 64b_G, 64b_BIs the area signal
By selecting either A or B according to Ar20,
Different colors for multiple areas, similar to Lecter 63b
Detection can be performed. here,
R₀, G₀, B₀Indicates conventional color conversion (fixed color mode) and gradation color
The main color data is selected for the primary color in the judgment, and the gradation color is
Selected for colors other than the primary color for conversion. Note that the operator determines the fixed color judgment and the gradation color judgment.
Selection can be set freely from the operation unit. Or, for example,
Color data input from an input device such as a digitizer
(Color data before color conversion) can be changed by software
It is possible. These selectors 52b_R, 52b_G, 52b_BOutput and to CPU20
Upper limit ratio register 58b set by_R, 58b_G, 58b_B,lower limit
Ratio register 59b_R, 59b_G, 59b_BFrom R ',
The upper and lower limits of G 'and B' are determined by the multiplier 56b._R, 56b_G, 56b_B
And 57b_R, 57b_G, 57b_BIs calculated by
Comparator 60b_R, 60b_G, 60b_BAre set as upper and lower limits
You. Window comparator 60b_R, 60b_G, 60b_BThe main color day
Data within a certain range, and two colors outside the main color within a certain range
Whether it is in or not is determined by the AND gate 61b. cash register
The star 67b is turned into a judgment signal by the enable signal 68b of the judgment unit.
Regardless, "1" can be set. In that case
Means that there is a color to be converted in the part where "1" is set.
You. With the above configuration, multiple fixed color judgments or gradation color judgments
It becomes possible for the area. FIG. 9 is a block diagram of an example of the color conversion circuit. this
The color was converted by the circuit based on the output 7b of the color judgment unit 5b
The signal or the original signal is selected. In FIG. 9, the color conversion unit 25b is a selector 111b,
Ratio of each color to the main color data (here the maximum value)
Register 112b to set_R1, 112b_R2, 112b_G1, 112b_G2, 112b
_B1, 112b_B2, Multiplier 113b_R, 113b_G, 113b_B, Selector 114b_R, 1
14b_G, 114b_B, Selector 115b_R, 115b_G, 115b_B, AND gate 32
b, Ar50 generated based on the area signal Ar′24 in FIG. 7,
Select data set by CPU20 by Ar60, Ar70
Data 111b, multiplier 113b_R, 113b_G, 113b_B, Selector 114b_R, 114
b_G, 114b_BSelectors 117b and 112b_R, 112b_G, 112
b_B, 116b_R, 116b_G, 116b_BAnd the delay circuit 118b.
It is. Next, the actual movement will be described. The selector 111b receives the input signal R_IN′ 21b, G_IN′ 22b, B_IN´2
Select one of 3b (primary color) according to select signal S5
I do. Here, the signal S5 has two data set by the CPU 20.
Area signal Ar40 switches selector 117b to A or B
Occurs by selecting one of them. In this way,
Color conversion processing can be performed on a plurality of areas. The signal selected by the selector 111b is applied to a multiplier 113b._R, 11
3b_G, 113b_BAnd the register value set by CPU 20
Is performed. Again, the area signal Ar50 is
Register value 112b_R1.112b_R2, 112b_G1.112b_G2, 112b_B1.112b_B2
The selector 112b respectively_R, 112b_G, 112b_BSelect by
This allows different color conversion processing for multiple areas
Becomes Next, the selector 114b_R, 114b_G, 114b_BMultiplication result and CPU
Two fixed values Ro '/ Ro ", Go'-Go", Bo' set by 20
-Selector 116b by area signal Ar70 of Bo "_R, 116b_G,
116b_BOne of the fixed values selected in
Select signal S6. Again, the mode signal S6 is S5
The one selected by the area signal Ar60 in the same way
Can be. Finally selector 115b_R, 115b_G, 115b_BSelect at
Signal S_B′ To R_IN″, G_IN″, B_IN″ (R_IN′, G_IN′,
B_IN'And delay and timing adjustment) and selector 1
14b_R, 114b_G, 114b_BOne of the outputs is selected,
R_OUT, G_OUT, B_OUTIs output as Hit signal H_OUT
Also R_OUT, G_OUT, B_OUTOutput in synchronization with. Where the selector signal S_B′ Means color judgment result 34b and color conversion
Apply a delay to AND signal of enable signal BHi34b
It is a thing. As this BHi signal, for example, the dotted line in FIG.
Input a non-rectangular enable signal like
Can be subjected to color conversion processing. In this case Eli
A) The signal is calculated from the area indicated by the dashed line,
Top left (Fig. 10a), top right (Fig. 10
b), the lowest left (Fig. 10c), the lowest left (Fig. 10d)
Generated by coordinates. The non-rectangular area signal BHi is
It is input from an input device such as a digitizer. This non-rectangular rice
When color conversion is performed using the
Since you can specify along the boundary of where you want to convert the rear,
Color detection threshold compared to conventional rectangular color conversion
Field can be expanded. Therefore, the detection capability is
It is possible to obtain an output image with accurate gradation color conversion
it can. As described above, the color change having the brightness corresponding to the main color of the color determination unit 5b is performed.
(For example, when converting red to blue,
Blue or dark red to dark blue) or fixed value
Freely perform any color conversion on multiple areas
Can be. As described further below, the hit signal H_OUTIdentify based on
Mosaic processing and technology only for color areas (non-rectangular or rectangular)
Apply steer processing, trimming processing, masking processing, etc.
Can be Then, as shown in FIG.
4,105 is density data from image data proportional to reflectance
Logarithmic conversion circuit C for converting into
Halftone area, character image area for determining halftone area
Separation circuit I, and the system and cables 135, 136, 137
External device for exchanging data with the external device via
Sent to the interface M. Next, color image data proportional to the input light amount
Performs processing to match the human eye's relative luminous efficiency characteristics.
It is input to the logarithmic conversion circuit C (FIG. 2). Here, white = 00_H, Black = FF_HIs converted as much as possible,
Image source input to the image reading sensor, for example
For example, normal reflective originals and transmission through film projectors, etc.
Negative film and positive film for originals and the same transparent originals
Film or film sensitivity, gamma input in the exposure state
As shown in FIGS. 11 (a) and (b),
LUT for logarithmic conversion (lookup table)
) And use them according to the purpose. switching
Is performed by the signal lines lg0, lg1, lg2, and the I / O port of the CPU 22.
This is performed by inputting an instruction from the operation unit, etc.
2). Here, the data output for each B, G, R is
It corresponds to the density value of the output image, B (blue), G (G
Lean) and R (Red) signals
(Yellow), M (magenta) and C (cyan) toner
The image data after this is yellow,
Correspond to zenta and cyan. Next, each color component from the original image obtained by logarithmic conversion
Minute image data, that is, a yellow component, a magenta component,
For the cyan component, the color correction circuit D
Perform color correction. Color reading sensor for each pixel
The spectral characteristics of the arranged color separation filters are shown in Fig. 13.
As such, it has an unnecessary transmission area such as a shaded area,
On the other hand, for example, the color toner (Y, M, C) transferred to the transfer paper is also the first
It is well known that it has unnecessary absorption components as shown in Fig. 4.
I have. Therefore, for each color component image data Yi, Mi, Ci,Masking correction that calculates the primary expression of each color and performs color correction
Is well known. Furthermore, by Yi, Mi, Ci, Min (Yi, M
i, Ci) (minimum value of Yi, Mi, Ci) and calculate
The operation of adding black toner later (smearing) as black (black)
Reduce the amount of each color material added according to the crop and the added black component
Undercolor removal (UCR) operations are also common. Fig. 12 (a)
The color correction circuit D that performs masking, summing, and UCR
1 shows a circuit configuration. The feature of this configuration is that it has two masking matrices and one signal line.
High-speed switching can be performed with “1/0”. With or without UCR, one signal line “1/0” enables high-speed switching.
There are two circuits that determine the amount of blemishes that can be replaced.
It can be switched. First, prior to image reading, a desired first matrix
Coefficient M₁, The second matrix coefficient M_TwoTo the CPU connected to CPU22.
Set from In this exampleAnd M₁Is in registers 87d-95d, M_TwoIs the register 96d ~ 1
It is set to 04d. Also, 111d to 122d, 135d, 131d, 136d are selected
A is selected when the S terminal is “1”, and B is selected when the S terminal is “0”.
select. Therefore the matrix M₁Switch when selecting
Signal MAREA364 = "1", matrix M_TwoWhen selecting
Set to “0”. Reference numeral 123d denotes a selector, and a selection signal C₀, C₁(366
Output based on the truth table of Fig. 12 (b) by d) and 367d)
a, b, c are obtained. Select signal C₀, C₁And C_TwoIs output
Corresponding to the desired color signal, and if defeated, in the order of Y, M, C, Bk (C_Two, C₁,
C₀) = (0,0,0), (0,0,1), (0,1,0), (1,0,0),
Further, by setting (0,1,1) as a monochrome signal,
The desired color corrected color signal is obtained. Now (C₀, C₁, C_Two) =
(0,0,0) and MAREA = "1", the selector 123d
Outputs (a, b, c) are the contents of registers 87d, 88d, 89d,
(A_Y1, −b_M1, −C_C1) Is output. On the other hand, the input signal Y
Black component calculated as Min (Yi, Mi, Ci) = k from i, Mi, Ci
The minute signal 374d becomes Y = ax-b (a and b are constants) at 137d.
After the next conversion, it is input to the B input of the subtractors 124d, 125d, and 126d.
It is. In each of the subtracters 124d to 126d, Y = Yi
− (Ak−b), M = Mi− (ak−b), C−Ci− (ak−b)
Calculated and masked via signal lines 377d, 378d, 379d
It is input to multipliers 127d, 128d, and 129d for calculation. The multipliers 127d, 128d, and 129d have (A)
_Y1, −b_M1, −C_C1) And the B input [Yi- (ak-
b), Mi− (ak−b), Ci− (ak−b)] = [Yi, Mi, Ci]
As shown in the figure, the output D
_OUTC_TwoY under the condition of = 0 (YorMorC)_OUT= Yi x (a_Y1)
+ Mi × (−b_M1) + Ci × (−C_C1) Obtained and masking
Yellow image data after color correction and under color removal processing
Is obtained. Similarly, M_OUT= Yi x (-a_Y2) + Mi × (−b_M2) + Ci × (−
C_C2) C_OUT= Yi x (-a_Y3) + Mi × (−b_M3) + Ci × (−
C_C3) Is D_OUTIs output to Color selection depends on the color
(C₀, C₁, C_TwoFigure 12)
It is controlled by the CPU 22 according to the table of FIG. Register 1
05d to 107d and 108d to 110d are registers for monochrome image formation.
With the same principle as the masking color correction described above,
MONO = k₁Yi + l₁Mi + m₁By weighting and adding each color by Ci
I am getting it. At the time of Bk output, it is input as a selector 131d switching signal.
C forced_TwoBy (368), C_Two= 1, thus the linear transformation
In a unit 133d, a primary conversion of Y = cx-d is performed and a selector
Output from 131d. In addition, BkMJ110
Based on the output of the image area separation circuit I,
This is a black component signal to be output. Color switching signal C₀′, C₁′, C_Two′
366 to 368 are from output port 501 connected to CPU bus 22
MAREA 364 is output from the area signal generation circuit 364.
It is. The gate circuits 150d to 153d are used for a binary memory circuit to be described later.
Non-rectangular read from the path (bit map memory) L537
When DHi = "1" by the area signal DHi122, the signal C₀′,
C₁′, C_Two'= “1,1,0” and automatically the mono image
Is a circuit that controls so that data for output is output. <Character image area separation circuit> Next, the character image area separation circuit I
The image data is characters or images.
To determine whether the color is chromatic or achromatic
Circuit. The flow of the process is explained using FIG.
I will tell. The input to the character image area separation circuit I from the color conversion B
Wood (R) 103, Green (G) 104, Blue (B) 105
Is the minimum value detection circuit M_IN(R, G, B) 101I and maximum value detection
The signal is input to the circuit Max (R, G, B) 102I. Each blot
, The maximum of the three types of input R, G, B luminance signals
The value and the minimum value are selected. Each selected signal
Calculates the difference with the subtraction circuit 104I. Big difference, sand
That is, if the input R, G, B is not uneven, white
Not a signal that is close to achromatic color indicating black
Chromatic color. Naturally if this value is small
For example, if the R, G, B signals are at almost the same level,
There is an achromatic signal that is not a signal
You can see that there is. This difference signal is the same as the gray signal GR124.
It is output to the delay circuit Q. In addition, this difference
To the threshold set arbitrarily in register 111I
The comparator 112I compares the signals, and compares the comparison result with the gray judgment signal GRBi.
Output to the delay circuit Q as l26. These GR125, G
The signal of the RBi126 is shifted in phase with other signals by the delay circuit Q.
After being matched, it is input to a character image correction circuit E described later.
Used as a processing determination signal. M_IN(R, G, B) The minimum signal obtained in 101I includes
In the edge enhancement circuit input to the edge enhancement circuit 103I,
The following calculations can be performed using the preceding and following pixel data in the main scanning direction.
Thus, edge emphasis is performed. D_OUT: Image data after edge enhancement Di: I-th pixel data Edge enhancement is not necessarily limited to the above method,
Known techniques may be used. Edge strength in main scanning direction
The adjusted image signal is then passed through 5 × 5 and 3 × 3 win
The average value calculation in the dough is 5 × 5 average 109I, 3 × 3 average 10
Done in 1I. The line memories 105I to 108I
This is a delay memory in the sub-scanning direction for performing. 5 x 5 flat
The 5 × 5 average calculated at 109I is also shown next.
Independently set to the offset part connected to CPUBUS
The offset value and the adder 115I, 119I, 124I
It is. The added 5 × 5 average value is limiter 1 113I,
Mitter 2 118I and limiter 3 123I are input. Each
The mitsu is connected by a CPU BUS (not shown).
The limiter value can be set independently.
If the 5 × 5 average is greater than the set limiter, the output will be
Clipped by limiter value. Output signal from each limiter
No. are comparator 1 116I and comparator 2
 121I and comparator 3 126I are input. First,
In comparator 1 116I, the output signal of limiter 1 113I
And the output from the 3 × 3 average 110I. Compared
The output of the comparator 1116I is a dot area
Delay to match the phase with the output signal from another circuit 122I
The signal is input to the circuit 117I. This binarized signal is optional
To prevent collapse and jump by MTF
For this reason, binarization using the average value is performed, and
High frequency components of the halftone image so that halftone dots are not detected by binarization
Through a 3x3 low-pass filter to cut
ing. Next, the output signal of the comparator 2 (121I) is
The image is displayed so that it can be determined by the halftone dot area determination circuit 122I at the stage.
Binarization with through image data to detect high frequency components
Has been done. In the halftone area determination circuit 122I, the halftone image
Is composed of a collection of dots, so the edge direction
Check that the dot is
It is detected by counting the number. Halftone area
Detailed description of the separate circuit 122I is not the gist of this patent
Omitted. The result determined by the halftone dot area determination circuit in this way
The OR gate 129I is used with the signal from the delay circuit 117.
After the erroneous judgment is removed by the erroneous judgment
132I. In this erroneous judgment removal circuit 130I, the character
Binarization utilizing the characteristic that the image is thin and the image has a large area
First, the image area is narrowed to the isolated signal.
The existing image area is taken. Specifically, the center pixel xij
And one pixel in the surrounding 1 mm square area
Is present, the center pixel is determined to be an image outside area. This
After removing the image area at the isolated point,
A fattening process is performed in order to return. Similarly, the dot discrimination
The output of 122I is directly input to the erroneous judgment elimination circuit 131I and narrowed.
Processing and fattening processing are performed. Here is the cell of the thinning process
Size is the same as the mask size for the fattening process,
When the fat is thickened by making the processing bigger
Is determined to cross. Specifically
Is a mask of 17 × 17 pixels for both the misjudgment removal circuits 130I and 131I.
After thinning with a 5x5 mask,
Thickening processing is performed with a mask of 34 × 34 pixels. Misjudgment
The output signal SCRN signal 127 from the constant removal circuit 131I will be described later.
Smoothing processing only for the halftone dot determination unit in the character image correction circuit E
The discrimination signal to prevent the moire of the read image.
No. Next, the output signal from comparator 3 126I is sent
Extract the outline of the input image signal to process the characters
ing. As an extraction method, a binarized comparator
3 126I output thinning with 5 × 5 block
And fattening processing and fattening signal and fattening signal
The difference area of the signal is defined as the contour. Extracted in this way
The contour signal that has been output is the mask output from the erroneous determination removal circuit 130I.
Through the delay circuit 128I to match the phase with the
After that, the contour signal is masked by the AND gate 132I
Masks the contour signal at the determined part and replaces it with the original character part.
Only the contour signal is output. From AND gate 132I
The output is then output to the contour regeneration unit 133I. <Contour Regenerating Unit> The contour regenerating unit 133I outputs an image not determined as a character contour.
Processing of character as character outline based on information of surrounding pixels
And sends MjAr124 to the character image correction circuit E as a result.
The following processing is performed. Specifically, as shown in FIG. 16, bold characters (FIG. 16A)
As for the character determination part, the dotted line in FIG.
And the processing described later is performed.
Regarding (c)), the character part is indicated by a dotted line in FIG.
It becomes ugly due to misjudgment when performing the processing described later
May be. Not recognized as a character to prevent this
The text part based on the surrounding information.
U. Specifically, by changing the shaded part to a character part,
Is as shown by the dotted line in FIG.
It can reduce erroneous judgments even for thin characters.
This leads to improved image quality. Fig. 17 shows how the surrounding pixel is used to
It is a figure showing whether it regenerates to a character part. (A) to (d)
Is a 3x3 block with both the vertical, horizontal, and diagonal
Character part (S₁, S_TwoWhen both are "1")
Regardless, the pixel of interest is a character portion. on the other hand
(E) to (h) are 5 × 5 blocks, each of which is 1
In the pixel, both the vertical, horizontal, and diagonal characters (S₁, S_TwoWith
“1”) Regarding the target pixel as a character part regardless of the target pixel information
Things. In this way, before the two stages (multiple types of
Able to respond to a wide range of errors by having a structure
It has become. 18 and 19 are circuits for realizing the processing of FIG.
It is. 18 and 19 are line memories 164i to 16
7i, DF / F104i to 126 to get information around the target pixel
i, AND gate 14 for realizing FIGS. 17 (a) to 17 (h)
6i to 153i and an OR gate 154i. Fig. 17 (a)-from 4 line memories and 23 DF / Fs
(H) S₁, S_TwoIs retrieved. 146i-153
i is the number corresponding to each of the processes (a) to (h).
Enabled and disabled independently by the registers 155i to 162i
It can control the chair enable. Correspondence between AND circuits 146i-153i and FIGS. 17 (a)-(h)
The person in charge is as follows. FIG. 20 shows ▲ ▼ of the line memories 164i to 167i (EN
These are timing charts for 1) and ▲ ▼ (EN2). This
It means that EN1 and EN2 are at the same timing at the same time, or expanded
At times (for example, 200% to 300%), ▲ ▼ is thinned out to two lines
Is written once. As a result, FIG.
The size of (h) expands. This is here when expanding
Information comes in an image enlarged only in the sub-scanning direction.
(A) to (h) to expand the size
At times, the processing is performed in order to perform processing with the same size image. <Character image correction circuit> The character image correction circuit E is the character image area separation circuit I described above.
Black character, color character, halftone dot based on the judgment signal generated in
The following processing is performed on each of the image and the halftone image. [Processing 1] Processing related to black characters [1-1] Signal BkMj obtained as a video by Sumi extraction
Use [112] Y, M, C data if multi-valued achromatic signal GR125
Or subtraction according to the set value. On the other hand, Bk data is multi-valued
Add according to the achromatic signal GR125 or the set value of
[1-3] Edge emphasis performed [1-4] Black characters are printed at 400 lines (400dpi)
Out [1-5] Perform color residue removal processing [Process 2] Process on color characters [2-1] Perform edge enhancement [2-2] Color characters are printed at 400 lines (400 dpi)
[Process 3] Process related to halftone image [3-1] Smoothing to prevent moire (2
[Process 4] Process for halftone images [4-1] Smoothing (two pixels in the main scanning direction)
Or through selection. Next, a circuit for performing the above processing will be described. FIG. 21 is a block diagram of the character image correction unit E. The circuit of FIG.
Selector 6e that selects the
The generated AND gate 6e 'is subjected to the color residue removal processing described later.
Block 16e, which generates an enable signal for the same process
Multiplication of gate 16e ', GR signal 125 and I / O port set value 10e
Of multiplier 9e ', multiplication result 10e or I / O port
Selector 11e to select value 7e, outputs 13e and 11e of selector 6e
Multiplier 15e, XOR gate 20e, AND gate
Port 22e, adder / subtractor 24e, line that delays one line data
Memory 26e, 28e, edge emphasis block 30e, smoothing
Block 31e, through data or smoothing data
Selector 33e to be selected,
Delay circuit 32E, the result or edge of edge enhancement.
Selector 42e for selecting the result of smoothing
Delay circuits 36e and O for synchronizing control signals
R gate 39e, AND gate 41e, 400 lines (d
pi) Inverter circuit for outputting a signal (“L” output)
44e, AND circuit 46e, OR circuit 48e, video output 113 and LCHG4
It consists of a delay circuit 43e for synchronizing 9e.
You. The character image correction unit E is also provided with a CPU bus through the I / O port 1e.
Connected to the source 22. Hereinafter, [1] the color signal remaining around the edge of the black character portion is removed.
Y, M, C data of the remaining color removal process and black character part judgment part
At a certain rate for Bk data, and a certain rate for Bk data.
Addition in combination, [2] strong edge for character part
Tone and halftone judgment are smoothed.
-Data selection, [3] LCHG for character
Three parts to make the signal "L" (print at 400dpi)
Each will be described. [1] Color residual removal processing and addition / subtraction processing
Where both signals MjAR124 are active,
In other words, this is the process for the black text edge and its surroundings.
, Y, M, C components that protrude from the edge of black characters
And removal of the edge parts. Next, a specific operation will be described. In this process, the character portion is determined (MjAR124 = "1"),
Character mode (GRBi126 = "1") and color mode
(DHi122 = "0") Only performed when: Therefore, ND
(Black and white) mode (DHi = "1"), color characters (GRBi = "0")
It is not done at the time of. When scanning originals for any of the recording colors Y, M, or C
Video input 111 is selected by the selector 6e (I / O-6 (5e)
“0” is set. Video 8e for 15e, 20e, 22e, 17e
Data to be subtracted is generated. For example, assume that “0” is set in I / O-3 12e.
Then, the selector output data 13e and I / O-17e are set.
The multiplication with the calculated value is performed by the multiplier 15e. Where for 13e
Data 18e of 0 to 1 times is generated. Registers 9e and 25e
By setting 1, the 2's complement data of 18e becomes 17e, 20
e, 22e. Finally, 8e and 23e by the adder / subtractor 24e
23e is a two's complement, so 17e-8e is actually subtracted.
Output from us 25e. When "1" is set in I / O-3 12e, the selector 11
e selects B data. At this time, the multi-valued
Achromatic signal GR125 (Signal that takes a large value near achromatic color
Multiplied by the value set in I / O-2 10e by 9e
Is used as a multiplier of 13e. When using this mode
Can be changed independently for each of Y, M and C colors and achromatic
The subtraction amount can be changed accordingly. At the time of recording color Bk scan, BkMj112 is selected by selector 6e.
(“1” is set in I / O-65e). 15e, 20e, 22e, 1
In 7e, data to be added to the video 17e is generated. the above
The difference from Y, M and C is that “0” is set in I / O-4, 9e
Thus, 23e = 8e, Ci = 0, and 17e + 8e is greater than 25e
Is output. The method of generating the coefficient 14e is the same as that for Y, M, and C.
You. In the mode where “1” is set to I / O-3 12e,
At times, the coefficient changes according to the achromaticity. Specifically, achromatic
The addition amount is large when the chromaticity is large, and small when the chromaticity is small.
You. This processing is shown in the figure in FIG.
(A) and (c) show enlarged lines. Y, M, C de
If the character signal part is “1” for the data,
Is subtracted ((b) in the figure), and the character signal is applied to the Bk data.
If the part is “1”, the addition is added to the video (see
(D)) is performed. In this figure, 13e = 18e,
Example when Y, M, C data is 0 and Bk data is twice the video
It is. With this process, the outline of the black character is almost completely black
However, the Y, M, and C data outside the contour signal are shown in FIG.
The indicated * mark is left around the character as a color residue
painful. What removes the remaining color is a color removal removal process. this
Processing is in the area where the character area is expanded,
The video data 13e is the comparator value set by the CPU.
There may be color residue in smaller places, that is, outside the character part
3 or 5 pixels before and after
This is a process for taking the minimum value. Next, the explanation will be supplemented by using a circuit. Figure 23 shows a sentence that works to expand the character area.
DF / F 65e-68e and AND gate 69e, 7
1e, 73e, 75e and an OR gate 77e. Mj when all "1" are set to I / O ports 70e, 72e, 74e, 76e
Two images before and after in the main scanning direction with respect to Ar124 being “1”
The expanded signal is the I / O port 70e, 75e “0”, 71e, 73e “1”.
When the signal extended one pixel before and after in the main scanning direction is Sig218e
Output from Next, the remaining color removal processing circuit 16e will be described. FIG. 24 is a circuit diagram of the residual color removal processing. In FIG. 24, 57e indicates a pixel of interest corresponding to the input signal 13e.
3 pixels to select the minimum value of 3 pixels in total and 1 pixel before and after
The min select circuit, 58e, responds to the input signal
And the maximum value of a total of 5 pixels, that is, 2 pixels before and after. 5 strokes
The element min select circuit 55e is connected to the input signal 13e and I / O-18 (54
If 54e is larger than the comparator that compares e)
In this case, 1 is output. 61e and 62e are selectors, 53e and 53'e
Is an OR gate and 63e is a NAND gate. In the above configuration, the selector 60e is connected to the I / O from the CPU bus.
Select 3 pixel min or 5 pixel min based on the value of −19
I do. The effect of removing residual color is greater for 5 pixels min.
You. This can be set manually by the operator or automatically by the CPU.
Can be selected by dynamic setting. When the output of the NAND gate 63e is “0”, the selector 62e
That is, the video data 13e is registered by the comparator 55e.
Data value is smaller than 54e, and the signal of the character part is expanded.
If 17'e is 1, A side, so
If not, the side B is selected. (However, at this time
(The registers 52e and 64e are "1" and the register 52'e is "0".) When the B side is selected, the through data is output as 8e.
Is forced. EXCON50e receives, for example, a binary signal of a luminance signal.
Can be used instead of the comparator 55e
You. Figure 25 shows the place where the above two processes were performed.
is there. FIG. 25 (a) shows black characters N, and FIG. 25 (b) shows hatched lines.
Judgment as character in Y, M, C data which is density data of part
Area, ie, character judgment part (* 2, * 3, * 6, * 7)
Is set to 0 by subtraction processing, and * 1 and * 4 are set by color residual removal processing.
* 1 ← * 0, * 4 ← * 5, resulting in 0,
Figure 25 (c) is required. On the other hand, for B and data as shown in FIG.
Only addition processing is applied to the character judgment unit (* 8, * 9, * 10, * 11).
The result is a black contoured output as shown in Figure 25.
You. Note that the color characters are changed as shown in FIG.
No further changes are made. [2] Edge enhancement or smoothing processing Here, edge enhancement and halftone dot processing are performed for the character determination unit.
For smoothing, and for other
Is performed. Character part → 3 of 25e, 27e, 29e since MjAR124 is “1”
3x3 edge enhancement 30e generated from the line signal
Output is selected by selector 42e and output from 43e
You. Here, the edge emphasis is applied to the mat as shown in Fig. 26.
It is obtained from the Rix and the formula. Halftone part → 27 since CSRN35e is “1” and MjAR21e is “0”
e is smoothed 31e
The data is output at the terminals 33e and 42e. Here, smoothing
Indicates that the pixel of interest is V, as shown in FIG._NTime (V_N+ V_{N + 1})
/ 2 to V_NProcessing, that is, smoothing of two pixels in main scanning
It is ging. This may result in halftone dots.
To prevent moiré. Other → Other parts are shaded even in the character part (character outline)
It is not a point part, specifically, a halftone part
Processing. At this time, both MjAR124 and SCRN35e are “0”.
Therefore, the 27e data is output directly from the video output 43e.
It is. If the character is a colored character, the character
No processing is performed. In the embodiment, an example in which color remaining is removed only in the main scanning direction is described.
As shown in the figure, the residual color removal
You may. [3] Character part 400 line (dpi) output processing LCHG140 is output from 48e in synchronization with video output 113
You. Specifically, the inverted signal of MjAR124 is output in synchronization with 43e
Is done. LCHG = 0 for text part, 200/40 for other parts
0 = “1”. As a result, the character portion determination unit, specifically, the outline portion of the character
400 lines (dpi), 200 lines for others
Dripping. Next, the character image synthesizing circuit F will be described. Fig. 28
(A) is processing of an image by a binary signal in the present apparatus,
It is a block diagram of a decoration circuit. Enter from image data input section
The input color image data 138 is supplied to the V input of the 3tol selector 45.
Entered into force. The other inputs A and B of the 3tol selector 45f
Lower part of the data read from memory 43f (A_n, B_n)
A in A out of 555f_nBut B is B_nIs V at the latch 44f
Latched by CLK117 and input. Therefore,
Selector X is connected to output Y of₀, X₁, J1, J2
V, A, or B is output (114). Data X_nIs
In this embodiment, the upper 2 bits of the data in the memory are added.
It is a mode signal that determines the modification and modification. 139 is the territory
FIG. 1 is a code signal output from the area signal generation circuit.
Controlled by CPU20 to switch in synchronization with VCLK117
And is input as an address of the memory 43f. sand
That is, for example, (X_Ten, A_Ten,
B_Ten) = (01, A_Ten, B_Ten), And write it in Fig. 29
As shown in (b), in synchronization with the scanning of the main scanning direction line 1
Then, "10" is added from the Q point to the code signal 139 from the P point to the Q point.
If "0" is given to the point R, the data X_n=
(0,1) is read and (A_n, B_n) Contains (A_Ten,
B_Ten) Is latched and output. 3tol sel
As shown in FIG. 28 (c), the truth table of the₁,
X₀) = (0,1) is the case of (B) and J1 is “1”.
The A input to Y, and therefore Y has a constant A_TenAnd J1
If "0", the V input is set to Y, so the input color
This means that the image data is output to the output 114 as it is.
You. Thus, for example, apple mosquitoes as shown in FIG.
(A_TenCharacter part with a value of)
Loose hair removal character synthesis is realized. Similarly, (X₁,
X₀) = (1,0), and the binary input is the same as J1 in FIG. 29 (C).
When such signals are input, the FIFOs 47f to 49f and the circuit 46
f (Detailed Fig. 28 (b)) shows that the signal
Generated according to the truth table of FIG. 28 (c), as shown in FIG.
Characters are output in the apple image
(Contour or bag letter). Similarly in FIG. 28 (D)
Is the rectangular area inside the apple (B_n)
The character inside is (A_n) Is output. Figure (A)
Is (X₁, X₀) = (0,0), ie any J1, J
No action is taken for the change of 2 depending on the binary signal.
Control. The expanded signal input to J2 is shown in Figure 28 (b).
According to the extension of 3 × 3 pixels, a hardware circuit is added.
It is easy to make it even larger by adding. Output color to be printed from I / O port 501 in Fig. 2
C0, C1 (366, 3) output in association with (Y, M, C, Bk)
67) is input to the lower 2 bits of the address of the memory 43f.
Therefore, according to the outputs of Y, M, C, and Bk, “0, 0”,
Since it changes to “0,1”, “1,0”, “1,1”, for example, yellow
(Y) At the time of output, addresses 0, 4, 8, 12, 16, ..., magenta (M)
Are 1,5,9,13,17 ... addresses, cyan (C) is 2,6,10,14,18 ...
For the address, black (Bk), addresses 3, 7, 11, 15, 19 ... are selected.
Therefore, the area and the area are designated by an operation instruction on the operation panel described later.
Area code that determines the corresponding memory address in the area
At the address corresponding to the signal 139, for example, X1 to X4 = "1,1"
(A1, A2, A3, A4) = (α1, α2, α3, α4), (B1, B2, B3,
B4) = (β1, β2, β3, β4)
When the J1 signal changes as shown in FIG. 29 (D), J1 becomes "Lo".
Section is compounded by (Y, M, C, Bk) = (α1, α2, α3, α4)
When the color is determined and J1 is “Hi”, (Y, M, C, Bk) =
The color is determined by (β1, β2, β3, β4). sand
That is, the output color can be arbitrarily determined based on the contents of the memory. on the other hand,
On the operation panel described later, Y, M, C, and Bk are
Is adjusted or set by the client. That is, each gradation 8bit
Since the numerical value is between 00 and 255,
The movement is a digital value, which is 2.55. Set value is (Y, M, C, Bk)
= (Y%, m%, c%, k%)
That is, the numerical value written to the memory is (2.55y,
2.55m, 2.55c, 2.55k).
The entered integer is written to the specified memory.
You. Further, if the adjustment mechanism adjusts in%, △%
Add 2.55 の to the fluctuation of (dense) or
Write the value obtained by subtraction (lightening) to memory
Good. In the truth table of FIG. 28 (c), the column of i
It is an input / output table of image gradation and resolution switching signal LCHG149.
X₁, X₀, J1, J2 output A or B to output Y
The output is "0" when V is output to Y, and the input is
Is output. LCHG149 is for example when printing at the time of output
This is a signal to switch the print density, and when LCHG = “0”,
For example, when 400 dpi and LCHG = "1", print at 200 dpi. Follow
Thus, when A or B is selected, LCHG = 0 means that the statement
400dpi in the inner area of the character that is synthesized, and the area other than the character
It means printing at 200dpi, characters keep high resolution,
The halftone section maintains a high gradation and outputs smoothly
It is controlled to be. As mentioned above, LCHG140 is
Based on the MJAR output from the character and image separation circuit I,
That is why the image is output from the image correction circuit E. <Image processing / editing circuit> Next, the image signal after the color balance adjustment is received at P
115 and gradation resolution switching signal LCHG141
It is input to the collecting circuit G. Rough image editing and processing circuit G
A schematic diagram is shown in FIG. Input image signal 115, gradation resolution switching signal LCHG14
1 is first input to the texture processing unit 101g. Tech
The texture processing section is roughly divided into texture patterns
Memory section 103g that stores data and notes that control it
RD, WR, address control unit 104g, input screen
Performs modulation processing on the image data using the stored pattern.
It is composed of an arithmetic circuit 105g. Texture treatment
The image data processed by the unit 101g is
And input to the taper processing unit 102g. Variable magnification, mosai
The tape and taper processing unit 102g has a double buffer memory 105.
a, 106g and a processing / control unit 107g.
The processing is performed independently by the CPU and output. Tech here
101g of processing unit and scaling, mosaic, taper processing
The processing unit 102g enables each process sent from the switching circuit N.
Independent by GHi1 (119) and GHi2 (149)
Area and texture processing and mosaic processing
It is configured to obtain. Also, gradation resolution switching input together with image data 155
The LCHG signal 141 changes the phase with the image signal in various processes.
It is processed while matching. Below is the image processing and editing circuit
G will be described in detail. <Texture processing section> The texture processing is a pattern written in the memory.
Read cyclically and modulate the video.
For example, the same processing as in the image shown in FIG.
Modulation is performed in a pattern as shown in FIG.
Such an output image is generated. FIG. 32 is a diagram for explaining the texture processing circuit.
Hereinafter, the modulation data 218g to the texture memory 113g
Writer and data from texture memory 113g
216g and image data 215g calculation section (texture processing)
I will explain separately. [Data writing section to texture memory 113g] When writing data, masking, under color removal,
Y + M + C / 3 is output by the color correction circuit D which performs
Input data from 01g. This data is sent to selector 202g.
Is selected. On the other hand, the data
220g is selected, ▲ ▼ of memory 113g and driver 203g
Is input to the enable signal. Memory address is horizontal
Vertical counter that counts up in synchronization with the start signal HSYNC
Counts in synchronization with the
Generated by the horizontal counter 211g to be
B is selected at 0g and input to the address of memory 113g.
You. In this way, the density pattern of the input image is stored in the memory.
Written to 113g. Usually this pattern is an input device,
For example, the position is designated by a digitizer and written. [Data Writing by CPU] CPU data is selected by the selector 202g. On the other hand,
A is selected by the collector 208g.
Input to the enable signal of the driver 203g. Memory add
For the address, A is selected by the selector 210g and the address of the memory 113g is selected.
Enter in the dress. In this way, any density pattern
Written to memory. (Texture memory 113g data 216g and image data 21
5g Operation Unit] This operation is realized by the operation unit 215g. This calculator is
Here, it is configured by a multiplier. Enable signal 12
Calculation of data 216g and 201g is performed only when 8g is active.
When the device is enabled, 201 goes through.
You. Also, 300g and 301g are the XOR and OR gates respectively, and the MJ signal 308
g, that is, the enable signal is generated using the character
Register "0" in register 304g "1" 305g
When set, the texturing process is
It is applied to parts other than On the other hand, register 304g “0” 30
When “0” is set to the register in 5g, texture processing is performed.
Only the part where the composite character signal is in the part to be applied
You. 302g uses GHi1 signal 307g, that is, a non-rectangular signal.
This is a part that generates a enable signal. Register 306g “0”
When GHi1 signal is enabled, texturing only
I'm sorry. At this time, enable 128 is always active
In other words, it is not affected by non-rectangular, that is, synchronized with HSNC
Non-rectangular texture processing is applied to enable
Signal GHi1 and enable 128 are the same as non-rectangular signals.
This is the expected texture processing. GHi1 has 31b
Using a tone signal, texture processing can be applied to only certain colors.
It can be carried out. LCHG_INSignal 141g is a gradation resolution switching signal,
LCHG delayed by 215g_OUTOutput from 350g
You. <Mosaic, scaling, taper processing unit> Next, mosaic, scaling, and taper of the image processing and editing circuit G
-About the outline operation of the processing unit G12 using FIG.
Will be described. Images input to the mosaic, scaling, and taper processing unit 102g
The image data 126g and the LCHG signal 350g are first mosaic processed
Input to the unit 401g. The mosaic processing unit 401 g
The Mj signal 145 output from the circuit F and the switching circuit N
Area signal GHi2149, and the model from the mosaic processing control unit 402g.
Whether or not mosaic processing is performed by clock MCLK
The size of the mosaic in the main scanning direction, the synthesis of characters, etc. were performed.
Then, it is input to the 1to2 selector 403g. Mosaic here
The size of the processing in the main scanning direction is the mosaic clock MCLK.
It is variable by controlling. Mosaic clot
The control of the clock MCLK will be described later in detail. In the 1to2 selector 403g, HSYNC118 is set to D flip-flop.
The line memory select signal LM divided by the tap 406G
SEL converts the input image signal and LCHG signal to Y1,2Y
Output to either of Output from Y1 of 1to2 selector 403g is line memory
Connected to A of A404g and 2to1 selector 407g
You. The output from Y2 is line memory B405g and 2
Connected to B of to1 selector 407g. Line memo
When an image is sent from selector 403g to Lee A,
In-memory A404g is in write mode and
The memory B405g enters the read mode. Similarly,
The image is sent from the selector 403g to the line memory B405g.
Line memory B is in write mode and
The in-memory A404g is in the read mode. like this
And alternately from line memory A404g and line memory B405g
The image data to be read is stored in the D-frame by the 2to1 selector 407g.
By the inverted signal of the output LMSEL signal of the flip-flop 406g
It is output as continuous image data while switching.
The output image signal from the 2to1 selector 407g is
The output is performed after a predetermined enlargement process is performed by the processing unit 414g. Next, write / read control of these memories
State. First, when writing and reading, the line memory
The address given to A404g and line memory B405g is one scan
In synchronization with HSYNC, which is the reference for
Up / down counter to increment or decrement
-409g and 410g. Line memory add
Counter enable signal output from the
And the write address generated from the scaling control unit 415g.
Control signal WENB for controlling the
The address signal is controlled by the control signal RENB for controlling the address.
The operation of the counter (409g, 410g) is controlled. these
Each of the controlled address signals is a 2to1 selector 40
Input to 7g and 408g. The 2to1 selectors 407g and 408g
Line memory select signal LMSEL
When the memory A404g is in the read mode,
In-memory A404g, write address to line memory B405
Give to g. When the line memory A404g is in the write mode,
The reverse operation is performed. Next, line memories A and
In-memory B memory write pulse WEA, WEB is variable magnification system
It is output from the control unit 415g. Memory write pulse WEA,
WEB is used to reduce the input image, and mosaic
Mosaic in sub-scanning direction output from processing control unit 402g
It is controlled when performing mosaic processing by the long control signal MOZWE.
You. Next, a detailed description of these operations will be described below. <Mosaic processing> Mosaic processing basically repeats one image data.
This is achieved by repeatedly outputting. This mosaic
The processing operation will be described with reference to FIG. First, the mosaic processing control unit 402g performs main scanning and sub-scanning.
Mosaic processing control is performed independently. First, the desired
The variables corresponding to the mosaic size are
Switch 501g (for main scanning) and Latch 502g (for sub-scanning)
CPU set. First, mosaic processing in the main scanning direction
About the same data at multiple addresses in the line memory.
By writing continuously to the
As for the Iku processing, the line
By thinning out the writing to Molly every predetermined line
I do. (Main scanning direction mosaic processing) A variable corresponding to the mosaic width in the main scanning direction is
Set with 501g of vine. Latch 501g is main scanning mosai
Connected to the Width control counter 504g.
And the counter value of 504g
It is configured to be loaded. Latch 501g per HSYNC
The counter 504g loads the value set in
Undo the Ripple Carry with 502g of NOR Gate and
And output to AND gate 509g. Mosa from AND gate 509g
The clock MCLK for the output is the ripple clock from the counter 504g.
It is a signal covered with the image clock CLK by Yary,
MCLK is output only when the ripple carry is output. AN
The MCLK output from the D gate 509g is then sent to the mosaic processing unit 4
Entered in 01g. The mosaic processing unit 401g includes two D flip-flops 51.
0, output flip-flop 510g regardless of Mj signal
You. When the GHi2 signal 149 is 1 and the Mj signal is 0,
511g flip-flop controlled by clock MCLK
Is output. When the Mj signal is 1, the output is
The signal from the lip flop 510g is output. In this control
From the mosaic processing image in the main scanning direction,
It is possible to output without mosaic processing. Sand
In the character synthesizing circuit F in the preceding stage as shown in FIG.
For the synthesized characters, the image
Only mosaic processing is possible. From selector 512g
The output is input to the 2to1 selector 403g shown in FIG.
Is forced. Thus, mosaic processing in the main scanning direction is performed.
Be done. (Sub-scanning direction mosaic processing)
Control by 502g, counter 505g, NOR gate 503g
I control The sub-scan mosaic width control counter is
No. 144, 511g, selector 512g, AND gate 514g, invar
Data 513g. Flip Flop 510g, 5
11g has a gradation resolution switching signal LCHG in addition to the image signal.
510g flip flop is connected to the image clock
CLK and flip-flop 511g are mosaic processing clocks.
Image data and LCHG signal input by the lock MCLK
Hold the issue. In other words, gradation resolution cutting corresponding to one pixel
The flip-flop is performed when the replacement signal LCHG is in phase.
510g and 511g are held during each period of CLK and MCLK.
ing. Each retained image signal and LCHG signal
Is input to the 2to1 selector 512g. Mosaic area information
The output is turned off by the signal GHi2 and the binary character signal Mj.
Have been replaced. Selector 512gThe operation shown in the truth table in the figure on the left
Data at 513g. That is, the mosaic area signal
Synchronize when GHi2 signal 149 is 0 and count HSYNC118
To generate a ripple carry pulse.
I have. Ripple carry pulse is applied to OR gate 508g
The inverted signal ▲ ▼ of the equal area signal GHi2149 and
Character signal Mj is input. The sub-scan mosaic control signal MOZWE signal is a truth table in the left figure.
Is performed as shown in FIG. Such a combination
The MOZWE signal, which is output at the same time, is input to the scaling controller 415g.
Line memory (not shown) with NAND gate 515g
The write pulse generated by the pulse generating circuit is controlled.
A line memory write pulse generation circuit is generally
The output clock of the rate multiplier used for
It is a circuit with variable torque. In this embodiment, the main features of the invention
Therefore, detailed description is omitted. MOZWE signal above
The WR pulse controlled by is switched next for each HSYNC118
1to2 selection by the switching signal LMSEL signal
The WR pulse is output alternately to WEA and WEB from the detector. Less than
With the above control, the mosaic area signal GHi2 signal 149 is “1”
Write to memory when Mj signal becomes “1”
The mosaic processing image in the sub-scanning direction.
Can be output without mosaic processing.
You. FIG. 35 (a) shows the case where the mosaic processing is actually performed.
Showing the distribution of density values for each pixel for a recording color with a color
It is. In the mosaic processing of FIG. 35, a 3 × 3 image
Each pixel in the elementary block is set to a representative pixel value. This place
For the sake of simplicity, for character A, that is, for the pixels in the shaded area,
Based on the character signal Mj, mosaic processing is not performed.
ing. In other words, the combined character and the mosaic processing area
In case of wrapping, the character can be given priority.
You. Therefore, even if mosaic processing is performed,
Only an image can be formed so that it can be read.
Note that the mosaic area is not limited to a rectangle,
Mosaic processing can also be performed on a rectangular area. (Italic, taper processing) Next, first, the italic processing will be described with reference to FIGS. 33 and 36.
explain. The inside of the line memory address control unit 413g shown in FIG.
This is shown in FIG. This line memory address controller 413g
Is the enable for the write and read counters 409g and 410g
Signal in the main scanning line.
Address to write to or read from line memory
Controlling the counter enables movement, italics, etc.
are doing. First, using FIG. 36, the enable control signal
The generation circuit will be described. The output of the counter 701g becomes 0 at HSYNC.
Image clock, which is a 701g clock on the counter
Count 117. The output Q of the counter 701g is equal
Input to the surface comparators 706g, 708g, 709g, and 710g.
You. A input side of each comparator except comparator 709g
Are connected to CPUBUS, which are not shown
Connected to the Latch, with any set values and counts
When the output of the data 701g matches, a pulse is output. etc
The output of the surface comparator 706g is a JK flip-flop 70
8g J and comparator 707g connected to K input
The comparator 706g outputs a pulse before the
JK flip-flop until the 707g outputs a pulse.
The rope 708g is configured to output 1. this
The output is used as a write address counter control signal.
And the write address
The counter becomes active, and the address is
Occurs. About the read address counter control signal
Similarly, the read address counter is controlled.
Here, the input signal to A of the comparator 709g is processed in italics.
Input to the comparator depending on whether or not
Selector 703g is connected to make the force value different
You. Here, when the italic processing is not performed, a CPUB (not shown)
The value set in the latch connected to the US is
703g is input to the A input.
The A input is changed to the selector 703g by the output select signal.
Output from Subsequent operations are performed by the comparator 706 described above.
g, 707g. Next, when performing italic,
The value input to A of 703g is the preset value.
Is also input to the selector 702g. Selector 702
g, 703g select signal selects B input, select
The output of the 702g is an adder 704g, also shown
An addition with the value set for the missing latch is performed. here
This value indicates the amount of change per line due to the italic angle.
If the desired angle is θ, it can be obtained by tan θ. Addition
The result is 708g of flip flop with HSYNC118 clock.
The value is input and held for one main scan. Frippov
The output of the drop 705g is connected to the B input of the selector 702g and the
It is connected to the B input of the collector 703g. This addition operation
Is repeated to select the selector to the comparator 709.
Output value changes at a fixed rate for each scan.
The start of the read address counter is set to HS
It can be changed at a fixed rate from YNC. This
HSYN for reading from line memories A404g and B405g
It is shifted with respect to C, and italic processing is possible.
Becomes In addition, the above-mentioned change amount may be either positive or negative,
If positive, readout is not in the direction away from HSYNC
If it is negative, it shifts toward HSYNC. Ma
In addition, the select signals of the selectors 702g and 703g are synchronized with HSYNC.
By changing it, italics can be partially used. In general, the 0th-order, 1st-order, and SINC complement
Although there is a method such as an interval, it is different from the gist of the present invention.
Description is omitted. While performing italic processing, every scan line
Change the magnification in the main scanning direction in synchronization with HSYNC.
This enables taper processing. In these processes, the input gradation resolution
The replacement signal is processed while adjusting the phase with the image signal.
Output image data 114 and output gradation resolution switching signal LCHG142
Output to edge enhancement circuit. The conceptual diagram of the italic processing and taper processing explained above
These are shown in FIGS. FIG. 37 (a) shows a mask for limiting the area of an arbitrary shape.
Bitmap memory 573L for discs and details of its control
FIG. This memory is, for example,
With the shape as shown in (e), color conversion and image
Taking (non-rectangular cropping), painting the image (non-rectangular
ON of various image processing and editing (paint)
), OFF (not processed) switching signal
You. That is, in FIG. 2, the color conversion circuit B, the color correction
Circuit D, character synthesis circuit F, image processing and editing circuit G, color
-Switching of the balance circuit P and the external device image synthesis circuit 502
BHi123, DHi122, FHi121, GHi
119, PHi145, and AHi148 signal lines. Now, the mask is one block of 4 × 4 pixels as shown in FIG.
And one block of bit map memory in one block.
Since it is configured to correspond, for example, 16pel / mm
Image with a pixel density of 297 mm x 420 mm (A3 size)
Then, (297 × 420 × 16 × 16) ÷ 16 ≒ 2Mbit,
For example, 1Mbit dynamic RAM, 2 chips
You. Signal 132 input to FIFO559L in FIG.
Is a data input line for mask generation as described above.
For example, the output 421 of the binarization circuit 532 in FIG.
When input as 2, first,
Buffer for 1 bit x 4 lines to count the number of "1"
Input to 559L, 560L, 561L, 562L. FIFO559L ~ 562L
Is as shown in the figure, 559L output is 560L input, 560L output
Are connected to the input of 561L and so on, and the output of each FIFO is
4-bit parallel latch 563L to 565L, latch by VCLK
(Refer to the timing chart of FIG. 37 (d)). FI
FO output 615L and Latch 563L, 564L, 565L output 616
L, 617L, 618L are added by adders 566L, 567L, 568L (signal
No. 602L), I / O by CPU22 in comparator 569L
The value set via port 25L (for example, “12”) and its value
Are compared. That is, here, a 4 × 4 block
It is determined whether the number of 1s in the check is greater than a predetermined number. In FIG. 37 (d), the number of "1" in block N is
Is "14", the number of 1s in block (N + 1) is "4"?
The output 603L of the comparator 569L in FIG.
When 602L is “14”, it is larger than “12”, so it is “1” and “4”
Is "0" because it is smaller than "12", and therefore
With the 605L latch pulse shown in (d), the 570L latch is 4 × 4.
Is latched once in one block, and the Q output of the latch 570 is
Memory 573L D_INInput, ie, mask creation data and
Become. 580L generates the address of the mask memory in the main scanning direction.
H address counter to be generated.
Since one address is assigned, the pixel clock VCLK60
8 is counted up by the clock divided by 4 with the frequency divider 577L.
Will be Similarly, 575L is a mask memory in the sub-scanning direction.
This is an address counter that generates addresses.
Therefore, the synchronization signal HSYNC of each line is set to 4 by the frequency divider 574L.
Counted up by the divided clock, H address, V
The operation of the address is the counting (addition) of “1” in 4 × 4 blocks.
Calculation) is controlled so as to synchronize with the operation. Also, the lower 2 bits output of the V address counter, 610
L and 611L are NORed by NOR gate 572L, and the clock is divided by 4
The signal 606L that gates the 607L
As shown in Fig. 37 (c), timing chart by 571L
In order for a single latch to be performed in 4 × 4 blocks,
The switch signal 605L is generated. Also, 616L is CPU bus 22
Data bus included in (Fig. 2), 613L is the same
This is the address bus, and signal 615L is
This is the pulse WR. WR from CPU22 to memory 573L
During operation, the write pulse becomes “Lo” and the gate 578
L, 576L, 581L open, address bus and data from CPU22
The bus is connected to the memory 573L, and a predetermined data is randomly
And the H address counter and V address
WR (Light), RD Lee
Gate 576 'connected to I / O port 25
Gates 576'L and 582L are opened by the L and 582L control lines,
The sensible address is supplied to the memory 573L. For example, the output 421 of the binarized output 532 or the CPU 22
If a mask as shown in FIG. 39 is formed,
You can cut out and combine images based on the rear.
You. Further, the bitmap memory of FIG.
At the same time, thinning or interpolation in both H and V directions
Can be read. That is, in FIG.
Of the H or V address counter (580L, 575L) in FIG.
As shown in detail, for example, at the time of reduction, B of selector 634L
MULSEL636L is set to "0" to select an input.
The 635L is a thinning circuit (rate multiple) for the input clock 614L.
Lier), as shown in Figure 41 (timing diagram)
For example, thinning is performed so that CLK is output once every three times, for example.
(Setting depends on I / O port 641L) (637L). 630L
For example, "2" is set, and the thinned output 637L
Output 638L and 63 of address counter 632L only when output
The value set to 0L (for example, “2”) is added and the result is
Loaded to counter. Therefore, as shown in FIG.
1 → 2 → 3 → 5 → 6 → 7 → 9… every 3 clocks
In addition, since it advances by "+2", it is reduced by 80%. On the other hand, MU
Since LSEL = “1” and the A input 614L is selected, the 41st
As shown by the timing chart in the figure, the address counter
Go in the order of 1 → 2 → 3 → 3 → 4 → 5 → 6 → 6 →. FIG. 40 shows the H address counter 580L and the V address shown in FIG. 37.
It is the details of the counter 575L and the hardware circuit is the same,
The description is limited to FIG. 37 only. As a result, the non-rectangular area immediately input as shown in FIG.
Since expansion 2 and reduction 1 are generated for region 1,
Once you have entered the rectangular area, perform a new input operation
Instead, one mask plane can be changed according to various magnifications.
Can be doubled. Next, a binarizing circuit (532 in FIG. 2) and a high-density binary memory
The circuit K will be described. FIG. 43 (a) shows a binarization circuit.
532 is a threshold for the video signal 113 output from the character image correction circuit E.
It is a circuit that obtains a binarized signal by comparing with a value 141k.
Is set by the CPU bus 22 in conjunction with the operation unit. You
That is, the threshold value is 43rd for the amplitude value of input data = 256.
When the memory of the operation unit in Fig. (C) is designated as M (middle point)
It is “128”, and as the scale moves in the + direction,
Changes by “-30” in increments of “+30”
Change. Therefore, “weak → −2 → −1 → M → + 1 → + 2
The threshold value is “218 → 188 → 158 → 128 → 98 →
68 → 38 ". As shown in FIG. 43 (a), the CPU bus 22
Has two thresholds, and the selector 35k
Is switched by the switching signal 151,
Is set to the comparator 32k. The switching signal 151 is
Only within the specific area set by the Tiger 58, another threshold
Is set, for example, a single color area of the original
The threshold is set relatively low and the mixed color area is set relatively high.
Therefore, a uniform binary signal is always obtained regardless of the original color.
Can be made. The memory circuit K outputs the binarized signal 421 to 130.
Memory for storing one page of images
Since the device handles images at A3, 400 (dpi),
It has 32Mbit. FIG. 43 (b) shows details of the memory circuit K.
Details will be described. Input data D_IN130 is when writing to memory,
Gated by enable signal HE528
Sometimes, the W / 1 output of IO port 23k controlled by CPU 20
When "Hi", it is input to the memory unit 37k. Simultaneous image dripping
Main scan (horizontal scan) direction from direct sync signal ITOP144
HSYNC118 is counted and the vertical address
Cause a problem. V address counter 35k, HSYNC118
Counts the image transfer clock VCLK117, and
Count addresses in the direction. H address counter
Address corresponding to the storage of the image data is generated
You. Memory WP input at this time (write timing signal)
The 551k has a clock in phase with clock VCLK117.
The input data Di is sequentially input to the memory
Stored at 37k (timing diagram, FIG. 44). Memory 37k
When reading data from the controller, set the control signal W / 1 to “L”.
o ", output data D_OUTBut
Is read. However, data writing, reading,
Since both are performed by HE528, for example, as shown in Fig. 44
D HE528_TwoAt the input timing of, rise to “Hi” and D_m
Falling to “Lo” at the input timing of
Is D_TwoFrom D_mOnly images up to are input, D₀, D₁And
And D_{m + 1}After that, data is not written, and data “0” is written instead.
Be included. The same applies to reading, when HE goes to “Hi”.
The data is read as “0” except during the section where
You. HE is output from an area signal generation circuit 17 described later.
That is, for example, a character original as shown in FIG.
When placed, the HE for writing the binarized signal is
If it is generated as described above, a binary image is formed with only the character part as in A '.
Can be stored in the memory. Just unnecessary characters
Etc. can be erased and written to the memory. Further, an address counter for reading data of the memory 37k is used.
41k and 36k have the same configuration as in FIG.
Since they operate at the same timing, 37k
It is possible to scale the binary data read from
You. Therefore, as shown in FIG.
The binary character image shown in FIG.
When compositing with the image, reduce both as shown in (C)
It can be synthesized or the size of the sketch ((A)) as shown in (D)
Enlarge only the character part to be synthesized without changing the size
Compositing becomes possible. FIG. 47 shows a non-rectangular shape stored at the equivalent of 100 dpi described above.
Binary bitmap memory L for mask (FIG. 2) and characters
Of the data from the line image 400 dpi binary memory K (FIG. 2)
Distribution to each image processing block A, B, D, F, P, G and binarization
The distribution of the selected video image to the memories L and K
Switching circuit. Non-rectangular stored in memory L
The mask data for limiting the area is, for example, as described above.
It is sent to the color conversion circuit B (BHi 123).
Color conversion is applied only inside the shape as shown in FIG. No.
In FIG. 47, ln is an I / O port connected to the CPU bus 22, 8n
13n is a 2to1 selector, when the switching input S = "9"
A input, output B input to Y when S = "0"
Have been. So for example, as mentioned above, a 100dpi mask
To send the output of the memory L to the color conversion circuit B,
A is selected in the collector 9n, that is, 28n = "1", AND
In the gate 3n, the 21n input may be set to "1". As well
In addition, other signals can be arbitrarily controlled by 16n to 31n. I /
Outputs of O port n1, 30n and 31n are binarization circuits 532 (Fig. 2)
Control signal for storing the output of the binary memory L or K
Signal 30n = "1", the binary input 421 is 100dpi memory L
To be input to the 400dpi memory K when 31n = "1"
Become. By the way, when AHi148 = "1",
When the output image data is synthesized and BHi123 = "1",
Perform color conversion as described above, and when DHi122 = "1", perform color correction
Monochrome image data is calculated and output from the circuit. Less than
The lower FHi 121, PHi 145, GHi1 119, GHi2 149 are respectively
Character composition, color balance change, texture processing,
Used for zig processing. In this way, two 100dpi memory L and 400dpi memory K
400dpi memory with high density of character information
Input K and input area information (including rectangle and non-rectangle)
By inputting to the memory L, a predetermined area, especially a non-rectangular area
Character composition can also be performed on the area. In addition, by having multiple bitmap memories,
The following color mado processing is also possible. FIG. 49 is a diagram for explaining the area signal generation circuit J.
You. The region is, for example, a portion such as a hatched portion in FIG. 49 (e).
In the sub-scanning direction A → B, every line
Like the timing chart AREA in Fig. 49 (e)
The signal distinguishes them from other areas. Each area is a digital
Specified in Isa 58. FIGS. 49 (a) to (d) show this area.
The position, section length, and number of sections of the
It shows the configuration that can be obtained in a logmable and many ways.
You. In this configuration, one area signal is accessed by the CPU.
Generated by one bit of possible RAM, for example, n regions
N-bit RAM to obtain the area signals AREA0 to AREAn
(Fig. 49 (d) 60j, 61j). Now, the fourth
9 When the area signals AREA0 and AREAan are obtained as shown in FIG.
Then, RAM address x₁, x_ThreeSet "1" to bit 0 of
Bits 0 of the remaining addresses are all set to "0". Meanwhile, RA
M address 1, x₁, x_Two, x_FourSet "1" to the other address
All bits n are set to "0". One based on HSYNC118
The data in RAM is sequentially sequenced in synchronization with the constant clock 117.
When the data is read out sequentially, for example, as shown in FIG.
And the address x₁And x_ThreeAt this point, data "1" is read.
The read data is shown in FIG. 49 (d) 62j-0 to 62j.
-N JK flip-flops
Therefore, the output toggles, that is, “1” is read from RAM.
When CLK is input and the output is “0” → “1”, “1” →
It changes to “0” and the interval signal like AERA0, thus the area
A signal is generated. In addition, data
= “0”, no area section occurs and area setting is performed
Not. FIG. 47 (d) shows this circuit configuration.
This is the RAM described above. This is a fast switching of the area section
For example, to obtain data from RAMA60j every line
While reading data to RAMB61j, CPU20 (No.
2) Memory write operation for setting a different area
Operation, the section is generated alternately, and the CPU
Switches memory writing. Therefore, the inclination of FIG.
When the line area is specified, RA is set as A → B → A → B → A
MA and RAMB are switched, which is shown in Fig. 49 (d).
And (C_Three, C_Four, C_Five) = (0,1,0)
The output of the counter that is
given to RAMA60j through j (Aa), gate 66j open, gate
The port 68j is closed and read from RAMA60j and all bits
The width and n bits are JK flip-flops 62j-0 to 62j-
n, and the area of AREA0-AREAn according to the set value.
An interim signal is generated. Writing from CPU to B
Address bus A-Bus, data bus D-Bus and
Access signal /. Conversely, set to RAMB61j
To generate an interval signal based on the data (C_Three, C
_Four, C_Five) = (1,0,1) can be done in the same way
Can write data to RAMA60j. Reference numeral 58 denotes a digitizer for specifying an area.
Enter the coordinates of the specified position from 0 through the I / O port
You. For example, in FIG. 50, if two points A and B are specified, A (X₁,
Y_Two), B (X_Two, Y₁) Is input. FIG. 51 shows external devices connected to the image processing system.
Interface for bidirectional communication of image data with
5 shows an ace circuit M. 1m is the I / O port connected to CPU bus 22.
And the direction of each data bus A0-C0, A1-C1, D
Control signals 5m to 9m are output. 2m and 3m are output dry
A bus buffer having a state control signal E.
The direction can be changed by input. 2m, 3m is E
When input is “1”, signal is output. When input is “0”, output is high.
It becomes an impedance state. 10m has 3 parallel inputs
3to1 to select one by selecting signal 6m, 7m from force A, B, C
It is a selector. Basically in this circuit, 1. (A0, B0, C0) → (A1, B1, C1), 2. (A1, B1, C1) → D
There is a bus flow. Each of the truth values in Figure 52
It is controlled by the CPU 20 as shown in the table. With this system
Through external devices A1, A2, A3 as shown in Fig. 53
The input image is rectangular as shown in FIG.
And a non-rectangular shape as shown in FIG.
In the case of inputting a rectangle as shown in FIG.
Set the switching input of the selector 503 so that A is selected.
Outputs control signal 147 from I / O port 501 to set it to “1”
I do. At the same time, it corresponds to the area to be combined. Area signal generation
Before a predetermined address of the RAMs 60j and 61j (FIG. 51) in the circuit J
As described above, writing predetermined data from the CPU
Thus, a rectangular area signal 129 is generated. From an external device
In the area where the image input 128 is selected by the selector 507, the image
Not only image data 128 but also gradation and resolution switching signal 140
Switch at the same time. That is, images from external devices
The color of the image read from the platen
The character area signal detected from the decomposition signal, MIAR 124 (No.
2). Tone and resolution switching signal
By stopping and forcibly setting it to “Hi”, an external device that is fitted
To smoothly output the image area from the imager in high gradation
I have to. Also, as described with reference to FIG.
Bit map mask signal AHi 148 selector from L
When selected by signal 147 at 503, as shown in FIG. 53 (B)
Image synthesis from various external devices is realized. <Overview of Operation Section> FIG. 54 shows an overview of the main body operation section 1000 of this embodiment. Ki
Reference numeral 1100 denotes a copy start key. Key 1101 is reset
Key to change all settings on the operation unit to the values at power-on.
I will return. Key 1102 is a clear stop key for specifying the number of sheets
Used when resetting input values and canceling copy operation
I do. Keys 1103 group are input by ten keys
Used to enter numeric values. Key 1104 is the document size detection key.
It is. A key 1105 is a center movement designation key. Ki
Reference numeral 1106 denotes an ACS function (black original recognition) key. ACS is ON
At this time, in the case of a black single-color original, copying is performed in black. Key 1107 is
Remote key for transferring control to connected devices
Is the key. Key 1108 is a preheat key. Reference numeral 1109 denotes a liquid crystal screen for displaying various information. Also
The surface of the screen is a transparent touch panel, which you press with your finger
And its coordinate values are taken in. In the standard state, the magnification, selected paper size, number of copies,
The copy density is displayed. Set various copy modes
During the setting, screens required for mode setting are sequentially displayed.
(Use the keys displayed on the screen to set the copy mode.
Do) Also, display the self-diagnosis display screen of the guide screen.
You. A key 1110 is a zoom key for specifying a magnification ratio.
Enter key to mode. Key 1111 is Zoom Pro
It is a gram key, and it is scaled from the original copy size
Enter key to calculate the rate. Key 1112
Is an enlarged continuous shooting key.
It is. Key 1113 is a key for setting inset synthesis
is there. A key 1114 is a key to be set in character synthesis. Key
Reference numeral 1115 denotes a key for setting a color balance. Key 1116
Is a key to set the color mode such as monochrome / negative / positive reversal.
It is. Key 1117 is a user's color key.
Any color mode can be set. Key 1118 is paint key
And you can set the paint mode. Key 1119 is color
This key is used to set the conversion mode. Key 1120 is in contour mode
Key to set the password. Key 1121 sets mirror image mode
I do. Trim and mask with keys 1124 and 1123
Specify the password. Specify the area with key 1122,
The internal processing can be specified differently from other parts.
Key 1129 is used to perform operations such as reading texture images.
Enter key to enter mode. Key 1128 is mosaic
Enter key for mosaic mode such as changing size
You. Key 1127 is a mode to adjust the edge sharpness of the output image.
Enter key to do. Key 1126 is
Setting the image repeat mode to output the image repeatedly
Is the key to do. Key 1125 is for applying italic / taper processing etc. to the image
Key. Key 1135 is used to change the movement mode
Is the key. Key 1134 is for setting continuous page copying, arbitrary division, etc.
Key 1133 is used to make settings relating to the projector.
Key 1132 is a mode to control the optional connected device.
Enter key to the mode. Key 1131 is the recall key
Thus, the settings up to three times before can be called. Ki
-1130 is an asterisk key. Keys 136-1139 are
The mode memory that has been registered using the memory key
Used when calling. Keys 1140-1143 are the program
The operation program registered with the memory call key
Used when calling. <Color Conversion Operation Procedure> The procedure of the color conversion operation will be described with reference to FIG. First, press the color conversion key 1119 on the main unit operation panel to display
The unit 1109 is displayed as P050. Manuscript on digitizer
And specify the color before conversion with a pen. End input
And the screen of P051 is displayed, where the touch key 1050 and the touch
Adjust the width of the color before conversion using Chikey 1051, and complete the setting
Then press the touch key 1052. The screen changes to P052 and after conversion
Touch key 1053 and touch
Use the touchkey 1054 to select. If you select with shading
The color after conversion also has a gradation according to the shade of the color before conversion.
It becomes That is, the above-described gradation color conversion is performed.
You. On the other hand, if you select no shading,
Is converted. If you select “With / Without shading”, the image of P053
Select the type of color after conversion. 10 in P053
If you select 55, the operator can specify any color in P054.
You. Pressing the color adjustment key moves to P055, where Y, M, C, Bk
You can make color adjustments in 1% increments for each
You. Also, if you press 1056 on P053, it will move to P056 and point pen
Use to specify the desired color of the original on the digitizer. Also next
The color shading can be adjusted with P057. If you press 1057 in P053, the display moves to P058,
Can be selected by number. <Procedure for specifying the trimming area> The trimming (macro) is now described with reference to FIGS. 56 and 57.
As for the king, please refer to the section
The same procedure is applied to the minute processing and the like. ) About the procedure for specifying the area
Will be described. Press the trimming key 1124 on the operation panel 1000 to display
When the part 1109 becomes P001, use a digitizer to
If you enter two diagonal points, the screen changes to P002, and then
You can enter the rear. Also specify multiple areas
Area key 1001 before P001, then area key
If you press 1002, each in XY coordinates like P002
Can be confirmed. On the other hand, in the present embodiment, the bit map memory
Can be used to specify a non-rectangular area. Picture of P001
While the screen is displayed, press the touch key 1003 to move to P003. here
Choose a shape. Input required coordinate values for circles, ellipses, R rectangles, etc.
When it is calculated, the shape is expanded to bit map memory by calculation.
Go. If the shape is free, use a digitizer to
Continuously obtain coordinate values by tracing the desired shape with the tip pen
Input, process the value and record it on the bitmap.
Good. Hereinafter, each of the non-rectangular area designations will be described. (Circular area designation) When the key 1004 is pressed in P003, the display 1109 moves to P004 and the circle
Shape area can be specified. The following is the flow chart of Fig. 58 for the circular area designation.
This will be described with reference to FIG. In S101, the digital
The center point is input from the terminal 58 (P004). Next, the display unit 1109
Moves to P005 and should be specified from digitizer 58 in S103.
One point on the circumference of a circle having a radius is input. Above in S105
Fig. 2 Bitmap memory L (100dpi2 value)
The CPU 20 calculates the coordinate values on the memory). In S107, the coordinate value of another point on the circumference is calculated. Next
In S109, select the bank of bitmap memory L,
In S111, the result of the above operation is
Input to the memory L. In FIG. 37 (A), the CPU DAT
A 616L, Driver 578L, 604L, Bituminmatsu
Is written to the memory. Address control was mentioned above
It is omitted because it is similar to. This is all points on the circumference
Is repeated (S113), and the circular area designation ends. It should be noted that, as described above, it is
Instead, a template for two points of information entered in advance
The plate information is stored in ROM11, and these two points are
Bits can be directly calculated without calculation by specifying with the Tiza
It is also possible to write the data in the map memory L. (Oval area specification) Pressing the key 1005 in P003 moves to P007. The following
This will be described with reference to the flowchart in FIG. First, two diagonal points of the largest rectangular area inscribed in the ellipse in S202
Is specified by the digitizer 58. Below the circumference
S206 to S212 in the same manner as in the case of the circular area designation.
Is written to the bit map memory L by the following procedure. Next, the straight line portion is stored in the memory L in the steps S214 to S220.
Write and end the area specification. Like the case of a circle
First, store it in ROM 21 as template information
You can also. (R rectangular area specification)
The description is omitted because it is similar to the case. Note that the case of a circle, an ellipse, and an R rectangle has been described above as an example.
However, the same template information is used for other non-rectangular areas.
Of course, it can be specified based on. In P006, P008, P010, and P102, the
Press A key (1009-1012) on bitmap memory
Partial erasure can be performed. Therefore, even if you make a specification mistake,
Only point specification can be cleared and only two point specification can be performed again
You. It is also possible to specify multiple areas continuously.
Wear. When multiple areas are specified, duplicate areas
When performing this processing, the processing of the area specified later is performed.
Management takes precedence. However, this gives priority to the one specified earlier
You may decide to do so. With the above settings, trimming with an oval
An example of the force is shown in FIG. <Operation procedure related to character synthesis> The character synthesis will be described below with reference to FIGS. 60, 61 and 62.
The following describes the procedure for setting the operation. Character combination on the control panel
When you press the Enter key 1114, the LCD display 1109 displays like P020.
Is shown. The character document 1201 to be synthesized on the platen
Press the touch key 120 to remove the text document
Image processing, and the image information is stored in the aforementioned bitmap memo.
Re-stored in FIG. The specific means of processing are described above.
Avoid duplication. At this time, specify the range of the image to be stored.
Press the touch key 1021 in P020 to set the P021 screen
And place the text document 1201 on the digitizer 58,
Specify the area with two points using the digitizer's point pen
You. When the specification is completed, the display will change to P022,
Read within the range specified by Touch key 1023 and Touch key 1024.
Read (trimming) or outside the specified range
Select whether to remove (masking). In addition, text manuscript
Depending on the character part in the text original during the aforementioned binarization processing,
Some are difficult to extract. In this case P020
Use the middle touch key 1022 to move to the screen of P023, and
Touch slice level 1025 and touch key
It can be adjusted in 1026. Adjust the slice level manually as described above.
Suitable for the color and thickness of the text on the original
It is possible to perform an appropriate binarization process. Furthermore, press the touch key 1027, and press P024 'and P025'
By specifying the area, the partial slice
It is possible to change the bell. In this way, specify the area and slice only that part
By changing the level, for example, yellow
Even if there were colored letters, that of black and yellow letters
By setting separate and appropriate slice levels for each
This makes it possible to perform good binarization processing on the entire character.
Wear. When the reading of the text original is completed, the display unit 1109 displays the P024 in FIG. 61.
become that way. Touch key 1027 in P024 to select
Press to move to the P025 screen, where the color of the
Choose from the colors that are available. Also, partially change the text color
You can change it.In that case, press the touch key 1029.
Then, move to the screen of P027, specify the area, and then
Select the text color on the screen. Of the characters to be synthesized further
Color border processing can be added to borders,
Touch screen 1031 in P030 to go to the screen of P032.
Select the border color. At this time you can adjust the color
Is the same as in the above color conversion. Plus Touch Key 10
Press 33 to adjust the border width on the screen of P041.
You. Next, add color shading processing to the rectangular area containing the character to be synthesized.
(Hereinafter referred to as “mad processing”) will be described. P024
Press the touch key 1028 inside to move to the screen of P034, and
Specify. Mad processing is performed within the range specified here.
You. When the area specification is completed, select the character color with P037
Press the touch key 1032 to move to the screen of P039,
Select In the above color selection, for example, on the screen of P025
Is pressed by pressing the color adjustment key of the touch key 1030.
To change the color tone of the selected color
Has become. Character synthesis is performed according to the procedure described above. Actually set
FIG. 62 shows an output example in the case of performing the above. It should be noted that the area is specified in addition to the rectangular area as described above.
A non-rectangular area can also be specified. <Texture processing setting procedure> Next, the texture processing will be described with reference to FIG.
I do. When you press the texture key 1129 on the main body operation unit 1000,
The display 1109 displays like P060. Texture treatment
When touching, press the touch key 1060 and highlight this key.
Display. Image patterns for texture processing
Reading into the above-mentioned texture image memory (Fig. 32 113g)
When touching, press the touch key 1061. At this time, the pattern
Is displayed in the image memory, like P062.
If not, P061 will be displayed. Image to be read
Place the original on the platen and press the touch key 1062
Stores image data in the texture image memory
Is done. At this time, to read any part of the manuscript
Press the touch key 1063 to display the digitizer on the P063 screen.
Specify with 58. Specify the reading range, 16mm x 16mm
This can be done by inputting the heart with a pen at one point. Texture pattern by one point designation as described above
Reading can be performed as follows. Press the touch key 1060 without reading the pattern.
And set the texturing process, then press the copy start key 11
00 or another mode key (1110-1143) or touch key
When trying to escape the P064 screen with 1064 etc., the display section
Give a warning as shown on page 065. This range also allows the operator to specify the length and width.
It can also be done. <Mosaic processing setting procedure> Fig. 64 is a diagram for explaining the procedure of the mosaic processing setting.
You. Press the mosaic key 1128 on the operation panel to display P1
It is displayed as 00. Mosaic processing of manuscript
Press the touch key 1400 to highlight this key.
You. Also, change the mosaic size when performing mosaic processing
Is performed on the P101 screen by pressing the touch key 1401. mosaic
Change the size in the vertical (Y) direction and horizontal (X) direction
It is possible to set it upright. <Regarding the * mode operation procedure> FIG. 65 is a diagram for explaining the * mode operation procedure. Press the * key 1130 on the operation panel 1000 to enter * mode.
Thus, the display unit 1109 is displayed as P110. Touch key
1500 is paint user's color, color conversion, color character, etc.
Enter the color registration mode to register the color information to be used.
You. Touch key 1501 corrects image missing by printer
ON / OFF function. Touch key 1502 registers the mode memory.
This key is used to enter recording mode. Touch key 1503 is hand
Enter the mode to specify the insert size. Touch key 1504
Enter the program memory registration mode. Touchy key 1505
Is the mode for setting the default value of the color balance
The key to enter. (About the color registration mode) When the touch key 1500 is pressed while P110 is displayed, the color registration mode
Enter the code. The display will look like P111, and the color to be registered will be
Select the type. To change the palette color, touch
Press key 1506 and select the color you want to change on the screen of P116
And on the screen of P117, yellow, magenta, cyan, blue
The value of each component of the rack can be adjusted in 1% increments.
You. To register an arbitrary color on the original, touch
Press 1507, select the registration number on the screen of P118, and
Specify on the document table using the
And press the touch key 1510 to register. (About manual feed size specification) As shown on page 112, the manual feed size is either standard or non-standard.
They can also be specified. Regarding non-standard shapes, either horizontal (X) direction or vertical (Y) direction
They can also be specified in 1mm units. (About mode memory registration) Register the mode set as shown on page 113 to the mode memory.
Can be recorded. (Regarding program memory registration) As shown in P114, a series of area designation and predetermined processing
Programs can be registered. (About color balance registration) As shown on page 115, color for each of Y, M, C, and Bk
You can register the balance. <Regarding the procedure for operating the program memory> Referring to FIGS.
The recording operation and its use procedure will be described. Program memory is a procedure for operation related to settings.
It is a memory function for memorizing and reproducing it. Must
You can connect important modes and skip unnecessary screens.
Is possible. As an example, change the magnification of a certain area in the original.
The procedure to repeat the image
-Try. Press the * mode key 1130 on the operation panel of the main unit.
The screen of P080, and touch the program memo of Touch key 1200
Press Rikey. In this embodiment, four programs are registered
It is possible. Select the number to be registered on the screen of P081. This
After that, it goes to the program registration mode. Program registration mode
At the time of operation, for example, in the normal mode shown in FIG. 68 1300
Such a screen looks like 1301. Touch of Tatsuchikey 1302
The up key is specified when the user wants to skip the current screen.
The clear key of the touch key 1303 is
Cancel the registration up to now and register from the beginning
Use when fixing. Touch key 1304 end key is professional
Go through the registration mode of the gram memory
Register to issue memory. First, press the trimming key 1124 in the operation
Specify the area with a digitizer. The display shows P084
If you do not want to set any more areas here,
Press the touch key 1202 to skip this screen.
specify. (The screen changes to P085.) Next, press the zoom key 1110 on the main unit operation unit.
Becomes P086. Here, set the magnification, and touch
Pressing 03 changes the display to P087. Finally, on the console
Press the image repeat key 1126 on the screen of P088.
After making the settings for repeat, touch key 1204
To register in the first of program memory. To call the program registered in the above procedure,
Press the program memory 1 recall key 1140 on the body operation unit.
You. The display unit displays P091, and waits for an input of an area.
If you enter the area using the digitizer here, the display
Displays P92, and proceeds to the next P093. Here magnification
When touch key 1210 is pressed after setting, the display changes to P094.
You can set the image repeat. Touch key 1211
Press to select the mode using the program memory (to
Source mode). In addition, program memory
Until recalled and finished, each key of the edit mode (11
10 to 1143) are invalidated and operate according to the registered program.
You can do the work. Fig. 69 shows the program memory registration algorithm.
You. Turn the screen of S301 by key or touch key
This means rewriting the display of a part. Press with touch key 1302
If you specify to skip the currently displayed screen,
(S303), the next time the screen is turned,
Information has been set (S305). And new in S307
Set the appropriate screen number in the record table. Clear key
When pressed, the record table is completely cleared (S309, S31
1) Otherwise, return to S301 and add the next new
Move to the screen. Fig. 71 shows the format of the recording table.
You. Fig. 70 shows the operation after recalling the program memory.
The following describes the algorithm. If there is a screen turn in S401, the new screen is the standard screen
It is determined whether or not (S403). To S411 for standard screen
Next, set the next screen number from the record table,
If it is not an image, the new screen number and recording table schedule
The screen numbers are compared (S405), and if they are equal, S4
Move to 09, if there is a skip flag, skip S411 and S4
Return to 01. If they are not equal, perform a recovery process
(S407) The screen is turned. In this embodiment, a signal for bordering a non-rectangular image area is generated.
Generating means for generating and a storage means for storing the output of the generating means
Means for specifying a specific color to be detected having a step and a specific color
The output of the detection means and the signal that bounds the non-rectangular image area
Of the color conversion processing in the non-rectangular area.
It is possible to apply processing. As described above, according to the present embodiment, the non-rectangular area
(1) Multiple areas with converted colors are divided by rectangular areas
Color conversion processing is performed on only one of them.
It became possible to do. (2) Color conversion processing for areas consisting of colors with a wide gradation
The detection width can be expanded when applying
To perform a color conversion process. The above two points, that is, advanced and accurate color conversion processing
Has the effect of applying. The present invention is particularly effective for gradation color conversion.
However, general color conversion (the converted color has no gradation)
It is also very effective. Note that, in the present embodiment, the camera is based on the input image data.
Means for detecting a specific color in a color image (FIG. 2B),
Generating means for generating a rectangular image area signal (FIG. 2)
J) the output of the detection means and the non-rectangular image area signal
Conversion that converts a specific detected color to another color based on
The above object is achieved by having means (FIG. 2B).
ing. [Effects of the Invention] As described above, according to the present invention, a camera having a plurality of color components
Input means for inputting color image data;
Image data of one color component from color image data
Extracting means for outputting the one-color component image data
The color component values of the data and the image data around the image data
Binarization by comparing the average value of color component values of data
Binarization means for outputting a binarization result, and the binarization means
The dot is confirmed using the binarization result by
Halftone dot judgment to determine halftone dots by calculating the amount of dots on the side
Means to reduce the load when performing image area determination.
Image processing device can be provided.

[Brief description of the drawings]

FIG. 1 is an overall view of an image processing apparatus according to an embodiment of the present invention, FIG. 2 is a circuit diagram of image processing according to an embodiment of the present invention, FIG. 4 is a circuit diagram for generating ODRV118a and EDRV119a, FIG. 5 is a diagram for explaining the black correction operation, FIG. 6 is a circuit diagram for shading correction, FIG. 7 is a color conversion block diagram, and FIG. FIG. 9 is a block diagram of a color conversion circuit, FIG. 10 is a diagram showing a specific example of color conversion, FIG. 11 is a diagram for explaining logarithmic conversion, FIG. 12 is a circuit diagram of a color correction circuit, FIG. FIG. 13 is a diagram showing an unnecessary transmission area of the filter, FIG. 14 is a diagram showing an unnecessary absorption component of the filter, FIG. 15 is a circuit diagram of a character image area separation circuit, and FIG. 16 explains a concept of contour regeneration. Fig. 17, Fig. 17 illustrates the concept of contour regeneration, Fig. 18 is a circuit diagram for contour regeneration, Fig. 19 Is a contour regeneration circuit diagram, FIG. 20 is a timing chart of EN1 and EN2, FIG. 21 is a block diagram of a character image correction unit, FIG. 22 is an explanatory diagram of addition / subtraction processing, FIG. 23 is a switching signal generation circuit diagram, FIG. 24 is a circuit diagram of residual color removal processing, FIG. 25 is a diagram for explaining residual color removal processing and addition / subtraction processing, FIG. 26 is a diagram illustrating edge enhancement, FIG. 27 is a diagram illustrating smoothing, and FIG. FIG. 29 is a diagram for explaining processing and modification processing by a binary signal. FIG. 29 is a diagram showing characters and image synthesis. FIG. 30 is a block diagram of an image editing and processing circuit. FIG. 31 is a diagram showing texture processing. Is a circuit diagram for texture processing, FIG. 33 is a circuit diagram for mosaic, scaling, and taper processing, FIG. 34 is a circuit diagram for mosaic processing, FIG. 35 is a diagram for explaining mosaic processing, etc., and FIG. 36 is a line memory. FIG. 37 is an explanatory diagram of a bit memory for a mask, 38 is a diagram showing an address, FIG. 39 is a diagram showing a specific example of a mask, FIG. 40 is a circuit diagram of an address counter, FIG. 41 is a timing chart for enlargement / reduction, and FIG. 42 is a diagram for enlargement / reduction. FIG. 43 is a diagram showing a specific example, FIG. 43 is an explanatory diagram of a binarization circuit, FIG. 44 is a timing chart of an address counter, FIG. 45 is a diagram showing a specific example of bit map memory writing, FIG. FIG. 47 is a diagram showing a specific example of synthesis, FIG. 47 is a circuit diagram of distribution switching, FIG. 48 is a diagram showing a specific example of a non-linear mask, FIG. 49 is a circuit diagram of a region signal generation circuit, and FIG. Diagram showing designation, FIG. 51 is an interface circuit diagram with an external device, FIG. 52 is a truth table of a selector, FIG. 53 is a diagram showing an example of a rectangular area and a non-rectangular area, FIG. 54 is an operation unit FIG. 55 is a diagram for explaining the procedure of the color conversion operation, and FIG. 56 is a trimming diagram. Fig. 57 illustrates the procedure for specifying the trimming area, Fig. 58 illustrates the algorithm for specifying the circular area, and Fig. 59 illustrates the algorithm for specifying the ellipse and the R rectangle. FIG. 60 is an explanatory diagram of the operation procedure of the character composition, FIG. 61 is an explanatory diagram of the operation procedure of the character composition, FIG. 62 is an explanatory diagram of the operation procedure of the character composition, and FIG. 63 is a diagram of the texturing process. Fig. 64 explains the procedure of the mosaic processing, Fig. 64 shows the procedure of the * mode operation, Fig. 66 shows the procedure of the program memory operation, Fig. 67 Fig. 68 illustrates the procedure for operating the program memory. Fig. 68 illustrates the procedure for operating the program memory. Fig. 69 illustrates the algorithm for registering the program memory. Fig. 70 illustrates the operation algorithm after recalling the program memory. Shows a beam, 71 figure illustrates the the format of the recording table, the 72 figure is a diagram showing an image processed and edited.

──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Yasumichi Suzuki 3-30-2 Shimomaruko, Ota-ku, Tokyo Canon Inc. (72) Inventor Toshiyuki Kitamura 3-30-2 Shimomaruko, Ota-ku, Tokyo Canon (56) References JP-A-63-283364 (JP, A) JP-A-64-44169 (JP, A) JP-A-64-44171 (JP, A) (58) Fields studied (Int. Cl. ⁷ , DB name) H04N 1/40-1/409 H04N 1/46-1/64 G06T 1/00 510

Claims (1)

(57) [Claims] An input unit for inputting color image data having a plurality of color components; an extraction unit for extracting image data of one color component from the color image data having a plurality of color components; Binarizing means for binarizing by comparing the color component value of the image data with the average value of the color component values of the image data in the vicinity of the image data and outputting a binarization result; An image processing apparatus comprising: a halftone dot determination unit that determines a halftone dot by checking a dot by using a binarization result and obtaining an amount of surrounding dots.