JP3019616B2 - Stack-through capacitor array - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer capacitor array used as a noise filter. More specifically, the present invention relates to a multilayer feedthrough capacitor array suitable for preventing crosstalk between signal lines passing through through holes.

[0002]

2. Description of the Related Art In digital equipment such as computers, there is a problem that when high-frequency noise is mixed in a signal line, malfunctions are liable to occur, and unnecessary electromagnetic waves which may cause a failure in other electronic equipments are radiated from wiring. is there. For this reason, a noise filter that removes high-frequency noise using a capacitor element is frequently used in a signal line. Examples of this type of noise filter include a single-plate capacitor, a multilayer capacitor, a feedthrough capacitor, a feedthrough capacitor array, and the like. A single-plate capacitor, a multilayer chip capacitor, and a feedthrough capacitor are each used for one signal line, and a feedthrough capacitor array having a plurality of built-in capacitors is used as a single product for a plurality of signal lines.

However, the single plate capacitor, the multilayer chip capacitor, the feedthrough capacitor, and the feedthrough capacitor array have the following disadvantages. In a single-plate capacitor, external electrodes are provided on both surfaces of one disk-shaped capacitor element, and a pair of lead wires is connected to the external electrodes. Due to this structure, the single-plate capacitor prevents high-density mounting on a circuit board and makes it difficult to reduce the size of the electronic device. Further, since a lead wire is included when mounted on a circuit board, a circuit connected to this single-plate capacitor as shown in FIG. 9 approximates an LC series resonance circuit, and does not function as a noise filter at a certain frequency or higher. The multilayer chip capacitor is a rectangular ceramic sheet 2 having an internal electrode formed on the sheet surface at an interval from one sheet outer periphery to the sheet outer periphery and the sheet outer periphery on the opposite side.
The two ceramic sheets are superimposed such that the outer periphery of the extended sheet of the internal electrode is on the opposite side, and a plurality of the superposed ceramic sheets are laminated and integrated. The laminate includes a laminate and a pair of external electrodes formed to be connected to the internal electrodes respectively exposed on both side surfaces of the laminate. Although a multilayer chip capacitor can be mounted at a higher density on a circuit board than a single-plate capacitor, it is unavoidable to route wiring to the internal electrodes of the capacitor and the ground point. For this reason, the circuit including this capacitor is similar to the LC series resonance circuit shown in FIG. 9 similarly to the single-plate capacitor, and does not function as a noise filter at a certain frequency or higher.

In a feedthrough capacitor, for example, a through hole through which a signal line passes is formed in the center of a disk-shaped capacitor element, and a first conductor connected to the signal line is formed around the through hole on one side of the capacitor element. A second conductor layer for grounding is formed on the other surface and an outer peripheral surface thereof with an interval from the first conductor, and a capacitance is formed between the first conductor layer and the second conductor layer via a capacitor element. Be composed. The feed-through capacitor does not need to route lead wires and wiring when mounted on a circuit board like a single plate capacitor or a multilayer chip capacitor, and can be close to an ideal circuit shown in FIG. However, through-type capacitors prevent high-density mounting on circuit boards due to their structure.
It is difficult to reduce the size of electronic devices. In addition, since the mounting is troublesome, the mounting cost is increased. The through-type capacitor array has, for example, a plurality of through-holes through which a signal line passes through a rectangular capacitor element, and a first conductor connected to the signal line is formed on the periphery of each through-hole on one surface of the capacitor element, respectively. A second conductor layer for grounding is formed on the other surface of the element and its outer peripheral surface at a distance from the first conductor, and a capacitance is formed between the first conductor layer and the second conductor layer via a capacitor element. It is configured as follows. The feedthrough capacitor array can approach the ideal circuit shown in FIG. 8 for the same reason as the feedthrough capacitor, and solves the drawbacks of the feedthrough capacitor, namely, the difficulty of increasing the density and increasing the mounting cost. To eliminate. However, in this through-type capacitor array, a conductor such as a lead wire passes through each of a plurality of through-holes arranged adjacent to each other. When a high-frequency signal flows through a signal line such as a line, noise having a frequency equal to or higher than a predetermined frequency is propagated due to a stray capacitance existing between the lines, and crosstalk is likely to occur. For this reason, there has been a certain limitation in increasing the density from the viewpoint of preventing crosstalk.

In order to eliminate the drawbacks of the feedthrough capacitor array, slits are formed in the dielectric substrate between adjacent capacitors, that is, between adjacent conductors, thereby eliminating the floating capacitance between the capacitors, thereby reducing crosstalk. (Japanese Utility Model Application Laid-Open No. 61-4420).

[0006]

However, the through-type capacitor array described above increases the manufacturing cost due to the formation of the slits, and tends to reduce the strength of the array itself. Further, it is still difficult to form the slits only between the conductors. There was a problem that crosstalk could not be sufficiently prevented.

SUMMARY OF THE INVENTION An object of the present invention is to provide a through-hole type capacitor array which does not have lead wires so that electronic equipment can be reduced in size even when mounted on a circuit board at high density and lead inductance is hardly generated. . Another object of the present invention is to provide a multilayer capacitor array that removes high-frequency noise and can reliably prevent crosstalk of signals flowing through each line to other lines even when mounted at higher density. is there. It is still another object of the present invention to provide a multilayer feedthrough capacitor array which can be manufactured and mounted at a low cost without a risk of lowering the strength.

[0008]

A configuration of the present invention for achieving the above object will be described with reference to FIGS. 1, 5 and 6. FIG. FIG. 1 shows a ceramic sheet portion enlarged in the thickness direction for easy explanation. In the multilayer feedthrough capacitor array of the present invention, the first ceramic dielectric sheet 10 and the third ceramic dielectric sheet 30 are laminated and integrated with the second ceramic dielectric sheet 20 as an intermediate sheet, and the integrated The lines L ₁ , L ₂ , L are provided on the first, second and third ceramic dielectric sheets 10, 20 and 30.
₃ or more first through holes 11a, 11 through which each 3 passes
b, 11c, the stacked body 50 provided with the second through holes 21a, 21b, 21c and the third through holes 31a, 31b, 31c, respectively. First ceramic dielectric sheet 10
Are formed around the first through holes 11a, 11c on the sheet surface of one of the adjacent first through holes, and the lines L ₁ ,
The first inner conductor 12a is connected to L _3, comprises 12c. In addition, the second ceramic dielectric sheet 20 has gaps 22a, 22b, which are electrically insulated from the second through holes, respectively.
A ground conductor 23 is provided on the surface of the sheet and has an outer periphery. Further, the third ceramic dielectric sheet 30 has a third through hole 3 communicating with the first through hole 11b in which the first internal conductor is not formed around the hole among the first through holes.
It formed around the 1b and a second inner conductor 32 which is connected to the line L _2. Further, the first inner conductors 12a and 12c and the ground conductor 2 are interposed via the second ceramic dielectric sheet 20.
3 and between the second inner conductor 32 and the ground conductor 23 via the third ceramic dielectric sheet 30, and the ground conductor exposed on the side surface of the laminate 50 is formed. External electrode 60 connected to 23
Are formed on this side. The fourth ceramic dielectric sheet 40 having no conductor formed on the sheet surface is laminated and integrated on the uppermost layer of the laminate 50, and the integrated first, second, third, and fourth ceramic dielectric sheets 10 to 10 are integrated. line L ₁ to 40, L _2, L ₃ a plurality of first through respectively, the second and third through-holes 11a, 11b, 11c, 21a, 21
It is preferable to provide b, 21c, 31a, 31b, and 31c, respectively, in order to improve the reliability of the capacitor array.

[0009]

The first internal conductors 12a and 12c on the first ceramic dielectric sheet 10 and the third ceramic dielectric sheet 3
By arranging the ground conductor 23 grounded via the external electrode 60 between the second internal conductor 32 and the second internal conductor 32, the stray capacitance between the adjacent lines L _{1 to} L ₃ is reduced,
Crosstalk between signal and noise lines can be eliminated. Also, between the first inner conductors 12a and 12c and the ground conductor 23 via the second ceramic dielectric sheet 20, and between the second inner conductor 32 and the ground conductor 23 via the third ceramic dielectric sheet 30. , Respectively, the capacitance is formed, so that the lines L ₁ and L ₃ and the internal conductor 12
a, respectively a potential difference occurs between the second inner conductor 32 which is in electrical communication with line L ₂ to and between 12c and the ground conductor 23, the high frequency noise is absorbed and functions as a capacitor.

[0010]

Next, embodiments of the present invention will be described. The present invention is not limited to this embodiment. First, the thickness is about 30μ
A large number of m dielectric green sheets were prepared. The dielectric green sheet is formed by coating the upper surface of a polyester base sheet with, for example, a barium titanate-based dielectric slurry having JIS-R characteristics by a doctor blade method and then drying. Of these green sheets, one group was a first ceramic green sheet, another group was a second ceramic green sheet, and another group was a third ceramic green sheet. Next, a conductive paste containing Pd as a main component was screen-printed on each surface of the first ceramic green sheet, the second ceramic green sheet, and the third ceramic green sheet in a separate pattern, and dried at 80 ° C. for 4 minutes. . That is, as shown in FIG. 5, the first ceramic green sheet 10 is spaced apart from the center of the circle by about 5.0 mm.
The first internal conductors 12a and 12c of two small circles are formed by printing. The second ceramic green sheet 20 has the ground conductor 2 except for the three small circle portions 22a, 22b, and 22c.
3 is formed by printing over the outer peripheral portion of the sheet. Small circle part 2
2a, 22b and 22c are provided at equal intervals of about 2.5 mm at the center of the circle. Furthermore, the third ceramic green sheet 30
, A small inner conductor 32 is formed at the center of the sheet.

A plurality of first ceramic green sheets 10 and third ceramic green sheets 30 are alternately laminated with the screen-printed second ceramic green sheet 20 as an intermediate sheet, and no conductive paste is printed on the uppermost layer. The fourth ceramic green sheet 40 was overlaid. After the laminate is integrated by thermocompression bonding, a first through hole having a diameter of about 1 mm is provided at each central position of the two first inner conductors 12a, 12c, the second inner conductor 32, and the small circular portions 22a, 22b, 22c. Holes 11a to 11c, second through hole 21
a to 21c and third through holes 31a to 31c.
As a result, the first internal conductors 12a and 12c face the first through holes 11a and 11c, the second internal conductor 32 faces the third through hole 31b, and the ground conductor 23 has the second through holes 21a to 21c.
c and an interval 22a to 22c.

The laminate 50 provided with the through holes shown in FIG. 6 was fired at 1300 ° C. for about 1 hour to obtain a sintered body having a thickness of about 1 mm. As shown in FIG. 6, this sintered body was barrel-polished to expose the ground conductor 23 on the peripheral side surface of the sintered body. Next, a conductive paste containing Ag as a main component is applied to the peripheral side surface of the sintered body where the ground conductor 23 is exposed, and the first through holes 11a to 11c, the second through holes 21a to 21c, and the third through holes 31a to 31c are further applied. After applying the same conductive paste to each hole wall of the first through-holes 31c and the fourth through holes 41a to 41c, they are baked at once, and the external electrode 60 is provided on the peripheral side surface of the sintered body, and the conductor layer 51a is provided on each of the hole walls. , 51b, and 51c were formed (FIG. 7). As a result, a laminated through-type capacitor array is obtained in which the conductor layers 51a, 51b, 51c are electrically connected to the first internal conductors 12a, 12c and the second internal conductor 32, respectively, and the ground conductor 23 is electrically connected to the external electrodes 60, respectively. Was.

In order to investigate the characteristics of the multilayer feedthrough capacitor array, its external electrodes 60 were connected to a grounded metal plate by soldering. Also, the first through holes 11a to 11a
1c, second through holes 21a to 21c, third through holes 31a to 31c
Metal conductors L ₁ , L ₂ , and L ₃ as signal lines were inserted into the 31c and the fourth through holes 41a to 41c, respectively, and were connected to the conductor layers 51a, 51b, and 51c formed on the hole walls by soldering. A high-frequency signal was input from one end of the metal conductors L ₁ , L ₂ , and L ₃ , and an output signal was measured at the other end to determine the insertion loss. As a result, the insertion loss increased sharply as the frequency became higher, and it was found that the multilayer feedthrough capacitor array of the example had good filter characteristics.
In each of the other ends of the adjacent metal conductors L ₁ and L _2, also by measuring the output signal at the other ends of the metal conductor L ₂ and L _3, was examined for cross-talk, the crosstalk detection It was confirmed that it was so small that it was extremely improved as compared with the measurement example of the conventional feedthrough capacitor array.

The number of the first ceramic green sheets, the second ceramic green sheets, and the third ceramic green sheets may be appropriately changed according to a desired capacitance formed between the internal conductor and the ground conductor. it can. Therefore, the first sheet, the second sheet, and the third sheet may be one each. Here, in order to more reliably prevent crosstalk, a second ceramic green sheet having a ground conductor is provided between the first ceramic green sheet having the first inner conductor and the third ceramic green sheet having the second inner conductor. It is necessary to pinch. The number of through holes formed in each sheet is not limited to three, but may be two or four or more. In addition, the arrangement is not limited to one row, and may be arranged in a plurality of rows. Further, in the above example, a signal line is described as a line passing through each through-hole, but the present invention can be applied to other lines such as a power supply line and a ground line. Furthermore,
The uppermost fourth ceramic dielectric sheet may not be particularly laminated when another protective means is provided on the third ceramic dielectric sheet.

[0015]

As described above, according to the present invention, when the metal conductor of the signal line used for signal transmission is inserted into the through-hole and the external electrode is grounded, the first ceramic dielectric sheet is formed. Capacitance is formed between the first inner conductor and the ground conductor of the second ceramic dielectric sheet and between the second inner conductor of the third ceramic dielectric sheet and the ground conductor of the second ceramic dielectric sheet. , Can remove high-frequency noise that intrudes into the signal line, and more reliably removes stray capacitance compared to conventional through-capacitor arrays that have slits between internal conductors.
Crosstalk between adjacent signal lines can be prevented. Further, as compared with a conventional feedthrough capacitor array having a slit, the distance between the throughholes can be reduced, the size can be further reduced and the density can be increased, and the manufacturing and mounting can be performed at a low cost without lowering the strength.

[Brief description of the drawings]

FIG. 1 is a sectional view taken along line AA of FIG. 7 of a multilayer feedthrough capacitor array according to an embodiment of the present invention.

FIG. 2 is a sectional view taken along line BB of FIG.

FIG. 3 is a sectional view taken along line CC of FIG.

FIG. 4 is a sectional view taken along line DD of FIG.

FIG. 5 is an exploded perspective view of the laminate.

FIG. 6 is a perspective view of a sintered body obtained by firing the laminate.

FIG. 7 is a cutaway perspective view of a main part of a multilayer feedthrough capacitor array manufactured by providing external electrodes around the sintered body.

FIG. 8 is a circuit diagram of an ideal capacitor having no inductance component.

FIG. 9 is a circuit diagram of a capacitor similar to an LC series resonance circuit.

[Explanation of symbols]

10 First ceramic dielectric sheet (first ceramic green sheet) 11a, 11b, 11c First through hole 12a, 12c First internal conductor 20 Second ceramic dielectric sheet (second ceramic green sheet) 21a, 21b, 21c 2 through-holes 22a, 22b, 22c electrically insulated spacing 23 ground conductor 30 third ceramic dielectric sheet (third ceramic green sheet) 31a, 31b, 31c third through-hole 32 second internal conductor 40 fourth ceramic Dielectric sheet (fourth ceramic green sheet) 41a, 41b, 41c Fourth through hole 50 Stacked body 51a, 51b, 51c Conductive layer 60 External electrode

────────────────────────────────────────────────── ─── Continuing on the front page (72) Inventor Masami Masuda 2270 Yokose, Yokoze-cho, Chichibu-gun, Saitama Mitsubishi Materials Corporation Ceramics Research Laboratory (56) References JP-A-1-244604 (JP, A) 2-52323 (JP, U) Japanese Utility Model Showa 56-46245 (JP, U) (58) Field surveyed (Int. Cl. ⁷ , DB name) H01G 4/14-4/42

Claims (2)

(57) [Claims] 1. A first ceramic dielectric sheet (10) and a third ceramic dielectric sheet (30) are laminated and integrated with the second ceramic dielectric sheet (20) as an intermediate sheet, and are integrated. Lines (L ₁ , L ₂ , L ₃ ) pass through the first, second and third ceramic dielectric sheets, respectively.
The second and third through holes (11a, 11b, 11c, 21a, 21b, 21c, 31a, 31
b, 31c), wherein the first ceramic dielectric sheet (10) is provided with the first through-holes on the surface of any one of the adjacent first through-holes.
(11a, 11c) includes a first inner conductor connected to the formed around and the line (L _1, L ₃₎ (12a, 12c), said second ceramic dielectric sheet (20), the second The third ceramic dielectric sheet (30) is provided with a ground conductor (23) which has a gap (22a, 22b, 22c) electrically insulated from the through hole and is formed on the outer surface of the sheet surface. The first through hole is formed around the third through hole (31b) communicating with the first through hole (11b) where the first internal conductor is not formed around the hole, and is connected to the line (L ₂ ). A second internal conductor (32) to be formed, and the first internal conductor (32) through the second ceramic dielectric sheet (20).
Between the internal conductors (12a, 12c) and the ground conductor (23) and between the second internal conductor (32) and the ground conductor (23) via the third ceramic dielectric sheet (30) And an external electrode (60) connected to the ground conductor (23) exposed on the side surface of the multilayer body (50) is formed on the side surface of the multilayer body (50). Type capacitor array. 2. A laminated body (50) is formed by laminating a fourth ceramic dielectric sheet (40) having no conductor on the sheet surface on the uppermost layer thereof, and is integrated. Lines on the third and fourth ceramic dielectric sheets (10, 20, 30, 40)
(L _1, L _2, L ₃₎ a plurality of first through respective claims second and third through holes (11a, 11b, 11c, 21a , 21b, 21c, 31a, 31b, 31c) are provided, respectively Item 2. The multilayer feedthrough capacitor array according to Item 1.