JP3005997B2 - Synchronous multiplex method - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a synchronous multiplexing system for selecting and multiplexing signals in a low-order group signal, and more particularly to M digital signals from N digital signals synchronized with each other. The present invention relates to a synchronous multiplexing method for selecting a signal and performing synchronous multiplexing.

[Conventional technology]

FIG. 3 is a block diagram showing a conventional synchronous multiplexing system. As an example, a low-order group signal is selected and then multiplexed.
× 2 is shown. In the figure, reference numerals 1a to 1d denote input terminals to which the next lower group signals synchronized with each other are input, 2a to 2d denote a signal distribution circuit which branches the input lower order group signals into two, and outputs the control signals. The output signal selection control circuit 4 is a first signal selection circuit that receives one of the two branched signals of the signal distribution circuits 2a to 2d and selectively controls a signal to be output based on the control signal.
Is a second signal selection circuit which receives the other of the two branched signals of the signal distribution circuits 2a to 2d and selects and controls a signal to be output by a control signal. Reference numeral 6 denotes an output signal of the first signal selection circuit 4 and a second signal selection circuit.
A multiplexing circuit for multiplexing the output signal of the signal selection circuit 5 with two signals and outputting a multiplexed signal (higher-order group signal). Reference numeral 7 denotes an output terminal.

Next, the operation of the synchronous multiplexing system having the above configuration will be described. First, the low-order group signals synchronized with each other are input to the signal distribution circuits 2a to 2d via the input terminals 1a to 1d, respectively. Therefore, each of the signal distribution circuits 2a to 2d divides the mutually synchronized low-order group signals into two, outputs one signal to the first signal selection circuit 4, and outputs the other signal to the second signal selection circuit 5 Output to Then, the first signal selection circuit 4 and the second signal selection circuit 5 selectively control the input signal by the control signal of the signal selection control circuit 3 and output the signal to the multiplexing circuit 6. And
The multiplexing circuit 6 outputs the output signal of the first signal selection circuit 4 and the second
The output signal of the signal selection circuit 5 can be multiplexed by two to output a multiplexed signal (higher-order group signal) from the output terminal 8.

[Problems to be solved by the invention]

In the conventional synchronous multiplexing method described above, the number of connections between circuits is large, and the number of input low-order group signals N and the number of selected signals M
The circuit scale increases as the number (however, NM) increases. Also, it is necessary to branch a large number of clock signals for maintaining a synchronous system, and a delay occurs between clocks. Therefore, when the number N of input low-order group signals increases, it is very difficult to construct a synchronous network. Disadvantage.

[Means for solving the problem]

In the synchronous multiplexing method according to the present invention, a plurality of synchronous multiplexing means for synchronously multiplexing a plurality of digital signals and outputting as a multiplexed signal, respectively, are connected to and input to any output side of the synchronous multiplexing means. Delay means for outputting the multiplexed signal as it is, with or without delay, as needed, and a delay means connected to the output side of the synchronous multiplexing means not connected and connected to the output side of the delay means. And signal selecting means for selecting and multiplexing a total of M digital signals multiplexed by the synchronous multiplexing means from the input multiplexed signals.

(Operation)

According to the present invention, the circuit scale can be reduced by selecting signals after synchronously multiplexing several low-order group signals.

〔Example〕

FIG. 1 is a block diagram showing an embodiment of a synchronous multiplexing system according to the present invention, in which M out of N low-order group signals (digital signals) are selected and then multiplexed (N, M
Is an integer of 2 or more and N ≧ M), for example, 4 × 2
(N = 4, M = 2) is shown. In the figure, reference numeral 8a denotes a synchronous multiplexing circuit for multiplexing the low-order group signal A shown in FIG. 2A and the low-order group signal B shown in FIG. A synchronous multiplexing circuit that multiplexes the next-order group signal C and the low-order group signal D and outputs a multiplexed signal, 9 is a delay circuit that delays the multiplexed signal of the synchronous multiplexing circuit 8a, 10 is a signal selection circuit, and 11 is a control circuit. A signal selection control circuit for outputting a signal to the delay circuit 9 and the signal selection circuit 10, and 12 is an output terminal.

Next, the second operation of the synchronous multiplexing method according to the above configuration will be described.
This will be described with reference to FIGS. First, the low-order group signal A shown in FIG. 2 (a) input to the input terminal 1a and the low-order group signal B shown in FIG. 2 (b) input to the input terminal 1b are multiplexed by the synchronous multiplexing circuit 8a. The multiplexed signal shown in FIG. On the other hand, the low-order group signal C input to the input terminal 1c and the low-order group signal D input to the input terminal 1d are multiplexed by the synchronous multiplexing circuit 8b and
The multiplexed signal shown in FIG. The delay circuit 9 controls whether this multiplexed signal (see FIG. 2C) is delayed by one bit in response to the input of a control signal from the signal selection control circuit 11. Now, if the low-order group signal B and the low-order group signal D are to be selected, the low-order group signal B and the low-order group signal D need to be in different time slots. 1
After a bit delay, the delay output signal shown in FIG. For this reason, the signal selection circuit 10 outputs the delayed multiplexed signal shown in FIG.
The multiplexed signal shown in FIG. 2E can be selected and multiplexed by the control signal of the signal selection control circuit 11, and the output signal shown in FIG.

〔The invention's effect〕

As described in detail above, according to the synchronous multiplexing method according to the present invention, signals can be easily selected by synchronous multiplexing in order to combine several low-order group signals into one. Further, even when the number of low-order group signals increases, the circuit scale is not complicated, and there is an effect that a synchronous network can be formed.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of a synchronous multiplexing system according to the present invention, FIG. 2 is a diagram showing waveforms at various parts in FIG. 1, and FIG. 3 is a block diagram showing a conventional synchronous multiplexing system. . 8a and 8b: synchronous multiplexing circuit, 9: delay circuit, 10 ...
Signal selection circuit, 11 ... Signal selection control circuit, 12 ... Output terminals.

Claims (1)

(57) [Claims] 1. Digital communication in which M digital signals are selected from N digital signals synchronized with each other (N and M are integers of 2 or more and N ≧ M), and then synchronously multiplexed and transmitted. A plurality of synchronous multiplexing means for synchronously multiplexing a plurality of the digital signals and outputting the multiplexed signals as multiplexed signals; and the multiplexing means connected to and inputted to one of the output sides of the synchronous multiplexing means. Means for delaying the converted signal as required or without delay, and connected to the output side of the synchronous multiplexing means to which the delay means is not connected and to the output side of the delay means Signal selecting means for selecting and multiplexing a total of M digital signals multiplexed by the synchronous multiplexing means from the connected and input multiplexed signals, and multiplexing the digital signals. formula.