JP3047708B2 - Manufacturing method of ceramic laminated electronic component - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a multilayer ceramic electronic component such as a multilayer capacitor, and more particularly, to a method for forming a plurality of internal electrodes around an element portion overlapping with a ceramic layer interposed therebetween. The present invention relates to a method for manufacturing a ceramic laminated electronic component having an improved structure.

[0002]

2. Description of the Related Art An example of a conventional method of manufacturing a ceramic multilayer electronic component will be described by taking a multilayer capacitor as an example.

First, as shown in FIG. 1, a mother ceramic green sheet 1 is prepared. A plurality of internal electrode patterns 2 are provided on the upper surface of the mother ceramic green sheet 1.
Is formed by printing a conductive paste.

Next, a plurality of mother ceramic green sheets 1 on which the internal electrode patterns 2 are printed are laminated, and an appropriate number of mother ceramic green sheets 1 on which the internal electrode patterns are not printed are laminated one above the other. Pressing in the direction, the mother laminate 3 shown in FIG. 2 is obtained. In addition,
When laminating the ceramic green sheets 1 on which the internal electrode patterns 2 are printed, a plurality of ceramic green sheets 1 are laminated so that the upper and lower internal electrode patterns 2 constitute the element portion of the multilayer capacitor. FIGS. 3A and 3B are cross-sectional views of the obtained laminate 3 along the line AA and the line BB.

Next, a dashed line C in FIGS. 3A and 3B
Then, the multilayer body 3 is cut along the dashed line D to obtain a multilayer raw chip for each multilayer capacitor unit. As schematically shown in FIG. 4, in the obtained laminated green chip 4, a plurality of internal electrodes 5, 6 formed by cutting the internal electrode pattern 2 are exposed on the end faces 4a, 4b, respectively. Are arranged as follows. Also, a plurality of internal electrodes 5, 6
Are arranged so as to overlap each other with the ceramic green sheet layer interposed therebetween. Further, above and below the element portion where the internal electrodes 5 and 6 are stacked via the ceramic green sheet layer, dummy layers 4e and 4f (FIG. 5).
(See (a) and (b)). Side margins 4g and 4h are formed on the sides of the element portion, that is, between the side where the plurality of internal electrodes 5 and 6 are stacked and the side surfaces 4c and 4d.

Next, the laminated green chip 4 is fired to obtain a sintered body, and external electrodes are applied to both end surfaces of the obtained sintered body to obtain a laminated capacitor. In the above manufacturing method, the formation of the dummy layers 4e and 4f and the side margin portions 4g and 4h is because the internal electrodes 5 and 6 are electrically connected to the external electrodes in the finally obtained multilayer capacitor. This is for completely burying the part in the sintered body except for the part to prevent short-circuiting on the side surface and a decrease in moisture resistance.

Another method for forming the dummy layers 4e and 4f and the side margins 4g and 4h will be described with reference to FIG. In this method, a laminated green chip 7 in which a plurality of internal electrodes 8 are arranged so as to overlap with each other via a ceramic green sheet is prepared. In this case, a plurality of internal electrodes 8 are formed so as to reach the entire width of the stacked raw chip 7. That is, the plurality of internal electrodes 8 have both side surfaces exposed to both side surfaces 7 a and 7 b of the laminated green chip 7. Thereafter, after obtaining the laminated green chip 7, a ceramic slurry 9 is adhered so as to cover the outer peripheral side surface, and then fired. In the obtained sintered body, a dummy layer and a side margin portion formed by sintering the ceramic slurry 9 are formed on the upper and lower sides and right and left of the element portion formed by firing the laminated green chip. become.

[0008]

In the laminated raw chip 4, the internal electrodes 5 and 6 are laminated at regular intervals in the element portion, whereas the dummy layers 4e and 4f and the side margin portions 4g in FIG. , 4h, there is no such metal material interposed therebetween. Therefore, when firing the laminated green chip 4, since the sintering reaction speed and temperature are different between the element portion and the other portions, distortion tends to occur in the obtained sintered body. That is, the element portion and the dummy layers 4e and 4f and the side margin portion 4
In some cases, distortion occurred between the portions where g and 4h were fired.

As a result, a delamination phenomenon called delamination or peeling may occur. Further, there is also a problem that the heat distortion and the mechanical shock resistance of the obtained multilayer capacitor are deteriorated due to the occurrence of the distortion. In addition, when the above-mentioned delamination occurs, when exposed to a high-temperature or high-humidity environment, characteristics such as insulation resistance may be reduced at an early stage.

Furthermore, since the sintering state in the sintered body is not uniform, electric characteristics such as capacitance tend to vary between layers in the same sintered body and between different sintered bodies.

In the conventional method described with reference to FIGS. 1 to 5, the laminate 3 is pressed in the thickness direction prior to firing, but when the laminate 3 is pressed in the thickness direction by a mold or the like. In addition, the applied pressure differs between the element portion where the internal electrodes 5 and 6 are stacked and the side margin portion. Therefore, the pressure is applied differently between the element portion where the electrodes overlap and the side margin portion, so that delamination may occur before firing.

On the other hand, in the method using the laminated raw chip 7 shown in FIG. 6, the internal electrodes 8 reaching the entire width of the laminated raw chip 7 are used. Regardless of the method, since the pressure is applied uniformly, the delamination phenomenon hardly occurs. However, also in this method, when firing after attaching the ceramic slurry 9 to the surroundings, the sintering reaction temperature and speed are different between the laminated green chip 7 and the portion constituted by the surrounding ceramic slurry 9. Therefore, similar to the first method,
A delamination phenomenon called delamination or peeling tends to occur. Therefore, there has been a defect that the thermal shock resistance and the mechanical shock resistance of the multilayer capacitor are deteriorated, and electrical characteristics such as insulation resistance are deteriorated when the multilayer capacitor is placed in a high temperature and high humidity environment.

Further, since a dummy layer and a side margin portion exist around the element portion, diffusion of gas required for sintering does not sufficiently proceed, and sintering unevenness in the element portion is likely to occur. As a result, since the sintering reaction temperature and speed differ between the element portion and the other portions, shrinkage variation or grain growth variation occurs, and the capacity tends to be unstable.

Therefore, an object of the present invention is to provide an element portion in which a plurality of internal electrodes overlap with each other via a ceramic layer;
Various defects caused by distortion between other parts can be eliminated, delamination can be prevented, excellent thermal shock resistance and mechanical shock resistance, and excellent electrical characteristics It is an object of the present invention to provide a ceramic multilayer electronic component with little variation and excellent reliability.

[0015]

According to the first aspect of the present invention, there is provided an element portion in which a plurality of internal electrodes are overlapped with a ceramic layer interposed therebetween, a dummy layer arranged above and below the element portion, and an element portion. A method for manufacturing a ceramic laminated electronic component having a side margin portion disposed on a side,
A plurality of ceramic green sheets are stacked with a plurality of internal electrodes interposed therebetween, and the internal electrodes are exposed on a pair of opposing side surfaces, and at least the element portion of the element portion and the dummy layer Preparing a laminated green chip for constituting, and firing the laminated green chip to obtain a sintered body in which both side surfaces of the plurality of internal electrodes are exposed to the outer surface, Attaching one of a ceramic slurry or a synthetic resin around four side surfaces including the outer side surface of the sintered body; curing one of the ceramic slurry or the synthetic resin to obtain an electronic component chip; Forming external electrodes electrically connected to the internal electrodes on the component element chip.

Preferably, in the step of adhering the ceramic slurry or the synthetic resin, the step of attaching the ceramic slurry or the synthetic resin includes placing the sintered body in a mold, and forming the ceramic slurry or the synthetic resin in a molten state in the mold. Is carried out.

[0017]

According to the present invention, a laminated green chip having both sides exposed on opposite sides is preliminarily fired so that the internal electrodes reach the entire width of the laminated body, and a plurality of internal electrodes face each other. To obtain a sintered body for element part configuration exposed on a pair of side surfaces.

After obtaining the sintered body, a ceramic slurry or a synthetic resin is adhered to the outer peripheral side surface and cured to obtain an electronic component chip. Therefore, in the element portion where the electrodes overlap with the ceramic layer interposed therebetween, the sintering proceeds at a uniform sintering speed and temperature, and a sintered body with less distortion that also enhances the gas diffusivity at the time of sintering is obtained. Obtainable. That is, in the present invention, only the element portion is baked first to prevent the occurrence of distortion in the element portion, and for the side margin portion for preventing the exposure of the internal electrode, ceramic slurry or synthetic resin is used in a later step. It is characterized by being cured, thereby preventing the delamination phenomenon in the element portion.

The hardening of the ceramic slurry is performed by re-firing the sintered body to which the ceramic slurry is attached, and the hardening of the synthetic resin is performed by heating after attaching the synthetic resin to the side surface of the sintered body. It is performed by

According to the first aspect of the present invention, the portion which is preliminarily baked as described above is at least an element portion of the element portion and the dummy layer. That is, the dummy layer may be fired together with the element portion when the sintered body is first obtained, or may be formed of the ceramic slurry or the synthetic resin when forming the side margin portion.

According to the second aspect of the present invention, the step of adhering the ceramic slurry or the synthetic resin comprises:
This is performed by placing a sintered body in a mold and filling the mold with a ceramic slurry or a synthetic resin. Therefore, the ceramic slurry or the synthetic resin can be easily and reliably adhered to the periphery of the sintered body.

[0022]

DESCRIPTION OF THE PREFERRED EMBODIMENTS [First Embodiment] A method of manufacturing a ceramic laminated electronic component according to one embodiment of the present invention will be described with reference to FIGS. Although the present embodiment is applied to a method for manufacturing a multilayer capacitor, the present invention can be applied to a method for manufacturing a multilayer ceramic electronic component other than a multilayer capacitor.

First, as shown in FIG. 7, a mother ceramic green sheet 11 punched into a rectangular shape is prepared. Next, a plurality of internal electrode patterns 12, 12a are formed on the ceramic green sheet 11 of the mother. The internal electrode patterns 12 and 12a can be formed by screen-printing a conductive paste or by a thin film forming method such as gravure transfer or vapor deposition, plating or sputtering.

The internal electrode patterns 12 are formed so as to reach both side edges 11a and 11b of the ceramic green sheet 11, respectively. In addition, the internal electrode pattern 12
“a” is formed so as to reach both side edges 11 a and 11 b, and the width thereof is smaller than that of the internal electrode pattern 12. The internal electrode patterns 12, 12a are formed with a gap region g having a predetermined width as shown in the figure.

Next, the ceramic green sheets 11 on which the internal electrode patterns 12 and 12a are printed are laminated so that the internal electrode patterns 12a are alternately located on the opposite sides.
The laminate 13 shown in FIGS. 8 and 9 is obtained by pressing in the thickness direction.

Next, the laminate 13 is cut along a dashed line E shown in FIG. 9B to obtain a laminate 14 shown in FIG. The laminated body 14 is cut along the length direction at predetermined dimensions using a cutting blade 15.

By the above cutting, a laminated green chip is obtained, and the laminated green chip is fired to obtain a sintered body 17 (FIG. 11). In the sintered body 17, the internal electrode patterns 12, 12
a plurality of internal electrodes 12A and 12
B are stacked separated by a ceramic layer.
Further, the plurality of internal electrodes 12 </ b> A
4A, the plurality of internal electrodes 12B are drawn out to the end face 17b. Further, the plurality of internal electrodes 12A and 12B
The opposite side faces 17 of the sintered body 17
c, 17d. That is, since the sintered body 17 is obtained through the above manufacturing process, the internal electrode 12
A and 12B are arranged so as to reach the entire width of the sintered body 17.

In this case, the sintered body 17 constitutes the element portion of the multilayer capacitor, but is uniformly pressed in the thickness direction at the stage of the laminated body 13 and has a plurality of internal electrodes 12A, 12B. Since the ceramic green sheet layer laminated via is configured in a uniform state,
Strain hardly occurs in the ceramic layer in the sintered body 17.
Therefore, in the sintered body 17, the delamination phenomenon, which is called delamination, hardly occurs.

Next, a mold 18 shown in FIG. 12 is prepared. The mold 18 has a plurality of recesses 19 arranged on a matrix. Each recess 19 is configured to have a size that can accommodate the sintered body 17.

As schematically shown in FIG.
The sintered body 17 is put into the tube 9 and then filled with a ceramic slurry. As the ceramic slurry to be used, it is desirable to use a ceramic slurry having a relatively low temperature and a small change in shrinkage.

Next, the ceramic sintered body 17 around which the ceramic slurry is adhered is taken out of the mold 18. The taken-out structure is shown in a cross-sectional view in FIGS.

As is apparent from FIG. 14, a ceramic slurry layer 20 is formed around the ceramic sintered body 17. Next, the ceramic slurry covering both end faces 17a and 17b of the sintered body 17 is removed by a method such as polishing, and as shown in FIG.
12B is exposed on both end faces 17a and 17b.

Thereafter, the chip shown in FIG. 15 having the ceramic slurry layer 20 formed on the outer peripheral side surface of the sintered body 17 is fired, and the ceramic slurry layer 20 is sintered. Thus, the electronic component chip 21 shown in FIG. 16 can be obtained. In FIG. 16, reference numeral 20A denotes a dummy ceramic layer,
Is formed by firing. Electronic component element chip 21
And a pair of external electrodes 2 so as to cover both end faces 21a and 21b.
2 and 23 are formed to obtain a multilayer capacitor 24.

The external electrodes 22 and 23 are formed as follows.
It can be performed according to a conventional manufacturing method of a multilayer capacitor, by applying and baking a conductive paste containing a metal such as silver on both end surfaces 21a and 21b of the electronic component chip 21, or by plating or vapor deposition. Can be formed. The external electrodes 22 and 23
When the baking temperature of the external electrode is close to the baking temperature of the ceramic slurry layer 20 when applying and baking a conductive paste, the baking of the ceramic slurry layer 20 and the baking of the external electrodes 22 and 23 are performed. The firing may be performed in the same step.

If necessary, the outer surfaces of the external electrodes 22 and 23 may be further plated with Ni and Sn layers.
In the manufacturing method of the multilayer capacitor of the present embodiment, since the sintered body 17 forming the element portion is pre-fired as described above,
In the finally obtained multilayer capacitor 24, distortion is unlikely to occur in the element portion, so that delamination and the like are unlikely to occur. In addition, since the gas diffusivity upon firing is also enhanced, the thermal shock resistance and mechanical shock resistance of the multilayer capacitor are enhanced, and even when the capacitor is placed in a high-temperature, high-humidity environment, Electrical characteristics such as insulation resistance are unlikely to decrease. In addition, since the diffusivity of gas during firing is also enhanced, the sintering state of the element portion is uniform, variation in capacitance is unlikely to occur, and when a large number of multilayer capacitors are manufactured, between different multilayer capacitors, Variations in capacitance can also be reduced.

In the above embodiment, the sintered body 17 is put into the mold 18 and filled with the ceramic slurry to form the slurry layer 20 on the entire outer peripheral surface of the sintered body 17, and the rear end faces 17a, 17b Although the upper ceramic slurry layer was removed by polishing or the like, the dimensions of the mold 18 were determined in advance so that the ceramic slurry did not adhere to the end faces 17a and 17b, or a mask or the like was provided on the end faces 17a and 17b. Alternatively, the ceramic slurry may be prevented from adhering to the end faces 17a and 17b. By doing so, the polishing operation of the ceramic slurry can be omitted.

Next, an experiment conducted to confirm the effects of the above embodiment and the results thereof will be described. Experimental Example 1 A multilayer capacitor was manufactured according to the method of the above-described embodiment. As a raw material, a ceramic green sheet having a thickness of 30 μm was prepared using a ceramic slurry containing barium titanate as a main component. This ceramic green sheet was punched into a rectangular shape to prepare a mother ceramic green sheet 11 shown in FIG. The internal electrode patterns 12, 12a are formed on the mother ceramic green sheet according to the above embodiment, and the ceramic green sheets on which the internal electrode patterns are printed are laminated so that the number of laminated electrodes is 30 to obtain a laminate. Was. In addition, as the slurry attached to the outer peripheral side surface of the sintered body obtained by firing the above-mentioned laminate, a slurry mainly composed of barium titanate-based ceramic powder was used. The ceramic slurry layer 20
Had a thickness of 300 μm.

For comparison, the internal electrode pattern was printed according to the conventional method using the mother ceramic green sheet prepared in the above example, and the number of laminated internal electrodes was 30.
Obtain a laminate having a thickness of 300 μm
A plurality of ceramic green sheets were laminated to form a dummy layer having a thickness of m, and a mother laminate was obtained by pressing in the thickness direction. Using this mother laminate,
According to the conventional method, a multilayer capacitor corresponding to the example was produced. Incidentally, also in the multilayer capacitor of this comparative example,
The width of the side margin portion was 300 μm as in the example.

The delamination occurrence ratio was examined for each of the 500 multilayer capacitors of the embodiment and the comparative example obtained as described above. Also, 30 for each of the 50 multilayer capacitors
A thermal shock resistance test was performed by giving a temperature change of 0 ° C., and deterioration of insulation resistance (IR) was examined. Degradation of insulation resistance is 10Ω
The above cases were regarded as defective. Further, a high temperature load test and a moisture resistance load test were performed on the multilayer capacitors of the examples and the comparative examples in the following manner.

High temperature load test: A decrease in insulation resistance after 250 multilayer capacitors were left at a temperature of 85 ° C. for 2000 hours was measured. The case where the insulation resistance reduction value was 10Ω or more was determined to be defective.

Humidity load test: relative humidity 95%, 85 ° C
250 multilayer capacitors were allowed to stand for 2000 hours in the environment described above, and changes in insulation resistance before and after the standing were measured. When the decrease in insulation resistance was 10Ω or more, it was determined to be defective.

Further, the capacitance was measured for 72 multilayer capacitors of the example and the comparative example, and their variation CV was measured.
The value (%) was measured.

[0043]

[Table 1]

As is clear from Table 1, the occurrence rate of delamination, the deterioration of the insulation resistance after the thermal shock test, the deterioration of the insulation resistance after the high-temperature load and the moisture-proof load test, and the variation of the capacitance were all significant. It is clear that the multilayer capacitor obtained in the example is superior to the multilayer capacitor obtained by the conventional method.

[Second Embodiment] In the first embodiment, after a sintered body 17 is obtained, a ceramic slurry is poured into a mold 18 so that a ceramic slurry layer 20 is formed on the outer surface of the sintered body 17. However, instead of forming the ceramic slurry layer, a synthetic resin layer may be formed.
That is, synthetic resin is injected into the concave portion 19 of the mold 18,
By curing, the synthetic resin layer 25 may be formed on the outer surface of the sintered body 17 as shown in FIGS. In this case, the portion of the synthetic resin layer 25 on the end faces 17a and 17b of the sintered body 17 is removed by polishing or the like, and then the external electrodes are provided in the same manner as in the first embodiment, so that the lamination is performed. A capacitor can be configured. As is clear from the second embodiment, the sintered body 17
After obtaining, the synthetic resin layer may be formed so as to cover the outer peripheral side surface of the sintered body 17, thereby forming a side margin portion and a dummy layer, thereby improving the moisture resistance of the element portion.

Also in the second embodiment, since the steps up to the step of obtaining the sintered body 17 are performed in the same manner as in the first embodiment, the occurrence of delamination in the element portion is prevented as in the first embodiment. can do. In addition, since sintering distortion hardly occurs in the element portion, thermal shock resistance and mechanical shock resistance are also improved.

Next, a specific experimental example of the second embodiment in which the synthetic resin layer 21 is formed around the sintered body 17 constituting the element portion as described above will be described. Experimental Example 2 Using a ceramic slurry containing titanium oxide as a main component,
A mother ceramic green sheet whose thickness was controlled so that the final thickness of the ceramic layer was 30 μm was prepared. The mother ceramic green sheets 11 on which the internal electrode patterns are printed are laminated so that the number of laminated internal electrode patterns becomes 10, a laminated body is obtained, and after pressing in the thickness direction, it is cut into individual laminated capacitor units. Thus, a laminated green chip was obtained. The obtained laminated green chip was fired in the same manner as in the first example to obtain a sintered body. The obtained sintered body is placed in a mold in the same manner as in Experimental Example 1, except that an epoxy resin that cures in an anaerobic state is filled and cured instead of the ceramic slurry, and the structure shown in FIG. 17 is obtained. I got Thereafter, the synthetic resin layer on both end faces 17a and 17b of the sintered body 17 is removed by polishing, and the end faces 17a and 17b are removed.
An external electrode was formed so as to cover the multilayer capacitor to obtain a multilayer capacitor of Example 2. The thickness of the synthetic resin layer in the side margin was set to about 200 μm. Note that, in the step of obtaining the above-described Example 2, when the mother laminate is cut to obtain individual laminate raw chips, the width of the laminate raw chip, that is, the width of the internal electrode is made different, so that various multilayer capacitors can be formed. Produced.

For comparison, as a comparative example, a multilayer capacitor corresponding to the multilayer capacitor of the above-mentioned Example 2 was manufactured according to a conventional method, and the result was designated as Comparative Example 2. The capacitance was measured for each of the 72 multilayer capacitors of Example 2 and Comparative Example 2 obtained as described above. The capacitance variation (CV value)
Table 2 below shows the average values of the capacitances.

In Comparative Example 2, by changing the number of internal electrodes to be laminated, the same capacitance as each of the multilayer capacitors of Example 2 could be realized, so that various capacitance samples were obtained. Was prepared. The results are shown in Table 2 below.

[0050]

[Table 2]

As is clear from Table 2, according to the method of the second embodiment, it is possible to easily obtain multilayer capacitors having various capacities by controlling the width at which the laminated green chip is cut. Further, it can be seen that the capacitance variation can be greatly reduced as compared with the conventional example.

EXPERIMENTAL EXAMPLE 3 Instead of forming the ceramic slurry layer 20 on the outer periphery of the sintered body 17, an epoxy resin which hardens in an anaerobic state is filled in the mold so that the width of the side margin portion becomes 300.
Except that the synthetic resin layer 25 of μm was formed, the multilayer capacitor of the example was manufactured in the same manner as in Experimental Example 1.
Evaluation was performed in the same manner as in Experimental Example 1. The results are shown in Table 3 below. In Table 3, the results of the multilayer capacitor of the comparative example prepared in Experimental Example 1 are also shown.

[0053]

[Table 3]

As is apparent from Table 3, even when the side margin portion is formed by the synthetic resin layer, the delamination occurrence ratio, the thermal shock test, the high-temperature load test, and the moisture-resistant load test are performed in the same manner as in Experimental Example 1. It can be seen that in each case, the results are superior to those of the comparative example, and the variation in capacitance is small.

[0055]

According to the present invention, a sintered body for forming an element portion is prepared in advance by firing a laminated green chip having an internal electrode having a full width, and a ceramic is provided around the sintered body. At least a side margin portion is formed by attaching and curing a rally or a synthetic resin.

Accordingly, since the sintered body constituting the element portion is fired in a uniform state, sintering distortion hardly occurs, and it is possible to prevent a delamination phenomenon called delamination. it can. Further, since no large strain remains in the sintered body, the thermal shock resistance and the mechanical shock resistance are improved. In particular, when the periphery is covered with a synthetic resin layer, mechanical shock resistance is further enhanced by the relaxation effect of the synthetic resin.

Further, since no large strain remains inside the sintered body constituting the element portion, the periphery is covered with a ceramic layer or a synthetic resin layer formed by firing a ceramic slurry. Therefore, deterioration of the element portion due to chemical treatment such as plating is unlikely to occur, and moisture resistance is also improved. Therefore, the reliability of the multilayer ceramic electronic component can be improved.

In addition, since a large strain does not remain in the ceramic constituting the element portion and the gas diffusivity upon firing is improved, a uniform sintered body (element portion) is obtained. Accordingly, variations in electrical characteristics such as capacitance can be significantly reduced.

In the past, the external dimensions sometimes fluctuated due to variations during firing of ceramics and various processing variations. However, as described in claim 2, a ceramic slurry or synthetic resin surrounds the sintered body. When at least the side margin portion is formed, the outer shape of the finally obtained ceramic laminated electronic component can be determined by the size of the mold to be used, so that the variation in the outer size can be reduced.

[Brief description of the drawings]

FIG. 1 is a plan view showing a mother ceramic green sheet used in a conventional method.

FIG. 2 is a perspective view showing a laminate prepared by a conventional method.

FIGS. 3 (a) and 3 (b) are views taken along lines AA and B-
Sectional drawing which follows the B line.

FIG. 4 is a schematic perspective view for explaining a laminated raw chip prepared by a conventional method.

5 (a) and (b) are a cross-sectional view and a vertical cross-sectional view of the laminated green chip of FIG.

FIG. 6 is a perspective view for explaining another example of a conventional multilayer capacitor.

FIG. 7 is a plan view showing a mother ceramic green sheet prepared in an example and internal electrode patterns formed thereon.

FIG. 8 is a perspective view showing a mother laminate prepared in the embodiment.

9 (a) and (b) are lines AA and B-
Each sectional view which follows the B line.

FIG. 10 is a perspective view showing a step of cutting the mother laminate in the embodiment.

FIG. 11 is a perspective view showing a sintered body prepared in an example.

FIG. 12 is a perspective view showing a mold having a concave portion into which a sintered body is placed.

FIG. 13 is a schematic perspective view showing a state in which a sintered body is filled in a concave portion in a mold.

FIGS. 14 (a) and (b) are cross-sectional views showing a state in which a ceramic slurry is formed around a sintered body.

FIG. 15 is a cross-sectional view showing a state in which ceramic slurry provided on both end surfaces of the sintered body has been removed by polishing.

FIG. 16 is a sectional view showing the multilayer capacitor obtained in the example.

17A and 17B are a longitudinal sectional view and a transverse sectional view showing a state in which a synthetic resin layer is formed around a sintered body in the second embodiment.

[Explanation of symbols]

 11: Mother ceramic green sheet 12, 12a: Internal electrode pattern 13: Mother laminated body 14: Laminated body 12A, 12B: Internal electrode 17: Sintered body 17a, 17b: End face of sintered body 17c, 17d: Sintered Side surface of body 18 ... Mold 19 ... Depression 20 ... Ceramic slurry layer 21 ... Electronic component chip 22, 23 ... External electrode 24 ... Multilayer capacitor 25 ... Synthetic resin layer

────────────────────────────────────────────────── ─── Continuation of front page (72) Inventor Yasunobu Yoneda 2-26-10 Tenjin, Nagaokakyo-shi, Kyoto Murata Manufacturing Co., Ltd. (56) References JP-A-4-39916 (JP, A) JP-A Sho 59-34622 (JP, A) JP-A-6-204271 (JP, A) JP-A-62-226613 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H01G 4/12 -4/42

Claims (2)

(57) [Claims] 1. A ceramic comprising: an element portion in which a plurality of internal electrodes overlap each other via a ceramic layer; a dummy layer disposed above and below the element portion; and a side margin portion disposed on a side of the element portion. A method of manufacturing a laminated electronic component, comprising: laminating a plurality of ceramic green sheets with a plurality of internal electrodes interposed therebetween, and exposing the internal electrodes to a pair of opposing side surfaces; A step of preparing a laminate raw chip for constituting at least the element portion of the portion and the dummy layer; and sintering the laminate raw chip so that both side surfaces of the plurality of internal electrodes are exposed to outer surfaces. Obtaining a sintered body, and applying one of a ceramic slurry or a synthetic resin around four side surfaces including the outer side surface of the sintered body; Or a step of obtaining an electronic component device chip while curing the synthetic resin, and a step of forming external electrodes which are connected electrically with the internal electrodes on the electronic component element chip, a manufacturing method of a ceramic multilayer electronic part. 2. The step of adhering one of the ceramic slurry or the synthetic resin includes: placing the sintered body in a mold;
The method for manufacturing a ceramic laminated electronic component according to claim 1, wherein the method is performed by filling a ceramic slurry or a synthetic resin in a molten state in a mold.