JP2986828B2 - Wiring design support method and device, and screen display method - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a wiring design support method and apparatus using a CAD system or the like, and is particularly suitable for making it easy to see a screen display when designing complicated wiring. The present invention relates to a method and apparatus for supporting a wiring design and a screen display method.

[Prior art] When designing wiring patterns for LSI and printed circuit boards,
Currently, CAD systems are used to design wiring patterns on screens such as CRTs.

FIG. 7 (a) is an explanatory diagram of wiring addition in a conventional wiring design. It is assumed that the existing wirings 5 and 6 are drawn along the wiring grid 1. The existing wiring 6 is a line drawn on the first layer,
The existing wiring 5 is a line drawn on the second layer, and both are connected by a through hole 7. Now, a case where the wiring 4 connected to the second-layer existing wiring 5 is added to the first layer will be described. The designer designates the connection starting point 2 of the wiring 4 with a pointing device such as a mouse or a stylus pen, and then designates the end point 3 so that the line 4 connecting the two points 2 and 3 is drawn, and the wiring 5
And a through hole 7a for connecting the wiring 4 is added. In this case, if the starting point 2 is specified on the already-wired 5,
Is divided into line segments 5a and 5b. The line segment 5b is a line necessary to connect the additional line 4 and the existing line 6, but the line segment 5a is an unnecessary line because it is a surplus line that is not connected to anything other than the starting point 2. Conventionally, the existence of such extra wiring is not a violation of the wiring rule itself, and therefore, it is necessary for the designer to delete the extra wiring after designing the wiring pattern.

When specifying the starting point 2 and the ending point 3, it is practically difficult to specify the starting point 2 and the ending point 3 without shifting on the grid point. Japanese Patent Application Laid-Open No. 63-244113 discloses a technique for correcting a line connecting a starting point 2 and an end point 3 so as to follow the wiring grid when the line is inclined with respect to the wiring grid. Circuit design system HICAD / LOG "
(Document No. 8090-7-048), which are not directly related to the invention of the present application, will not be described further.

FIG. 7B is an explanatory diagram of a conventional example in which a wiring is added in the same direction as the existing wiring 6. If the starting point 2 of the additional wiring is specified in order to add a wiring in the same direction as the existing wiring 6 and then the end point 3 is specified, the starting point 2 is not at the end of the existing wiring 6 but inside of the end as shown in the figure. , Overlapping parts of wiring
Since 6a appears, the wiring rule is violated. In this case, the entire additional wiring violates the wiring rule, so that the previous specification must be canceled and a new start point 2 must be specified.

FIG. 8 is a diagram illustrating a screen display example when the additional wiring violates the wiring rule. The broken line 4d in the figure is the additional wiring that violated the wiring rule. In the conventional case, all the additional paths of the additional wiring 4d are displayed, violation marks 4e are displayed in all the areas where the additional wiring 4d is violated, and a character example usually provided at the bottom of the screen An error message such as a violation reason and a countermeasure is displayed in the display area 4f.

[Problems to be Solved by the Invention] In the above-described related art, a case where an additional wiring is connected in the middle of an existing wiring (a case where a second additional wiring is connected in the middle of a first additional wiring is included. In such a case, the first additional wiring is referred to as an existing wiring.) In addition, it is unavoidable that the above-described surplus wiring is generated. In the conventional case, the surplus wiring which is not required to be chucked one by one is deleted. This is because even if the other end side is free and looks like surplus wiring, it may be necessary wiring. However, as in recent years, multilayer wiring printed circuit boards such as six-layer and eight-layer have become popular, or as the degree of integration has increased as in the case of VLSI, complicated and dense wiring patterns have been designed. Then, the number of surplus wirings to be deleted becomes enormous, and the number of surplus wirings to be forgotten to delete increases.
The remaining surplus wiring is found to be in violation of the wiring rule by the wiring rule check by the batch method. However, it is necessary to return to the interactive processing at the time of wiring design again and delete it, and there is a problem that the design man-hour is required. .

In the case of designing a wiring while viewing wiring patterns in a wide area at a time, each wiring pattern becomes small (a wiring grid interval becomes narrow). As explained in FIG.
It is difficult to specify the end point of the already-routed wiring, and in many cases, the wiring rule is violated. In this case, enlarge the screen display,
It is necessary to repeat the wiring addition process again, which is a factor of increasing the design time.

Further, as shown in FIG. 8, when the wiring pattern that violated the rule is displayed over other wiring patterns or patterns such as through holes or wiring prohibited areas, the line color and line type (solid line) are displayed. , Dashed line, chain line, etc.) or the thickness of the line, it is difficult to distinguish these patterns with the naked eye, and there is a problem that it is difficult to correct them again. Further, in the conventional case, a violation wiring pattern, a violation mark, and the like are highlighted in a large conspicuous color so that a wiring rule violation part can be easily found. However, when the violation part of the wiring rule covers a wide area, only the violation part is conspicuous, so that the wiring pattern becomes difficult to see and the wiring is difficult to correct. Furthermore, in the related art in which an error message is displayed in a character string display area provided at the bottom of the screen, when a plurality of error messages are displayed, it is not possible to determine which part of the error message is the error message, and the character Since there is a limit to the number of characters that can be displayed in the display area, the number of violations and the number of error messages do not correspond one-to-one, causing a problem that error messages are not very useful.

Conventionally, the above problems, which have not been much of a problem, are caused by an increase in the number of layers of a printed circuit board and an increase in the degree of integration of an LSI.
In view of the technical trend toward high integration, solving the above problems cannot be avoided.

SUMMARY OF THE INVENTION An object of the present invention is to provide a wiring design support method, a device therefor, and a screen display method, which make it easy to view a display screen and easily design a wiring pattern in a short time.

[Means for Solving the Problems] The object of the present invention is to extract and display wiring terminal information, inter-terminal wiring information, and wiring rule information from a storage device that stores the information to support the design of a wiring pattern. When a wiring is added with the existing wiring as a connection end point, the divided wiring of the already-divided wiring divided at the connection end point specified by the pointing device is not connected to any wiring terminal or another wiring path, and its end If the length of the divided wiring up to the threshold is less than or equal to the threshold, this is achieved by automatically deleting the divided wiring having a length equal to or less than the threshold from within the wiring path information of the storage device. , 7).

The above object is also achieved by immediately checking the added wiring using the wiring rule information when the wiring is added, and displaying the entire route of the additional wiring shifted from the added position when the rule is violated. (Claims 2, 5, 8).

[Action]

Short divided wires below the threshold are deleted as surplus wires, and long divided wires are not deleted because they are likely to be necessary wires, so the number of operations such as enlarging, reducing, and moving the display screen of the wiring pattern is greatly reduced. Wiring design can be facilitated in a short time. Further, the correspondence with the violating wiring pattern and the error message can be easily seen on the screen on which the complicated wiring pattern is displayed, and the design becomes easy.

Embodiment An embodiment of the present invention will be described below with reference to FIGS. 1 to 6.

FIG. 3 is a configuration diagram of a wiring design support apparatus according to one embodiment of the present invention. This wiring design support device includes a display device 21 such as a CRT and an input device such as a keyboard and a mouse.
22, a wiring pattern display system 24, and a storage device 23. The storage device 23 stores wiring terminal information, inter-terminal wiring information, wiring prohibition information, wiring rule information, and the like. The wiring pattern system 24 has a wiring path correction function 25
And an unnecessary wiring route deleting function 26 and a wiring rule violation pattern displaying function 27.

Prior to the correction, the operator retrieves the detailed pattern information of the wiring path to be corrected by the storage device 23 and displays the information on the display device 21. The operator inputs the start point 2 and the end point 3 of the wiring route to be added from the input device 22 while viewing the display screen. Based on this, the wiring path correction function 25 in the wiring pattern display system 24 operates to correct the added wiring path on the wiring grid. At this time, the unnecessary wiring path deletion function 26 operates, and deletes a part of the unnecessary wiring as described later in detail.

FIG. 4 is a diagram showing the intersecting relationship of the wiring routes drawn on the wiring grid, wherein the solid line segment 8 is the existing wiring, and the broken line 9 is the additional wiring. Since the wiring grid is parallel to the X and Y axes, the wiring path is also parallel to the X and Y axes. Accordingly, there are twelve types of intersecting relations of the wiring paths, as shown in FIGS.

(A) The existing wiring 8 and the additional wiring 9 have no connection relationship.

(B) The additional wiring 9 is parallel to the existing wiring 8 and contacts at the end point.

(C) Part of the additional wiring 9 overlaps with the existing wiring 8.

(D) The additional wiring 9 is included in the existing wiring 8 and one end point is made the same.

(E) The additional wiring 9 is included in the existing wiring 8, and the end points are not the same.

(F) The additional wiring 9 and the existing wiring 8 are completely the same.

(G) The additional wiring 9 includes the existing wiring 8 and one end point is the same.

(H) The additional wiring 9 includes the existing wiring 8 and the end points are not the same.

(I) The additional wiring 9 is perpendicular to the existing wiring 8 and contacts each other at end points.

(J) The additional wiring 9 is perpendicular to the existing wiring 8, and the end point of the existing wiring 8 is on the path excluding the end point of the additional wiring 9.

(K) The additional wiring 9 is perpendicular to the existing wiring 8, and the end point of the additional wiring 9 is on a path excluding the end point of the existing wiring 8.

(L) The additional wiring 9 and the existing wiring 8 are orthogonal.

In this embodiment, as shown in FIG. 2A, when the wiring 4 is added to the existing wiring 5, the other end side of the divided lines of the existing wiring 5 divided at the connection end point 2 of the wiring 4 A dividing line to which nothing is connected and whose length is equal to or less than the threshold length is a wiring 4
Are automatically erased when they are added (the information is erased from the wiring route information in the storage device 23 and the display is also erased). Further, as shown in FIG. 2 (b), when adding a wiring 4 which is parallel to the existing wiring 6 and whose end point 2 is on the existing wiring path, a part of the overlapping existing wiring 6 is replaced with the wiring 4 And delete it at the same time. In the wiring rule according to the present embodiment, as shown in FIG. 2 (b), when a part of the wiring overlaps, the rule is violated.
Rule violations will be resolved.

Next, details of the above-described wiring correction procedure will be described with reference to the flowchart of FIG.

First, the support device reads the existing wiring data in the correction range designated by the operator, reads the corresponding data from the storage device, and displays the data on the display screen. Then, it waits for an input by the operator. When the operator additionally corrects the wiring, the starting point and the ending point are input. Therefore, on the support apparatus side, the additional wiring path is obtained from the starting point and the ending point, and the wiring is divided at the starting point or the ending point of the additional wiring. Find the divided wiring of the existing wiring. Then, a wiring rule check is immediately performed on the additional wiring.

4 (c), (d), (e), (f), (g),
If there is an intersection between (h) and (l), it is determined that there is an error in this wiring rule check. In this case, it is next determined whether or not the error has occurred because the divided wiring is included in the additional wiring or is an error.
In the case of FIGS. 4 (d), (e), (h) and (l),
Since it cannot be said to be "included", it is a violation of the wiring rules.
If there is an intersecting relationship of FIGS. 4 (c), (f), and (g), since the divided wiring is included in the additional wiring, a deletion flag is set in the divided wiring in the next step.

If there is an intersecting relationship of FIGS. 4 (a), (b), (i), (j), and (k), the result of the wiring rule check is error-free. If there is no error, it is next determined whether or not there is a divided wiring that is not connected to any wiring terminal or wiring path and has a length equal to or less than the threshold value. The determination result is “No” in the case of FIGS. 4 (a), (b), (i) and (j), and “Yes” in the case of FIG. 4 (k).
If the determination result is Yes, a deletion flag is set as described above. If this determination result is No or the deletion flag is set, then a through hole to be added is obtained from the wiring path to be added.

When an additional through hole is obtained, a wiring rule check is immediately performed on the additional through hole, and it is determined whether there is an error in this check. If there is no error, in the next step, the divided wiring for which the deletion flag is set is deleted (the surplus wiring of the overlapping portion in FIGS. 4 (c), (f) and (g) is deleted by this deletion processing). Is deleted, and the surplus wiring whose end point in FIG. 9 (k) is free is deleted.), The additional wiring path is stored in the storage device and displayed on the screen, and the additional three-hole data is stored in the storage device and the screen is displayed. Is displayed and the present process is terminated.

When there is an intersecting relationship between FIGS. 4 (d), (e), (h), and (l) or when there is an error in the additional through-hole, it is necessary to display the error to the operator so as to be easily understood. . Therefore, first, all of the additional wiring paths are displayed shifted from the position where they were added as wiring rule violation patterns. A display example is shown in FIG. Then, the violating portion of the wiring route is displayed as one representative for each wiring route. That is, only one violation mark 4b is displayed for each violation location.
FIG. 5 (a) shows a display example when there is one violation part, and FIG. 5 (b) shows a display example when there is a plurality of violation parts. Next, when there are a plurality of violating portions, an error message 4c is displayed near the earliest wiring in the order of addition among the violating portions, and this processing ends. The error message 4c is displayed, for example, by setting a display reference point on the right side of the violation mark 4b indicating the rule violation pattern.

Next, the details of this error display will be described. When a wiring rule check is performed on the additional wiring route and a rule violation is found, the wiring rule violation pattern display function 27 in FIG. 3 displays the rule violation pattern as a broken line from the additional position as described above. The display coordinate position of the rule violation pattern is calculated from the following equation.

RX = FLOAT (IX) + 0.2 RY = FLOAT (IY) + 0.2 where (IX, IY) is the integer coordinate value of the input point, and (RX, RY) is converted to the display coordinate system. It is the coordinate value of the real number later. That is, as shown in FIG. 5, the rule violation pattern 4a is displayed shifted from the wiring grid by 0.2.

In the case of this embodiment, the violation mark 4b is displayed at a point on the right side by one grid with respect to the leftmost point if the rule violation pattern path is parallel to the X-axis. If it is parallel to the Y axis, it is displayed at a point one grid above the lowermost point.

The above is the details of the wiring design support method according to the embodiment of the present invention. The method of determining the crossing relationship and what portion to delete when the crossing relationship is determined may be determined according to the design target to which the present invention is applied. Next, an example of an algorithm for examining the intersection relation is shown in FIGS. 6A and 6B, and an example of a deletion algorithm is shown in FIG. 6C for reference.

The algorithms illustrated in FIGS. 6 (a) and 6 (b) are described in Fortran, and the cross relations (a) to
(L) is represented by numerical values 0 to 11, respectively. Also, the starting point of the existing wiring is (KX2, KY2) and the ending point is (KX3, KY3), provided that KX2 ≦ K
X3, KY2 ≦ KY3, the starting point of the additional wiring route is (IX2, IY2),
The end point is (IX3, IY3), where IX2 ≦ IX3, IY2 ≦ IY3. In this algorithm, the variables are all integers. This algorithm is executed for all the newly added wiring routes including the already divided wirings and all the existing wirings in the vicinity thereof, and the value of KOUSA is checked to find the crossing relationship.
In this algorithm, all the wiring paths to be added other than the additional wiring paths to be examined are treated as being temporarily wired.

In the deletion algorithm shown in FIG. 6 (c), all variables are integers. ERRCD is an error code. If its value is 0, it indicates normal termination, and if it is 1, it indicates an error. LIMIT is a threshold value.
The divided wiring is not deleted. If shorter, delete it. Here, the threshold is set to 10 grid lengths, but this value can be freely set by the operator. DELETE has a function of deleting a wiring route specified by an argument in a subroutine. FLG = 1 is a flag indicating that the wiring is a divided existing wiring not connected to any wiring terminal or wiring route. 0 is a flag indicating that it is another wiring route.

In this algorithm, the determination (1) is the processing of FIGS. 4 (f) and 4 (g), and the existing wiring overlapping the additional wiring path is deleted. The judgment (2) is the processing of FIG. 4C, and the divided existing wiring overlapping the additional wiring path is deleted. The judgment (3) is the processing of FIG. 4 (k), in which the divided wiring having a length less than LIMIT is deleted. The judgment (4) is the processing of FIGS. 4 (d), (e), (h), and (1). Since such an intersecting relationship cannot be processed, the addition of the wiring route is invalidated.

[Effects of the Invention] According to the present invention, the display screen is easy to see, and the design of the wiring pattern can be facilitated in a short time.

[Brief description of the drawings]

1 (a), 1 (b) and 1 (c) are flowcharts showing processing procedures of a wiring design support method according to one embodiment of the present invention;
2 (a) and 2 (b) are diagrams for explaining the removal of surplus wiring by the processing procedure shown in FIG. 1, FIG. 3 is a configuration diagram of a wiring design support apparatus according to an embodiment of the present invention, and FIG. Figure (a),
(B), (c), (d), (e), (f), (g),
(H), (i), (j), (k), and (l) show the crossing relationship between the existing wiring and the additional wiring, and FIGS. 5 (a) and (b) show one embodiment of the present invention. FIG. 6 (a) and (b) are explanatory diagrams of the intersection relation determination algorithm,
FIG. 6 (c) is an explanatory diagram of a deletion algorithm, FIGS. 7 (a) and 7 (b) are explanatory diagrams of problems in the prior art, and FIG. 8 is an error display screen diagram in the prior art. 4a ... rule violation pattern, 4b ... violation mark, 4c ... error message, 21 ... display device, 22 ... input device, 23
…… Storage device, 24 …… Wiring pattern display system, 25…
… Wiring path correction function, 26 …… Unnecessary wiring path deletion function, 27
…… Wiring rule violation pattern display function.

 ──────────────────────────────────────────────────続 き Continuation of the front page (72) Inventor Shunichi Kobayashi 4026 Kuji-cho, Hitachi City, Ibaraki Pref. Hitachi, Ltd. Hitachi Research Laboratory, Ltd. 7264 (JP, A) JP-A-3-237771 (JP, A) JP-A-64-7265 (JP, A) Proc. Of the 39th Annual Conference of IPSJ (late 1989) (III) 1650-1651 (3V-3) Shinichi Ariyoshi et al. “Gate Array Layout System”

Claims (9)

(57) [Claims] A wiring design support method for extracting and displaying wiring terminal information, inter-terminal wiring information, and wiring rule information from a storage device and supporting the design of a wiring pattern. When a wiring is added as an end point, the divided wiring of the existing wiring divided at the connection end point specified by the pointing device is not connected to any wiring terminal or another wiring path, and the divided wiring to the end is not connected. When the length is equal to or less than the threshold value, the wiring design supporting method is characterized in that the divided wiring having the length equal to or less than the threshold value is automatically deleted from the wiring route information of the storage device. 2. A wiring design supporting method which retrieves and displays wiring terminal information, inter-terminal wiring information, and wiring rule information from a storage device which stores the wiring information and assists in designing a wiring pattern when a wiring is added. A wiring design support method, wherein the additional wiring is immediately checked using the wiring rule information, and when a rule is violated, the entire route of the additional wiring is displayed shifted from an additional position. 3. The wiring design support according to claim 2, wherein all the additional wiring paths determined to be in violation of the rules are displayed with both X and Y coordinates shifted by 0.2 times the grid spacing of the wiring grid. Method. 4. A wiring design support apparatus which retrieves and displays wiring terminal information, inter-terminal wiring information, and wiring rule information from a storage device and supports the design of a wiring pattern. Whether or not each of the two ends of the existing wiring divided by the connection end point specified by the pointing device when a wiring is added as an end point is connected to any wiring terminal or another wiring path Means for determining whether or not the length of the divided wiring from the end point to the connection end point is equal to or less than a threshold value when it is determined that there is an end point not connected by the means. Means for automatically erasing a divided wiring having a length equal to or less than the threshold value from the wiring path information of the storage device when the determination means determines that the divided wiring is equal to or less than the threshold value. Apparatus. 5. A wiring design supporting apparatus which retrieves and displays wiring terminal information, inter-terminal wiring information, and wiring rule information from a storage device for supporting the design of a wiring pattern, wherein a wiring is added. Means for immediately checking the additional wiring using the wiring rule information;
Means for displaying the entire route of the additional wiring shifted from the additional position when a rule is violated. 6. The apparatus according to claim 5, wherein the means for displaying the path deviated from the additional position includes an X-coordinate, a Y-axis, each of which is 0.2 times the grid spacing of the wiring grid.
A wiring design support device characterized in that both coordinates are displayed shifted. 7. A storage device for storing wiring terminal information, inter-terminal wiring information, and wiring rule information, and a display device for displaying, on a screen, a wiring pattern obtained by processing the storage information and input information of the storage device. In the screen display method of the wiring design support apparatus having the above, when an additional wiring is input with the existing wiring as a connection end point, the end point of the already-divided wiring divided by the connection end point specified by the pointing device is any wiring terminal Alternatively, when the wiring is not connected to another wiring path and the length of the divided wiring from the end point to the connection end point is less than or equal to a threshold, the divided wiring having the length equal to or less than the threshold is connected to the wiring of the storage device. A screen display method, wherein the screen information is automatically erased from the path information and automatically erased from the display of the display device. 8. A storage device for storing wiring terminal information, inter-terminal wiring information, and wiring rule information, and a display device for displaying, on a screen, a wiring pattern obtained by processing the storage information and input information of the storage device. In the screen display method of the wiring design support apparatus provided with the above, when the additionally input wiring violates the rule in light of the wiring rule information, all the routes of the wiring added to the display device are displayed shifted from the additional position. Screen display method characterized by the following. 9. A screen display method according to claim 8, wherein the X-coordinate and the Y-coordinate of all the additional wirings determined to be in violation of the rule are shifted by 0.2 times the grid spacing of the wiring grid. .