JP2858445B2 - Self-extinguishing reverse conducting thyristor - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a self-extinguishing type reverse conducting thyristor having a region for electrically isolating and separating a thyristor portion and a diode portion in a semiconductor device which is conducting while conducting in the reverse direction.

[0002]

2. Description of the Related Art In a reverse conducting thyristor in which a gate turn-off thyristor (hereinafter, referred to as GTO thyristor) or an electrostatic induction thyristor (hereinafter, referred to as SI thyristor) and a free wheel diode are integrated on the same semiconductor wafer, a thyristor portion is provided. A technique for electrically separating the diode section from the diode section is important.

FIG. 10 shows a schematic cross-sectional structure of a conventional reverse conductive GTO thyristor. In FIG. 10, 2 'is an n-type base layer, 3 is a p-type anode region, 4 is a p-type gate region,
7 is an n-type cathode region, 8 is a diode n-type region, 9 '
Is a p-type isolation region, 11 is a diode p-type region, 12 is an anode electrode, 13 is a cathode electrode, 14 is a gate electrode,
Reference numeral 15 denotes a diode anode electrode.

In a reverse conducting GTO thyristor, GT
In order to simultaneously form the p-type gate region 4 of the O-thyristor portion and the diode p-type region 11 of the diode portion as the same region, a separation band layer for separating them is provided. That is, the p-type isolation region 9 'which is relatively thin is formed by excavating the p-type region formed at the same time by etching. The GTO thyristor section and the diode section can be electrically separated by controlling the concentration of the p-type isolation region 9 'and increasing the resistance using a region having a relatively low concentration. Forming the etching groove in this manner requires precise control of the depth because the resistance value of the separator and the forward blocking voltage of the GTO thyristor change drastically due to the variation in the depth W of the groove. The withstand voltage between the resistance R of the p-type isolation region 9 'and the gate anode of the thyristor can be controlled by the depth W of the groove.

FIG. 11 is a diagram showing the relationship between the depth W of the etching groove, the resistance R of the p-type isolation region 9 ', and the breakdown voltage V _CBO (between AG) between the gate and anode of the thyristor. It can be seen that the resistance R and the breakdown voltage change in opposite directions depending on the depth of W.

When the GTO thyristor portion or the SI thyristor portion is separated from the diode portion by engraving by etching, an etching groove is formed on the surface, so that the surface is not flat. In addition, the digging has an adverse effect on a subsequent process. For example, the accuracy of pattern matching is deteriorated. In addition, the resist bounces into the dug-out portion, and the resist scatters and remains in the pattern, resulting in a defect that occurs in the patterning process.

In the case where the separation band is formed by engraving the p-type region, the remaining p-type region may not withstand a high electric field because the concentration of the remaining p-type region is relatively low. In this case, the p-type gate region of the GTO and the p-type anode region of the diode are electrically punched through, and a high dv / dt is applied to the thyristor during a period in which the thyristor portion is turned off before carriers completely disappear in the separation band. Deterioration is likely to occur on the gate and the separation zone. Therefore, a separator structure that can withstand such a high electric field and high dv / dt is required. The present applicant has disclosed a reverse conducting thyristor having an electric field relaxation separating structure in Japanese Patent Application No. 5-344125. In order to increase the frequency of the reverse conducting thyristor, it is desirable that the separation band structure be actively flattened and miniaturized. In the above prior art, p
Since the mold separation region is exposed, the resistance R of the separator greatly changes depending on the surface condition of the separator. Therefore, it is desirable to form the p-type isolation region buried in the crystal of the wafer to obtain a stable resistance R of the isolation zone. As another prior art, U.S. Pat. No. 4,742,382 (JP-A-61-219172) also discloses a separation structure in a reverse conductive GTO thyristor. However, it is the same in that the resistance of the separation band region has a structure easily affected by the surface state.

In the surface gate SI thyristor, the buried gate SI thyristor, and the cut-gate SI thyristor, a separator having a structure that can withstand a high electric field and a high dv / dt during high-frequency operation is desirable. Also, a separator structure that can be applied to a fine cathode pattern for high-frequency operation is desirable. In a conventional structure in which a separation zone is dug by etching, a fine pattern becomes impossible because of a large step on the surface. Therefore, a reverse conducting thyristor for flattening the surface of the cathode layer of the thyristor, the surface of the anode layer of the diode, and the surface of the separator layer is required.

In providing a reverse conducting thyristor, a separator structure is required to electrically separate the thyristor and diode from each other in order to arrange the thyristor and diode in antiparallel on the same wafer. Conventionally, the p-type gate region in the thyristor portion and the p-type anode region in the diode portion are connected by the same p-type region, and the surface is chemically etched to form a low-concentration layer by adopting a groove structure. The resistance of the separator was obtained by using the region.

[0010]

SUMMARY OF THE INVENTION According to the present invention, there is provided a self-contained thyristor in which a fine pattern can be formed by avoiding electric field concentration at the thyristor terminal and flattening the surface of the thyristor cathode and the separator in the separation band of the reverse conducting thyristor. An object of the present invention is to provide an arc-extinguishing reverse conducting thyristor.

[0011]

SUMMARY OF THE INVENTION According to the present invention, a separator is formed without forming a groove by using a conventional chemical etching.
Numerous p-type isolation regions are arranged on an n-type wafer (n-type high resistance layer), and an epitaxial layer is formed as an n-type region on these p-type isolation regions, or phosphorus or the like is diffused from the surface. A buried p-type isolation region by forming an n-type region, and performing insulation isolation using an electrostatic induction effect generated between the p-type isolation region and the n-type wafer. Can realize a fine pattern.

Since both the thyristor and the diode need to have their respective breakdown voltages, the current decreases from the conduction state of the diode, and a high electric field is applied to the thyristor when a forward blocking voltage is applied to the thyristor. This high electric field
The best way to disperse the high electric field into the separation zone between the diode and the diode is to extend the depletion layer through a number of p-type isolation regions.

FIG. 12 shows the above prior art (Japanese Patent Application No. 5-344).
125 is a diagram schematically showing a difference in configuration between the present invention and the present invention and a state of resistance distribution in a separation zone. In the prior art, the resistance R is easily changed depending on the surface state. However, in the present invention, a large number of p-type isolation regions are embedded in the crystal, and a stable resistance R is formed by capacitive coupling of the electrostatic induction effect. It has occurred.

In a reverse conducting thyristor in which a thyristor portion and a diode portion are integrated on the same silicon with a separator therebetween, a thyristor portion and a diode portion are provided between a p-type gate region of the SI thyristor portion and a diode p-type region of the diode portion. A plurality of p-type isolation regions are arranged on an n-type wafer without connecting the separated isolation bands with one p-type isolation region, and the p-type isolation regions are buried with an epitaxial layer as an n-type region. I do. A large number of p-type isolation regions are arranged on an n-type wafer without connecting the p-type gate region of the GTO thyristor portion and the diode p-type region of the diode portion, and phosphorus or the like is diffused from the surface,
It is characterized in that an n-type region is formed and this p-type isolation region is embedded. A large number of p-type isolation regions formed by the method described above are characterized by being provided at intervals sufficiently connected to a p-type isolation region adjacent to the p-type isolation region by a depletion layer due to a diffusion potential of a pn junction to an n-type wafer.

Accordingly, the present invention is as described below.
That is, in a self-extinguishing type reverse conducting thyristor integrally formed on a semiconductor substrate of one conductivity type with a separation band interposed between a thyristor portion and a diode portion, a gate region of a thyristor portion formed by the other conductivity type Between the anode and the anode region of the diode, a separation band of one conductivity type is provided, and a plurality of separation regions of the other conductivity type are scattered in the separation band, and the other conductivity type is scattered in the separation band. The isolation region is buried with a layer of one conductivity type, and the vertical termination of the isolation region is a single crystal of one conductivity type.

[0016]

The self-extinguishing reverse conducting thyristor according to claim 1, wherein said one conductivity type layer is an epitaxial growth layer or a diffusion layer.

Alternatively, the one-conductivity-type layer is a diffusion layer, and has a structure as a self-extinguishing type reverse conducting thyristor.

[0019]

When a negative reverse voltage is applied to the gate electrode with respect to the cathode electrode to the reverse conducting thyristor, the thyristor is turned off. At this time, a current flowing from an external circuit from the cathode electrode of the thyristor to the anode electrode flows from the anode electrode of the diode (cathode electrode of the thyristor) to the cathode electrode (anode electrode of the thyristor). In such a state, a high resistance is generated between the gate region of the thyristor unit and the anode region of the diode unit (cathode region of the thyristor). When the voltage is applied as described above, the gate region and the cathode region of the thyristor section have a pn junction, so that the resistance value is close to infinity until an avalanche voltage is generated.
Therefore, it is necessary to increase the resistance between the gate region of the thyristor unit and the anode region of the diode unit.

In the reverse conducting thyristor, the thyristor operates so that the depletion layer does not spread to the diode when a forward blocking voltage is applied. At the same time, the operation is performed so that the electric field does not concentrate on the terminal portion of the thyristor portion. n
By providing a p-type separation zone region on the mold wafer,
An electrostatic induction effect can be induced by periodically providing a junction capacitance generated between the pn junctions where the n junctions are formed. Therefore, no electric field concentration occurs at the end of the thyristor section.

[0021]

FIG. 1 is a cross-sectional structural view of a self-extinguishing reverse conducting thyristor as a first embodiment of the present invention, FIG. 2 is an enlarged view of a separation zone region in FIG. 1, and FIGS. The figure is shown.

In the above embodiment, a reverse conducting SI thyristor having a buried gate structure is shown as an example of the self-extinguishing reverse conducting thyristor. The reverse conducting buried gate type SI thyristor shown in FIG.
It comprises a separation band having a p-type separation region 9 embedded in the mold region 5 and a diode portion. The SI thyristor section includes an n-type high resistance layer 2, a p-type anode region 3, a p-type gate region 4, an n-type region 5, an n-type cathode region 7, and an insulating film 1.
0, an anode electrode 12, a cathode electrode 13, and a gate electrode 14. The diode portion includes an n-type high resistance layer 2, a diode p-type region 11, a diode n-type region 8, and a diode anode electrode 15. The diode n-type region 8 is connected to the anode electrode 12 in common. Commonly connected to cathode electrode 13. The separation band includes an n-type high resistance layer 2, a p-type separation region 9, n-type regions 5, 6,
Diode n-type region 8, insulating film 10, anode electrode 12
including.

FIG. 2 is an enlarged view of a separation zone of a self-extinguishing reverse conducting thyristor as a first embodiment of the present invention. The p-type isolation region 9 is buried in the n-type high resistance layer 2 and the n-type region 5. Reference numeral 16 denotes a depletion layer when a reverse voltage is applied to the p-type isolation region 9, and shows how the depletion layer spreads.

The manufacturing method of the first embodiment will be described below. FIG. 3 shows a process chart of forming the p-type isolation region 9, the diode p-type region 11 and the p-type gate region 4 in the manufacturing method according to the first embodiment of the present invention. As shown in FIG. 3, a p-type isolation region 9, a diode p-type region 11 and a p-type gate region 4 are simultaneously formed on one side of the wafer of the n-type high resistance layer 2 by a diffusion method. The formation condition is to deposit boron (B) which becomes p-type on n-type silicon.

Next, the diode n-type region 8 of the diode portion
Is deposited at 1025 ° C. for 50 minutes with phosphorus (P), and then the p-type anode region 3 is sequentially formed by the selective diffusion method under the same conditions as the p-type isolation region 9 and the like (FIG. 4).

Next, an n-type region 5 is formed in a portion indicated by E in FIG. 5 by an epitaxial growth method. The conditions are such that the n-type resistivity is 2.0 Ωcm and the thickness is 12 μm. At this time, the p-type gate region 4 in the thyristor portion, the p-type isolation region 9 in the separation band, and the diode p-type region 11 in the diode portion are buried.

Next, as shown in FIG. 6, an n-type cathode region 7, an n-type region 6 and a p-type region 11 are formed by a diffusion method, and a portion indicated by C in FIG. Is etched. As can be seen from FIG. 6, the vertical termination of the isolation region is an n-type single crystal silicon layer.

Next, as shown in FIG. 1, an insulating film 10 made of an oxide film or the like is formed on the cathode side surface of the separator, and then an anode electrode 12, a gate electrode 14, a cathode electrode 13, and a diode are formed by aluminum evaporation. An anode electrode 15 is formed.

By the above method, a reverse conducting buried gate type SI thyristor having a structure as shown in FIG. 1 is manufactured. When a negative voltage is applied to the gate electrode 14 as shown in FIG. 2 in which the separation band region is enlarged, the depletion layer 1 is formed around the p-type separation region 9.
6 are formed. A potential structure generated by the electrostatic induction effect is formed between the p-type isolation regions 9. Thereby, the concentration of the electric field can be suppressed.

FIG. 7 is a perspective sectional view for explaining the surface electrode structure of the self-extinguishing reverse conducting thyristor as the first embodiment of the present invention shown in FIG. 1 and the shape of the p-type isolation region 9 in the isolation zone. FIG. The p-type isolation region 9 is formed so as to be buried in a ring shape around a thyristor formed in the center of the wafer. On the other hand, in the thyristor section, a large number of cathode segments having a predetermined width are arranged at the center of the wafer. The pitch (△ 2) of the buried layer of the p-type isolation region 9 in the isolation zone is 40 μm, and the distance between the p-type isolation region 9 and the p-type isolation region 9 (the channel width V in the isolation zone).
2) is set to 10 μm or less. Considering that the pitch △ 1 of the p-type gate region 4 of the SI thyristor is △ 1 = 22 μm and the channel dimension V1 is 0.5 to 1.0 μm,
Both the pitch # 2 and the channel size V2 of the p-type isolation region 9 are designed to have a size margin as compared with the thyristor portion. Although the area of each part is basically the same as that of FIG. 1, FIG. 7 also shows a bevel shape around the wafer. Also, an example is shown in which the diode n-type region 8 on the anode side is formed as an n-type region in the separation band region and as an n ⁺ region in the diode portion. An example in which the p-type anode region 3 is also formed as a p ⁺ region is shown. Of course, it can be formed similarly to FIG. In FIG. 7, the insulating film 10 of FIG. 1 is omitted.

FIG. 8 is a schematic sectional structural view of a self-extinguishing type reverse conducting thyristor as a second embodiment of the present invention. That is, an example of a self-extinguishing type reverse conducting GTO thyristor is shown. The self-extinguishing type reverse conducting GTO thyristor shown in FIG. 8 includes a GTO thyristor section, a separator, and a diode section. The GTO thyristor section includes an n-type high resistance layer 2, a p-type anode region 3,
a p-type gate region 4, an n-type cathode region 7, an insulating film 10,
Anode electrode 12, cathode electrode 13, gate electrode 14
including. The diode part is an n-type high resistance layer 2, a diode p
An anode electrode 12 is commonly connected to the diode n-type region 8, and the diode anode electrode 1 is connected to the diode n-type region 8.
Reference numeral 5 is commonly connected to the cathode electrode 13. The isolation band includes an n-type high resistance layer 2, a p-type isolation region 9, an n-type region 6, a diode n-type region 8, an insulating film 10, and an anode electrode 12.

As can be seen from FIG. 8, the vertical termination of the isolation region is an n-type single crystal silicon layer.

FIG. 9 is a perspective view for explaining the surface electrode structure of the self-extinguishing reverse conducting thyristor as the second embodiment of the present invention shown in FIG. 8 and the shape of the p-type isolation region 9 in the isolation region. It is sectional drawing. Similar to the surface shape shown in FIG. 7, the p-type isolation region 9 is buried in a ring shape around the thyristor.

FIGS. 1 and 2 show a first embodiment of the present invention.
The impurity density of the n-type region 6 in FIGS. 2, 6, 7 and FIGS. 8 and 9 as the second embodiment of the present invention is not necessarily n.
It is not necessary that the impurity concentration be as high as that of the mold cathode region 7. The impurity density may be the same as that of the n-type region 5 or the high resistance layer 2. Therefore, as a modification of the embodiment of the present invention, a configuration in which the n-type region 6 is not actively provided is also possible. In this case, a configuration in which the n-type region 5 remains in place of the n-type region 6 in the embodiment of FIG. 1 is possible. Alternatively, since the n-type region 6 is not actively provided in the embodiment of FIG. 8, the p-type isolation region 9 has a structure embedded in the n-type high-resistance layer 2.

The pitch △ 1 and the channel dimension V1 of the p-type gate region 4 and the pitch △ 2 and the channel dimension V2 of the p-type isolation region 9 of the SI thyristor are only examples. The pitch # 1 and the channel size V1 change depending on the normally-off or normally-on performance of the SI thyristor. The pitch # 2 and the channel dimension V2 of the p-type isolation region 9 are not limited to the above example.
The pitches {2} 1 and V2 <V1 may be set to the same level as the SI thyristor.

[0036]

By using the structure of the present invention, it is possible to prevent the electric field from being concentrated on the thyristor portion by the electrostatic induction effect by using the separation band structure formed by the pn junction formed in the n-type wafer. And the separation distance is 250
In the case of 0 μm, a separation resistance of 760Ω is obtained. By providing a large number of pn junctions between the gate region of the thyristor and the anode region of the diode and embedding this pn junction with n-type single crystal silicon, the concentration of the electric field can be suppressed. With this configuration, it is possible to enhance stability and reliability with respect to the pressure resistance of the separator. In addition, since a flat surface can be obtained as compared with the conventional structure, the pattern can be miniaturized, and the yield of element characteristics can be increased. Furthermore, since the generated carriers do not interfere with the thyristor portion from the thyristor portion or the diode portion with the thyristor portion, the deterioration of the separation band is reduced even at the time of high-frequency operation. Since a withstand voltage almost equal to the direction blocking withstand voltage is obtained, it can withstand a high electric field and a high dv / dt.

[Brief description of the drawings]

FIG. 1 is a schematic cross-sectional configuration diagram of a self-extinguishing reverse conducting thyristor as a first embodiment of the present invention.

FIG. 2 is an enlarged view of a separation zone according to the first embodiment of the present invention.

FIG. 3 is a cross-sectional view of a manufacturing method according to a first embodiment of the present invention;
Forming process diagram of type separation region 9, diode p-type region 11 and p-type gate region 4

FIG. 4 shows a diode n-type region 8 and a p-type anode region 3
Process chart

FIG. 5 is a process chart of forming an n-type region 5 by an epitaxial growth method.

FIG. 6 is an excavation process diagram for making contact with a gate electrode of a thyristor portion after formation of a p-type region 11, an n-type cathode region 7, and an n-type region 6.

FIG. 7 is a perspective cross-sectional view for explaining the surface electrode structure of the self-extinguishing reverse conducting thyristor as the first embodiment of the present invention shown in FIG. 1 and the shape of the p-type isolation region 9 in the isolation region.

FIG. 8 is a schematic cross-sectional structural view of a self-extinguishing reverse conducting thyristor as a second embodiment of the present invention.

FIG. 9 is a perspective sectional view for explaining the surface electrode structure of the self-extinguishing reverse conducting thyristor as the second embodiment of the present invention shown in FIG. 8 and the shape of the p-type isolation region 9 in the isolation region.

FIG. 10 is a schematic sectional view of a conventional reverse conducting GTO thyristor.

FIG. 11 shows a depth W of an etching groove, a resistance R of a p-type isolation region 9 ′, and a withstand voltage V between a gate and an anode of a thyristor.
Diagram showing the relationship of _CBO (between AG)

FIG. 12 is a schematic diagram for explaining a structural difference between the prior art and the present invention and a state of resistance distribution in a separation zone.

[Explanation of symbols]

 2 n-type high resistance layer 2 'n-type base layer 3 p-type anode region 4 p-type gate region 5, 6 n-type region 7 n-type cathode region 8 diode n-type region 9, 9' p-type isolation region 10 insulating film 11 Diode p-type region 12 Anode electrode 13 Cathode electrode 14 Gate electrode 15 Diode anode electrode 16 Depletion layer

Claims (2)

(57) [Claims] 1. A self-extinguishing type reverse conducting thyristor integrally formed on a semiconductor substrate of one conductivity type with a separator between a thyristor portion and a diode portion, and a thyristor portion formed by another conductivity type. Between the gate region and the anode region of the diode, a separation band of one conductivity type is provided, and a large number of separation regions of the other conductivity type are scattered in the separation band, and the separation regions are scattered in the separation band. A self-extinguishing reverse conducting thyristor, characterized in that an isolation region of the other conductivity type is buried with a layer of one conductivity type, and a vertical termination of the isolation region is a single crystal of one conductivity type. 2. The self-extinguishing reverse conducting thyristor according to claim 1, wherein said one conductivity type layer is an epitaxial growth layer or a diffusion layer.