JP2856403B2 - Power circuit - Google Patents
Power circuitInfo
- Publication number
- JP2856403B2 JP2856403B2 JP63237738A JP23773888A JP2856403B2 JP 2856403 B2 JP2856403 B2 JP 2856403B2 JP 63237738 A JP63237738 A JP 63237738A JP 23773888 A JP23773888 A JP 23773888A JP 2856403 B2 JP2856403 B2 JP 2856403B2
- Authority
- JP
- Japan
- Prior art keywords
- power supply
- voltage
- output
- resistor
- photocoupler
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Landscapes
- Direct Current Feeding And Distribution (AREA)
- Control Of Voltage And Current In General (AREA)
- Stand-By Power Supply Arrangements (AREA)
- Supply And Distribution Of Alternating Current (AREA)
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は電源回路に関し、特に並列運転された安定化
電源の電源回路に関する。Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power supply circuit, and more particularly to a power supply circuit of a stabilized power supply operated in parallel.
従来のこの種の技術としては、第２図のように、並列
に出力端子が接続された安定化電源7,8′,9′は、各々
電圧制御用シャントレギュレータ28,31をもち、電圧設
定用抵抗24,25および32,33により各々の出力電圧が設定
され、電圧帰還量制御抵抗26,30を通じ出力電圧帰還用
フォトカプラ12A・12B,13A・13Bを通して、スイッチン
グ安定化制御回路10,11に出力電圧信号が入力され、ス
イッチング安定化制御回路10,11により出力電圧が安定
化される。As a conventional technique of this type, as shown in FIG. 2, the stabilized power supplies 7, 8 ', 9', whose output terminals are connected in parallel, have shunt regulators 28, 31 for voltage control, respectively. The respective output voltages are set by the resistors 24, 25 and 32, 33, and the switching stabilization control circuits 10, 11 through the output voltage feedback photocouplers 12A, 12B, 13A, 13B through the voltage feedback amount control resistors 26, 30. An output voltage signal is inputted to the switching stabilization control circuits 10 and 11, and the output voltage is stabilized.
ところが、各々の安定化電源の出力電圧の設定には誤
差があり、出力電圧の高い方の電源から負荷に電流が供
給され、その出力電圧の高い方の電源が垂下するまで負
荷に電流を供給しつづける。そのため、冷却するには全
体の負荷が電源の定格の合計より小さい場合でも、出力
電圧が高い電源に対しては冷却を強くする必要があり、
出力電圧が高い方の電源が垂下状態の時、入力電圧のリ
ップルが出力に出てしまうという問題がある。However, there is an error in setting the output voltage of each regulated power supply.Current is supplied to the load from the power supply with the higher output voltage, and current is supplied to the load until the power supply with the higher output voltage drops. Continue. Therefore, even if the overall load is smaller than the total power supply rating, it is necessary to increase the cooling for the power supply with a high output voltage,
When the power supply with the higher output voltage is in a drooping state, there is a problem that ripples of the input voltage appear at the output.
上述した従来の並列運転方式は、垂下方式で、また個
々の安定化電源が各々電圧制御回路を内蔵しているた
め、出力設定電圧の誤差により、出力電圧の高い方の第
一の安定化電源が負荷に電流を供給し、第一の安定化電
源が垂下特性に入り電圧が少し低下し、二番目に出力電
圧が高い第二の安定化電源から負荷に電流を供給し始め
るまで、第一の安定化電源から負荷に供給する。従って
第二の安定化電源が立上るまで、実装状態における熱的
バランスが偏ることと、垂下状態に入った時に入力のリ
ップル電圧が負荷側に現れるという欠点があった。The above-described conventional parallel operation system is a drooping system, and since each of the stabilized power supplies has a built-in voltage control circuit, the first stabilized power supply having a higher output voltage due to an error in the output set voltage. Supply current to the load, the first regulated power supply enters the drooping characteristic, the voltage decreases slightly, and the second regulated power supply starts supplying current to the load from the second regulated power supply until the second regulated power supply starts supplying current to the load. Supply to the load from the stabilized power supply. Therefore, there are disadvantages that the thermal balance in the mounted state is biased until the second stabilized power supply rises, and that the input ripple voltage appears on the load side when entering the drooping state.
本発明の電源回路は、交流または直流を入力し、所要
の安定化直流出力を発生する複数の安定化電源の正負の
出力端子の同極同士を接続して並列運転する電源回路に
おいて、マスターの安定化電源の正側出力端子に出力電
圧帰還用の第１のフォトカプラのアノードと電圧設定用
第１の抵抗の一端とが接続され、前記帰還用フォトカプ
ラのカソードに電圧帰還量制御用抵抗の一端が接続さ
れ、前記電圧帰還量制御用抵抗の他端に電圧安定化用シ
ャントレギュレータのカソードと複数のスレーブの安定
化電源の電圧帰還量制御用抵抗の一端が接続され、シャ
ントレギュレータのアノードはマスターの安定化電源の
負側出力端子と電圧設定用第２の抵抗の一端に接続さ
れ、前記電圧設定用第２の抵抗の他端は前記シャントレ
ギュレータのリファレンス端子と前記電圧設定用第１の
抵抗の他端に接続され、前記シャントレギュレータは基
準電源を内蔵し、前記リファレンス端子入力からの出力
電圧のモニタ信号と前記基準電源電圧との誤差を増幅
し、前記シャントレギュレータのカソード端子から増幅
信号とし電流を吸込み、前記第１のフォトカプラの出力
トランジスタのコレクタおよびエミッタはスイッチング
安定化制御回路に接続され、前記複数のスレーブ側安定
化電源の電圧帰還量制御用抵抗の他端は、スレーブ側安
定化電源帰還用の第２のフォトカプラのカソードに接続
され、前記第２のフォトカプラのアノードは各々のスレ
ーブ側安定化電源の正側出力端子に接続され、前記フォ
トカプラＢの出力側トランジスタのコレクタおよびエミ
ッタは、各々スレーブ側安定化電源のスイッチング安定
化制御回路に接続され、マスターまたはスレーブのスイ
ッチング安定化制御回路は、交流または直流と前記第一
または第二のフォトカプラの出力信号とを入力し、安定
化直流を出力して構成される。The power supply circuit of the present invention is a power supply circuit that inputs AC or DC and connects the same poles of the positive and negative output terminals of a plurality of stabilized power supplies that generate a required stabilized DC output to operate in parallel, and An anode of a first photocoupler for output voltage feedback and one end of a first resistor for voltage setting are connected to a positive output terminal of the stabilized power supply, and a resistor for controlling a voltage feedback amount is connected to a cathode of the photocoupler for feedback. Is connected to the other end of the voltage feedback amount control resistor, the cathode of the voltage stabilization shunt regulator and one end of the voltage feedback amount control resistor of the plurality of slave stabilized power supplies are connected, and the anode of the shunt regulator is connected. Is connected to the negative output terminal of the stabilized power supply of the master and one end of a second resistor for setting a voltage, and the other end of the second resistor for setting a voltage is connected to a reference of the shunt regulator. Terminal and the other end of the voltage setting first resistor, the shunt regulator has a built-in reference power supply, amplifies an error between a monitor signal of an output voltage from the reference terminal input and the reference power supply voltage, A current is sucked as an amplified signal from a cathode terminal of the shunt regulator, and a collector and an emitter of an output transistor of the first photocoupler are connected to a switching stabilization control circuit to control a voltage feedback amount of the plurality of slave-side stabilized power supplies. The other end of the resistor for use is connected to the cathode of a second photocoupler for feedback of the slave side stabilized power supply, and the anode of the second photocoupler is connected to the positive side output terminal of each slave side stabilized power supply. The collector and emitter of the output transistor of the photocoupler B are connected to the switch of the slave side stabilized power supply, respectively. Connected to the switching stabilization control circuit, the master or slave switching stabilization control circuit is configured to receive AC or DC and the output signal of the first or second photocoupler and output a stabilized DC. You.
次に、本発明について図面を参照して説明する。 Next, the present invention will be described with reference to the drawings.
第１図は本発明の一実施例の構成を示す回路図であ
る。1,2はマスターとなる安定化電源７の入力端子で交
流または直流を入力し、スイッチング安定化制御回路10
へ出力し、スイッチング安定化制御回路10は、出力電圧
帰還用フォトカプラの出力トランジスタ12Bのコレクタ
とエミッタとが接続されることによって出力電圧帰還信
号が入力され、出力端子に所定の出力電圧を出力し、各
々並列運転のためスレーブ安定化電源8,9の出力端子16,
17および18,19以下接続されているスレーブ安定化電源
に接続され、負荷供給ライン20,21を通じて負荷へ供給
される。FIG. 1 is a circuit diagram showing a configuration of one embodiment of the present invention. Reference numerals 1 and 2 denote input terminals of the stabilizing power supply 7 serving as a master.
The switching stabilization control circuit 10 receives the output voltage feedback signal by connecting the collector and the emitter of the output transistor 12B of the output voltage feedback photocoupler, and outputs a predetermined output voltage to the output terminal. And the output terminals 16,
It is connected to a slave stabilized power supply connected below 17 and 18, 19, and is supplied to the load through load supply lines 20, 21.
抵抗24,25（その値をそれぞれR24,R25で示す）はスレ
ーブの安定化電源出力と接続されているマスター側の出
力電圧（VREF）を分圧しシャントレギュレータ28の比較
入力端子へ接続され、シャントレギュレータ28は、その
内部の基準電圧と比較し、出力電圧がVREF×（R24＋
R25）/R25になるようにシャントレギュレータ28のカソ
ードは電圧帰還量制限抵抗26を通して電流吸込量を制御
し、直列に接続された出力電圧帰還用フォトカプラの入
力ダイオード12Aに流れる電流が制御されることにより
出力側トランジスタ12の出力電流が制御される。出力電
圧が上昇すると、シャントレギュレータ28は吸込電流を
大きくし、結果として出力電圧帰還用フォトカプラの出
力トランジスタ12の出力電流が大きくなり、スイッチン
グ安定化制御回路10は出力電圧を小さくするように制御
することにより安定化される。Resistors 24 and 25 (the values of which are indicated by R 24 and R 25 respectively) divide the master-side output voltage (V REF ) connected to the regulated power supply output of the slave and connect it to the comparison input terminal of the shunt regulator 28 The shunt regulator 28 compares the output voltage with VREF × (R 24 +
R 25) / cathode of the shunt regulator 28 to R becomes 25 controls the current sink amount through voltage feedback amount limiting resistor 26, the current flowing through the input diode 12A of the output voltage feedback photo-coupler connected in series to control As a result, the output current of the output-side transistor 12 is controlled. When the output voltage rises, the shunt regulator 28 increases the sink current.As a result, the output current of the output transistor 12 of the output voltage feedback photocoupler increases, and the switching stabilization control circuit 10 controls the output voltage to decrease. To be stabilized.
このシャントレギュレータ28のカソードは出力電圧制
御ライン22を通じて、スレーブの安定化電源８の電圧帰
還制限抵抗30と接続され、マスター側と同様にスレーブ
側の出力電圧帰還用フォトカプラの入力ダイオード29
は、電圧帰還量制御抵抗30と直列に接続されることによ
り、マスターと同様に出力電圧帰還用フォトカプラの出
力トランジスタ13の出力電流がスイッチング安定化制御
回路11へ供給されることにより、スイッチング安定化制
御回路11は出力端子16,17へ直流を供給する。スレーブ
安定化電源９についても、前述のスレーブ安定化電源８
と同様の働きをする。The cathode of this shunt regulator 28 is connected to the voltage feedback limiting resistor 30 of the stabilized power supply 8 of the slave through the output voltage control line 22, and the input diode 29 of the output voltage feedback photocoupler on the slave side like the master side.
Is connected in series with the voltage feedback control resistor 30 so that the output current of the output transistor 13 of the output voltage feedback photocoupler is supplied to the switching stabilization control circuit 11 in the same manner as the master, thereby achieving stable switching. The control circuit 11 supplies a direct current to the output terminals 16 and 17. As for the slave stabilized power supply 9, the above-mentioned slave stabilized power supply 8 is also used.
Works the same as.
以上説明したように本発明は、マスター安定化電源の
電圧制御用シャントレギュレータをスレーブ安定化電源
の電圧制御用と共用することにより、並列にした複数の
安定化電源の出力電圧の誤差がなくなり、出力電圧の高
い安定化電源の方から電流が先に流れるなどという偏り
がなく、各々がバランスして電流を供給することができ
るので、熱的分布が平均化されることと垂下状態で運転
されることがないため入力電圧のリップルは出力に現わ
れないという効果がある。As described above, according to the present invention, by sharing the voltage control shunt regulator of the master stabilized power supply with the voltage control of the slave stabilized power supply, errors in the output voltages of a plurality of parallel stabilized power supplies are eliminated. There is no bias such as current flowing first from the stabilized power supply with high output voltage, and each can supply current in a balanced manner, so that thermal distribution is averaged and operation is performed in a drooping state There is an effect that the ripple of the input voltage does not appear in the output because it does not occur.
第１図は本発明の一実施例の構成を示す回路図、第２図
は従来の技術による電源回路の一例を示す回路図。 １〜６……（安定化電源の）入力端子、7,8′,9′……
安定化電源、8,9……スレーブ安定化電源、14〜19……
（安定化電源の）出力端子、10,11……スイッチング安
定化制御回路、12A・12B,13A・13B……（出力電圧帰還
用）フォトカプラ、24,25,32,33……（出力電圧設定
用）抵抗、26,30……電圧帰還量制御抵抗、28,31……シ
ャントレギュレータ、20,21……負荷供給ライン、22…
…出力電圧制御ライン。FIG. 1 is a circuit diagram showing a configuration of an embodiment of the present invention, and FIG. 2 is a circuit diagram showing an example of a power supply circuit according to a conventional technique. 1-6: Input terminals (of stabilized power supply), 7, 8 ', 9' ...
Stabilized power supply, 8,9 …… Slave stabilized power supply, 14-19 ……
Output terminal (of stabilized power supply), 10, 11 ... Switching stabilization control circuit, 12A / 12B, 13A / 13B ... (for output voltage feedback) photocoupler, 24, 25, 32, 33 ... (Output voltage Resistors, 26, 30: Voltage feedback control resistors, 28, 31: Shunt regulators, 20, 21, Load supply lines, 22
... Output voltage control line.
フロントページの続き (56)参考文献 特開 昭61−293168（ＪＰ，Ａ) 特開 昭60−245427（ＪＰ，Ａ) 実開 昭62−185490（ＪＰ，Ｕ) 実公 昭53−23299（ＪＰ，Ｙ２)Continuation of the front page (56) References JP-A-61-293168 (JP, A) JP-A-60-245427 (JP, A) JP-A-62-185490 (JP, U) JP-A-53-23299 (JP, A) , Y2)
Claims (1)
流出力を発生する複数の安定化電源の正負の出力端子の
同極同士を接続して並列運転する電源回路において、マ
スターの安定化電源の正側出力端子に出力電圧帰還用の
第１のフォトカプラのアノードと電圧設定用第１の抵抗
の一端とが接続され、前記帰還用フォトカプラのカソー
ドに電圧帰還量制御用抵抗の一端が接続され、前記電圧
帰還量制御用抵抗の他端に電圧安定化用シャントレギュ
レータのカソードと複数のスレーブの安定化電源の電圧
帰還量制御用抵抗の一端が接続され、シャントレギュレ
ータのアノードはマスターの安定化電源の負側出力端子
と電圧設定用第２の抵抗の一端に接続され、前記電圧設
定用第２の抵抗の他端は前記シャントレギュレータのリ
ファレンス端子と前記電圧設定用第１の抵抗の他端に接
続され、前記シャントレギュレータは、基準電源を内蔵
し、前記リファレンス端子入力からの出力電圧のモニタ
信号と前記基準電源電圧との誤差を増幅し、前記シャン
トレギュレータのカソード端子から増幅信号として電流
を吸込み、前記第１のフォトカプラの出力トランジスタ
のコレクタおよびエミッタはスイッチング安定化制御回
路に接続され、前記複数のスレーブ側安定化電源の電圧
帰還量制御用抵抗の他端は、スレーブ側安定化電源帰還
用の第２のフォトカプラのカソードに接続され、前記第
２のフォトカプラのアノードは各々のスレーブ側安定化
電源の正側出力端子に接続され、前記第２のフォトカプ
ラの出力側トランジスタのコネクタおよびエミッタは、
各々スレーブ側安定化電源のスイッチング安定化制御回
路に接続され、マスターまたはスレーブのスイッチング
安定化制御回路は、交流または直流と前記第一または第
二のフォトカプラの出力信号とを入力し、安定化直流を
出力して成ることを特徴とする電源回路。A stabilization of a master in a power supply circuit in which the same polarity of positive and negative output terminals of a plurality of stabilized power supplies for inputting an AC or a DC and generating a required stabilized DC output is connected in parallel to operate. An anode of a first photocoupler for output voltage feedback and one end of a first resistor for voltage setting are connected to a positive output terminal of the power supply, and one end of a resistor for voltage feedback control is connected to a cathode of the photocoupler for feedback. The other end of the voltage feedback control resistor is connected to the cathode of the voltage stabilizing shunt regulator and one end of the voltage feedback control resistor of the plurality of slave stabilized power supplies, and the anode of the shunt regulator is connected to the master. Is connected to the negative output terminal of the stabilized power supply and one end of a voltage setting second resistor, and the other end of the voltage setting second resistor is connected to a reference terminal of the shunt regulator. The shunt regulator is connected to the other end of the voltage setting first resistor, and the shunt regulator has a built-in reference power supply, amplifies an error between a monitor signal of an output voltage from the reference terminal input and the reference power supply voltage, A current is absorbed as an amplified signal from the cathode terminal of the shunt regulator, and the collector and the emitter of the output transistor of the first photocoupler are connected to a switching stabilization control circuit for controlling the amount of voltage feedback of the plurality of slave-side stabilized power supplies. The other end of the resistor is connected to the cathode of a second photocoupler for slave side stabilized power supply feedback, and the anode of the second photocoupler is connected to the positive side output terminal of each slave side stabilized power supply. A connector and an emitter of an output transistor of the second photocoupler,
Each is connected to the switching stabilization control circuit of the slave side stabilized power supply, and the switching stabilization control circuit of the master or the slave inputs AC or DC and the output signal of the first or second photocoupler and stabilizes. A power supply circuit characterized by outputting a direct current.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63237738A JP2856403B2 (en) | 1988-09-21 | 1988-09-21 | Power circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63237738A JP2856403B2 (en) | 1988-09-21 | 1988-09-21 | Power circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0287932A JPH0287932A (en) | 1990-03-28 |
| JP2856403B2 true JP2856403B2 (en) | 1999-02-10 |
Family
ID=17019742
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP63237738A Expired - Fee Related JP2856403B2 (en) | 1988-09-21 | 1988-09-21 | Power circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2856403B2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2611859B2 (en) * | 1990-07-06 | 1997-05-21 | 長野日本無線株式会社 | Power output cutoff device |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5323299U (en) * | 1976-08-05 | 1978-02-27 | ||
| JPS59120866A (en) * | 1982-12-27 | 1984-07-12 | Matsushita Electric Ind Co Ltd | Power factor measuring apparatus |
| JPS6062839A (en) * | 1983-09-13 | 1985-04-11 | Hitachi Metals Ltd | Rotor and manufacture thereof |
| JPS60245427A (en) * | 1984-05-18 | 1985-12-05 | 株式会社ユアサコーポレーション | Equilibrium operating system of power source unit |
| JPS61293168A (en) * | 1985-05-17 | 1986-12-23 | Fujitsu Ltd | Current balancing circuit at converter parallel operation time |
| JPS62185490U (en) * | 1986-05-12 | 1987-11-25 |
-
1988
- 1988-09-21 JP JP63237738A patent/JP2856403B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0287932A (en) | 1990-03-28 |
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