JP2744253B2 - Display driving method of plasma display panel - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Overview] The present invention relates to a display driving method for a plasma display panel (hereinafter, referred to as a PDP), and particularly to a method for applying a write pulse and an erase pulse to an XY matrix type AC PDP. With regard to the improvement, it is an object of the present invention to provide a display driving method of a plasma display panel that can speed up an address operation for each discharge cell when performing gradation display on a PDP, and to provide a plurality of X electrodes arranged in a matrix. In a display driving method for a plasma display panel, a display driving is performed by applying a write pulse, an erase pulse, and a sustain pulse to the discharge cells of the plasma display panel having a plurality of discharge cells formed at the intersections with the Y electrodes. After the application of the sustain pulse, erasure of a polarity opposite to that of the sustain pulse is performed on the discharge cells belonging to one discharge cell region. Applies a pulse, configured to apply said sustain pulses of the same polarity as the write pulse to the discharge cells belonging to the other discharge cell area at the same timing.

[Industrial applications]

The present invention relates to a display driving method of a plasma display panel, and more particularly to an improvement in a method of applying a write pulse and an erase pulse to an XY matrix type AC PDP.

Conventionally, a CRT (Cathod Ray Tube) has been the main display device, but recently, a flat display device has been developed with the diversification of display devices accompanying the progress of the information society. At present, flat display devices include those using active elements such as electroluminescence (EL), light emitting diode (LED), and PDP, and passive elements such as liquid crystal (LCD) and electrochromic (ECD). The ones used are known.

PDP depends on the type of drive voltage applied to the discharge cells.
It is classified into PDP (indirect discharge type) and DC PDP (direct discharge type). Further, it is classified into an XY matrix type and a segment type according to the structure type. The present invention relates to X-
The present invention relates to an AC type PDP having a Y matrix electrode structure. Such AC PDPs are becoming popular as character and graphic display devices for word processors, personal computers, and the like. In recent years, improvements in functions have been demanded, and they are moving from the so-called binary image display range to the stage of gradation display.

[Conventional technology]

FIG. 5 shows an outline of a display device using an AC type PDP. This device is roughly composed of a display drive unit 1 and a display control unit 2 for controlling the display drive unit 1.

When an address data control signal is input to the interface circuit 3 of the display control unit 2, it is given to the Y drive circuit 5 of the display drive unit 1 via the display address buffer 4. The Y drive circuit 5 includes a plurality of PDPs 7 (for example, 40) designated by the address data via the Y matrix circuit 6.
(0) Y electrodes 8 are driven. On the other hand, the display control circuit 9 of the display control unit 2 operates according to the address data control signal input to the interface circuit 3.
In step 10, the display drive pulse is given to the X drive circuit 11 of the display drive unit 1. The X drive circuit 11 drives a plurality (for example, 640) of X electrodes 13 of the PDP 7 specified via the X matrix circuit 12. By selectively driving the Y electrode 8 and the X electrode 13 in this manner, the corresponding Y electrode 8 and X
The discharge cell 14 at the intersection with the electrode 13 discharges and emits plasma, and the light emission in each selected discharge cell 14 causes
Images such as various characters and figures are formed. PDP7
The number of all discharge cells above is 400 (Y) × 640 in the above example.
(X) Dots. The Y drive circuit 5, the Y matrix circuit 6, the X drive circuit 11, and the X matrix circuit 12 are each divided into two parts because the number of electrodes of XY is m × n.
This is because if there are a large number of books, the interval between the electrodes becomes narrow, so that the terminals can be easily taken out.

As shown in FIG. 6, as the voltage for driving the PDP-7, sustain pulses for writing display data to each discharge cell 14 of the PDP-7 (hereinafter, referred to as write pulses.) And V _W, the display data written A pulse (hereinafter, referred to as a sustain pulse) V _S for maintaining discharge (hereinafter, referred to as a sustain pulse), and a pulse (hereinafter, referred to as an erase pulse) V for erasing (ie, stopping the discharge) the display data once written. _E is used.

There are various methods of writing, maintaining, and erasing display data, and roughly classified into a method of individually selecting and discharging each discharge cell 14 and a method of once discharging cells on the X electrode 13 for each X electrode 13. mixture was allowed to total discharge, there is a method of erasing selectively discharge cell 14 by an erase pulse V _E. The description here relates to the latter line sequential driving method. According to the line sequential driving method, all the discharge cells on the selected Y electrode
After emitting light once, unnecessary discharge cells 14 are selectively erased, and a desired image is formed by the remaining discharge cells 14. This will be described in more detail with reference to FIG.

FIG. 6 is a diagram showing the correspondence between driving pulses and light emission by the conventional line sequential driving method. First, when a certain X electrode 13 is not selected (erase operation) TA, in one horizontal period (1H) of the PDP 7, the write pulse V _{W is} applied to the corresponding Y electrode.
Is applied and the erase pulse is applied to the same Y electrode at the next timing.
V _E is applied, and then a sustain pulse V _S is applied to all Y electrodes. As a result, the corresponding X electrode 13 has the write pulse V _W
And the erase pulse V _E emits light like LA, but thereafter does not emit light until the next write pulse V _W is applied.

On the other hand, when the X electrode 13 is selected (write operation) TB
In, the 1H period of PDP-7, although the writing pulse V _W to the Y electrode in the same manner is applied, the erase pulse V _E in the next timing is not applied, the sustain pulse V _S is applied to all the Y electrodes . As a result, the corresponding X electrode 13 is thereafter LB until the next write pulse _VW and erase pulse _VE are applied.
Light emission is maintained as shown in FIG. That is, a memory function is exhibited.

The above operation is performed in synchronization with the 1H synchronizing signal V _H for each Y electrode, the one at the timing of one vertical sync (1V) signal screen is formed.

As described above, according to the conventional driving method, once the write pulse _VW is applied to one Y electrode to cause all the discharge cells on the Y electrode to emit light, and then erased to the same Y electrode if necessary. or erased by applying a pulse V _E, or a sustain pulse
It was to drive so as to maintain the light emission only the selected discharge cells by applying a V _S.

On the other hand, in order to display an image on the PDP 7 more accurately and with fine nuances, a halftone (or gradation) display is required. As a method for displaying a halftone, a method using a relative difference between the first wall voltages (WDPetty, HGSlottow, “Mu
ltiple states and variable intensity in the plasma
display plasma ", IEEE Trans.ED-18, 654-658 (197
1)), a method of controlling the number of times of light emission by the relative difference of the second wall voltage (H. De Jule et al., Digest of Symps of SID (197)
1)), the third field-based time division method (Koichiro Kurahashi,
Others: "Halftone display in plasma display", 8th
The materials of the 1st TV Society Image Display System Study Group (1972)) are known.

At present, in order to realize gray scale display with an AC PDP, multi-gray scale display is generally performed by controlling the number of light emission of each discharge cell.

[Problems to be solved by the invention]

According to the conventional multi-gray-scale display driving method by controlling the number of times of light emission, a number of writing operations and erasing operations corresponding to the number of gradations are required. As a result, in the conventional driving method is than the erase pulse V _E and the write pulse V _W is applied at different timings even in the applied to the same Y electrodes,
In order to perform multi-gradation display, it is necessary to speed up the writing operation and the erasing operation inevitably. That is, a high-speed address operation for each discharge cell is required. However, there is a limit to speeding up the driving of the PDP, which is an obstacle for multi-gradation display.

Therefore, an object of the present invention is to provide a display driving method of a plasma display panel which can speed up an address operation for each discharge cell when performing gradation display on a PDP.

[Means for solving the problem]

In order to solve the above-mentioned problems, the present invention is based on FIG.
As shown in (b), a plasma display panel including a plurality of discharge cells C ₁ and C ₂ formed at intersections of a plurality of X electrodes X _b and Y electrodes Y _b and Y _c arranged in a matrix. 7, a write pulse V _W and an erase pulse V are applied to the discharge cells C ₁ and C _2.
The display driving method of a plasma display panel for displaying driving by applying the _E and sustain pulse V _S, the sustain pulse V _S opposite to the discharge cell C ₁ to after the application of the sustain pulse V _S belonging to one discharge cell area Polarity erase pulse
Applies a V _EY, configured to apply said sustain pulse V _S of the same polarity as the write pulse V _W in the discharge cell C ₂ belonging to the other discharge cell area at the same timing T _ADR.

[Action]

According to the configuration of the present invention, FIG. 1 (a), (b), the erase pulse V _EY discharge cells C ₁ belonging to one of the discharge cell area (any Y electrode Y _c) applying Is done. The erase pulse V _EY is a pulse V _S polarity opposite maintained applied immediately before. At the same timing as the erase pulse _VEY ,
The one discharge cell region (Y _c) different from the discharge cell region and (Y electrode Y _b) the discharge cells belonging C ₂ to the write pulse V _W
Is applied. This write pulse _VW is the above sustain pulse
It has the same polarity as V _S.

The discharge cell C ₁ stops discharge emission to thereby erase pulse V _EY, substantially at the same time as this discharge cell C ₁ is newly discharge emission by the writing pulse V _W.

As described above, since erasing and writing are performed almost simultaneously in different discharge cells, the address time required for driving can be reduced, that is, high-speed operation can be performed, as compared with the conventional case where writing and erasing are performed at different timings. Becomes

〔Example〕

Next, an embodiment according to the present invention will be described with reference to the drawings.

FIG. 2 shows a display drive unit for implementing the display drive method of the plasma display panel according to the present invention. The display drive unit includes an X drive circuit 15 for driving an odd (ODD) X electrode 13 of the PDP 7, an X drive circuit 16 for driving an even (EVEN) X electrode 13, and a sustain pulse for the X drive circuit 15.
Switch circuits 17 and 18 for giving V _S and erase pulse V _EX and PDP7
, A Y drive circuit 20 for driving the odd Y electrode 8, a sustain pulse V _S , a write pulse V _W , and one erase pulse for the Y drive circuit 19 and the Y drive circuit 20. And switch circuits 21 and 22 for giving V _EY .

 Next, the operation will be described.

FIG. 3 shows a waveform of each drive pulse, and FIG. 4 shows a light emitting state of each discharge cell. The explanation of the operation is based on the assumption that the X electrodes _Xa and _Xb
And Y electrode Y _a, Y _b, discharge is formed on each intersection of the Y _c cells C ₁ ~
Consider the C _6. The sustain pulse V _S is applied by repeating the sustain periods T _S1 and T _S2 . Incidentally frequency of the sustain pulse V _S is generally 20 to 50 kHz. The erase pulse V _EX , erase pulse V _EY , and write pulse V _W have a sustain period T _S1 and a sustain period.
It is applied in the period between T _S2 , that is, in the address period T _ADR . During this address period T _ADR , each discharge cell
The selection / non-selection operation of C _{1 to} C ₆ is performed.

In the sustain period T _S1, it is assumed that the discharge cells C ₂ , C ₅ and C ₆ have been written (FIG. 4A). The selection of the discharge cells C ₂ , C ₅ and C ₆ is determined by the write state before the sustain period T _S1 . In this sustain period T _S1 , each X
Electrodes X _a, X _b, Y electrodes Y _a, Y _b, respectively sustain pulse V _S to Y _c is applied (FIG. 3 (a) ~ (e)) , each intersection of the discharge cells
An AC waveform voltage is applied to C _{1 to} C ₆ (FIG. 3 (f)).
(K)).

As a result, the discharge cells C ₂ , C ₅ , and C ₆ maintain the light emitting state by the sustain pulse V _S , and the other discharge cells C ₁ , C ₃ , and C ₄ are in the non-light emitting state because they are not written. .

Next, in the address period T _ADR, X electrodes X _b to erase pulse V _EX (FIG. 3 (b)), Y electrodes Y _b to the write pulse V
_W (FIG. 3 (d)), Y electrodes Y _c in the opposite polarity erase pulse V _EY
It is assumed that (FIG. 3 (e)) is applied. Then, the X electrode
Writing pulse V _W between X _a and Y electrodes Y _b is applied in the sustain pulse V _S of the same polarity of the immediately preceding (FIG. 3 (g)), whereby the discharge cell C ₃ in write state Light is emitted (FIG. 4 (b)). Similarly X electrodes X _b and the write pulse V _W between the Y electrode Y _b is applied (FIG. 3 (j)), whereby discharge cells C ₄ emits light in write state (FIG. 4 ( b)). On the other hand, between the X electrode X _b and Y electrodes Y _c,
A superposition pulse of the erasing pulse V _EX and the erasing pulse V _EY is applied with a polarity opposite to that of the immediately preceding sustain pulse V _S (FIG. 3 (k)). This discharge cells C ₆ is erased. Therefore, the light emission state of each discharge cell transitions from the light emission of the discharge cells C ₂ , C ₅ , C _{6 in} the sustain period T _S1 to the light emission of the discharge cells C ₂ , C ₃ , C ₄ , C ₅ .

Then at the sustain period T _S2, the sustain period T _S1 a similar sustain pulse V _S is applied to each discharge cell C ₁ -C _6, the discharge cells
The light emission state of C ₂ , C ₃ , C ₄ , and C ₅ is maintained (FIG. 4C).

Thus, applied in the address period T _ADR, erase pulse V _EX as the discharge cells C ₆ to erase the erase pulse V _E of the sustain pulse V _S and opposite polarity immediately before is applied, an erase pulse V _EY and, in the discharge cells C _3, C ₄ to be written to apply a pulse V _S of the same polarity of the write pulse V _W maintained immediately before. Thus, different discharge cells C ₆ regions of the discharge cells
To become C ₆ and the discharge cells C _3, C ₄ to each be driven at the same timing, it is possible to shorten the address period T _ADR, thus enabling high-speed address operation. This effectively works at the time of complicated repetition of the address operation required for gray scale display, and leads to facilitation of multi-gray scale display.

In the above-described embodiment, the method of applying the erase pulse is such that the combined erase voltage (V _EX ) from the X electrode (V _EX ) and the Y electrode (V _EY ) is used.
+ V _EY ), but the present invention is not limited to this. The conventional erasing method in which an erasing voltage is applied from one side and an erasing cancel pulse is applied from the other side to selectively erase is also possible. It is.

Incidentally, as shown in FIG. 3 (j), the write pulse V _W
While erase "dent" of half-select voltage V _EX amount of voltage occurs during this value in the pulse width 1/10, in the voltage level 1 /
Since it is 3 or less, the effect on the write operation can be substantially ignored.

〔The invention's effect〕

As described above, according to the present invention, when gradation display is performed in the PDP, the sustain pulse and the write pulse are applied at the same timing to the discharge cells in different discharge cell regions, respectively. Erasing can be performed almost simultaneously, and the address operation can be speeded up.

[Brief description of the drawings]

FIG. 1 is a view for explaining the principle of the present invention, FIG. 2 is a block diagram of a display drive unit according to the present invention, FIG. 3 is a timing chart of each drive pulse in the present invention, and FIG. FIG. 5 is a schematic diagram of a display device using an AC type PDP, and FIG. 6 is a waveform diagram showing a conventional driving method. 1 Display drive unit 2 Display control unit 5 Y drive circuit 6 Y matrix circuit 7 PDP 8 Y electrode 11 X drive circuit 12 X matrix circuit 13 X electrode 14 discharge cell 15, 16 X drive circuit 17, 18 switch circuit 19, 20 Y drive circuit 21, 22 switch circuit V _W write pulse V _S sustain pulse V _E , V _EX , V _EY … Erase pulse C _{1 to} C ₆ … Discharge cell X _a , X _b … X electrode Y _a , Y _b , Y _c … Y electrode circuit T _S1 , T _S2 … sustain period path T _ADR …… Address period

Claims (1)

(57) [Claims] A plurality of discharge cells (C ₁ , C ₂ ) formed at intersections of a plurality of X electrodes (X _b ) and a plurality of Y electrodes (Y _b , Y _c ) arranged in a matrix. A plasma display which performs display driving by applying a write pulse (V _W ), an erase pulse (V _E ), and a sustain pulse (V _S ) to the discharge cells (C ₁ , C ₂ ) of the plasma display panel (7). In the display driving method for a panel, after applying a sustain pulse (V _S ), an erase pulse (V _EY ) having a polarity opposite to that of the sustain pulse (V _S ) is applied to a discharge cell (C ₁ ) belonging to one discharge cell region. With the same timing (T
A display driving method for a plasma display panel, wherein a write pulse (V _W ) having the same polarity as the sustain pulse (V _S ) is applied to a discharge cell (C ₂ ) belonging to another discharge cell area by _ADR ).