JP2624265B2 - Data transmission equipment - Google Patents

Description

The present invention relates to a method for transmitting data between a plurality of node stations and a plurality of terminals connected thereto on a common transmission path,
In particular, the present invention relates to a data transmission device that ensures data transfer even when a temporary abnormal condition such as buffer busy occurs in a receiving terminal.

[Conventional technology]

Conventionally, in data transmission between terminals of a system, in one-to-one communication, ACK / NACK is exchanged between terminals to ensure data transfer by retry at terminals even if a transmission error or a busy state of a buffer occurs. Was.

On the other hand, in a distributed processing system that has recently become popular, it is necessary to send the same data from one terminal to a plurality of other terminals and perform various processing at each terminal, so that broadcast communication has become useful.

Also, without using the above protocol,
As shown in FIG. 2, there is a data transmission method in which a destination node station writes a response to a part of loop data between node stations connected to a loop and notifies the source node station of the state of the source node station.

[Problems to be solved by the invention]

Applying the same transmission method to the above-mentioned one-to-one communication is problematic in that the load on the transmission path is increased and the communication time is increased. One-to-one communication, one-to-n communication, and broadcast communication There was a problem that it could not be accommodated efficiently.

Furthermore, a recent large-scale network system connects a plurality of data terminals to one node station in terms of cost and the like. In this case, Japanese Patent Application Laid-Open No. 57-101450 discloses only exchange between node stations. No mention is made of the data transmission between the data terminals and the separation of the node station state and the data terminal state.

An object of the present invention is to provide various communication systems (broadcast, one-to-one,
It is another object of the present invention to provide a data transmission method for ensuring data communication for a pair (n, n: n, etc.).

[Means for solving the problem]

In the first invention, an abnormality of a data terminal connected to a node station is added as control information and is sent back to a station of a transmitting station.

According to the second invention, in addition to the data terminal, the abnormal state of the node station is also incorporated into the control information, and this is sent back to the transmitting station, so that the transmitting station can sort out these two abnormalities. .

[Action]

According to the first invention, the transmitting station becomes aware of the abnormality of the data terminal, and enables processing such as recovery.

According to the second aspect, it is possible to determine whether the terminal or the node station is abnormal, and to perform a process in accordance therewith.

〔Example〕

FIG. 4 is an overall configuration diagram of the loop system of the present invention.
A plurality of node stations 1 are connected via a common transmission path 2, and a plurality of data terminals 3 are connected to the node stations 1. In many cases, the data terminal 3 is configured by a computer. The data terminal 3 has its own node station 1 →
Communication is performed in the flow of the transmission path 2 → the other data terminal 3.
The response is performed in the order of another data terminal 3 → own node station 1 → transmission line 2 → data terminal. FIG. 5 shows an example of a frame configuration flowing on a transmission line used in the present embodiment.

FH: Frame header, indicating the beginning of this frame.
In many cases, a synchronous code is also used.

DA ... Reception station address.

SA is a transmission station address.

C ... is control information, and more and bit information C ₁ and C _2.

INF ... data.

FCS: Frame check sequence.

 Specifically, it is for CRC check from DA to INF.

FIG. 1 shows an embodiment of the node station 1 and the data terminal 3 of the present invention. This embodiment has the following configuration.

Node station 1... Communicates with other node stations via the common transmission path 2. A particularly novel node station 1 is a control information rewriting circuit 16.
And the status control circuit 25, and various signals through these circuits.

The data on the transmission path 2 is received by the reception path 32, the transmitter 33, and so on, and the data from the node station 1 is transmitted.

The delay circuit 4 is a circuit for ensuring continuity of data on the transmission path 2.

Decoder 5... Performs decoding of a frame configuration on the transmission path 2 (decoding of FH, DA, and SA).

Encoder 6... Encodes various data from inside the node station 1 and forms the frame format shown in FIG. The main function is the para / serial conversion function.

Internal buses 7, 8,..., Bus 7 is a reception bus, and bus 8 is a transmission bus.

Terminal interface module 9... The terminal interface module 9 is composed of various check mechanisms and transmission mechanisms of the node station, and an interface mechanism between the terminal 3 and the terminal 3. As will be described later, it is composed of various components for realizing these mechanisms.

The control information rewriting circuit 16 is provided one for each node station, and creates control information C determined by the reception state at the node station. The control information C includes C ₁ and C ₂
And (C ₁ , C ₂ ) is changed to (0,0),
(0,1) (1,0) and (1,1). Details of the reception state will be described later.

Address check circuit 10... Checks whether the DA matches its own address.

Address adding circuit 11: At the time of transmission, a self-address is added.

Control information check circuit 12... Checks the control information C in the received frame.

Control information adding circuit 13... At the time of transmission, control information C is added.

FCS check circuit 14: Performs FCS check in the received frame.

FCS adding circuit 15: At the time of transmission, FCS is added.

Receive data buffer 17: Data IN in received frame
Stores F.

A reception control circuit 18 controls writing of the data INF to the reception data buffer 17.

Transmission data buffer 20: Stores transmission data.

Transmission control circuit 19: Controls transmission of data INF by reading it from buffer 20.

Terminal data transmission control circuit 22... Performs control to send data INF of the reception data buffer 17 to the data terminal.

P / S converter 21 ... Converts from para to serial for transmission of data INF to data terminal 3.

S / P converter 24 ... Converts the transmission data from data terminal 3 from serial to para.

The terminal data reception control circuit 23 controls the S / P converter 24 and the writing control of the transmission data buffer 20.

A status control circuit 25 is a circuit for communicating the status of the node station to the data terminal 3 and for communicating the status of the data terminal 3 to the node station.

FH detection circuit 30, FH rewriting circuit 31 ... The former is FH in the frame
Detection, the latter adds FH at the time of transmission.

The above is the contents of the components in FIG. FIG. 2 shows an operation flow at the time of receiving data of one cycle of the transmission node station under such a system, and FIG. 3 shows an operation flow of the reception node station.

The operation of the system shown in FIG. 1 will be described below with reference to FIGS.

The node station 1 connects the terminal 3 to the common transmission line 2 via the terminal interface module 9. When data is transmitted from the terminal, the data is input to the terminal data reception control circuit 23 and the S / P converter 24 in the terminal interface module 9 via the transmission data line 27.
In the case of the present embodiment, the exchange of data between the terminal 3 and the node station 1 is performed serially using an HDLC frame format. The terminal data reception control circuit 23 performs flag detection and the like, generates a timing signal to the S / P converter, an address to the transmission data buffer 20, a timing signal, and the like, and takes in data from the terminal to the transmission data buffer 20. When the data is fetched into the buffer, control is transferred from the terminal data reception control circuit 23 to the transmission control circuit 19.
On the other hand, whether or not the transmission path is free is constantly monitored by the FH detection circuit 30. When the transmission control circuit 19 detects that the transmission line is free based on this information in the FH,
The transmission control circuit 19 stops the bypass of the transmission line data by the delay circuit 4, writes the data into the pattern FH indicating that the transmission line is used by the FH rewriting circuit 31, and then sends the address addition circuit 11 and the control information insertion circuit 13. , Transmission data buffer 20, FC
The S adding circuit 15 is controlled to send the frame shown in FIG. 5 to the transmission data bus 8 in the node station. The transmitted data is output to the transmission path 2 via the encoder 6 and the transmitter 33. Note that the delay time of the delay circuit 4 is determined by detecting the vacancy of the transmission path by the FH detection circuit 30 and then changing the FH rewriting circuit.
31 is equal to the time until FH is rewritten, and continuity of data on the transmission path is guaranteed.

Next, the receiving operation in the node station will be described. When input from the transmission path 2 to the reception data bus 7 via the reception path 32 and the decoder 5, the FH detection circuit 30 first
Check if there is data (if it is not empty, it is assumed that there is data), and if there is data, continue DA
Is checked by the address check circuit 10 as to whether it is the own terminal interface module address (same as the terminal address), and if it is addressed to the own terminal interface module, the reception control circuit 18 is notified of that fact. The reception control circuit 18 receives only the data INF exchanged between the terminals,
Take in to 7. In parallel with this, the FCS check circuit 14
The CRC from DA to INF is calculated and compared with the FCS of the frame. If they do not match, the received data is discarded.If they match, control is transferred to the terminal data transmission control circuit 22,
At this time, at the same time when the flag is created, the timing signal of the P / S converter 21 and the address and the timing signal of the received data buffer 17 are created, and the received data is sent to the terminal 3 via the received data line 26 as an HDLC frame.

The above is the basic operation of data transmission / reception in the node station 1. Further, a plurality of terminal interface modules 9 can be connected to the transmission / reception data bus of the node station 1, and a plurality of terminals can be accommodated in one node station. The contention control between the terminal interface modules 9 at the time of data transmission is omitted here.

The operation of the node station, which is a feature of the present invention, will be described with reference to FIGS. 1 to 3 and 5. When transmitting a frame in the node stays Chillon 1, it is written to (0, 0) to (C _1, C ₂₎ in the C field by the control information insertion circuit 13. When this frame is input to each terminal interface module 9 in the system via the transmission path 2, each terminal interface module 9 stores information of the address check circuit 10 (whether or not DA matches with its own address). ), Information of the reception control circuit (reception data buffer 17)
The status control circuit 25 integrates information on the terminal status line 29 (whether or not the terminal 3 is operable and whether or not the reception buffer of the terminal 3 is free). Notify. Control information rewriting circuit 16
Then, based on the above information, if the DA does not match (C ₁ , C ₂ ) but the terminal cannot automatically (0, 0) (the transmission pattern is left as it is, no rewriting is performed), the DA matches and the reception is If the data buffer is not empty (1, 0), the DA matches, and if the receiving buffer of terminal 3 is not empty (0, 1), the DA matches, and the receiving data buffer and the receiving buffer of terminal 3 are empty. Rewrite as (1,1). When this frame is transmitted through the transmission path 2 and input to the terminal interface of the transmission source, it is detected as loop data. The control information rewriting circuit 16 is adapted to reflect the state of each terminal interface module even when frames addressed to a plurality of terminal interface modules in one node station are input (broadcast). Only one is provided for the node station, not for each yule. Further, since C may have already been rewritten in the upstream node station, this information can also be monitored. In the case where a plurality of receiving terminal interface modules exist in the system, in the present embodiment, C is rewritten so that if there is even one abnormality, it is transmitted to the transmission source without fail. For example, if the state of one terminal interface module is (1,1),
If there is (0), C can be rewritten as (1,0).

In the terminal interface module 9 of the transmission source, the round frame in which C is rewritten as described above is detected by the address check circuit 10 when the SA matches its own address. When a one-round frame is detected, C of that frame is checked by the control information check circuit 12. If the result (C ₁ , C ₂ ) is (0, 0), it is determined that the node station is a semi-permanent failure, and the status control circuit 25 notifies the terminal via the status notification line 28. Also, (0,
In the case of 1), the terminal is notified as abnormal, and in the case of (1,1), the terminal is notified as normal termination. On the other hand, in the case of (1, 0) and when detecting the FCS error of the loop data, it is determined that a temporary abnormality of the node or an error of the transmission path has occurred, and the transmission control circuit 19 is notified of the fact. Retry frame transmission.

In this way, the state of the receiving station (node station and terminal) is notified to the transmitting station, and the data transfer between the terminals can be ensured by the retry from the node station and the terminal.

This embodiment is merely an example of the present invention, and other methods of notifying the transmitting station of the state of the receiving station and classifying the state of the receiving station are also conceivable. Further, the terminal abnormality example may include a terminal abnormality other than the buffer busy.

FIG. 6 shows an embodiment of the data terminal 3. Data terminal 3
Are a transceiver 40, a transceiver 41, a communication control unit 42, an input / output port 43, an MPU (microprocessor) 45, a ROM 46, a RAM 47, and a DRAM 4.
8, and a clock oscillator 44. This data terminal 3
Is an example of a personal computer. The MPU 45 performs various types of personal computer processing according to programs in the RAM 47. The RAM 47 stores various data, and performs these processing and management processing in the MP.
U45 does. DRAM (Dynamic Crump) 48 stores data in H
The data is sent to the data transmission buffer 20 in the module 9 via the communication control unit 42 in the DL format and the DMA transfer format. Conversely, also at the time of reception, the DRAM 48 receives the data from the data reception buffer 17 via the communication control 42 in the DMA transfer format and stores it in the RAM 47. Since the terminal reception buffer normally uses a part of the RAM 47, the circuit 4
It may be within 0,42. It may be part of DRAM48.

Further, various statuses are transmitted and received through the input / output port 43. The signal line 28 carries the status other than the terminal 3 and the signal line
29 carries the status of the terminal 3. The status determination in the terminal 3 is performed by the MPU 45.

The clock oscillator 44 provides a clock for the communication control section 42 and a clock for the P / S converter 21 and the S / P converter 24 in the interface module 9.

〔The invention's effect〕

According to the present invention, the status of the receiving station can be notified directly to the transmitting station, and the retry from the transmitting station can be reliably performed without having to exchange ACK / NACK responses for each transmission as in the related art. It is possible. Further, it can be similarly performed in a communication method in which it is difficult to take a response such as one-to-n communication and broadcast communication, and these can be efficiently accommodated in the same network system.

[Brief description of the drawings]

FIG. 1 is a diagram of an embodiment of a node station according to the present invention, FIGS. 2 and 3 are operation flows of the node station which is a feature of the present invention, FIG. 4 is a system configuration diagram to which the present invention can be applied, FIG. 5 is a diagram showing frames exchanged between node stations, and FIG. 6 is a diagram showing an embodiment of a data terminal. DESCRIPTION OF SYMBOLS 1 ... Node station, 2 ... Transmission path, 3 ... Terminal, 10 ... Address check circuit, 12 ... Control information check circuit, 13 ... Control information insertion circuit, 16 ... Control information rewriting circuit, 25 ... ... status control circuit, 28 ... status notification line, 29 ... terminal status line.

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Takeshi Ken Onuki 5-2-1 Omikacho, Hitachi City, Ibaraki Prefecture Inside the Omika Plant, Hitachi, Ltd. (72) Inventor Hiroshi Tomizawa 5-2-2 Omikacho, Hitachi City, Ibaraki Prefecture No. 1 Inside the Hitachi, Ltd. Omika Plant (56) References JP-A-61-46649 (JP, A) JP-A-56-60144 (JP, A) JP-A-57-176861 (JP, A) JP-A Sho 62-164338 (JP, A)

Claims (5)

(57) [Claims] 1. A data transmission apparatus comprising: a loop-shaped common transmission line; a plurality of node stations connected to the common transmission line; and a data terminal connected to the station. A first means for operating in the case of a station, detecting whether or not the terminal connected to the receiving station node station is abnormal, and transmitting the terminal abnormality to the common transmission path as control information when the terminal is abnormal; A second means for operating in the case of, and notifying the data terminal connected to the transmitting station node station of a terminal abnormality when detecting a destination terminal abnormality by looking at control information on the transmission path round data, A data transmission device, comprising: 2. A data transmission apparatus comprising: a loop-shaped common transmission line, a plurality of node stations connected to the common transmission line, and a data terminal connected to the station. A first means for receiving a terminal status from a terminal connected to the station, and operating in the case of the receiving station, wherein the first means indicates an abnormal status of the receiving station terminal, and the first node means that the receiving station node station itself is abnormal. A second means for distinguishing each state to form control information indicating an abnormality and transmitting the control information on the common transmission path; Then, if the destination terminal is abnormal, the fact is notified to the data terminal connected to the transmitting station node station, and if the receiving node station is abnormal, the transmitting station node station is notified. Data transmission devices in the third means for performing a corresponding process, characterized in that it comprises a. 3. The data transmission apparatus according to claim 2, wherein the status of the data terminal from the data terminal in the first means is received from the data terminal prior to data reception. 4. The data according to claim 2, wherein said control information is transmitted together with data from a transmitting station, and said control information is formed by rewriting said transmitted control information. Transmission equipment. 5. The terminal abnormality means that the reception buffer in the terminal is not empty, and the node station abnormality means that the reception buffer in the station is not empty. 3. The data transmission device according to claim 2.