JP2697554B2 - Method for manufacturing solid-state imaging device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a CCD having a vertical charge transfer region and a horizontal charge transfer region having different junction depths.
The present invention relates to a method for manufacturing a solid-state image sensor.

[0002]

2. Description of the Related Art In recent years, in solid-state imaging devices, the number of pixels has been increased to support HDTV systems, or the number of pixels has been increased to support movie systems. As a result, the amount of charge transfer per area is increasing, and the horizontal charge transfer unit is required to further increase the transfer speed. Conventionally, for example, in a solid-state imaging device using a buried channel type CCD, the depth of the junction between the n-type semiconductor region constituting the vertical charge transfer region and the p-type well layer is reduced to improve the charge transfer capability per unit area. On the other hand, in the horizontal charge transfer section, in order to cope with a decrease in transfer efficiency due to the high-speed transfer, the junction depth of the n-type semiconductor region constituting the horizontal charge transfer region with the p-type well layer is opposite to the vertical transfer section. The fringe electric field strength has been increased to meet the above demand. That is,
In a two-dimensional solid-state imaging device having a higher number of pixels, the horizontal charge transfer region and the vertical charge transfer region are formed as regions having different junction depths.

FIG. 4 is a plan view of a CCD type two-dimensional solid-state imaging device. In the solid-state imaging device shown in FIG.
The incident light is applied to the photoelectric conversion units 41 arranged in a matrix.
Is photoelectrically converted. The signal charge generated by the photoelectric conversion unit 41 is read out to the vertical transfer unit 42, transferred to the horizontal transfer unit 43 via the vertical transfer unit, transferred to the output circuit unit 44 via the horizontal transfer unit, Extracted as an output signal.

FIGS. 5A to 5C are cross-sectional views showing a conventional method for manufacturing a vertical transfer section, a horizontal transfer section, and a connection section of the solid-state imaging device, and are AA in FIG. 'Line, B
13 shows a process in a cross section taken along a line B- ′. First,
A silicon oxide film 502 having a thickness of about 20 nm is formed on an n-type semiconductor substrate 501, a photoresist film 520a having a thickness of about 3.5 μm is formed by using a photolithography technique, and boron (B) is , Incident angle: 0 °, acceleration energy: 600 keV, dose: 7.0 × 10
Ion implantation under the condition of ¹¹ cm- ²
Is formed [FIG. 5 (a)].

After removing and removing the photoresist film 520a, the thickness of the photoresist film 520a is reduced to about 2.
A photoresist film 520b having a thickness of 0 μm is formed, and phosphorus (P) is incident on the photoresist film 520b with an incident angle of 0 ° and an acceleration energy of:
Ion implantation is performed under the conditions of 250 keV and a dose of 2.0 × 10 ¹² cm ⁻² to form a first n-type semiconductor region 507 to be a horizontal transfer portion (FIG. 5B).

After removing the photoresist film 520b,
A photolithography technique is newly applied to form a photoresist film 520c having a thickness of about 2.0 μm and having an opening at least in a portion of the second p-type well layer to be formed;
Using this as a mask, boron is incident at an angle of 0 °, an acceleration energy of 200 keV, and a dose of 2.0 × 10 ¹² cm.
Ion implantation is performed under the condition of ^-2 to form a second p-type well layer 508 for the vertical transfer section. Subsequently, the arsenic (As) is again irradiated with the incident angle:
0 °, acceleration energy: 150 keV, dose: 3.
Ion implantation is performed under the condition of 0 × 10 ¹² cm ⁻² to form a second n-type semiconductor region 509 to be a vertical transfer portion (FIG. 5C).

After that, the photoresist film 520c is removed, and the silicon oxide film 502 is removed by a wet etching method. After that, a photoelectric conversion unit, a charge transfer electrode, a light-shielding film, and a metal film for wiring are formed by applying a well-known technique, and the manufacture of a solid-state imaging device by a conventional method is completed.

[0008]

In the solid-state imaging device manufactured by the above-described conventional method, the p-type well layer and the n-type semiconductor region in the horizontal transfer section and the p-type well in the vertical transfer section are used.
Since the mold well layer and the n-type semiconductor region are formed using masks formed by separate photolithography steps, errors are likely to occur in the alignment in the photolithography step, and the horizontal transfer unit and the vertical transfer unit It is difficult to form the connection part with good controllability.
That is, when the overlapping amount of the p-type well layer 508 for the vertical transfer unit and the p-type well layer 506 for the horizontal transfer unit is small or separated, as shown in FIG. , Vertical charge transfer region (second n-type semiconductor region 50)
9) and the horizontal charge transfer region (the first n-type semiconductor region 50).
7) a deep potential well is formed between
The p-type well layer 508 for the vertical transfer unit and the p-type well layer 508 for the horizontal transfer unit
When the overlap amount with the mold well layer 506 increases, as shown in FIG.
09) and the horizontal charge transfer region (507), and in any case, smooth charge transfer from the vertical transfer unit to the horizontal transfer unit is hindered.

Accordingly, an object of the present invention is to make the junction depth between the vertical charge transfer region and the horizontal charge transfer region different, wherein the charge transfer region or the well layer for the vertical transfer portion is used for the horizontal transfer portion. To provide a manufacturing method that is self-aligned to the charge transfer region or well layer of
This prevents generation of potential wells and potential barriers in the charge transfer region due to misalignment of the masks in both well layers, thereby suppressing a reduction in signal charge transfer efficiency.

[0010]

According to the present invention, there is provided a method of manufacturing a solid-state imaging device, comprising the steps of: forming a first conductivity type (n-type) semiconductor substrate;
201, 301), a first mask material (120a, 204, 204) having an opening on a first charge transfer region to be formed.
304), and a second step of ion-implanting a second conductivity type (p-type) impurity using the first mask material as a mask .
Conductive first semiconductor region (106, 206, 306)
Forming a second mask, and using the first mask material as a mask
Ion implantation of a first conductivity type impurity into the first semiconductor
A second semiconductor region of the first conductivity type (1) in a surface region of the region;
07, 207, 307) and a second mask material (111, 21) by a relatively low-temperature film forming technique using the first mask material as a mask and not using thermal oxidation.
A fourth step of forming (1, 311) a third mask material (120b, 220b, 320) having an opening on a second charge transfer region to be formed by removing the first mask material;
fifth and step, the second mask member and the third third of the second conductivity type impurity mask member as a mask of the second conductivity type by ion implantation of semiconductor regions (108 to form a b),
A sixth step of forming a 208, 308), the second
A first conductive material using the mask material and the third mask material as a mask;
Surface of the third semiconductor region by ion implantation of type impurities
A fourth semiconductor region of the first conductivity type (109, 20) is formed in the region.
9, 309) .

[0011]

[0012]

Next, embodiments of the present invention will be described with reference to the drawings. (A) to (c) of FIG. 1 are AA ′ of FIG.
FIG. 2 is a process cross-sectional view showing main manufacturing process steps of the first embodiment of the present invention in a cross section taken along line BB ′. First, a silicon oxide film 102 having a thickness of about 20 nm is formed on an n-type semiconductor substrate 101, and a photoresist film 120a having a thickness of about 3.5 μm is formed by using a photolithography technique. ), Incident angle: 9 °,
Acceleration energy: 600 keV, dose: 7.0 × 1
Ion implantation is performed under the condition of 0 ¹¹ cm ^-2 to form a first p-type well layer 106 for the horizontal transfer section (FIG. 1A).
Here, the reason why the ion implantation of boron is inclined is that
This is to prevent the overlap between the vertical transfer portion and the p-type well layer from deepening due to the lateral diffusion, thereby preventing a potential barrier from being formed in the charge transfer region.

Subsequently, phosphorus (P) is again irradiated with the photoresist film 120a as a mask, the incident angle is 4 °, the acceleration energy is 250 keV, and the dose is 2.0 × 10 ¹² cm ^−2.
The first n-type semiconductor region 107 serving as a horizontal transfer portion is formed by ion implantation under the conditions described in [1] (FIG. 1B). Here, the reason why the ion implantation of phosphorus is inclined is that a high concentration region is formed at the junction of the vertical transfer portion with the n-type semiconductor region due to lateral diffusion, so that a potential well is formed in the charge transfer region. This is to prevent the

Next, a silicon oxide film 111 having a thickness of about 1 μm is selectively grown by a liquid phase growth method using the photoresist film 120a as a mask. The selective growth of the silicon oxide film by the liquid phase growth method is performed by dissolving SiO ₂ in a H ₂ SiF ₆ solution to a saturated aqueous solution of SiO ₂ and adding a H ₃ BO ₃ solution to a supersaturated aqueous solution of SiO _2. This is performed by immersing the substrate. After that, the photoresist film 12
0a is removed, and a photoresist film 120b having a thickness of about 2.0 μm having an opening in a p-type well layer portion for a vertical transfer portion to be formed is formed. Using this and a silicon oxide film 111 as a mask, boron is formed. Ion implantation is performed under the conditions of an incident angle of 0 °, an acceleration energy of 200 keV, and a dose of 2.0 × 10 ¹² cm ⁻² to form a second p-type well layer 108 for a vertical transfer section.

Subsequently, arsenic (As) is again used with the photoresist film 120b and the silicon oxide film 111 as a mask.
Is ion-implanted under the conditions of an incident angle of 0 °, an acceleration energy of 150 keV, and a dose of 3.0 × 10 ¹² cm ⁻² to form a second n-type semiconductor region 109 constituting a vertical transfer unit.
Is formed [(c) of FIG. 1].

Thereafter, the photoresist film 120b is removed, and the silicon oxide films 102 and 111 are removed by a wet etching method. Thereafter, a photoelectric conversion unit, a charge transfer electrode, a light shielding film, and a metal film for wiring are formed by applying a well-known technique, and the manufacture of the solid-state imaging device according to the first embodiment of the present invention is completed.

In the solid-state imaging device formed by the above manufacturing method, the second p-type well layer 108 of the vertical transfer
Are self-aligned with the side surfaces of the first p-type well layer 106 and the first n-type semiconductor region 107 of the horizontal transfer unit. It is possible to prevent the overlapping between the regions due to the misalignment and the occurrence of the offset, and to form the film with good controllability.
Therefore, the generation of a potential well or a potential barrier from the vertical charge transfer region to the horizontal charge transfer region can be suppressed, and a decrease in charge transfer efficiency can be prevented. In the ion implantation steps shown in FIGS. 1A and 1B, the ion incidence angle is set to a value that does not cause a potential well or a potential barrier at the junction between the two charge transfer regions.

FIGS. 2A to 2C show the main manufacturing steps of the second embodiment of the present invention along the line AA 'of FIG.
FIG. 4 shows a cross-sectional view along the line -B ′. First, n
A silicon oxide film 202 having a thickness of about 20 nm and a polycrystalline silicon film 20 having a thickness of about 40 nm
3. After sequentially growing a silicon oxide film 204 having a thickness of about 2 μm, the silicon oxide film 204 on a region where a horizontal transfer portion is to be formed is selectively removed by applying photolithography and plasma etching. .

Using the remaining silicon oxide film 204 as a mask, boron (B) is injected at an incident angle of 15 ° and an acceleration energy of 6
The first p-type well layer 2 for the horizontal transfer portion is ion-implanted under the conditions of 00 keV and a dose of 7.0 × 10 ¹¹ cm ^−2.
06 [FIG. 2 (a)]. Subsequently, phosphorus (P) is again introduced using the silicon oxide film 204 as a mask, and the incident angle:
6 °, acceleration energy: 250 keV, dose: 2.
Ions are implanted under the condition of 0 × 10 ¹² cm ⁻² to form a first n-type semiconductor region 207 to be a horizontal transfer portion [(b) of FIG. 2].

Next, a tungsten film 211 having a thickness of about 0.6 μm is selectively grown by selective CVD using the silicon oxide film 204 as a mask. Selection of tungsten C
When WF ₆ is used as a raw material source and SiH ₄ is used as a reducing gas, the reaction chamber temperature is 180 to 250 ° C. and the pressure is 20 VD.
It is performed under the condition of 100 mTorr. Thereafter, the silicon oxide film 204 is removed by etching, and an opening is formed in a p-type well layer portion for a vertical transfer portion to be subsequently formed.
A photoresist film 220b having a thickness of μm is formed, and using this and a tungsten film 211 as a mask, boron is deposited at an incident angle of 0.
°, acceleration energy: 200 keV, dose: 2.0
Ion implantation is performed under the condition of × 10 ¹² cm ⁻² to form a second p-type well layer 208 for the vertical transfer section.

Subsequently, arsenic (As) is again used with the photoresist film 220b and the tungsten film 211 as a mask.
Is ion-implanted under the conditions of an incident angle of 0 °, an acceleration energy of 150 keV, and a dose of 3.0 × 10 ¹² cm ⁻² to form a second n-type semiconductor region 209 serving as a vertical transfer section [ FIG. 2 (c)].

Next, the photoresist film 220b is removed.
Then, the tungsten film 211 is changed to H _Two O_Two Using liquid
Removed by wet etching. Then, the well-known technique
Applying the technique, photoelectric conversion part, charge transfer electrode, light shielding film and
According to the second embodiment of the present invention, a metal film for wiring is formed.
The manufacture of the solid-state imaging device is completed.

FIGS. 3A to 3C show AA 'of FIG.
FIG. 11 is a process cross-sectional view showing a main manufacturing process step of a third embodiment of the present invention in a cross section along a line BB ′. In the third embodiment, the steps up to the state shown in FIG. 3B are the same as those in the second embodiment shown in FIGS. 2A and 2B. The part corresponding to the part of FIG.
, The same symbols are assigned to the last two digits, and duplicate description is omitted.

After the process step shown in FIG. 3B is completed, an aluminum film 311 having a thickness of about 0.7 μm is selectively grown by a selective CVD method using the silicon oxide film 304 as a mask. Is removed by etching. Thereafter, a photoresist film 320b having a thickness of about 2.0 μm and having an opening in a p-type well layer portion for a vertical transfer portion to be formed is formed. The second p-type well layer 308 for the vertical transfer section is formed by ion implantation under the conditions of °, acceleration energy: 200 keV, and dose: 2.0 × 10 ¹² cm ⁻² .

Subsequently, arsenic (As) is again used with the photoresist film 320b and the aluminum film 311 as a mask.
Is ion-implanted under the conditions of an incident angle of 0 °, an acceleration energy of 150 keV, and a dose of 3.0 × 10 ¹² cm ⁻² to form a second n-type semiconductor region 309 constituting a vertical transfer portion.
Is formed [(c) of FIG. 2].

Next, the photoresist film 320b is removed, and then the aluminum film 311 is removed by a wet etching method using phosphoric acid. After that, a photoelectric conversion unit, a charge transfer electrode, a light-shielding film, and a metal film for wiring are formed by applying a well-known manufacturing technique, thereby completing the manufacture of the solid-state imaging device according to the third embodiment of the present invention.

While the preferred embodiment has been described above,
The present invention is not limited to these embodiments, and various modifications are possible. For example, the charge-coupled device of the buried channel type in the embodiment is replaced with the surface channel type.
In addition, a silicon nitride film can be used instead of the silicon oxide film 204, and a metal material such as molybdenum can be used as a metal film formed by a selective CVD method. The numerical examples used in the description of the embodiments are not to be construed as limiting.

[0028]

As described above, the method of manufacturing a solid-state imaging device according to the present invention was used when forming the first p-type well layer (and the first n-type semiconductor region) of the horizontal transfer section. Since the mask material is used to form the second p-type well layer (and the second n-type semiconductor region) of the vertical transfer section using the mask material as a mask, according to the present invention,
Each area of the vertical transfer section can be formed as being self-aligned with each area of the horizontal transfer section. Therefore,
According to the present invention, it is possible to prevent the occurrence of an excessively overlapping or insufficiently overlapping region or an offset state between these regions caused by misalignment of the mask, and to prevent a potential well or the like from the vertical charge transfer region to the horizontal charge transfer region. It is possible to prevent a potential barrier from being generated and to suppress a decrease in charge transfer efficiency.

[Brief description of the drawings]

FIG. 1 is a process cross-sectional view for explaining a first embodiment of the present invention.

FIG. 2 is a process cross-sectional view for explaining a second embodiment of the present invention.

FIG. 3 is a process cross-sectional view for explaining a third embodiment of the present invention.

FIG. 4 is a schematic plan view of a solid-state imaging device.

FIG. 5 is a process sectional view for describing a conventional example.

FIG. 6 is a sectional view for explaining a problem of the conventional example.

[Explanation of symbols]

Reference Signs List 41 photoelectric conversion unit 42 vertical transfer unit 43 horizontal transfer unit 44 output circuit unit 101, 201, 301, 501 n-type semiconductor substrate 102, 202, 302, 502 silicon oxide film 203, 303 polycrystalline silicon film 204, 304 silicon oxide film 106, 206, 306, 506 First p-type well layer 107, 207, 307, 507 First n-type semiconductor region 108, 208, 308, 508 Second p-type well layer 109, 209, 309, 509 2 n-type semiconductor region 111 silicon oxide film 211 tungsten film 311 aluminum film 120a, 120b, 220b, 320b, 520a,
520b, 520c photoresist film

Claims (7)

(57) [Claims] 1. A first step of forming a first mask material having an opening on a first charge transfer region to be formed on a first conductivity type semiconductor substrate, and using the first mask material as a mask. Second
A second step of the conductivity type impurity to form the first semiconductor <br/> body region of the second conductivity type by ion implantation, the first mask material
The first conductivity type impurity is ion-implanted into the mask to form the first conductivity type impurity.
A second semiconductor region of a first conductivity type in a surface region of the semiconductor region;
A third step of forming a band, and a fourth step of forming a second mask material with a relatively low temperature deposition technique without using a thermal oxidation of the first mask material as a mask, the first A fifth step of removing the mask material and forming a third mask material having an opening on the second charge transfer region to be formed; and using the second mask material and the third mask material as a mask. a sixth step of the second conductivity type impurity to form a third <br/> semiconductor region of the second conductivity type by ion implantation, the second mask
Using the material and the third mask material as a mask,
An ion is implanted into the surface region of the third semiconductor region.
Forming a fourth semiconductor region of the first conductivity type on the substrate
And a method of manufacturing a solid-state imaging device. 2. In the second step , ion implantation is performed.
The first mask material on the side where the fourth semiconductor region is formed
2. The method according to claim 1, wherein the step is performed from an oblique direction so that a shadow is generated . 3. The method according to claim 3, wherein in the third step, ion implantation is performed.
2. The method according to claim 1, wherein the step is performed from an oblique direction so that a shadow is formed on the first mask material on the side where the fourth semiconductor region is formed. 4. The method according to claim 1, wherein the first and third mask materials are photo
The second mask material is formed of a liquid phase
Consisting of silicon oxide film formed by long method
2. The method for manufacturing a solid-state imaging device according to claim 1, wherein: 5. The first mask material is made of an insulating film.
And the second mask material is formed by a selective CVD method.
And the third mask material is formed of
2. The method according to claim 1, wherein the method comprises a photoresist film . 6. The method according to claim 1, wherein the metal film is a tungsten film, molybdenum.
6. The method for manufacturing a solid-state imaging device according to claim 5, comprising a ten film or an aluminum film . 7. The first, second and third mask members
Is provided on a semiconductor substrate.
6. The method for manufacturing a solid-state imaging device according to item 5 .