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JP2532400Y2 - Hybrid IC - Google Patents

Hybrid IC

Info

Publication number
JP2532400Y2
JP2532400Y2 JP1991025377U JP2537791U JP2532400Y2 JP 2532400 Y2 JP2532400 Y2 JP 2532400Y2 JP 1991025377 U JP1991025377 U JP 1991025377U JP 2537791 U JP2537791 U JP 2537791U JP 2532400 Y2 JP2532400 Y2 JP 2532400Y2
Authority
JP
Japan
Prior art keywords
mounting
hybrid
circuit
metal substrate
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP1991025377U
Other languages
Japanese (ja)
Other versions
JPH04113475U (en
Inventor
勝 安藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujifilm Business Innovation Corp
Original Assignee
Fuji Xerox Co Ltd
Fujifilm Business Innovation Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Xerox Co Ltd, Fujifilm Business Innovation Corp filed Critical Fuji Xerox Co Ltd
Priority to JP1991025377U priority Critical patent/JP2532400Y2/en
Publication of JPH04113475U publication Critical patent/JPH04113475U/en
Application granted granted Critical
Publication of JP2532400Y2 publication Critical patent/JP2532400Y2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Insulated Metal Substrates For Printed Circuits (AREA)
  • Cooling Or The Like Of Electrical Apparatus (AREA)
  • Combinations Of Printed Boards (AREA)

Description

【考案の詳細な説明】[Detailed description of the invention]

【0001】[0001]

【産業上の利用分野】本考案は、電子計算機等に用いら
れるプリント配線板におけるハイブリットIC(混成集
積回路)に係り、特に、発熱部品及び発熱量の多い回路
部分を2枚の金属基板上に実装し、両基板を貼り合わせ
て成るハイブリットICに関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a hybrid IC (hybrid integrated circuit) in a printed wiring board used for an electronic computer and the like. In particular, a heat generating component and a circuit portion generating a large amount of heat are mounted on two metal substrates. The present invention relates to a hybrid IC formed by mounting and bonding both substrates.

【0002】[0002]

【従来の技術】従来のハイブリットICは、発熱量の少
ない回路部品を抜き出して基板上に集積して、発熱量の
多い回路部品が搭載されたプリント配線板上にハイブリ
ットICの基板を配置して配線(端子)で接続するもの
であった。また、発熱量の多い回路部品を搭載するハイ
ブリットICの基板を発熱部品に対応できるように放熱
効果のあるアルミ基材等を用いることも考えられてい
た。
2. Description of the Related Art In a conventional hybrid IC, circuit components having a small amount of heat are extracted and integrated on a substrate, and a substrate of the hybrid IC is arranged on a printed wiring board on which circuit components with a large amount of heat are mounted. They were connected by wiring (terminals). It has also been considered to use an aluminum base material or the like having a heat radiation effect so that a substrate of a hybrid IC on which a circuit component generating a large amount of heat is mounted can correspond to the heat generating component.

【0003】[0003]

【考案が解決しようとする課題】しかしながら、上記従
来のハイブリットICの構成では、発熱量の少ない部品
を集積した基板を、発熱量の多い部品が搭載された基板
上に配置する構成となっているので、適応範囲が限られ
てしまい、プリント配線板を小型化できないとの問題点
があった。
However, in the above-described conventional hybrid IC, a substrate on which components generating a small amount of heat are integrated is arranged on a substrate on which components generating a large amount of heat are mounted. Therefore, there is a problem that the applicable range is limited and the printed wiring board cannot be miniaturized.

【0004】そして、基板上の配線に使われているアル
ミニウム(Al)は、微細に形成できないため配線密度
を高くすることができず、このため大幅な小型化が難し
いという問題点があった。
[0004] Aluminum (Al) used for wiring on a substrate cannot be formed finely, so that the wiring density cannot be increased, and there is a problem that it is difficult to significantly reduce the size.

【0005】また、発熱部品対応としてハイブリットI
Cの基板に用いられているアルミ基材はアルミニウムの
ため導電性があり、ハイブリットICの基板と他の基板
との接続の配線も導電性のために配線の端子の出し方が
難しく、このため、他の基板との接続を容易に行うこと
ができないとの問題点があった。
[0005] In addition, Hybrid I
The aluminum base material used for the substrate C is aluminum and therefore conductive, and the wiring of the connection between the hybrid IC substrate and other substrates is also conductive, so it is difficult to expose the terminals of the wiring. However, there is a problem that connection with another substrate cannot be easily performed.

【0006】本考案は上記実情に鑑みてなされたもの
で、発熱部品及び発熱量の多い回路部分の放熱効率の向
上を図るとともに、小型化及び薄型化を可能とするハイ
ブリットICの構造を提供することを目的とする。
The present invention has been made in view of the above circumstances, and provides a structure of a hybrid IC capable of improving the heat radiation efficiency of a heat-generating component and a circuit portion generating a large amount of heat, and enabling a reduction in size and thickness. The purpose is to:

【0007】[0007]

【課題を解決するための手段】上記目的を達成するため
請求項1に記載の考案は、金属基板の上面を絶縁層で被
覆し、この絶縁層上に回路を形成するとともに第1の封
止樹脂で覆われた発熱素子や面実装部品を実装して実装
基板とし、一対の実装基板を各実装面が対向するように
外部端子を挟んで貼り合わせて成るハイブリットICで
あって、次の構成を含むことを特徴としている。前記外
部端子は、その一端が前記各実装基板の回路に接続され
他端が実装基板の外部に位置する。そして、実装基板を
貼り合せるに際して、金属基板上に配置された発熱素子
同士が対向しないように、交互にずらして配置するとと
もに、各金属基板において、各発熱素子の上部に対応す
る位置に凹部を設ける。
According to the first aspect of the present invention, a metal substrate is covered with an insulating layer, a circuit is formed on the insulating layer, and a first sealing is performed. A hybrid IC in which a heat-generating element or a surface-mounted component covered with resin is mounted to form a mounting board, and a pair of mounting boards are bonded together with external terminals interposed therebetween such that the mounting surfaces face each other. It is characterized by including. The external terminal has one end connected to a circuit of each of the mounting boards and the other end located outside the mounting board. When bonding the mounting substrates, the heating elements arranged on the metal substrate are alternately shifted so that the heating elements do not face each other, and a concave portion is formed on each metal substrate at a position corresponding to an upper portion of each heating element. Provide.

【0008】請求項2に記載の考案は、請求項1のハイ
ブリットICにおいて、発熱素子を第1の封止樹脂で覆
うのに代えて、貼り合わせた実装基板の側面の外側にお
いて第2の封止樹脂を塗布して実装基板に挟まれた領域
を密封して成ることを特徴としている。
According to a second aspect of the present invention, in the hybrid IC of the first aspect, instead of covering the heating element with the first sealing resin, the second sealing is performed outside the side surface of the bonded mounting substrate. It is characterized in that an area between the mounting boards is sealed by applying a stop resin.

【0009】請求項3に記載の考案は、請求項1のハイ
ブリットICにおいて、一方の金属基板に貫通穴を形成
し、他方の金属基板に実装された面実装部品の一部を前
記貫通穴内に配置させて成ることを特徴としている。
According to a third aspect of the present invention, in the hybrid IC of the first aspect, a through hole is formed in one of the metal substrates, and a part of the surface mount component mounted on the other metal substrate is inserted into the through hole. It is characterized by being arranged.

【0010】請求項4に記載の考案は、金属基板の上面
を絶縁層で被覆し、この絶縁層上に回路を形成するとと
もに第1の封止樹脂で覆われた発熱素子や面実装部品を
実装して実装基板とする一方、金属基板の上面を絶縁層
で被覆し、この絶縁層上に回路のみを形成して回路基板
とし、前記実装基板と回路基板とを実装面と回路形成面
とが対向するように外部端子を挟んで貼り合わせて成る
ハイブリットICであって、次の構成を含むことを特徴
としている。前記外部端子は、その一端が前記実装基板
および回路基板の回路に接続され他端が各基板の外部に
位置する。そして、回路基板となる金属基板において、
実装基板側の発熱素子の上部に対応する位置に凹部を設
ける。
According to a fourth aspect of the present invention, the upper surface of the metal substrate is covered with an insulating layer, a circuit is formed on the insulating layer, and the heat-generating element or the surface-mounted component covered with the first sealing resin is formed. On the other hand, while mounting to form a mounting board, the upper surface of the metal substrate is covered with an insulating layer, and only a circuit is formed on this insulating layer to form a circuit board, and the mounting board and the circuit board are mounted on a mounting surface and a circuit forming surface. Are hybrid ICs which are bonded together with an external terminal interposed therebetween so as to face each other, and are characterized by including the following configuration. One end of the external terminal is connected to the circuit of the mounting board and the circuit board, and the other end is located outside each board. And in the metal substrate which becomes a circuit board,
A recess is provided at a position corresponding to the upper part of the heating element on the mounting board side.

【0011】[0011]

【作用】請求項1記載の考案によれば、金属基板上に発
熱素子や面実装部品を実装しているので、素子等に発生
した熱を効率良く放熱させることができる。また、外部
端子により他の基板との接続を容易に行うことができ
る。また、2枚の実装基板を貼り合わせることにより小
型化が可能となり、その際に発熱素子同士が対向しない
ように交互にずらして配置するとともに、各発熱素子の
上部に対応する位置の金属基板に凹部が形成されている
ので、ハイブリットIC全体の薄型化を図ることができ
る。
According to the first aspect of the present invention, since the heat generating element and the surface mount component are mounted on the metal substrate, the heat generated in the element and the like can be efficiently radiated. In addition, connection with another substrate can be easily performed by the external terminals. In addition, it is possible to reduce the size by bonding the two mounting boards. In this case, the heating elements are alternately shifted so that they do not face each other, and the heating elements are mounted on the metal substrate at a position corresponding to the upper part of each heating element. Since the concave portions are formed, the overall thickness of the hybrid IC can be reduced.

【0012】請求項2記載の考案によれば、実装基板に
挟まれた領域を密封する第2の封止樹脂は、貼り合わせ
た実装基板の側面の外側に存在し、発熱素子を覆う第1
の封止樹脂が存在しないので、封止樹脂が発熱素子へ応
力をかけて素子と回路とを接続するワイヤ等に損傷を与
えることがなく、ハイブリットICの信頼性を向上させ
ることができるとともに、ハイブリットICのさらなる
薄型化を図ることができる。
According to the second aspect of the present invention, the second sealing resin for sealing the region sandwiched between the mounting substrates is present outside the side surface of the bonded mounting substrate and covers the heating element.
Since the sealing resin does not exist, the sealing resin does not apply stress to the heat-generating element to damage wires and the like connecting the element and the circuit, and the reliability of the hybrid IC can be improved. The thickness of the hybrid IC can be further reduced.

【0013】請求項3記載の考案によれば、請求項1記
載のハイブリットICにおいて、金属基板に貫通した穴
をあけ、当該金属基板より厚い面実装部品を実装するこ
とができるハイブリットICとしているので、厚みのあ
る部品を実装することができ、実装できる部品の範囲を
広げることができる。
According to the third aspect of the present invention, in the hybrid IC according to the first aspect, a through hole is formed in the metal substrate, and the hybrid IC is capable of mounting a surface mounting component thicker than the metal substrate. Therefore, a thick component can be mounted, and the range of the mountable component can be expanded.

【0014】請求項4記載の考案によれば、一方の金属
基板を回路のみが形成された回路基板としているので、
実装部品は少なく回路が多い場合に金属基板の面積を小
さくすることができる。また、一つの実装部品に対する
金属基板の放熱面積を大きくできるので、発熱素子の発
熱量が多い場合に放熱効果を向上させることができる。
According to the invention of claim 4, since one of the metal substrates is a circuit substrate on which only the circuit is formed,
When the number of mounted components is small and the number of circuits is large, the area of the metal substrate can be reduced. In addition, since the heat radiation area of the metal substrate with respect to one mounted component can be increased, the heat radiation effect can be improved when the heat generation amount of the heating element is large.

【0015】[0015]

【実施例】本考案の−実施例について図面を参照しなが
ら説明する。図1は、本考案の−実施例に係るハイブリ
ットICの断面説明図である。
DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a cross-sectional view illustrating a hybrid IC according to an embodiment of the present invention.

【0016】本実施例のハイブリットICは、電子機器
等に用いられる混成集積回路であり、アルミニウム板で
形成された金属基板1上に発熱素子2等を実装して実装
基板とし、この実装基板2枚を実装面が対向するように
貼り合わせて構成されている。各実装基板は、金属基板
1上の全面に絶縁層5を被覆し、その上に所望パターン
の回路4を形成し、回路4の一部に発熱素子2や面実装
部品7を実装している。実装された発熱素子2は、第1
の封止樹脂3で覆われている。また、実装基板間には、
その端部において、外部との電気的な接続を行うための
端子(外部端子)8が配置され、この端子8は各金属基
板1a,1bに形成された回路4,4で挟まれることに
より各回路4,4と接続されている。
The hybrid IC of this embodiment is a hybrid integrated circuit used in electronic equipment and the like. The heating element 2 and the like are mounted on a metal substrate 1 formed of an aluminum plate to form a mounting substrate. It is configured by bonding the substrates so that the mounting surfaces face each other. Each mounting substrate covers the entire surface of the metal substrate 1 with the insulating layer 5, forms a circuit 4 having a desired pattern thereon, and mounts the heating element 2 and the surface mounting component 7 on a part of the circuit 4. . The mounted heating element 2 is
Is covered with the sealing resin 3. Also, between the mounting boards,
At its end, a terminal (external terminal) 8 for making an electrical connection with the outside is arranged, and this terminal 8 is sandwiched between circuits 4 and 4 formed on the respective metal substrates 1a and 1b, thereby forming each terminal. The circuits 4 and 4 are connected.

【0017】また、図5の拡大断面説明図に示す様に、
発熱素子2部分は、アルミニウム(Al)の基板1上に
厚さ50μmの絶縁層11を設け、その上にICチップ
12をダイボンドペ−スト13で固定し、金(Au)の
金属ワイヤ−14でICチップ12のパッド部と金属基
板1上のパタ−ン部15間を電気的に接続し、ワイヤ−
14保護のため封子樹脂16で全体を覆う構造となって
いる。
Further, as shown in the enlarged sectional view of FIG.
The heating element 2 is provided with an insulating layer 11 having a thickness of 50 μm on a substrate 1 of aluminum (Al), on which an IC chip 12 is fixed with a die bond paste 13 and a metal wire 14 of gold (Au). The pad portion of the IC chip 12 and the pattern portion 15 on the metal substrate 1 are electrically connected to each other,
The structure is such that the entire structure is covered with a sealing resin 16 for protection.

【0018】また、実装基板を貼り合せるに際して、金
属基板1a,1b上に配置された発熱素子3同士が対向
しないように、交互にずらして配置するとともに、各金
属基板1a,1bにおいては、各発熱素子3の上部に対
応する位置に凹部(ザグリ)が設けられ、各発熱素子3
の上部を凹部(ザグリ)内に位置させることによりハイ
ブリットIC全体の薄型化を図っている。
When bonding the mounting substrates, the heating elements 3 arranged on the metal substrates 1a and 1b are alternately shifted so that the heating elements 3 are not opposed to each other. A concave portion (counterbore) is provided at a position corresponding to the upper part of the heating element 3.
Is positioned in the recess (counterbore) to reduce the overall thickness of the hybrid IC.

【0019】また、2枚の金属基板1a,1bの接続方
法は、導体の接着、ボンデイング、接触のみによる方法
等が考えられる。
As a method for connecting the two metal substrates 1a and 1b, a method using only bonding, bonding, and contacting of conductors can be considered.

【0020】この様に、2枚の金属基板1a,1b上下
ともアルミニウム(Al)の金属基板であり、アルミニ
ウム(Al)は放熱性が良いため放熱の効率が良く、ま
た、図1に示すように引き出し端子8を挟み込む構成と
しているので、配線の端子を取り付け易くなり、今まで
困難だった他の基板との接続をも簡易にできる効果があ
る。
As described above, the upper and lower two metal substrates 1a and 1b are metal substrates of aluminum (Al). Aluminum (Al) has good heat dissipation and thus has good heat dissipation efficiency, and as shown in FIG. Since the lead terminals 8 are sandwiched between the wiring boards, the wiring terminals can be easily attached, and the connection with other substrates, which has been difficult until now, can be simplified.

【0021】更に、上下の2枚の金属基板1a,1b上
に回路4等の配線を設けることができるので、1面のみ
のハイブリットICの基板を配置したプリント配線板に
比べ、ハイブリットICを小型化できる効果がある。
Further, since the wiring of the circuit 4 and the like can be provided on the upper and lower two metal substrates 1a and 1b, the hybrid IC is smaller in size than a printed wiring board on which a hybrid IC substrate having only one surface is arranged. There is an effect that can be converted.

【0022】次に、別の実施例について、図2,図3,
図4を使って説明する。図2,図3,図4は、別の実施
例のハイブリットICの断面説明図である。尚、図1と
同様の構成をとる部分については同一の符号を付して説
明する。
Next, another embodiment will be described with reference to FIGS.
This will be described with reference to FIG. FIGS. 2, 3, and 4 are cross-sectional explanatory views of a hybrid IC according to another embodiment. Note that parts having the same configuration as in FIG. 1 are described with the same reference numerals.

【0023】図2のハイブリットICは、図1と同様、
2枚の金属基板1a,1b上の回路4部分に発熱素子2
又は面実装部品7を実装している。そして、面実装部品
7を実装した2枚の金属基板1a,1bを接続部6で接
続し、金属基板1の端部において端子8を挟み込んでい
るが、図1の構成のハイブリットICとの相違点は、貼
り合せた金属基板1a,1bの側面を第2の封止樹脂9
によって部品実装部を密閉することである。そして発熱
素子2を覆っていた第1の封止樹脂3を削除している点
である。
The hybrid IC of FIG. 2 is similar to FIG.
The heating element 2 is provided on the circuit 4 on the two metal substrates 1a and 1b.
Alternatively, the surface mount component 7 is mounted. Then, the two metal substrates 1a and 1b on which the surface mount components 7 are mounted are connected by the connecting portion 6, and the terminal 8 is sandwiched at the end of the metal substrate 1, but is different from the hybrid IC having the configuration of FIG. The point is that the side surfaces of the bonded metal substrates 1a and 1b are
This seals the component mounting part. The point is that the first sealing resin 3 covering the heating element 2 is omitted.

【0024】これにより、今まで、第1の封止樹脂3が
発熱素子2に応力をかけ、その力が発熱素子2からの配
線を痛めていた問題がなくなり、ハイブリットICに対
する信頼性をより高めることができる効果がある。
As a result, the problem that the first sealing resin 3 has exerted a stress on the heating element 2 and the force has damaged the wiring from the heating element 2 has been eliminated, and the reliability for the hybrid IC is further improved. There is an effect that can be.

【0025】更に、この実施例によれば、実装基板間に
第1の封止樹脂3が存在しないので、ハイブリットIC
をより薄型化することができる。
Further, according to this embodiment, since the first sealing resin 3 does not exist between the mounting substrates, the hybrid IC
Can be made thinner.

【0026】図3のハイブリットICは、図1と同様に
2枚の金属基板1a,1b上の回路4部分に発熱素子2
又は面実装部品7を実装し、接続部6で接続し、金属基
板1の端部において端子8を挟み込む構造としている。
図1のハイブリットICとの相違点は、金属基板1aに
貫通した穴をあけ、その位置に金属基板1aより厚い面
実装部品7′を実装した点である。
The hybrid IC shown in FIG. 3 has a heating element 2 on a circuit 4 on two metal substrates 1a and 1b as in FIG.
Alternatively, the structure is such that the surface mount components 7 are mounted, connected at the connection portions 6, and the terminals 8 are sandwiched between the ends of the metal substrate 1.
The difference from the hybrid IC of FIG. 1 is that a through hole is made in the metal substrate 1a, and a surface mounting component 7 'thicker than the metal substrate 1a is mounted at that position.

【0027】これにより、厚みのある面実装部品7′を
実装することができるので、実装できる部品の範囲を拡
大できる効果がある。
As a result, the surface-mounted component 7 'having a large thickness can be mounted, so that the range of mountable components can be expanded.

【0028】図4のハイブリットICは、2枚の金属基
板1a,1bの間に発熱素子2又は面実装部品7を実装
し、接続部6により2枚の金属基板1a,1bを接続
し、金属基板1の端部において端子8を挟み込むところ
までは、図1,2,3と同じである。しかし、この場
合、発熱素子2又は面実装部品7の実装を片方の金属基
板1bのみに行い、もう−方の金属基板1aは、配線部
分等の回路4だけを形成して貼り合せるものである。
In the hybrid IC shown in FIG. 4, the heating element 2 or the surface mount component 7 is mounted between the two metal substrates 1a and 1b, and the two metal substrates 1a and 1b are connected by the connecting portion 6, and the Up to the point where the terminal 8 is sandwiched at the end of the substrate 1, it is the same as FIGS. However, in this case, the heating element 2 or the surface mount component 7 is mounted on only one metal substrate 1b, and the other metal substrate 1a is formed by bonding only the circuit 4 such as a wiring portion. .

【0029】図4のハイブリットICの構造は、実装部
品が少なく、配線等の回路が複雑で多い場合に金属基板
1のスペースを有効に活用でき、金属基板の面積を小さ
くできる効果がある。また、1個の素子の発熱量が多い
場合に上下2枚の金属基板によって放熱できるので、放
熱量を向上させる効果がある。
The structure of the hybrid IC shown in FIG. 4 has an effect that the space of the metal substrate 1 can be effectively utilized and the area of the metal substrate can be reduced when the number of mounted components is small and circuits such as wiring are complicated and large. In addition, when one element generates a large amount of heat, heat can be radiated by the two upper and lower metal substrates, so that there is an effect of improving the amount of heat radiated.

【0030】本考案は、プリント配線板の−部の回路
を、貼り合せ金属基板によりハイブリットIC化にする
ときの実装技術であるが、これをプリント配線板全体に
適用することも可能である。また、金属基板を更に多層
化することで、金属基板の面積を小さくし、小型化を簡
易にすることができる効果がある。
The present invention is a mounting technique when a circuit of a negative portion of a printed wiring board is formed into a hybrid IC by a bonded metal substrate, but this technique can be applied to the entire printed wiring board. Further, by further increasing the number of layers of the metal substrate, there is an effect that the area of the metal substrate can be reduced and downsizing can be simplified.

【0031】[0031]

【考案の効果】請求項1記載の考案によれば、2枚の金
属基板上に発熱素子や面実装部品をそれぞれ実装して実
装基板とし、これらを貼り合わせるに際して発熱素子同
士が対向しないように交互にずらして配置するととも
に、各発熱素子の上部に対応する位置の金属基板に凹部
が形成されているので、ハイブリットIC全体の小型化
及び薄型化を図りながら素子等に発生した熱を効率良く
放熱させることができる。
According to the first aspect of the present invention, a heating element and a surface mounting component are mounted on two metal substrates to form a mounting board, and the heating elements are not opposed to each other when they are bonded. The heat generating elements are arranged so as to be alternately shifted, and a concave portion is formed in the metal substrate at a position corresponding to the upper part of each heating element. Heat can be dissipated.

【0032】請求項2記載の考案によれば、発熱素子を
覆う第1の封止樹脂が存在しないので、封止樹脂が発熱
素子へ応力をかけて素子と回路とを接続するワイヤ等に
損傷を与えることがなく、ハイブリットICの信頼性を
向上させることができるとともに、貼り合わせた実装基
板の側面の外側に存在する第2の封止樹脂で実装基板に
挟まれた領域を密封するので、ハイブリットICのさら
なる薄型化を図ることができる。
According to the second aspect of the present invention, since the first sealing resin covering the heating element does not exist, the sealing resin applies stress to the heating element and damages wires and the like connecting the element and the circuit. And the reliability of the hybrid IC can be improved, and the region sandwiched between the mounting substrates is sealed with the second sealing resin existing outside the side surface of the bonded mounting substrate. The thickness of the hybrid IC can be further reduced.

【0033】請求項3記載の考案によれば、請求項1記
載のハイブリットICにおいて、金属基板に貫通した穴
をあけ、当該金属基板より厚い面実装部品を実装するこ
とができるハイブリットICとしているので、厚みのあ
る部品を実装することができ、実装できる部品の範囲を
広げることができる効果がある。
According to the third aspect of the present invention, in the hybrid IC according to the first aspect, a through hole is formed in the metal substrate so that the surface mounted component thicker than the metal substrate can be mounted. This has the effect that components with a large thickness can be mounted, and the range of components that can be mounted can be expanded.

【0034】請求項4記載の考案によれば、一方の金属
基板を回路のみが形成された回路基板としているので、
実装部品は少なく回路が多い場合に金属基板の面積を小
さくすることができ、また、一つの実装部品に対する金
属基板の放熱面積を大きくできるので、発熱素子の発熱
量が多い場合に放熱効果を向上させることができる。
According to the present invention, since one of the metal substrates is a circuit substrate on which only the circuit is formed,
When there are few mounted components and there are many circuits, the area of the metal substrate can be reduced, and the heat radiation area of the metal substrate with respect to one mounted component can be increased, so the heat radiation effect is improved when the heating element generates a large amount of heat Can be done.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本考案の−実施例に係るハイブリットICの断
面説明図である。
FIG. 1 is a cross-sectional view illustrating a hybrid IC according to an embodiment of the present invention.

【図2】本考案の別の実施例に係るハイブリットICの
断面説明図である。
FIG. 2 is a cross-sectional view illustrating a hybrid IC according to another embodiment of the present invention.

【図3】本考案の別の実施例に係るハイブリットICの
断面説明図である。
FIG. 3 is a cross-sectional view illustrating a hybrid IC according to another embodiment of the present invention.

【図4】本考案の別の実施例に係るハイブリットICの
断面説明図である。
FIG. 4 is a cross-sectional view illustrating a hybrid IC according to another embodiment of the present invention.

【図5】発熱素子部分の拡大断面説明図である。FIG. 5 is an enlarged sectional explanatory view of a heating element portion.

【符号の説明】[Explanation of symbols]

1…金属基板、 2…発熱素子、 3…第1の封止樹
脂、 4…回路、 5…絶縁層、 6…接続部、 7…
面実装部品、 8…端子、 9…第2の封止樹脂、 1
1…絶縁層、 12…ICチップ、 13…ダイボンド
ペースト、 14…ワイヤー、 15…パターン部、
16…封止樹脂
DESCRIPTION OF SYMBOLS 1 ... Metal substrate, 2 ... Heating element, 3 ... 1st sealing resin, 4 ... Circuit, 5 ... Insulating layer, 6 ... Connection part, 7 ...
Surface mount component, 8 ... terminal, 9 ... second sealing resin, 1
DESCRIPTION OF SYMBOLS 1 ... Insulating layer, 12 ... IC chip, 13 ... Die bond paste, 14 ... Wire, 15 ... Pattern part,
16: sealing resin

Claims (4)

(57)【実用新案登録請求の範囲】(57) [Scope of request for utility model registration] 【請求項1】金属基板の上面を絶縁層で被覆し、この絶
縁層上に回路を形成するとともに第1の封止樹脂で覆わ
れた発熱素子や面実装部品を実装して実装基板とし、 一対の実装基板を各実装面が対向するように外部端子を
挟んで貼り合わせ、 前記外部端子は、その一端が前記各実装基板の回路に接
続され他端が実装基板の外部に位置して成り、 実装基板を貼り合せるに際して、金属基板上に配置され
た発熱素子同士が対向しないように、交互にずらして配
置するとともに、各金属基板において、各発熱素子の上
部に対応する位置に凹部を設けて成ることを特徴とする
ハイブリットIC。
An upper surface of a metal substrate is covered with an insulating layer, a circuit is formed on the insulating layer, and a heating element and a surface mounting component covered with a first sealing resin are mounted on the metal substrate to form a mounting substrate. A pair of mounting boards are bonded with an external terminal sandwiched therebetween such that the respective mounting surfaces are opposed to each other. The external terminal has one end connected to a circuit of each mounting board and the other end positioned outside the mounting board. When bonding the mounting substrates, the heating elements arranged on the metal substrate are alternately shifted so that the heating elements do not face each other, and a concave portion is provided on each metal substrate at a position corresponding to an upper portion of each heating element. A hybrid IC comprising:
【請求項2】発熱素子を第1の封止樹脂で覆うのに代え
て、貼り合わせた実装基板の側面の外側において第2の
封止樹脂を塗布して実装基板に挟まれた領域を密封して
成る請求項1に記載のハイブリットIC。
2. A method according to claim 1, wherein the heating element is covered with a first sealing resin, and a second sealing resin is applied to the outside of a side surface of the bonded mounting substrate to seal a region sandwiched between the mounting substrates. The hybrid IC according to claim 1, comprising:
【請求項3】一方の金属基板に貫通穴を形成し、他方の
金属基板に実装された面実装部品の一部を前記貫通穴内
に配置させて成る請求項1に記載のハイブリットIC。
3. The hybrid IC according to claim 1, wherein a through hole is formed in one of the metal substrates, and a part of the surface mount component mounted on the other metal substrate is arranged in the through hole.
【請求項4】金属基板の上面を絶縁層で被覆し、この絶
縁層上に回路を形成するとともに第1の封止樹脂で覆わ
れた発熱素子や面実装部品を実装して実装基板とする一
方、金属基板の上面を絶縁層で被覆し、この絶縁層上に
回路のみを形成して回路基板とし、 前記実装基板と回路基板とを実装面と回路形成面とが対
向するように外部端子を挟んで貼り合わせ、 前記外部端子は、その一端が前記実装基板および回路基
板の回路に接続され他端が各基板の外部に位置して成
り、 回路基板となる金属基板において、実装基板側の発熱素
子の上部に対応する位置に凹部を設けて成ることを特徴
とするハイブリットIC。
4. An upper surface of a metal substrate is covered with an insulating layer, a circuit is formed on the insulating layer, and a heating element or a surface mount component covered with a first sealing resin is mounted to form a mounting substrate. On the other hand, the upper surface of the metal substrate is covered with an insulating layer, and only a circuit is formed on the insulating layer to form a circuit board. The external terminals are connected so that the mounting surface and the circuit forming surface face each other. The external terminal has one end connected to the circuit of the mounting board and the circuit board, and the other end positioned outside the respective boards. A hybrid IC comprising a concave portion provided at a position corresponding to an upper portion of a heating element.
JP1991025377U 1991-03-22 1991-03-22 Hybrid IC Expired - Lifetime JP2532400Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1991025377U JP2532400Y2 (en) 1991-03-22 1991-03-22 Hybrid IC

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1991025377U JP2532400Y2 (en) 1991-03-22 1991-03-22 Hybrid IC

Publications (2)

Publication Number Publication Date
JPH04113475U JPH04113475U (en) 1992-10-05
JP2532400Y2 true JP2532400Y2 (en) 1997-04-16

Family

ID=31910123

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1991025377U Expired - Lifetime JP2532400Y2 (en) 1991-03-22 1991-03-22 Hybrid IC

Country Status (1)

Country Link
JP (1) JP2532400Y2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6452482B2 (en) * 2015-02-16 2019-01-16 古河電気工業株式会社 Electronic module

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5254757U (en) * 1975-10-17 1977-04-20
JPH0442939Y2 (en) * 1987-10-20 1992-10-12

Also Published As

Publication number Publication date
JPH04113475U (en) 1992-10-05

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