JP2501174B2 - Method for manufacturing surface mount terminal - Google Patents
Method for manufacturing surface mount terminalInfo
- Publication number
- JP2501174B2 JP2501174B2 JP16997593A JP16997593A JP2501174B2 JP 2501174 B2 JP2501174 B2 JP 2501174B2 JP 16997593 A JP16997593 A JP 16997593A JP 16997593 A JP16997593 A JP 16997593A JP 2501174 B2 JP2501174 B2 JP 2501174B2
- Authority
- JP
- Japan
- Prior art keywords
- plating
- solder
- functional
- connection
- plated
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3421—Leaded components
Landscapes
- Electroplating Methods And Accessories (AREA)
- Manufacturing Of Electrical Connectors (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Lead Frames For Integrated Circuits (AREA)
Description
【0001】[0001]
【産業上の利用分野】本発明は、表面実装用の電子部品
に係り、特に良好なリフロー半田付けが得られる小型化
が可能な表面実装用端子の製造方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic component for surface mounting and, more particularly, to a method of manufacturing a surface mounting terminal which can achieve good reflow soldering.
【0002】電子機器の小型化と共に、配線基板に実装
される電子部品は小型化しリード線(端子)も微細化
し、その搭載方法もプリント板にリード線挿入用の貫通
孔を設けずに表面の接続パッドにリフロー半田付けなど
で接続する表面実装(SMT,Surface Mount Technolo
gy) が多用されるようになってきた。Along with the miniaturization of electronic equipment, electronic components mounted on a wiring board are also miniaturized and lead wires (terminals) are also miniaturized. The mounting method is such that a through hole for inserting a lead wire is not provided in a printed board. Surface mounting (SMT, Surface Mount Technolo
gy) has become popular.
【0003】このように端子の微細化にともない、半田
付け部から流出する再溶融半田が部品に悪影響を及ぼす
ことがしばしばあり、このための対策が望まれている。As the terminals are miniaturized in this way, the remelted solder flowing out from the soldering portion often adversely affects the components, and a countermeasure for this is desired.
【0004】[0004]
【従来の技術】電子部品の表面実装は、配線基板等の表
面にパターン形成された導体材料よりなる接続パッド上
に、電気めっきや溶融めっきによって半田被膜が被着さ
れた接続端子を備えた電子部品を載置し、赤外線加熱や
気相加熱等で半田被膜を再溶融させて端子と接続パッド
とを半田付けするいわゆるリフロー半田付け(reflow s
oldering) で行われる。2. Description of the Related Art The surface mounting of electronic components is an electronic device having a connection terminal in which a solder coating is applied by electroplating or hot dip plating on a connection pad made of a conductive material patterned on the surface of a wiring board or the like. So-called reflow soldering (reflow s) in which parts are placed and the solder coating is remelted by infrared heating or vapor phase heating to solder the terminals to the connection pads.
oldering).
【0005】例えば、図4は表面実装用のハイブリッド
ICを示すもので、回路素子が形成されたセラミック基板
1に略L字形状の複数の表面実装用端子2を2列に設
け、L形の下辺を配線基板上の接続パッドに当接させた
状態で、端子の接続部21の予備半田を溶融させて接続す
る。For example, FIG. 4 shows a hybrid for surface mounting.
An IC is shown. A plurality of substantially L-shaped surface mounting terminals 2 are provided in two rows on a ceramic substrate 1 on which circuit elements are formed, and the lower side of the L shape is brought into contact with a connection pad on a wiring board. In this state, the preliminary solder of the terminal connection portion 21 is melted and connected.
【0006】そしてこの端子は、銅合金などの良導電材
料をプレス加工で櫛歯状の連結部材に形成し、連続めっ
きで所定の表面処理を行って作成するのが普通である。
この構造は図5にその拡大断面図を示すように、例えば
燐青銅材料の基材22にまずニッケル等の卑金属材料より
なる下地めっき23を全面に行い、次いで金やパラジュウ
ムなどの耐蝕性がすぐれかつ半田に対する濡れ性の良い
貴金属の貴金属めっき24を施し、ついで配線基板への接
続部21の表面に溶融または電気めっきにより半田被膜25
を厚く被着せしめ接続部を形成していた。[0006] It is usual that this terminal is formed by forming a comb-like connecting member by pressing a good conductive material such as a copper alloy and performing a predetermined surface treatment by continuous plating.
As shown in the enlarged cross-sectional view of FIG. 5, this structure has, for example, a base material 22 made of a phosphor bronze material, which is first plated with a base metal 23 made of a base metal material such as nickel, and then excellent in corrosion resistance such as gold and palladium. In addition, a noble metal plating 24 of a noble metal having good wettability to solder is applied, and then the surface of the connection portion 21 to the wiring board is melted or electroplated to obtain a solder coating 25.
Was thickly applied to form the connection portion.
【0007】[0007]
【発明が解決しようとする課題】リフロー半田付けのプ
ロセスでは、端子部を加熱し予め端子の接続部に被着し
ている半田材料を再溶融して、図6の如く配線基板3の
接続パッド31との半田付けを行う。In the reflow soldering process, the terminal portion is heated to re-melt the solder material deposited on the terminal connecting portion in advance, and the connecting pad of the wiring board 3 as shown in FIG. Solder with 31.
【0008】従来の表面実装用端子の表面処理において
は、半田めっきは半田に対する濡れ性が良い貴金属めっ
き被膜上に被着されているため、加熱前の半田が端子の
接続部のみに被着されていてもリフロー半田付け時の加
熱により、再溶融して接続部から端子の上方へ移行す
る。In the conventional surface treatment of the surface mounting terminal, since the solder plating is deposited on the noble metal plating film having good wettability with respect to the solder, the solder before heating is deposited only on the connection portion of the terminal. Even when the reflow soldering is performed, it is re-melted by the heating during the reflow soldering and moves from the connection portion to above the terminal.
【0009】最近の電子部品は小型・高密度化が著し
く、その端子も極めて微細化しており、接続部とその他
の機能部とが接近しており、上記半田の移行(半田上が
り)が機能部まで達することがしばしば生じる。Recent electronic parts are remarkably miniaturized and highly densified, their terminals are also extremely miniaturized, and the connection part and other functional parts are close to each other. It often happens up to.
【0010】しかし機能部は本来、貴金属めっき被膜で
覆われている必要がある部分であり半田で濡れると種々
問題が生じる。例えば、図6に示すハイブリッドICの
端子2の上端部は金−金拡散によりセラミック基板1上
のパターン11にボンディング接続されているので、図6
に示す如く、再溶融した半田25' がこの部分を濡らすと
ボンディング接続の長期信頼性を損なうといった問題が
あり、またコネクタのコンタクトなどでは端子部に接近
した貴金属めっき接点部が半田に濡れるとコネクタ接触
の信頼性が低下する等の問題点がある。そこで、貴金属
機能部と接続部との間に、半田ぬれ性の悪いニッケル等
の卑金属膜層を露呈させることによって半田上がりを該
バリア部でストップさせる半田バリア付き表面実装用端
子が提案されている。しかし、そのバリア部の形成方法
として、卑金属下地めっき上に部分めっきにより機能部
と接続部とを分離して形成する製法がとられていたた
め、バリア部の境界を精度良く形成することができず、
半田あがりを有効に防止するためには、バリア部の長さ
がながくなり端子の寸法が小型化できないという問題が
あった。However, the functional portion is originally a portion that needs to be covered with a noble metal plating film, and various problems occur when it gets wet with solder. For example, the upper end of the terminal 2 of the hybrid IC shown in FIG. 6 is bonded and connected to the pattern 11 on the ceramic substrate 1 by gold-gold diffusion.
As shown in, there is a problem that remelted solder 25 'impairs the long-term reliability of the bonding connection if it wets this part, and in the contact of the connector etc., if the precious metal plated contact part close to the terminal part gets wet with the connector There is a problem that the reliability of contact decreases. Therefore, a surface mount terminal with a solder barrier has been proposed in which a base metal film layer of nickel or the like having poor solder wettability is exposed between the noble metal functional part and the connection part to stop solder rising at the barrier part. . However, as a method of forming the barrier portion, since the method of forming the functional portion and the connecting portion separately by partial plating on the base metal undercoating was adopted, the boundary of the barrier portion could not be formed accurately. ,
In order to effectively prevent soldering, there is a problem that the length of the barrier portion becomes long and the size of the terminal cannot be reduced.
【0011】本発明は上記課題に鑑み創出されたもの
で、半田バリア部を高精度に形成することが可能な表面
実装用の端子の製造方法を提供することを目的とする。The present invention has been made in view of the above problems, and an object of the present invention is to provide a method for manufacturing a surface mounting terminal capable of forming a solder barrier portion with high accuracy.
【0012】[0012]
【課題を解決するための手段】図1は本発明の表面実装
用端子の製造工程を示す図である。上記従来の課題は、
図1に示すように、電子部品を配線基板の接続パッドに
リフロー半田付けにより半田付けするために用いる表面
実装用端子であって、配線基板との接続部(B) の表面は
半田めっき(44)され、該接続部(B) の反対側端部の機能
部(C) の表面は貴金属めっき(43)されており、前記接続
部(B) と前記機能部(C) との境界には半田濡れ性が悪い
卑金属めっき(42)が表面に露呈してなるバリア部(A) が
設けれらている表面実装用端子の製造方法において、導
電材料よりなる基材(41) の全表面に該卑金属を下地め
っきし、次に機能部(C) を含む表面を貴金属により部分
めっきし、次に機能部をレジスト膜でマスクして該機能
部以外の貴金属めっき膜を除去し、次に所定長の下地め
っき膜を含めて機能部(C) をめっきレジスト膜(52)でマ
スクしてから接続部(B) を含む表面に半田めっき(44)を
施し、次に該めっきレジスト膜を除去して該所定長部分
の下地めっきを露呈させ、バリア部(A) を形成すること
を特徴とする本発明の表面実装用端子の製造方法により
解決される。FIG. 1 is a diagram showing a manufacturing process of a surface mounting terminal of the present invention. The above conventional problems are
As shown in Fig. 1, these are surface mounting terminals used for soldering electronic components to the connection pads of the wiring board by reflow soldering, and the surface of the connection part (B) with the wiring board is solder plated (44 The surface of the functional portion (C) at the opposite end of the connecting portion (B) is plated with a noble metal (43), and the boundary between the connecting portion (B) and the functional portion (C) is In the method of manufacturing a surface mounting terminal that has a barrier portion (A) that is exposed to the base metal plating (42) with poor solder wettability, the entire surface of the base material (41) made of a conductive material is used. The base metal is ground-plated, then the surface including the functional portion (C) is partially plated with a noble metal, and then the functional portion is masked with a resist film to remove the precious metal plating film other than the functional portion. Mask the functional part (C) including the long underlying plating film with the plating resist film (52), and then cover the surface including the connection part (B). The surface-mounting terminal of the present invention is characterized in that the barrier plating (44) is formed, and then the plating resist film is removed to expose the base plating of the predetermined length portion to form the barrier portion (A). It is solved by the manufacturing method.
【0013】[0013]
【作用】接続部と機能部との境界のニッケルめっき露呈
部は半田に対する濡れ性が悪いためリフロー半田付け時
に再溶融した接続部の半田に濡れることがなく、機能部
の表面の貴金属被膜の半田濡れ性が良くても半田の移行
に対するバリアとして働くので機能部への半田上がりを
防止することができる。そして、機能部とバリア部との
境界はマスクによって、また接続部とバリア部との境界
はめっきマスクによってそれぞれ形成されるので、バリ
ア部の境界を明確に形成でき、バリア部の長さのばらつ
きが減少するため、端子を小型化することができる。[Function] Since the nickel plating exposed portion at the boundary between the connection portion and the function portion has poor wettability with respect to solder, it does not get wet by the remelted connection portion solder, and the solder of the precious metal film on the surface of the function portion Even if the wettability is good, it works as a barrier against the migration of solder, so that it is possible to prevent the solder from rising onto the functional portion. Since the boundary between the functional portion and the barrier portion is formed by the mask and the boundary between the connecting portion and the barrier portion is formed by the plating mask, the boundary of the barrier portion can be clearly formed, and the variation in the length of the barrier portion can be achieved. Since the number of terminals is reduced, the terminal can be downsized.
【0014】[0014]
【実施例】以下添付図により本発明の実施例を説明す
る。 図1は本発明の表面実装用端子の製造工程を示す
図、図2は本発明に係る表面実装用端子の拡大断面図で
ある。Embodiments of the present invention will be described below with reference to the accompanying drawings. FIG. 1 is a diagram showing a manufacturing process of the surface mounting terminal of the present invention, and FIG. 2 is an enlarged sectional view of the surface mounting terminal of the present invention.
【0015】図2において、41は銅合金などの導電材料
よりなる薄板を所定の形状に機械加工して形成した表面
実装用端子の基材で、全表面にニッケルなどの卑金属が
下地めっき42として施されている。In FIG. 2, reference numeral 41 is a base material of a surface mounting terminal formed by machining a thin plate made of a conductive material such as copper alloy into a predetermined shape, and a base metal such as nickel is used as a base plating 42 on the entire surface. It has been subjected.
【0016】そして配線基板の接続パッドに半田付けさ
れる接続部Bには、電気めっきや溶融めっきなどにより
厚さ数10μm の半田めっき44が被着され、バリア部12
は、卑金属の下地めっき2を露呈させ、接続部と反対側
の端はセラミック基板1へボンディングされる機能部C
としてその表面には金またはパラジュウムなどの貴金属
めっき43が施されている。そして上記接続部Bと機能部
Cとの境界部分には所定の長さにわたって下地めっきの
ニッケル材料が表面に露呈させてバリア部Aが形成され
ている。A solder plating 44 having a thickness of several 10 μm is deposited on the connection portion B to be soldered to the connection pad of the wiring board by electroplating, hot dip plating, etc.
Is a functional part C that exposes the base metal undercoat 2 and the end opposite to the connection part is bonded to the ceramic substrate 1.
As a result, a precious metal plating 43 such as gold or palladium is applied on the surface. A barrier portion A is formed at the boundary between the connecting portion B and the functional portion C by exposing the nickel material of the undercoat over the surface for a predetermined length.
【0017】図1は、上記膜構成を有する表面接続用端
子の製造工程を順次示したものである。まず図(a)の
如く基材41の全表面にニッケル下地めっき42を施す。つ
いで部分めっきなどで上方の機能部に貴金属めっき43を
施すが部分めっき時のめっき液の廻り込みなどで貴金属
めっき43の下側の境界は明確でないのが普通である。そ
こで図の(b) の如くレジスト膜51で所望の機能部Cをマ
スクして残余部分の貴金属めっき膜を除去することによ
り、図の(c) に示す下地めっき42の露呈部分との境界が
明確な貴金属めっき膜43を形成する。次いで、所定長の
下地めっき42の露呈部分Aと貴金属めっき膜43をめっき
レジスト52でマスクし、接続部の表面に半田めっき44を
施す。そしてレジスト52を剥離して図の(d) に示す中間
部材を得て、例えばD部でL字曲げを行って、図2の表
面実装用端子を作成する。FIG. 1 shows a sequence of steps for manufacturing the surface connection terminal having the above film structure. First, nickel base plating 42 is applied to the entire surface of the base material 41 as shown in FIG. Then, the noble metal plating 43 is applied to the upper functional portion by partial plating or the like, but the lower boundary of the noble metal plating 43 is usually not clear due to the wraparound of the plating solution during the partial plating. Therefore, by masking the desired functional portion C with the resist film 51 as shown in FIG. 9B and removing the remaining noble metal plating film, the boundary with the exposed portion of the base plating 42 shown in FIG. A clear noble metal plating film 43 is formed. Next, the exposed portion A of the base plating 42 having a predetermined length and the noble metal plating film 43 are masked with the plating resist 52, and the solder plating 44 is applied to the surface of the connection portion. Then, the resist 52 is peeled off to obtain the intermediate member shown in FIG. 2D, and the L-shaped bending is performed at the D portion, for example, to form the surface mounting terminal shown in FIG.
【0018】図3はこのような表面実装用端子を有する
電子部品1を配線基板3の接続パッド31にリフロー半田
付けにより搭載した場合の半田接続部分の状態を示す。
接続部と機能部との境界の下地めっき露呈部は半田濡れ
性が悪いニッケル材料よりなるため、溶融半田に対する
バリア部として働き、再溶融した半田の接続部からの流
出が防止され機能部はもとの表面処理のまま保たれる。FIG. 3 shows a state of a solder connection portion when the electronic component 1 having such a surface mounting terminal is mounted on the connection pad 31 of the wiring board 3 by reflow soldering.
The exposed portion of the underlying plating at the boundary between the connection portion and the function portion is made of a nickel material having poor solder wettability, and thus functions as a barrier portion against molten solder, preventing remelted solder from flowing out from the connection portion, and the function portion The surface treatment with and is maintained.
【0019】表1は図2に示すハイブリッドICの端子
に本発明を適用した場合の効果を示す実験結果である。
これはバリア部を形成し、バリア部の長さを変えてバリ
ア部を越えて半田が上方の機能部まで濡らすかどうかを
観察したものであり、実験は各グループ120 本の端子に
ついて、 400°C に加熱したホットプレート上に接続部
を1分間載置して半田を再溶融させて観測した。Table 1 shows the experimental results showing the effect when the present invention is applied to the terminals of the hybrid IC shown in FIG.
This is to observe whether or not the barrier part is formed, the length of the barrier part is changed, and the solder wets over the barrier part and reaches the upper functional part. The connection was placed on a hot plate heated to C for 1 minute to re-melt the solder and observed.
【0020】[0020]
【表1】 [Table 1]
【0021】この結果によると0.1mm 以上の長さにわた
って下地のニッケルめっきを露呈させたバリア部を形成
することにより、半田上がりを完全に防止できることを
示している。The results show that the solder rise can be completely prevented by forming the barrier portion exposing the underlying nickel plating over a length of 0.1 mm or more.
【0022】以上の如く本発明によれば、表面実装用端
子の接続部と機能部との間に境界線が明確なバリア部を
形成できるので、半田上がりを防止するためのバリア部
の長さを小さくでき、従って全体の寸法を小型化でき
る。As described above, according to the present invention, since the barrier portion having a clear boundary line can be formed between the connection portion of the surface mounting terminal and the functional portion, the length of the barrier portion for preventing solder rising Can be made smaller, and therefore the overall size can be made smaller.
【0023】[0023]
【発明の効果】以上述べたように本発明によれば、リフ
ロー半田付けの際に、所望の半田付け接続部以外への半
田上がりを防止できる表面実装用の端子を小型化するこ
とができ、電子部品の小型、高密度化に貢献することが
顕著である。As described above, according to the present invention, at the time of reflow soldering, it is possible to miniaturize the surface mounting terminal capable of preventing solder rising to other than the desired soldering connection portion, It is remarkable that it contributes to miniaturization and high density of electronic parts.
【図1】 本発明の表面実装用端子の製造工程を示す図FIG. 1 is a diagram showing a manufacturing process of a surface mounting terminal of the present invention.
【図2】 本発明に係る表面実装用端子の拡大断面図FIG. 2 is an enlarged cross-sectional view of a surface mounting terminal according to the present invention.
【図3】 本発明の表面実装用端子の効果を示す模式図FIG. 3 is a schematic view showing the effect of the surface mounting terminal of the present invention.
【図4】 表面実装用のバイブリッドICの外観図FIG. 4 is an external view of a surface mount hybrid IC.
【図5】 従来の表面実装用端子の拡大断面図FIG. 5 is an enlarged sectional view of a conventional surface mounting terminal.
【図6】 従来の表面実装用端子の半田上がりを示す
図、FIG. 6 is a diagram showing a solder rise of a conventional surface mounting terminal,
【符号の説明】 1─セラミック基板、11─パターン、3─配線基板、31
─接続パッド、41─基材、42─ニッケルめっき、43─貴
金属めっき、44─半田めっき、A─バリア部、B─接続
部、C─機能部[Explanation of symbols] 1-ceramic substrate, 11-pattern, 3-wiring substrate, 31
--Connecting pad, 41--Base material, 42--Nickel plating, 43--Precious metal plating, 44--Solder plating, A--Barrier part, B--Connecting part, C--Functional part
Claims (1)
ロー半田付けにより半田付けするために用いる表面実装
用端子であって、配線基板との接続部(B) の表面は半田
めっき(44)され、該接続部(B) の反対側端部の機能部
(C) の表面は貴金属めっき(43)されており、前記接続部
(B) と前記機能部(C) との境界には半田濡れ性が悪い卑
金属めっき(42)が表面に露呈してなるバリア部(A) が設
けられている表面実装用端子の製造方法において、 導電材料よりなる基材(41) の全表面に該卑金属を下地
めっきし、 次に機能部(C) を含む表面を貴金属により部分めっき
し、 次に機能部をレジスト膜でマスクして該機能部以外の貴
金属めっき膜を除去し、 次に所定長の下地めっき膜を含めて機能部(C) をめっき
レジスト膜(52)でマスクしてから接続部(B) を含む表面
に半田めっき(44)を施し、 次に該めっきレジスト膜を除去して該所定長部分の下地
めっきを露呈させ、 バリア部(A) を形成することを特徴とする表面実装用端
子の製造方法。1. A surface mounting terminal used for soldering an electronic component to a connection pad of a wiring board by reflow soldering, wherein a surface of a connection portion (B) with the wiring board is solder plated (44). , Functional part at the opposite end of the connecting part (B)
The surface of (C) is plated with precious metal (43),
In the method for manufacturing a surface-mounting terminal, in which a barrier portion (A) formed by exposing a base metal plating (42) having poor solder wettability to the surface is provided at the boundary between (B) and the functional portion (C). The base metal (41) made of a conductive material is ground-plated on the entire surface, then the surface including the functional portion (C) is partially plated with a noble metal, and then the functional portion is masked with a resist film. Remove the noble metal plating film other than the functional part, then mask the functional part (C) including the underlying plating film of the specified length with the plating resist film (52), and then solder-plat the surface including the connection part (B). (44) is performed, and then the plating resist film is removed to expose the base plating of the predetermined length portion to form the barrier portion (A), which is a method for producing a surface mounting terminal.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16997593A JP2501174B2 (en) | 1993-07-09 | 1993-07-09 | Method for manufacturing surface mount terminal |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16997593A JP2501174B2 (en) | 1993-07-09 | 1993-07-09 | Method for manufacturing surface mount terminal |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH06112391A JPH06112391A (en) | 1994-04-22 |
JP2501174B2 true JP2501174B2 (en) | 1996-05-29 |
Family
ID=15896280
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP16997593A Expired - Lifetime JP2501174B2 (en) | 1993-07-09 | 1993-07-09 | Method for manufacturing surface mount terminal |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2501174B2 (en) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3871820B2 (en) * | 1998-10-23 | 2007-01-24 | ローム株式会社 | Semiconductor light emitting device |
JP3895086B2 (en) * | 1999-12-08 | 2007-03-22 | ローム株式会社 | Chip-type semiconductor light-emitting device |
JP4896391B2 (en) * | 2004-11-09 | 2012-03-14 | 日本圧着端子製造株式会社 | Plating contact and contact plating method |
JP4660231B2 (en) * | 2005-03-10 | 2011-03-30 | 株式会社シミズ | Surface treatment method and method of manufacturing electronic component using the same |
TWI367552B (en) * | 2007-08-22 | 2012-07-01 | Everlight Electronics Co Ltd | Soldering process for electrical component and apparatus thereof |
JP2010135691A (en) * | 2008-12-08 | 2010-06-17 | Tdk Corp | Reed type electronic component |
-
1993
- 1993-07-09 JP JP16997593A patent/JP2501174B2/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JPH06112391A (en) | 1994-04-22 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US4104111A (en) | Process for manufacturing printed circuit boards | |
JP3618997B2 (en) | How to create a metal standoff on an electronic circuit | |
EP0947125B1 (en) | Method of making a printed circuit board having a tin/lead coating | |
US6022466A (en) | Process of plating selective areas on a printed circuit board | |
US4525246A (en) | Making solderable printed circuit boards | |
US6148512A (en) | Method for attaching an electronic device | |
JP2501174B2 (en) | Method for manufacturing surface mount terminal | |
US5863406A (en) | Method of manufacturing a printed circuit board | |
EP0127955B1 (en) | Manufacture of printed circuit boards | |
JPWO2004056162A1 (en) | Electronic component for flip chip mounting and manufacturing method thereof, circuit board and manufacturing method thereof, mounting body manufacturing method | |
JP2859741B2 (en) | Manufacturing method of printed wiring board | |
JP3275413B2 (en) | Lead frame and manufacturing method thereof | |
US5024734A (en) | Solder pad/circuit trace interface and a method for generating the same | |
EP0095256A1 (en) | Method of making printed circuits | |
EP0946086A1 (en) | Plated leadframes with cantilever leads | |
JP2864705B2 (en) | TAB film carrier tape and method for solder coating on its lead | |
JPH10294549A (en) | Manufacture of printed wiring board and printed wiring board | |
JPH06252310A (en) | Lead frame and manufacture thereof | |
JPH0558678B2 (en) | ||
JPS63283051A (en) | Substrate for hybrid integrated circuit device | |
JPH03269962A (en) | Electrical connecting member | |
JPH04240759A (en) | Pin structure and manufacture thereof | |
JPH01238132A (en) | Electrode for solder join and manufacture of the same | |
JP2973597B2 (en) | Electronic circuit formation method | |
JP2003110061A (en) | Electronic component for flip-chip packaging and manufacturing method thereof, circuit plate and manufacturing method thereof, and manufacturing method of packaging body |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 19960116 |