JP2576374B2 - In-device path monitoring device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an in-device path monitoring device, and more particularly to monitoring of n input / output paths in a system in which one of n input digital signals having mutually different phases is selected and used as an output signal. And an intra-device path monitoring method that performs

[0002]

2. Description of the Related Art Conventionally, in this kind of in-device path monitoring system, a fixed pattern for monitoring is inserted into specific empty time slots of n input signals, and a specific time slot of an output signal is monitored. Checking the reception status.

In this system, only one path passes between input and output among n paths depending on the signal selection state. Therefore, in order to constantly monitor the n paths, the n signals are sequentially selected for each frame in a specific time slot of each input signal independently of the signal selection state.

In a specific time slot of an output signal, n-system fixed patterns appear in order for each frame. By monitoring this fixed pattern, monitoring of n-system paths is always performed irrespective of the signal selection state. Is going.

In the above monitoring method, the selector is controlled in a specific empty time slot independently of the signal selection state, so that the bit phases of the specific time slots into which the n-system fixed patterns are inserted are aligned. That is, it is assumed that the phases of the signals of the n systems are aligned.

Accordingly, when the signals of the n systems have different phases, in order to perform monitoring by the above-described monitoring method, a memory for storing a phase difference based on the input signal having the most delayed phase with respect to each input signal. By having this, it is necessary to absorb the phase difference and make the phases of the n-system signals uniform.

[0007]

The above-described conventional in-device path monitoring method is based on the premise that the signals of the n systems are in phase as described above. Therefore, when the phases of the n-system signals are different, it is necessary to have a memory for the phase difference based on the input signal with the most delayed phase for each input signal. There is a problem that the required memory capacity increases and the hardware scale increases.

When a memory for absorbing a phase difference based on an input signal with the most delayed phase is not used, n
There is a problem that only the selected one path among the paths of the system can be monitored, and the other paths cannot be monitored.

Accordingly, an object of the present invention is to solve the above-mentioned problems and to provide an in-device path monitoring device capable of performing monitoring between input and output of a plurality of paths without increasing the hardware scale. Is to do.

[0010]

According to the present invention, there is provided an in-device path monitoring apparatus comprising: a first and a second input signal having a specific time slot at a preset position for each frame and having different phases from each other; A path monitoring device in a device for selecting and outputting one of the following, wherein a specific time slot of each frame of the first input signal is moved according to a phase difference with the second input signal. First moving means, first inserting means for inserting a predetermined first fixed pattern at the position of the specific time slot moved by the first moving means, and specifying the second input signal. Second insertion means for inserting a predetermined second fixed pattern at the position of a time slot, and the first and second fixed patterns are sequentially selected from the output of each of the first and second insertion means. Selection means The first based on sequentially selected first and second fixed pattern at said selecting means and the second
And a second moving means for moving the moved specific time slot to a preset position of the first input signal.

[0011]

Next, an embodiment of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of one embodiment of the present invention. In the figure, an input main signal 11 is connected to one input of a selector unit 4 through a shift circuit 1 and a pattern insertion unit 2. The input main signal 12 is connected to the other input of the selector unit 4 through the pattern insertion unit 3.

The selector section 4 selects one of the input main signals 11 and 12 inputted through the pattern inserting sections 2 and 3 and outputs the selected signal as an output signal 16 to the pattern detecting section 5 and the shift circuit 6. .

The output signal 16 of the selector section 4 is output as an output main signal 17 through the shift circuit 6, and
The pattern detection unit 5 detects a fixed pattern from a specific time slot.

Each of the circuits described above, that is, the shift circuit 1,
The pattern insertion units 2 and 3, the selector unit 4, the pattern detection unit 5, and the shift circuit 6 are controlled by control pulses 18 to 22 from the control unit 7, respectively.

FIG. 2 is a time chart showing the operation of one embodiment of the present invention. The operation of the embodiment of the present invention will be described with reference to FIGS. Here, in one embodiment of the present invention, the input main signals 11 and 12 each correspond to one frame 1
It is assumed that the time slot is composed of 4 bits, time slots 3 and 4 are empty time slots, and the input main signal 12 is delayed by 5 bits from the input main signal 11.

In the shift circuit 1, in each frame of the input main signal 11, the data D1, D
When 2 is transmitted to the pattern insertion unit 2 through a buffer circuit (not shown), empty time slots of time slots 3 and 4 are held in the buffer circuit.

When the empty time slots of the time slots 3 and 4 are held in the buffer circuit, the control unit 7 sends the data D3 to D7 of the subsequent time slots 5 to 9 to the pattern insertion unit 2 without passing through the buffer circuit. Control to send.

Thereafter, the vacant time slot held in the buffer circuit is sent to the pattern insertion unit 2, so that
The empty time slot of the input main signal 11 is moved to the position of time slots 8 and 9. Thereby, the main signal 13
Have the same phase as the empty time slot of the input main signal 12 (see FIG. 2).

The pattern inserter 2 inserts the fixed pattern P1 into an empty time slot of the main signal 13 and
And sends it to the selector unit 4. In the pattern insertion unit 3, a fixed pattern P is assigned to an empty time slot of the input main signal 12.
2 is inserted and sent to the selector unit 4 as the main signal 15.

The selector section 4 selects the data D1 to D12 of the main signal 14 in time slots other than the empty time slots of the main signals 14 and 15, and sequentially sorts the fixed patterns P1 and P2 in the empty time slots of the main signals 14 and 15. Has been selected. Therefore, the selector unit 4 outputs data D1 to D3 in which the fixed patterns P1 and P2 are alternately entered in the empty time slots.
D12 is output as the main signal 16.

The main signal 16 is a signal of the main signal 14 other than the empty time slot. In the empty time slot, the fixed pattern P1, P2 is sequentially inserted for each frame (see FIG. 2).

The pattern detection unit 5 monitors the fixed patterns P1 and P2 inserted in the empty time slots of each frame, so that the main signal paths from the input main signal 11 to the output main signal 17 and the input main signals 12 to The main signal paths of two systems of the main signal path up to the output main signal 17 are monitored.

In the shift circuit 6, in each frame of the main signal 16, the data D of the time slots 1 and 2
When the data D1 and D2 are transmitted as an output main signal 17 through a buffer circuit (not shown), the data D3 to D7 of the subsequent time slots 3 to 7 are shifted by 2 bits using the buffer circuit, and the time slots 3 and 4 are shifted. It shall be an empty time slot.

Data D3 to D7 of time slots 3 to 7
Is output after being shifted by 2 bits in the buffer circuit, the control unit 7 controls so that the data D8 to D12 of the subsequent time slots 10 to 14 are transmitted as the output main signal 17 without passing through the buffer circuit.

In the above-mentioned example, the case where the selector 4 selects the input main signal 11 except for the empty time slot is shown. However, the selector 4 selects the input main signal 12 except for the empty time slot. In this case, since the empty time slot of the main signal 16 has the same phase as the input main signal 12, the shift circuit 6 does not perform the bit shift operation.

As described above, the plurality of input main signals 11, 12
When the empty time slots for inserting the fixed patterns P1 and P2 for path monitoring are different in phase, shift circuits 1 and 6 are arranged before and after the path monitoring section, and the shift circuits 1 and 6 are used. By matching the phases of the free time slots of the main signal in the path monitoring section, n systems (in this case, n = 2) without depending on the selection state of data other than the free time slots of the input main signals 11 and 12.
, And all the fixed patterns P1 and P2 can be obtained, and monitoring can be performed between the input and output of the n main signal paths.

The shift circuits 1 and 2 required at this time
The buffer circuit 6 has a capacity of the bit length of the fixed patterns P1 and P2 (in this case, 2 bits), and does not depend on the phase difference between the input main signals 11 and 12 (in this case, 5 bits).

Therefore, when the phase difference between the input main signals 11 and 12 is large, the hardware scale can be made smaller than when the conventional technique is used. Therefore, monitoring can be performed between input and output of a plurality of paths without increasing the hardware scale.

[0030]

As described above, according to the present invention, one of the first and second input signals having a specific time slot at a preset position for each frame and having different phases from each other. In the in-device path monitoring device of the system that selects and outputs the selected time slot, the specific time slot of each frame of the first input signal is moved according to the phase difference with the second input signal, A predetermined first fixed pattern is inserted at the position, and a predetermined second fixed pattern is inserted at the position of the specific time slot of the second input signal.
Are sequentially selected to monitor the first and second input signals.
By moving the input signal to a predetermined position, monitoring between input and output of a plurality of paths can be performed without increasing the hardware scale.

[Brief description of the drawings]

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention.

FIG. 2 is a time chart showing the operation of one embodiment of the present invention.

[Explanation of symbols]

 1, 6 shift circuit 2, 3 pattern insertion unit 4 selector unit 5 pattern detection unit 7 control unit

Claims (2)

(57) [Claims] A first time slot having a specific time slot at a preset position for each frame and having different phases from each other.
And an internal path monitoring device of a system for selecting and outputting one of a second input signal and a specific time slot of each frame of the first input signal, First moving means that moves according to the phase difference;
First insertion means for inserting a predetermined first fixed pattern at the position of the specific time slot moved by the first movement means, and a predetermined insertion pattern at a position of the specific time slot of the second input signal; Second insertion means for inserting a predetermined second fixed pattern, selection means for sequentially selecting the first and second fixed patterns from the output of each of the first and second insertion means, Means for monitoring the first and second input signals on the basis of the first and second fixed patterns sequentially selected by the means; and setting the moved specific time slot in advance of the first input signal. And a second moving means for moving to a shifted position. 2. The intra-apparatus path monitoring apparatus according to claim 1, wherein said first and second moving means are constituted by a buffer memory capable of performing a shift operation.